Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 1 | /* |
| 2 | * OMAP5 thermal driver. |
| 3 | * |
| 4 | * Copyright (C) 2011-2012 Texas Instruments Inc. |
| 5 | * Contact: |
| 6 | * Eduardo Valentin <eduardo.valentin@ti.com> |
| 7 | * |
| 8 | * This software is licensed under the terms of the GNU General Public |
| 9 | * License version 2, as published by the Free Software Foundation, and |
| 10 | * may be copied, distributed, and modified under those terms. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | */ |
| 18 | |
Eduardo Valentin | 7372add | 2013-03-19 10:54:19 -0400 | [diff] [blame^] | 19 | #include "ti-thermal.h" |
| 20 | #include "ti-bandgap.h" |
Eduardo Valentin | 787f3c2 | 2013-03-15 08:59:51 -0400 | [diff] [blame] | 21 | #include "omap5xxx-bandgap.h" |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 22 | |
| 23 | /* |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 24 | * OMAP5430 has three instances of thermal sensor for MPU, GPU & CORE, |
| 25 | * need to describe the individual registers and bit fields. |
| 26 | */ |
| 27 | |
| 28 | /* |
| 29 | * OMAP5430 MPU thermal sensor register offset and bit-fields |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 30 | */ |
| 31 | static struct temp_sensor_registers |
| 32 | omap5430_mpu_temp_sensor_registers = { |
| 33 | .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET, |
| 34 | .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 35 | .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK, |
| 36 | .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK, |
| 37 | |
| 38 | .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET, |
| 39 | .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK, |
| 40 | .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK, |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 41 | .mask_sidlemode_mask = OMAP5430_MASK_SIDLEMODE_MASK, |
| 42 | .mask_freeze_mask = OMAP5430_MASK_FREEZE_MPU_MASK, |
| 43 | .mask_clear_mask = OMAP5430_MASK_CLEAR_MPU_MASK, |
| 44 | .mask_clear_accum_mask = OMAP5430_MASK_CLEAR_ACCUM_MPU_MASK, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 45 | |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 46 | |
Eduardo Valentin | 8c9e642 | 2013-02-26 18:53:32 -0400 | [diff] [blame] | 47 | .bgap_counter = OMAP5430_BGAP_CTRL_OFFSET, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 48 | .counter_mask = OMAP5430_COUNTER_MASK, |
| 49 | |
| 50 | .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET, |
| 51 | .threshold_thot_mask = OMAP5430_T_HOT_MASK, |
| 52 | .threshold_tcold_mask = OMAP5430_T_COLD_MASK, |
| 53 | |
| 54 | .tshut_threshold = OMAP5430_BGAP_TSHUT_MPU_OFFSET, |
| 55 | .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK, |
| 56 | .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK, |
| 57 | |
| 58 | .bgap_status = OMAP5430_BGAP_STATUS_OFFSET, |
| 59 | .status_clean_stop_mask = 0x0, |
| 60 | .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK, |
| 61 | .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK, |
| 62 | .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK, |
| 63 | |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 64 | .bgap_cumul_dtemp = OMAP5430_BGAP_CUMUL_DTEMP_MPU_OFFSET, |
| 65 | .ctrl_dtemp_0 = OMAP5430_BGAP_DTEMP_MPU_0_OFFSET, |
| 66 | .ctrl_dtemp_1 = OMAP5430_BGAP_DTEMP_MPU_1_OFFSET, |
| 67 | .ctrl_dtemp_2 = OMAP5430_BGAP_DTEMP_MPU_2_OFFSET, |
| 68 | .ctrl_dtemp_3 = OMAP5430_BGAP_DTEMP_MPU_3_OFFSET, |
| 69 | .ctrl_dtemp_4 = OMAP5430_BGAP_DTEMP_MPU_4_OFFSET, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 70 | .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU, |
| 71 | }; |
| 72 | |
| 73 | /* |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 74 | * OMAP5430 GPU thermal sensor register offset and bit-fields |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 75 | */ |
| 76 | static struct temp_sensor_registers |
| 77 | omap5430_gpu_temp_sensor_registers = { |
| 78 | .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET, |
| 79 | .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 80 | .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK, |
| 81 | .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK, |
| 82 | |
| 83 | .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET, |
Eduardo Valentin | f49302d | 2013-02-26 18:53:27 -0400 | [diff] [blame] | 84 | .mask_hot_mask = OMAP5430_MASK_HOT_GPU_MASK, |
| 85 | .mask_cold_mask = OMAP5430_MASK_COLD_GPU_MASK, |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 86 | .mask_sidlemode_mask = OMAP5430_MASK_SIDLEMODE_MASK, |
| 87 | .mask_freeze_mask = OMAP5430_MASK_FREEZE_GPU_MASK, |
| 88 | .mask_clear_mask = OMAP5430_MASK_CLEAR_GPU_MASK, |
| 89 | .mask_clear_accum_mask = OMAP5430_MASK_CLEAR_ACCUM_GPU_MASK, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 90 | |
Eduardo Valentin | 8c9e642 | 2013-02-26 18:53:32 -0400 | [diff] [blame] | 91 | .bgap_counter = OMAP5430_BGAP_CTRL_OFFSET, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 92 | .counter_mask = OMAP5430_COUNTER_MASK, |
| 93 | |
| 94 | .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET, |
| 95 | .threshold_thot_mask = OMAP5430_T_HOT_MASK, |
| 96 | .threshold_tcold_mask = OMAP5430_T_COLD_MASK, |
| 97 | |
| 98 | .tshut_threshold = OMAP5430_BGAP_TSHUT_GPU_OFFSET, |
| 99 | .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK, |
| 100 | .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK, |
| 101 | |
| 102 | .bgap_status = OMAP5430_BGAP_STATUS_OFFSET, |
| 103 | .status_clean_stop_mask = 0x0, |
| 104 | .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK, |
Eduardo Valentin | f49302d | 2013-02-26 18:53:27 -0400 | [diff] [blame] | 105 | .status_hot_mask = OMAP5430_HOT_GPU_FLAG_MASK, |
| 106 | .status_cold_mask = OMAP5430_COLD_GPU_FLAG_MASK, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 107 | |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 108 | .bgap_cumul_dtemp = OMAP5430_BGAP_CUMUL_DTEMP_GPU_OFFSET, |
| 109 | .ctrl_dtemp_0 = OMAP5430_BGAP_DTEMP_GPU_0_OFFSET, |
| 110 | .ctrl_dtemp_1 = OMAP5430_BGAP_DTEMP_GPU_1_OFFSET, |
| 111 | .ctrl_dtemp_2 = OMAP5430_BGAP_DTEMP_GPU_2_OFFSET, |
| 112 | .ctrl_dtemp_3 = OMAP5430_BGAP_DTEMP_GPU_3_OFFSET, |
| 113 | .ctrl_dtemp_4 = OMAP5430_BGAP_DTEMP_GPU_4_OFFSET, |
| 114 | |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 115 | .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU, |
| 116 | }; |
| 117 | |
| 118 | /* |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 119 | * OMAP5430 CORE thermal sensor register offset and bit-fields |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 120 | */ |
| 121 | static struct temp_sensor_registers |
| 122 | omap5430_core_temp_sensor_registers = { |
| 123 | .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET, |
| 124 | .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 125 | .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK, |
| 126 | .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK, |
| 127 | |
| 128 | .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET, |
| 129 | .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK, |
| 130 | .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK, |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 131 | .mask_sidlemode_mask = OMAP5430_MASK_SIDLEMODE_MASK, |
| 132 | .mask_freeze_mask = OMAP5430_MASK_FREEZE_CORE_MASK, |
| 133 | .mask_clear_mask = OMAP5430_MASK_CLEAR_CORE_MASK, |
| 134 | .mask_clear_accum_mask = OMAP5430_MASK_CLEAR_ACCUM_CORE_MASK, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 135 | |
Eduardo Valentin | 8c9e642 | 2013-02-26 18:53:32 -0400 | [diff] [blame] | 136 | .bgap_counter = OMAP5430_BGAP_CTRL_OFFSET, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 137 | .counter_mask = OMAP5430_COUNTER_MASK, |
| 138 | |
| 139 | .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET, |
| 140 | .threshold_thot_mask = OMAP5430_T_HOT_MASK, |
| 141 | .threshold_tcold_mask = OMAP5430_T_COLD_MASK, |
| 142 | |
| 143 | .tshut_threshold = OMAP5430_BGAP_TSHUT_CORE_OFFSET, |
| 144 | .tshut_hot_mask = OMAP5430_TSHUT_HOT_MASK, |
| 145 | .tshut_cold_mask = OMAP5430_TSHUT_COLD_MASK, |
| 146 | |
| 147 | .bgap_status = OMAP5430_BGAP_STATUS_OFFSET, |
| 148 | .status_clean_stop_mask = 0x0, |
| 149 | .status_bgap_alert_mask = OMAP5430_BGAP_ALERT_MASK, |
| 150 | .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK, |
| 151 | .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK, |
| 152 | |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 153 | .bgap_cumul_dtemp = OMAP5430_BGAP_CUMUL_DTEMP_CORE_OFFSET, |
| 154 | .ctrl_dtemp_0 = OMAP5430_BGAP_DTEMP_CORE_0_OFFSET, |
| 155 | .ctrl_dtemp_1 = OMAP5430_BGAP_DTEMP_CORE_1_OFFSET, |
| 156 | .ctrl_dtemp_2 = OMAP5430_BGAP_DTEMP_CORE_2_OFFSET, |
| 157 | .ctrl_dtemp_3 = OMAP5430_BGAP_DTEMP_CORE_3_OFFSET, |
| 158 | .ctrl_dtemp_4 = OMAP5430_BGAP_DTEMP_CORE_4_OFFSET, |
| 159 | |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 160 | .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE, |
| 161 | }; |
| 162 | |
| 163 | /* Thresholds and limits for OMAP5430 MPU temperature sensor */ |
| 164 | static struct temp_sensor_data omap5430_mpu_temp_sensor_data = { |
| 165 | .tshut_hot = OMAP5430_MPU_TSHUT_HOT, |
| 166 | .tshut_cold = OMAP5430_MPU_TSHUT_COLD, |
| 167 | .t_hot = OMAP5430_MPU_T_HOT, |
| 168 | .t_cold = OMAP5430_MPU_T_COLD, |
| 169 | .min_freq = OMAP5430_MPU_MIN_FREQ, |
| 170 | .max_freq = OMAP5430_MPU_MAX_FREQ, |
| 171 | .max_temp = OMAP5430_MPU_MAX_TEMP, |
| 172 | .min_temp = OMAP5430_MPU_MIN_TEMP, |
| 173 | .hyst_val = OMAP5430_MPU_HYST_VAL, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 174 | .update_int1 = 1000, |
| 175 | .update_int2 = 2000, |
| 176 | }; |
| 177 | |
| 178 | /* Thresholds and limits for OMAP5430 GPU temperature sensor */ |
| 179 | static struct temp_sensor_data omap5430_gpu_temp_sensor_data = { |
| 180 | .tshut_hot = OMAP5430_GPU_TSHUT_HOT, |
| 181 | .tshut_cold = OMAP5430_GPU_TSHUT_COLD, |
| 182 | .t_hot = OMAP5430_GPU_T_HOT, |
| 183 | .t_cold = OMAP5430_GPU_T_COLD, |
| 184 | .min_freq = OMAP5430_GPU_MIN_FREQ, |
| 185 | .max_freq = OMAP5430_GPU_MAX_FREQ, |
| 186 | .max_temp = OMAP5430_GPU_MAX_TEMP, |
| 187 | .min_temp = OMAP5430_GPU_MIN_TEMP, |
| 188 | .hyst_val = OMAP5430_GPU_HYST_VAL, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 189 | .update_int1 = 1000, |
| 190 | .update_int2 = 2000, |
| 191 | }; |
| 192 | |
| 193 | /* Thresholds and limits for OMAP5430 CORE temperature sensor */ |
| 194 | static struct temp_sensor_data omap5430_core_temp_sensor_data = { |
| 195 | .tshut_hot = OMAP5430_CORE_TSHUT_HOT, |
| 196 | .tshut_cold = OMAP5430_CORE_TSHUT_COLD, |
| 197 | .t_hot = OMAP5430_CORE_T_HOT, |
| 198 | .t_cold = OMAP5430_CORE_T_COLD, |
| 199 | .min_freq = OMAP5430_CORE_MIN_FREQ, |
| 200 | .max_freq = OMAP5430_CORE_MAX_FREQ, |
| 201 | .max_temp = OMAP5430_CORE_MAX_TEMP, |
| 202 | .min_temp = OMAP5430_CORE_MIN_TEMP, |
| 203 | .hyst_val = OMAP5430_CORE_HYST_VAL, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 204 | .update_int1 = 1000, |
| 205 | .update_int2 = 2000, |
| 206 | }; |
| 207 | |
Radhesh Fadnis | 2cb4093 | 2013-02-26 18:53:26 -0400 | [diff] [blame] | 208 | /* |
| 209 | * OMAP54xx ES2.0 : Temperature values in milli degree celsius |
| 210 | * ADC code values from 540 to 945 |
| 211 | */ |
| 212 | static int |
| 213 | omap5430_adc_to_temp[ |
| 214 | OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = { |
| 215 | /* Index 540 - 549 */ |
| 216 | -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200, |
| 217 | -37800, |
| 218 | /* Index 550 - 559 */ |
| 219 | -37400, -37000, -36600, -36200, -35800, -35300, -34700, -34200, -33800, |
| 220 | -33400, |
| 221 | /* Index 560 - 569 */ |
| 222 | -33000, -32600, -32200, -31800, -31400, -31000, -30600, -30200, -29800, |
| 223 | -29400, |
| 224 | /* Index 570 - 579 */ |
| 225 | -29000, -28600, -28200, -27700, -27100, -26600, -26200, -25800, -25400, |
| 226 | -25000, |
| 227 | /* Index 580 - 589 */ |
| 228 | -24600, -24200, -23800, -23400, -23000, -22600, -22200, -21600, -21400, |
| 229 | -21000, |
| 230 | /* Index 590 - 599 */ |
| 231 | -20500, -19900, -19400, -19000, -18600, -18200, -17800, -17400, -17000, |
| 232 | -16600, |
| 233 | /* Index 600 - 609 */ |
| 234 | -16200, -15800, -15400, -15000, -14600, -14200, -13800, -13400, -13000, |
| 235 | -12500, |
| 236 | /* Index 610 - 619 */ |
| 237 | -11900, -11400, -11000, -10600, -10200, -9800, -9400, -9000, -8600, |
| 238 | -8200, |
| 239 | /* Index 620 - 629 */ |
| 240 | -7800, -7400, -7000, -6600, -6200, -5800, -5400, -5000, -4500, -3900, |
| 241 | /* Index 630 - 639 */ |
| 242 | -3400, -3000, -2600, -2200, -1800, -1400, -1000, -600, -200, 200, |
| 243 | /* Index 640 - 649 */ |
| 244 | 600, 1000, 1400, 1800, 2200, 2600, 3000, 3400, 3900, 4500, |
| 245 | /* Index 650 - 659 */ |
| 246 | 5000, 5400, 5800, 6200, 6600, 7000, 7400, 7800, 8200, 8600, |
| 247 | /* Index 660 - 669 */ |
| 248 | 9000, 9400, 9800, 10200, 10600, 11000, 11400, 11800, 12200, 12700, |
| 249 | /* Index 670 - 679 */ |
| 250 | 13300, 13800, 14200, 14600, 15000, 15400, 15800, 16200, 16600, 17000, |
| 251 | /* Index 680 - 689 */ |
| 252 | 17400, 17800, 18200, 18600, 19000, 19400, 19800, 20200, 20600, 21100, |
| 253 | /* Index 690 - 699 */ |
| 254 | 21400, 21900, 22500, 23000, 23400, 23800, 24200, 24600, 25000, 25400, |
| 255 | /* Index 700 - 709 */ |
| 256 | 25800, 26200, 26600, 27000, 27400, 27800, 28200, 28600, 29000, 29400, |
| 257 | /* Index 710 - 719 */ |
| 258 | 29800, 30200, 30600, 31000, 31400, 31900, 32500, 33000, 33400, 33800, |
| 259 | /* Index 720 - 729 */ |
| 260 | 34200, 34600, 35000, 35400, 35800, 36200, 36600, 37000, 37400, 37800, |
| 261 | /* Index 730 - 739 */ |
| 262 | 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41000, 41400, 41800, |
| 263 | /* Index 740 - 749 */ |
| 264 | 42200, 42600, 43100, 43700, 44200, 44600, 45000, 45400, 45800, 46200, |
| 265 | /* Index 750 - 759 */ |
| 266 | 46600, 47000, 47400, 47800, 48200, 48600, 49000, 49400, 49800, 50200, |
| 267 | /* Index 760 - 769 */ |
| 268 | 50600, 51000, 51400, 51800, 52200, 52600, 53000, 53400, 53800, 54200, |
| 269 | /* Index 770 - 779 */ |
| 270 | 54600, 55000, 55400, 55900, 56500, 57000, 57400, 57800, 58200, 58600, |
| 271 | /* Index 780 - 789 */ |
| 272 | 59000, 59400, 59800, 60200, 60600, 61000, 61400, 61800, 62200, 62600, |
| 273 | /* Index 790 - 799 */ |
| 274 | 63000, 63400, 63800, 64200, 64600, 65000, 65400, 65800, 66200, 66600, |
| 275 | /* Index 800 - 809 */ |
| 276 | 67000, 67400, 67800, 68200, 68600, 69000, 69400, 69800, 70200, 70600, |
| 277 | /* Index 810 - 819 */ |
| 278 | 71000, 71500, 72100, 72600, 73000, 73400, 73800, 74200, 74600, 75000, |
| 279 | /* Index 820 - 829 */ |
| 280 | 75400, 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, |
| 281 | /* Index 830 - 839 */ |
| 282 | 79400, 79800, 80200, 80600, 81000, 81400, 81800, 82200, 82600, 83000, |
| 283 | /* Index 840 - 849 */ |
| 284 | 83400, 83800, 84200, 84600, 85000, 85400, 85800, 86200, 86600, 87000, |
| 285 | /* Index 850 - 859 */ |
| 286 | 87400, 87800, 88200, 88600, 89000, 89400, 89800, 90200, 90600, 91000, |
| 287 | /* Index 860 - 869 */ |
| 288 | 91400, 91800, 92200, 92600, 93000, 93400, 93800, 94200, 94600, 95000, |
| 289 | /* Index 870 - 879 */ |
| 290 | 95400, 95800, 96200, 96600, 97000, 97500, 98100, 98600, 99000, 99400, |
| 291 | /* Index 880 - 889 */ |
| 292 | 99800, 100200, 100600, 101000, 101400, 101800, 102200, 102600, 103000, |
| 293 | 103400, |
| 294 | /* Index 890 - 899 */ |
| 295 | 103800, 104200, 104600, 105000, 105400, 105800, 106200, 106600, 107000, |
| 296 | 107400, |
| 297 | /* Index 900 - 909 */ |
| 298 | 107800, 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000, |
| 299 | 111400, |
| 300 | /* Index 910 - 919 */ |
| 301 | 111800, 112200, 112600, 113000, 113400, 113800, 114200, 114600, 115000, |
| 302 | 115400, |
| 303 | /* Index 920 - 929 */ |
| 304 | 115800, 116200, 116600, 117000, 117400, 117800, 118200, 118600, 119000, |
| 305 | 119400, |
| 306 | /* Index 930 - 939 */ |
| 307 | 119800, 120200, 120600, 121000, 121400, 121800, 122400, 122600, 123000, |
| 308 | 123400, |
| 309 | /* Index 940 - 945 */ |
| 310 | 123800, 1242000, 124600, 124900, 125000, 125000, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 311 | }; |
| 312 | |
Eduardo Valentin | 1aa556a | 2013-02-26 18:53:29 -0400 | [diff] [blame] | 313 | /* OMAP54xx ES2.0 data */ |
| 314 | /* TODO : Need to update the slope/constant for ES2.0 silicon */ |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 315 | const struct omap_bandgap_data omap5430_data = { |
| 316 | .features = OMAP_BANDGAP_FEATURE_TSHUT_CONFIG | |
Eduardo Valentin | 194a54f | 2013-02-26 18:53:33 -0400 | [diff] [blame] | 317 | OMAP_BANDGAP_FEATURE_FREEZE_BIT | |
Eduardo Valentin | c1989be | 2013-02-26 18:53:31 -0400 | [diff] [blame] | 318 | OMAP_BANDGAP_FEATURE_TALERT, |
Eduardo Valentin | ac5c3e4 | 2013-02-26 18:53:30 -0400 | [diff] [blame] | 319 | .fclock_name = "l3instr_ts_gclk_div", |
| 320 | .div_ck_name = "l3instr_ts_gclk_div", |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 321 | .conv_table = omap5430_adc_to_temp, |
Eduardo Valentin | 26a70ed | 2013-03-15 09:00:14 -0400 | [diff] [blame] | 322 | .adc_start_val = OMAP5430_ADC_START_VALUE, |
| 323 | .adc_end_val = OMAP5430_ADC_END_VALUE, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 324 | .expose_sensor = omap_thermal_expose_sensor, |
| 325 | .remove_sensor = omap_thermal_remove_sensor, |
| 326 | .sensors = { |
| 327 | { |
Eduardo Valentin | cff860f | 2012-09-11 19:06:53 +0300 | [diff] [blame] | 328 | .registers = &omap5430_mpu_temp_sensor_registers, |
| 329 | .ts_data = &omap5430_mpu_temp_sensor_data, |
| 330 | .domain = "cpu", |
| 331 | .register_cooling = omap_thermal_register_cpu_cooling, |
| 332 | .unregister_cooling = omap_thermal_unregister_cpu_cooling, |
| 333 | .slope = OMAP_GRADIENT_SLOPE_5430_CPU, |
| 334 | .constant = OMAP_GRADIENT_CONST_5430_CPU, |
| 335 | .slope_pcb = OMAP_GRADIENT_SLOPE_W_PCB_5430_CPU, |
| 336 | .constant_pcb = OMAP_GRADIENT_CONST_W_PCB_5430_CPU, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 337 | }, |
| 338 | { |
Eduardo Valentin | cff860f | 2012-09-11 19:06:53 +0300 | [diff] [blame] | 339 | .registers = &omap5430_gpu_temp_sensor_registers, |
| 340 | .ts_data = &omap5430_gpu_temp_sensor_data, |
| 341 | .domain = "gpu", |
| 342 | .slope = OMAP_GRADIENT_SLOPE_5430_GPU, |
| 343 | .constant = OMAP_GRADIENT_CONST_5430_GPU, |
| 344 | .slope_pcb = OMAP_GRADIENT_SLOPE_W_PCB_5430_GPU, |
| 345 | .constant_pcb = OMAP_GRADIENT_CONST_W_PCB_5430_GPU, |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 346 | }, |
| 347 | { |
Eduardo Valentin | cff860f | 2012-09-11 19:06:53 +0300 | [diff] [blame] | 348 | .registers = &omap5430_core_temp_sensor_registers, |
| 349 | .ts_data = &omap5430_core_temp_sensor_data, |
| 350 | .domain = "core", |
Eduardo Valentin | 949f5a5 | 2012-07-12 19:02:32 +0300 | [diff] [blame] | 351 | }, |
| 352 | }, |
| 353 | .sensor_count = 3, |
| 354 | }; |