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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* starfire.c: Linux device driver for the Adaptec Starfire network adapter. */
2/*
3 Written 1998-2000 by Donald Becker.
4
Jeff Garzikfdecea62005-05-12 20:16:24 -04005 Current maintainer is Ion Badulescu <ionut ta badula tod org>. Please
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 send all bug reports to me, and not to Donald Becker, as this code
7 has been heavily modified from Donald's original version.
8
9 This software may be used and distributed according to the terms of
10 the GNU General Public License (GPL), incorporated herein by reference.
11 Drivers based on or derived from this code fall under the GPL and must
12 retain the authorship, copyright and license notice. This file is not
13 a complete program and may only be used when the entire operating
14 system is licensed under the GPL.
15
16 The information below comes from Donald Becker's original driver:
17
18 The author may be reached as becker@scyld.com, or C/O
19 Scyld Computing Corporation
20 410 Severn Ave., Suite 210
21 Annapolis MD 21403
22
23 Support and updates available at
24 http://www.scyld.com/network/starfire.html
Jeff Garzik03a8c662006-06-27 07:57:22 -040025 [link no longer provides useful info -jgarzik]
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
Linus Torvalds1da177e2005-04-16 15:20:36 -070027*/
28
29#define DRV_NAME "starfire"
Francois Romieua6676012008-07-06 20:54:45 -070030#define DRV_VERSION "2.1"
31#define DRV_RELDATE "July 6, 2008"
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/module.h>
34#include <linux/kernel.h>
35#include <linux/pci.h>
36#include <linux/netdevice.h>
37#include <linux/etherdevice.h>
38#include <linux/init.h>
39#include <linux/delay.h>
Jeff Garzikfdecea62005-05-12 20:16:24 -040040#include <linux/crc32.h>
41#include <linux/ethtool.h>
42#include <linux/mii.h>
43#include <linux/if_vlan.h>
Al Virod7fe0f22006-12-03 23:15:30 -050044#include <linux/mm.h>
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -080045#include <linux/firmware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#include <asm/processor.h> /* Processor type for cache alignment. */
47#include <asm/uaccess.h>
48#include <asm/io.h>
49
Linus Torvalds1da177e2005-04-16 15:20:36 -070050/*
51 * The current frame processor firmware fails to checksum a fragment
52 * of length 1. If and when this is fixed, the #define below can be removed.
53 */
54#define HAS_BROKEN_FIRMWARE
Ion Badulescu67974232005-10-03 22:31:36 -040055
56/*
57 * If using the broken firmware, data must be padded to the next 32-bit boundary.
58 */
59#ifdef HAS_BROKEN_FIRMWARE
60#define PADDING_MASK 3
61#endif
62
Linus Torvalds1da177e2005-04-16 15:20:36 -070063/*
64 * Define this if using the driver with the zero-copy patch
65 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070066#define ZEROCOPY
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
68#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
69#define VLAN_SUPPORT
70#endif
71
Linus Torvalds1da177e2005-04-16 15:20:36 -070072/* The user-configurable values.
73 These may be modified when a driver module is loaded.*/
74
75/* Used for tuning interrupt latency vs. overhead. */
76static int intr_latency;
77static int small_frames;
78
79static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
80static int max_interrupt_work = 20;
81static int mtu;
82/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
83 The Starfire has a 512 element hash table based on the Ethernet CRC. */
Arjan van de Venf71e1302006-03-03 21:33:57 -050084static const int multicast_filter_limit = 512;
Linus Torvalds1da177e2005-04-16 15:20:36 -070085/* Whether to do TCP/UDP checksums in hardware */
Linus Torvalds1da177e2005-04-16 15:20:36 -070086static int enable_hw_cksum = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070087
88#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
89/*
90 * Set the copy breakpoint for the copy-only-tiny-frames scheme.
91 * Setting to > 1518 effectively disables this feature.
92 *
93 * NOTE:
94 * The ia64 doesn't allow for unaligned loads even of integers being
95 * misaligned on a 2 byte boundary. Thus always force copying of
96 * packets as the starfire doesn't allow for misaligned DMAs ;-(
97 * 23/10/2000 - Jes
98 *
99 * The Alpha and the Sparc don't like unaligned loads, either. On Sparc64,
100 * at least, having unaligned frames leads to a rather serious performance
101 * penalty. -Ion
102 */
103#if defined(__ia64__) || defined(__alpha__) || defined(__sparc__)
104static int rx_copybreak = PKT_BUF_SZ;
105#else
106static int rx_copybreak /* = 0 */;
107#endif
108
109/* PCI DMA burst size -- on sparc64 we want to force it to 64 bytes, on the others the default of 128 is fine. */
110#ifdef __sparc__
111#define DMA_BURST_SIZE 64
112#else
113#define DMA_BURST_SIZE 128
114#endif
115
116/* Used to pass the media type, etc.
117 Both 'options[]' and 'full_duplex[]' exist for driver interoperability.
118 The media type is usually passed in 'options[]'.
119 These variables are deprecated, use ethtool instead. -Ion
120*/
121#define MAX_UNITS 8 /* More are supported, limit only on options */
122static int options[MAX_UNITS] = {0, };
123static int full_duplex[MAX_UNITS] = {0, };
124
125/* Operational parameters that are set at compile time. */
126
127/* The "native" ring sizes are either 256 or 2048.
128 However in some modes a descriptor may be marked to wrap the ring earlier.
129*/
130#define RX_RING_SIZE 256
131#define TX_RING_SIZE 32
132/* The completion queues are fixed at 1024 entries i.e. 4K or 8KB. */
133#define DONE_Q_SIZE 1024
134/* All queues must be aligned on a 256-byte boundary */
135#define QUEUE_ALIGN 256
136
137#if RX_RING_SIZE > 256
138#define RX_Q_ENTRIES Rx2048QEntries
139#else
140#define RX_Q_ENTRIES Rx256QEntries
141#endif
142
143/* Operational parameters that usually are not changed. */
144/* Time in jiffies before concluding the transmitter is hung. */
145#define TX_TIMEOUT (2 * HZ)
146
147/*
148 * This SUCKS.
149 * We need a much better method to determine if dma_addr_t is 64-bit.
150 */
maximilian attems983b7dc2007-06-24 23:36:45 +0200151#if (defined(__i386__) && defined(CONFIG_HIGHMEM64G)) || defined(__x86_64__) || defined (__ia64__) || defined(__alpha__) || defined(__mips64__) || (defined(__mips__) && defined(CONFIG_HIGHMEM) && defined(CONFIG_64BIT_PHYS_ADDR))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152/* 64-bit dma_addr_t */
153#define ADDR_64BITS /* This chip uses 64 bit addresses. */
Al Viro88b19432007-08-23 02:29:45 -0400154#define netdrv_addr_t __le64
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155#define cpu_to_dma(x) cpu_to_le64(x)
156#define dma_to_cpu(x) le64_to_cpu(x)
157#define RX_DESC_Q_ADDR_SIZE RxDescQAddr64bit
158#define TX_DESC_Q_ADDR_SIZE TxDescQAddr64bit
159#define RX_COMPL_Q_ADDR_SIZE RxComplQAddr64bit
160#define TX_COMPL_Q_ADDR_SIZE TxComplQAddr64bit
161#define RX_DESC_ADDR_SIZE RxDescAddr64bit
162#else /* 32-bit dma_addr_t */
Al Viro88b19432007-08-23 02:29:45 -0400163#define netdrv_addr_t __le32
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164#define cpu_to_dma(x) cpu_to_le32(x)
165#define dma_to_cpu(x) le32_to_cpu(x)
166#define RX_DESC_Q_ADDR_SIZE RxDescQAddr32bit
167#define TX_DESC_Q_ADDR_SIZE TxDescQAddr32bit
168#define RX_COMPL_Q_ADDR_SIZE RxComplQAddr32bit
169#define TX_COMPL_Q_ADDR_SIZE TxComplQAddr32bit
170#define RX_DESC_ADDR_SIZE RxDescAddr32bit
171#endif
172
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173#define skb_first_frag_len(skb) skb_headlen(skb)
174#define skb_num_frags(skb) (skb_shinfo(skb)->nr_frags + 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -0800176/* Firmware names */
177#define FIRMWARE_RX "adaptec/starfire_rx.bin"
178#define FIRMWARE_TX "adaptec/starfire_tx.bin"
179
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180/* These identify the driver base version and may not be removed. */
Stephen Hemmingerb5defaa2009-02-26 10:19:32 +0000181static const char version[] __devinitconst =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182KERN_INFO "starfire.c:v1.03 7/26/2000 Written by Donald Becker <becker@scyld.com>\n"
Joe Perchesad361c92009-07-06 13:05:40 -0700183" (unofficial 2.2/2.4 kernel port, version " DRV_VERSION ", " DRV_RELDATE ")\n";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184
185MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
186MODULE_DESCRIPTION("Adaptec Starfire Ethernet driver");
187MODULE_LICENSE("GPL");
Jeff Garzikfdecea62005-05-12 20:16:24 -0400188MODULE_VERSION(DRV_VERSION);
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -0800189MODULE_FIRMWARE(FIRMWARE_RX);
190MODULE_FIRMWARE(FIRMWARE_TX);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700191
192module_param(max_interrupt_work, int, 0);
193module_param(mtu, int, 0);
194module_param(debug, int, 0);
195module_param(rx_copybreak, int, 0);
196module_param(intr_latency, int, 0);
197module_param(small_frames, int, 0);
198module_param_array(options, int, NULL, 0);
199module_param_array(full_duplex, int, NULL, 0);
200module_param(enable_hw_cksum, int, 0);
201MODULE_PARM_DESC(max_interrupt_work, "Maximum events handled per interrupt");
202MODULE_PARM_DESC(mtu, "MTU (all boards)");
203MODULE_PARM_DESC(debug, "Debug level (0-6)");
204MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
205MODULE_PARM_DESC(intr_latency, "Maximum interrupt latency, in microseconds");
206MODULE_PARM_DESC(small_frames, "Maximum size of receive frames that bypass interrupt latency (0,64,128,256,512)");
207MODULE_PARM_DESC(options, "Deprecated: Bits 0-3: media type, bit 17: full duplex");
208MODULE_PARM_DESC(full_duplex, "Deprecated: Forced full-duplex setting (0/1)");
209MODULE_PARM_DESC(enable_hw_cksum, "Enable/disable hardware cksum support (0/1)");
210
211/*
212 Theory of Operation
213
214I. Board Compatibility
215
216This driver is for the Adaptec 6915 "Starfire" 64 bit PCI Ethernet adapter.
217
218II. Board-specific settings
219
220III. Driver operation
221
222IIIa. Ring buffers
223
224The Starfire hardware uses multiple fixed-size descriptor queues/rings. The
225ring sizes are set fixed by the hardware, but may optionally be wrapped
226earlier by the END bit in the descriptor.
227This driver uses that hardware queue size for the Rx ring, where a large
228number of entries has no ill effect beyond increases the potential backlog.
229The Tx ring is wrapped with the END bit, since a large hardware Tx queue
230disables the queue layer priority ordering and we have no mechanism to
231utilize the hardware two-level priority queue. When modifying the
232RX/TX_RING_SIZE pay close attention to page sizes and the ring-empty warning
233levels.
234
235IIIb/c. Transmit/Receive Structure
236
237See the Adaptec manual for the many possible structures, and options for
238each structure. There are far too many to document all of them here.
239
240For transmit this driver uses type 0/1 transmit descriptors (depending
241on the 32/64 bitness of the architecture), and relies on automatic
242minimum-length padding. It does not use the completion queue
243consumer index, but instead checks for non-zero status entries.
244
Jeff Garzikfdecea62005-05-12 20:16:24 -0400245For receive this driver uses type 2/3 receive descriptors. The driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246allocates full frame size skbuffs for the Rx ring buffers, so all frames
247should fit in a single descriptor. The driver does not use the completion
248queue consumer index, but instead checks for non-zero status entries.
249
250When an incoming frame is less than RX_COPYBREAK bytes long, a fresh skbuff
251is allocated and the frame is copied to the new skbuff. When the incoming
252frame is larger, the skbuff is passed directly up the protocol stack.
253Buffers consumed this way are replaced by newly allocated skbuffs in a later
254phase of receive.
255
256A notable aspect of operation is that unaligned buffers are not permitted by
257the Starfire hardware. Thus the IP header at offset 14 in an ethernet frame
258isn't longword aligned, which may cause problems on some machine
259e.g. Alphas and IA64. For these architectures, the driver is forced to copy
260the frame into a new skbuff unconditionally. Copied frames are put into the
261skbuff at an offset of "+2", thus 16-byte aligning the IP header.
262
263IIId. Synchronization
264
265The driver runs as two independent, single-threaded flows of control. One
266is the send-packet routine, which enforces single-threaded use by the
267dev->tbusy flag. The other thread is the interrupt handler, which is single
268threaded by the hardware and interrupt handling software.
269
270The send packet thread has partial control over the Tx ring and the netif_queue
271status. If the number of free Tx slots in the ring falls below a certain number
272(currently hardcoded to 4), it signals the upper layer to stop the queue.
273
274The interrupt handler has exclusive control over the Rx ring and records stats
275from the Tx ring. After reaping the stats, it marks the Tx queue entry as
276empty by incrementing the dirty_tx mark. Iff the netif_queue is stopped and the
277number of free Tx slow is above the threshold, it signals the upper layer to
278restart the queue.
279
280IV. Notes
281
282IVb. References
283
284The Adaptec Starfire manuals, available only from Adaptec.
285http://www.scyld.com/expert/100mbps.html
286http://www.scyld.com/expert/NWay.html
287
288IVc. Errata
289
290- StopOnPerr is broken, don't enable
291- Hardware ethernet padding exposes random data, perform software padding
292 instead (unverified -- works correctly for all the hardware I have)
293
294*/
295
Jeff Garzikfdecea62005-05-12 20:16:24 -0400296
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297
298enum chip_capability_flags {CanHaveMII=1, };
299
300enum chipset {
301 CH_6915 = 0,
302};
303
Alexey Dobriyana3aa1882010-01-07 11:58:11 +0000304static DEFINE_PCI_DEVICE_TABLE(starfire_pci_tbl) = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305 { 0x9004, 0x6915, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_6915 },
306 { 0, }
307};
308MODULE_DEVICE_TABLE(pci, starfire_pci_tbl);
309
310/* A chip capabilities table, matching the CH_xxx entries in xxx_pci_tbl[] above. */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500311static const struct chip_info {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 const char *name;
313 int drv_flags;
314} netdrv_tbl[] __devinitdata = {
315 { "Adaptec Starfire 6915", CanHaveMII },
316};
317
318
319/* Offsets to the device registers.
320 Unlike software-only systems, device drivers interact with complex hardware.
321 It's not useful to define symbolic names for every register bit in the
322 device. The name can only partially document the semantics and make
323 the driver longer and more difficult to read.
324 In general, only the important configuration values or bits changed
325 multiple times should be defined symbolically.
326*/
327enum register_offsets {
328 PCIDeviceConfig=0x50040, GenCtrl=0x50070, IntrTimerCtrl=0x50074,
329 IntrClear=0x50080, IntrStatus=0x50084, IntrEnable=0x50088,
330 MIICtrl=0x52000, TxStationAddr=0x50120, EEPROMCtrl=0x51000,
331 GPIOCtrl=0x5008C, TxDescCtrl=0x50090,
332 TxRingPtr=0x50098, HiPriTxRingPtr=0x50094, /* Low and High priority. */
333 TxRingHiAddr=0x5009C, /* 64 bit address extension. */
334 TxProducerIdx=0x500A0, TxConsumerIdx=0x500A4,
335 TxThreshold=0x500B0,
336 CompletionHiAddr=0x500B4, TxCompletionAddr=0x500B8,
337 RxCompletionAddr=0x500BC, RxCompletionQ2Addr=0x500C0,
338 CompletionQConsumerIdx=0x500C4, RxDMACtrl=0x500D0,
339 RxDescQCtrl=0x500D4, RxDescQHiAddr=0x500DC, RxDescQAddr=0x500E0,
340 RxDescQIdx=0x500E8, RxDMAStatus=0x500F0, RxFilterMode=0x500F4,
341 TxMode=0x55000, VlanType=0x55064,
342 PerfFilterTable=0x56000, HashTable=0x56100,
343 TxGfpMem=0x58000, RxGfpMem=0x5a000,
344};
345
346/*
347 * Bits in the interrupt status/mask registers.
348 * Warning: setting Intr[Ab]NormalSummary in the IntrEnable register
349 * enables all the interrupt sources that are or'ed into those status bits.
350 */
351enum intr_status_bits {
352 IntrLinkChange=0xf0000000, IntrStatsMax=0x08000000,
353 IntrAbnormalSummary=0x02000000, IntrGeneralTimer=0x01000000,
354 IntrSoftware=0x800000, IntrRxComplQ1Low=0x400000,
355 IntrTxComplQLow=0x200000, IntrPCI=0x100000,
356 IntrDMAErr=0x080000, IntrTxDataLow=0x040000,
357 IntrRxComplQ2Low=0x020000, IntrRxDescQ1Low=0x010000,
358 IntrNormalSummary=0x8000, IntrTxDone=0x4000,
359 IntrTxDMADone=0x2000, IntrTxEmpty=0x1000,
360 IntrEarlyRxQ2=0x0800, IntrEarlyRxQ1=0x0400,
361 IntrRxQ2Done=0x0200, IntrRxQ1Done=0x0100,
362 IntrRxGFPDead=0x80, IntrRxDescQ2Low=0x40,
363 IntrNoTxCsum=0x20, IntrTxBadID=0x10,
364 IntrHiPriTxBadID=0x08, IntrRxGfp=0x04,
365 IntrTxGfp=0x02, IntrPCIPad=0x01,
366 /* not quite bits */
367 IntrRxDone=IntrRxQ2Done | IntrRxQ1Done,
368 IntrRxEmpty=IntrRxDescQ1Low | IntrRxDescQ2Low,
369 IntrNormalMask=0xff00, IntrAbnormalMask=0x3ff00fe,
370};
371
372/* Bits in the RxFilterMode register. */
373enum rx_mode_bits {
374 AcceptBroadcast=0x04, AcceptAllMulticast=0x02, AcceptAll=0x01,
375 AcceptMulticast=0x10, PerfectFilter=0x40, HashFilter=0x30,
376 PerfectFilterVlan=0x80, MinVLANPrio=0xE000, VlanMode=0x0200,
377 WakeupOnGFP=0x0800,
378};
379
380/* Bits in the TxMode register */
381enum tx_mode_bits {
382 MiiSoftReset=0x8000, MIILoopback=0x4000,
383 TxFlowEnable=0x0800, RxFlowEnable=0x0400,
384 PadEnable=0x04, FullDuplex=0x02, HugeFrame=0x01,
385};
386
387/* Bits in the TxDescCtrl register. */
388enum tx_ctrl_bits {
389 TxDescSpaceUnlim=0x00, TxDescSpace32=0x10, TxDescSpace64=0x20,
390 TxDescSpace128=0x30, TxDescSpace256=0x40,
391 TxDescType0=0x00, TxDescType1=0x01, TxDescType2=0x02,
392 TxDescType3=0x03, TxDescType4=0x04,
393 TxNoDMACompletion=0x08,
394 TxDescQAddr64bit=0x80, TxDescQAddr32bit=0,
395 TxHiPriFIFOThreshShift=24, TxPadLenShift=16,
396 TxDMABurstSizeShift=8,
397};
398
399/* Bits in the RxDescQCtrl register. */
400enum rx_ctrl_bits {
401 RxBufferLenShift=16, RxMinDescrThreshShift=0,
402 RxPrefetchMode=0x8000, RxVariableQ=0x2000,
403 Rx2048QEntries=0x4000, Rx256QEntries=0,
404 RxDescAddr64bit=0x1000, RxDescAddr32bit=0,
405 RxDescQAddr64bit=0x0100, RxDescQAddr32bit=0,
406 RxDescSpace4=0x000, RxDescSpace8=0x100,
407 RxDescSpace16=0x200, RxDescSpace32=0x300,
408 RxDescSpace64=0x400, RxDescSpace128=0x500,
409 RxConsumerWrEn=0x80,
410};
411
412/* Bits in the RxDMACtrl register. */
413enum rx_dmactrl_bits {
414 RxReportBadFrames=0x80000000, RxDMAShortFrames=0x40000000,
415 RxDMABadFrames=0x20000000, RxDMACrcErrorFrames=0x10000000,
416 RxDMAControlFrame=0x08000000, RxDMAPauseFrame=0x04000000,
417 RxChecksumIgnore=0, RxChecksumRejectTCPUDP=0x02000000,
418 RxChecksumRejectTCPOnly=0x01000000,
419 RxCompletionQ2Enable=0x800000,
420 RxDMAQ2Disable=0, RxDMAQ2FPOnly=0x100000,
421 RxDMAQ2SmallPkt=0x200000, RxDMAQ2HighPrio=0x300000,
422 RxDMAQ2NonIP=0x400000,
423 RxUseBackupQueue=0x080000, RxDMACRC=0x040000,
424 RxEarlyIntThreshShift=12, RxHighPrioThreshShift=8,
425 RxBurstSizeShift=0,
426};
427
428/* Bits in the RxCompletionAddr register */
429enum rx_compl_bits {
430 RxComplQAddr64bit=0x80, RxComplQAddr32bit=0,
431 RxComplProducerWrEn=0x40,
432 RxComplType0=0x00, RxComplType1=0x10,
433 RxComplType2=0x20, RxComplType3=0x30,
434 RxComplThreshShift=0,
435};
436
437/* Bits in the TxCompletionAddr register */
438enum tx_compl_bits {
439 TxComplQAddr64bit=0x80, TxComplQAddr32bit=0,
440 TxComplProducerWrEn=0x40,
441 TxComplIntrStatus=0x20,
442 CommonQueueMode=0x10,
443 TxComplThreshShift=0,
444};
445
446/* Bits in the GenCtrl register */
447enum gen_ctrl_bits {
448 RxEnable=0x05, TxEnable=0x0a,
449 RxGFPEnable=0x10, TxGFPEnable=0x20,
450};
451
452/* Bits in the IntrTimerCtrl register */
453enum intr_ctrl_bits {
454 Timer10X=0x800, EnableIntrMasking=0x60, SmallFrameBypass=0x100,
455 SmallFrame64=0, SmallFrame128=0x200, SmallFrame256=0x400, SmallFrame512=0x600,
456 IntrLatencyMask=0x1f,
457};
458
459/* The Rx and Tx buffer descriptors. */
460struct starfire_rx_desc {
Al Viro88b19432007-08-23 02:29:45 -0400461 netdrv_addr_t rxaddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700462};
463enum rx_desc_bits {
464 RxDescValid=1, RxDescEndRing=2,
465};
466
467/* Completion queue entry. */
468struct short_rx_done_desc {
Al Viro88b19432007-08-23 02:29:45 -0400469 __le32 status; /* Low 16 bits is length. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470};
471struct basic_rx_done_desc {
Al Viro88b19432007-08-23 02:29:45 -0400472 __le32 status; /* Low 16 bits is length. */
473 __le16 vlanid;
474 __le16 status2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475};
476struct csum_rx_done_desc {
Al Viro88b19432007-08-23 02:29:45 -0400477 __le32 status; /* Low 16 bits is length. */
478 __le16 csum; /* Partial checksum */
479 __le16 status2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480};
481struct full_rx_done_desc {
Al Viro88b19432007-08-23 02:29:45 -0400482 __le32 status; /* Low 16 bits is length. */
483 __le16 status3;
484 __le16 status2;
485 __le16 vlanid;
486 __le16 csum; /* partial checksum */
487 __le32 timestamp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488};
489/* XXX: this is ugly and I'm not sure it's worth the trouble -Ion */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490#ifdef VLAN_SUPPORT
491typedef struct full_rx_done_desc rx_done_desc;
492#define RxComplType RxComplType3
493#else /* not VLAN_SUPPORT */
494typedef struct csum_rx_done_desc rx_done_desc;
495#define RxComplType RxComplType2
496#endif /* not VLAN_SUPPORT */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700497
498enum rx_done_bits {
499 RxOK=0x20000000, RxFIFOErr=0x10000000, RxBufQ2=0x08000000,
500};
501
502/* Type 1 Tx descriptor. */
503struct starfire_tx_desc_1 {
Al Viro88b19432007-08-23 02:29:45 -0400504 __le32 status; /* Upper bits are status, lower 16 length. */
505 __le32 addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700506};
507
508/* Type 2 Tx descriptor. */
509struct starfire_tx_desc_2 {
Al Viro88b19432007-08-23 02:29:45 -0400510 __le32 status; /* Upper bits are status, lower 16 length. */
511 __le32 reserved;
512 __le64 addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513};
514
515#ifdef ADDR_64BITS
516typedef struct starfire_tx_desc_2 starfire_tx_desc;
517#define TX_DESC_TYPE TxDescType2
518#else /* not ADDR_64BITS */
519typedef struct starfire_tx_desc_1 starfire_tx_desc;
520#define TX_DESC_TYPE TxDescType1
521#endif /* not ADDR_64BITS */
522#define TX_DESC_SPACING TxDescSpaceUnlim
523
524enum tx_desc_bits {
525 TxDescID=0xB0000000,
526 TxCRCEn=0x01000000, TxDescIntr=0x08000000,
527 TxRingWrap=0x04000000, TxCalTCP=0x02000000,
528};
529struct tx_done_desc {
Al Viro88b19432007-08-23 02:29:45 -0400530 __le32 status; /* timestamp, index. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531#if 0
Al Viro88b19432007-08-23 02:29:45 -0400532 __le32 intrstatus; /* interrupt status */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700533#endif
534};
535
536struct rx_ring_info {
537 struct sk_buff *skb;
538 dma_addr_t mapping;
539};
540struct tx_ring_info {
541 struct sk_buff *skb;
542 dma_addr_t mapping;
543 unsigned int used_slots;
544};
545
546#define PHY_CNT 2
547struct netdev_private {
548 /* Descriptor rings first for alignment. */
549 struct starfire_rx_desc *rx_ring;
550 starfire_tx_desc *tx_ring;
551 dma_addr_t rx_ring_dma;
552 dma_addr_t tx_ring_dma;
553 /* The addresses of rx/tx-in-place skbuffs. */
554 struct rx_ring_info rx_info[RX_RING_SIZE];
555 struct tx_ring_info tx_info[TX_RING_SIZE];
556 /* Pointers to completion queues (full pages). */
557 rx_done_desc *rx_done_q;
558 dma_addr_t rx_done_q_dma;
559 unsigned int rx_done;
560 struct tx_done_desc *tx_done_q;
561 dma_addr_t tx_done_q_dma;
562 unsigned int tx_done;
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700563 struct napi_struct napi;
564 struct net_device *dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565 struct pci_dev *pci_dev;
566#ifdef VLAN_SUPPORT
567 struct vlan_group *vlgrp;
568#endif
569 void *queue_mem;
570 dma_addr_t queue_mem_dma;
571 size_t queue_mem_size;
572
573 /* Frequently used values: keep some adjacent for cache effect. */
574 spinlock_t lock;
575 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
576 unsigned int cur_tx, dirty_tx, reap_tx;
577 unsigned int rx_buf_sz; /* Based on MTU+slack. */
578 /* These values keep track of the transceiver/media in use. */
579 int speed100; /* Set if speed == 100MBit. */
580 u32 tx_mode;
581 u32 intr_timer_ctrl;
582 u8 tx_threshold;
583 /* MII transceiver section. */
584 struct mii_if_info mii_if; /* MII lib hooks/info */
585 int phy_cnt; /* MII device addresses. */
586 unsigned char phys[PHY_CNT]; /* MII device addresses. */
587 void __iomem *base;
588};
589
590
591static int mdio_read(struct net_device *dev, int phy_id, int location);
592static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
593static int netdev_open(struct net_device *dev);
594static void check_duplex(struct net_device *dev);
595static void tx_timeout(struct net_device *dev);
596static void init_ring(struct net_device *dev);
Stephen Hemminger613573252009-08-31 19:50:58 +0000597static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100598static irqreturn_t intr_handler(int irq, void *dev_instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599static void netdev_error(struct net_device *dev, int intr_status);
600static int __netdev_rx(struct net_device *dev, int *quota);
Francois Romieua6676012008-07-06 20:54:45 -0700601static int netdev_poll(struct napi_struct *napi, int budget);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602static void refill_rx_ring(struct net_device *dev);
603static void netdev_error(struct net_device *dev, int intr_status);
604static void set_rx_mode(struct net_device *dev);
605static struct net_device_stats *get_stats(struct net_device *dev);
606static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
607static int netdev_close(struct net_device *dev);
608static void netdev_media_change(struct net_device *dev);
Jeff Garzik7282d492006-09-13 14:30:00 -0400609static const struct ethtool_ops ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610
611
612#ifdef VLAN_SUPPORT
613static void netdev_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
614{
615 struct netdev_private *np = netdev_priv(dev);
616
617 spin_lock(&np->lock);
618 if (debug > 2)
619 printk("%s: Setting vlgrp to %p\n", dev->name, grp);
620 np->vlgrp = grp;
621 set_rx_mode(dev);
622 spin_unlock(&np->lock);
623}
624
625static void netdev_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
626{
627 struct netdev_private *np = netdev_priv(dev);
628
629 spin_lock(&np->lock);
630 if (debug > 1)
631 printk("%s: Adding vlanid %d to vlan filter\n", dev->name, vid);
632 set_rx_mode(dev);
633 spin_unlock(&np->lock);
634}
635
636static void netdev_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
637{
638 struct netdev_private *np = netdev_priv(dev);
639
640 spin_lock(&np->lock);
641 if (debug > 1)
642 printk("%s: removing vlanid %d from vlan filter\n", dev->name, vid);
Dan Aloni5c15bde2007-03-02 20:44:51 -0800643 vlan_group_set_device(np->vlgrp, vid, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700644 set_rx_mode(dev);
645 spin_unlock(&np->lock);
646}
647#endif /* VLAN_SUPPORT */
648
649
Stephen Hemminger4fc80062009-01-07 17:58:17 -0800650static const struct net_device_ops netdev_ops = {
651 .ndo_open = netdev_open,
652 .ndo_stop = netdev_close,
653 .ndo_start_xmit = start_tx,
654 .ndo_tx_timeout = tx_timeout,
655 .ndo_get_stats = get_stats,
656 .ndo_set_multicast_list = &set_rx_mode,
657 .ndo_do_ioctl = netdev_ioctl,
658 .ndo_change_mtu = eth_change_mtu,
659 .ndo_set_mac_address = eth_mac_addr,
660 .ndo_validate_addr = eth_validate_addr,
661#ifdef VLAN_SUPPORT
662 .ndo_vlan_rx_register = netdev_vlan_rx_register,
663 .ndo_vlan_rx_add_vid = netdev_vlan_rx_add_vid,
664 .ndo_vlan_rx_kill_vid = netdev_vlan_rx_kill_vid,
665#endif
666};
667
Linus Torvalds1da177e2005-04-16 15:20:36 -0700668static int __devinit starfire_init_one(struct pci_dev *pdev,
669 const struct pci_device_id *ent)
670{
671 struct netdev_private *np;
672 int i, irq, option, chip_idx = ent->driver_data;
673 struct net_device *dev;
674 static int card_idx = -1;
675 long ioaddr;
676 void __iomem *base;
677 int drv_flags, io_size;
678 int boguscnt;
679
680/* when built into the kernel, we only print version if device is found */
681#ifndef MODULE
682 static int printed_version;
683 if (!printed_version++)
684 printk(version);
685#endif
686
687 card_idx++;
688
689 if (pci_enable_device (pdev))
690 return -EIO;
691
692 ioaddr = pci_resource_start(pdev, 0);
693 io_size = pci_resource_len(pdev, 0);
694 if (!ioaddr || ((pci_resource_flags(pdev, 0) & IORESOURCE_MEM) == 0)) {
695 printk(KERN_ERR DRV_NAME " %d: no PCI MEM resources, aborting\n", card_idx);
696 return -ENODEV;
697 }
698
699 dev = alloc_etherdev(sizeof(*np));
700 if (!dev) {
701 printk(KERN_ERR DRV_NAME " %d: cannot alloc etherdev, aborting\n", card_idx);
702 return -ENOMEM;
703 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704 SET_NETDEV_DEV(dev, &pdev->dev);
705
706 irq = pdev->irq;
707
708 if (pci_request_regions (pdev, DRV_NAME)) {
709 printk(KERN_ERR DRV_NAME " %d: cannot reserve PCI resources, aborting\n", card_idx);
710 goto err_out_free_netdev;
711 }
712
Linus Torvalds1da177e2005-04-16 15:20:36 -0700713 base = ioremap(ioaddr, io_size);
714 if (!base) {
715 printk(KERN_ERR DRV_NAME " %d: cannot remap %#x @ %#lx, aborting\n",
716 card_idx, io_size, ioaddr);
717 goto err_out_free_res;
718 }
719
720 pci_set_master(pdev);
721
722 /* enable MWI -- it vastly improves Rx performance on sparc64 */
Randy Dunlap694625c2007-07-09 11:55:54 -0700723 pci_try_set_mwi(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700724
Linus Torvalds1da177e2005-04-16 15:20:36 -0700725#ifdef ZEROCOPY
726 /* Starfire can do TCP/UDP checksumming */
727 if (enable_hw_cksum)
Jeff Garzikfdecea62005-05-12 20:16:24 -0400728 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700729#endif /* ZEROCOPY */
Stephen Hemminger4fc80062009-01-07 17:58:17 -0800730
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731#ifdef VLAN_SUPPORT
732 dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700733#endif /* VLAN_RX_KILL_VID */
734#ifdef ADDR_64BITS
735 dev->features |= NETIF_F_HIGHDMA;
736#endif /* ADDR_64BITS */
737
738 /* Serial EEPROM reads are hidden by the hardware. */
739 for (i = 0; i < 6; i++)
740 dev->dev_addr[i] = readb(base + EEPROMCtrl + 20 - i);
741
742#if ! defined(final_version) /* Dump the EEPROM contents during development. */
743 if (debug > 4)
744 for (i = 0; i < 0x20; i++)
745 printk("%2.2x%s",
746 (unsigned int)readb(base + EEPROMCtrl + i),
747 i % 16 != 15 ? " " : "\n");
748#endif
749
750 /* Issue soft reset */
751 writel(MiiSoftReset, base + TxMode);
752 udelay(1000);
753 writel(0, base + TxMode);
754
755 /* Reset the chip to erase previous misconfiguration. */
756 writel(1, base + PCIDeviceConfig);
757 boguscnt = 1000;
758 while (--boguscnt > 0) {
759 udelay(10);
760 if ((readl(base + PCIDeviceConfig) & 1) == 0)
761 break;
762 }
763 if (boguscnt == 0)
764 printk("%s: chipset reset never completed!\n", dev->name);
765 /* wait a little longer */
766 udelay(1000);
767
768 dev->base_addr = (unsigned long)base;
769 dev->irq = irq;
770
771 np = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700772 np->dev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700773 np->base = base;
774 spin_lock_init(&np->lock);
775 pci_set_drvdata(pdev, dev);
776
777 np->pci_dev = pdev;
778
779 np->mii_if.dev = dev;
780 np->mii_if.mdio_read = mdio_read;
781 np->mii_if.mdio_write = mdio_write;
782 np->mii_if.phy_id_mask = 0x1f;
783 np->mii_if.reg_num_mask = 0x1f;
784
785 drv_flags = netdrv_tbl[chip_idx].drv_flags;
786
787 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
788 if (dev->mem_start)
789 option = dev->mem_start;
790
791 /* The lower four bits are the media type. */
792 if (option & 0x200)
793 np->mii_if.full_duplex = 1;
794
795 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
796 np->mii_if.full_duplex = 1;
797
798 if (np->mii_if.full_duplex)
799 np->mii_if.force_media = 1;
800 else
801 np->mii_if.force_media = 0;
802 np->speed100 = 1;
803
804 /* timer resolution is 128 * 0.8us */
805 np->intr_timer_ctrl = (((intr_latency * 10) / 1024) & IntrLatencyMask) |
806 Timer10X | EnableIntrMasking;
807
808 if (small_frames > 0) {
809 np->intr_timer_ctrl |= SmallFrameBypass;
810 switch (small_frames) {
811 case 1 ... 64:
812 np->intr_timer_ctrl |= SmallFrame64;
813 break;
814 case 65 ... 128:
815 np->intr_timer_ctrl |= SmallFrame128;
816 break;
817 case 129 ... 256:
818 np->intr_timer_ctrl |= SmallFrame256;
819 break;
820 default:
821 np->intr_timer_ctrl |= SmallFrame512;
822 if (small_frames > 512)
823 printk("Adjusting small_frames down to 512\n");
824 break;
825 }
826 }
827
Stephen Hemminger4fc80062009-01-07 17:58:17 -0800828 dev->netdev_ops = &netdev_ops;
Jeff Garzikfdecea62005-05-12 20:16:24 -0400829 dev->watchdog_timeo = TX_TIMEOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700830 SET_ETHTOOL_OPS(dev, &ethtool_ops);
831
Stephen Hemminger4fc80062009-01-07 17:58:17 -0800832 netif_napi_add(dev, &np->napi, netdev_poll, max_interrupt_work);
833
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834 if (mtu)
835 dev->mtu = mtu;
836
837 if (register_netdev(dev))
838 goto err_out_cleardev;
839
Johannes Berge1749612008-10-27 15:59:26 -0700840 printk(KERN_INFO "%s: %s at %p, %pM, IRQ %d.\n",
Joe Perches0795af52007-10-03 17:59:30 -0700841 dev->name, netdrv_tbl[chip_idx].name, base,
Johannes Berge1749612008-10-27 15:59:26 -0700842 dev->dev_addr, irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700843
844 if (drv_flags & CanHaveMII) {
845 int phy, phy_idx = 0;
846 int mii_status;
847 for (phy = 0; phy < 32 && phy_idx < PHY_CNT; phy++) {
848 mdio_write(dev, phy, MII_BMCR, BMCR_RESET);
849 mdelay(100);
850 boguscnt = 1000;
851 while (--boguscnt > 0)
852 if ((mdio_read(dev, phy, MII_BMCR) & BMCR_RESET) == 0)
853 break;
854 if (boguscnt == 0) {
Jeff Garzikfdecea62005-05-12 20:16:24 -0400855 printk("%s: PHY#%d reset never completed!\n", dev->name, phy);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700856 continue;
857 }
858 mii_status = mdio_read(dev, phy, MII_BMSR);
859 if (mii_status != 0) {
860 np->phys[phy_idx++] = phy;
861 np->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
862 printk(KERN_INFO "%s: MII PHY found at address %d, status "
863 "%#4.4x advertising %#4.4x.\n",
864 dev->name, phy, mii_status, np->mii_if.advertising);
865 /* there can be only one PHY on-board */
866 break;
867 }
868 }
869 np->phy_cnt = phy_idx;
870 if (np->phy_cnt > 0)
871 np->mii_if.phy_id = np->phys[0];
872 else
873 memset(&np->mii_if, 0, sizeof(np->mii_if));
874 }
875
876 printk(KERN_INFO "%s: scatter-gather and hardware TCP cksumming %s.\n",
877 dev->name, enable_hw_cksum ? "enabled" : "disabled");
878 return 0;
879
880err_out_cleardev:
881 pci_set_drvdata(pdev, NULL);
882 iounmap(base);
883err_out_free_res:
884 pci_release_regions (pdev);
885err_out_free_netdev:
886 free_netdev(dev);
887 return -ENODEV;
888}
889
890
891/* Read the MII Management Data I/O (MDIO) interfaces. */
892static int mdio_read(struct net_device *dev, int phy_id, int location)
893{
894 struct netdev_private *np = netdev_priv(dev);
895 void __iomem *mdio_addr = np->base + MIICtrl + (phy_id<<7) + (location<<2);
896 int result, boguscnt=1000;
897 /* ??? Should we add a busy-wait here? */
Hannes Edere4c3c132008-12-25 23:55:35 -0800898 do {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700899 result = readl(mdio_addr);
Hannes Edere4c3c132008-12-25 23:55:35 -0800900 } while ((result & 0xC0000000) != 0x80000000 && --boguscnt > 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700901 if (boguscnt == 0)
902 return 0;
903 if ((result & 0xffff) == 0xffff)
904 return 0;
905 return result & 0xffff;
906}
907
908
909static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
910{
911 struct netdev_private *np = netdev_priv(dev);
912 void __iomem *mdio_addr = np->base + MIICtrl + (phy_id<<7) + (location<<2);
913 writel(value, mdio_addr);
914 /* The busy-wait will occur before a read. */
915}
916
917
918static int netdev_open(struct net_device *dev)
919{
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -0800920 const struct firmware *fw_rx, *fw_tx;
921 const __be32 *fw_rx_data, *fw_tx_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700922 struct netdev_private *np = netdev_priv(dev);
923 void __iomem *ioaddr = np->base;
924 int i, retval;
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -0800925 size_t tx_size, rx_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926 size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size;
927
928 /* Do we ever need to reset the chip??? */
Jeff Garzikfdecea62005-05-12 20:16:24 -0400929
Joe Perchesa0607fd2009-11-18 23:29:17 -0800930 retval = request_irq(dev->irq, intr_handler, IRQF_SHARED, dev->name, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700931 if (retval)
932 return retval;
933
934 /* Disable the Rx and Tx, and reset the chip. */
935 writel(0, ioaddr + GenCtrl);
936 writel(1, ioaddr + PCIDeviceConfig);
937 if (debug > 1)
938 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
939 dev->name, dev->irq);
940
941 /* Allocate the various queues. */
Al Viro88b19432007-08-23 02:29:45 -0400942 if (!np->queue_mem) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700943 tx_done_q_size = ((sizeof(struct tx_done_desc) * DONE_Q_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
944 rx_done_q_size = ((sizeof(rx_done_desc) * DONE_Q_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
945 tx_ring_size = ((sizeof(starfire_tx_desc) * TX_RING_SIZE + QUEUE_ALIGN - 1) / QUEUE_ALIGN) * QUEUE_ALIGN;
946 rx_ring_size = sizeof(struct starfire_rx_desc) * RX_RING_SIZE;
947 np->queue_mem_size = tx_done_q_size + rx_done_q_size + tx_ring_size + rx_ring_size;
948 np->queue_mem = pci_alloc_consistent(np->pci_dev, np->queue_mem_size, &np->queue_mem_dma);
Alexey Dobriyand8840ac2005-10-07 02:05:23 +0400949 if (np->queue_mem == NULL) {
950 free_irq(dev->irq, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951 return -ENOMEM;
Alexey Dobriyand8840ac2005-10-07 02:05:23 +0400952 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700953
954 np->tx_done_q = np->queue_mem;
955 np->tx_done_q_dma = np->queue_mem_dma;
956 np->rx_done_q = (void *) np->tx_done_q + tx_done_q_size;
957 np->rx_done_q_dma = np->tx_done_q_dma + tx_done_q_size;
958 np->tx_ring = (void *) np->rx_done_q + rx_done_q_size;
959 np->tx_ring_dma = np->rx_done_q_dma + rx_done_q_size;
960 np->rx_ring = (void *) np->tx_ring + tx_ring_size;
961 np->rx_ring_dma = np->tx_ring_dma + tx_ring_size;
962 }
963
964 /* Start with no carrier, it gets adjusted later */
965 netif_carrier_off(dev);
966 init_ring(dev);
967 /* Set the size of the Rx buffers. */
968 writel((np->rx_buf_sz << RxBufferLenShift) |
969 (0 << RxMinDescrThreshShift) |
970 RxPrefetchMode | RxVariableQ |
971 RX_Q_ENTRIES |
972 RX_DESC_Q_ADDR_SIZE | RX_DESC_ADDR_SIZE |
973 RxDescSpace4,
974 ioaddr + RxDescQCtrl);
975
976 /* Set up the Rx DMA controller. */
977 writel(RxChecksumIgnore |
978 (0 << RxEarlyIntThreshShift) |
979 (6 << RxHighPrioThreshShift) |
980 ((DMA_BURST_SIZE / 32) << RxBurstSizeShift),
981 ioaddr + RxDMACtrl);
982
983 /* Set Tx descriptor */
984 writel((2 << TxHiPriFIFOThreshShift) |
985 (0 << TxPadLenShift) |
986 ((DMA_BURST_SIZE / 32) << TxDMABurstSizeShift) |
987 TX_DESC_Q_ADDR_SIZE |
988 TX_DESC_SPACING | TX_DESC_TYPE,
989 ioaddr + TxDescCtrl);
990
991 writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + RxDescQHiAddr);
992 writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + TxRingHiAddr);
993 writel( (np->queue_mem_dma >> 16) >> 16, ioaddr + CompletionHiAddr);
994 writel(np->rx_ring_dma, ioaddr + RxDescQAddr);
995 writel(np->tx_ring_dma, ioaddr + TxRingPtr);
996
997 writel(np->tx_done_q_dma, ioaddr + TxCompletionAddr);
998 writel(np->rx_done_q_dma |
999 RxComplType |
1000 (0 << RxComplThreshShift),
1001 ioaddr + RxCompletionAddr);
1002
1003 if (debug > 1)
1004 printk(KERN_DEBUG "%s: Filling in the station address.\n", dev->name);
1005
1006 /* Fill both the Tx SA register and the Rx perfect filter. */
1007 for (i = 0; i < 6; i++)
1008 writeb(dev->dev_addr[i], ioaddr + TxStationAddr + 5 - i);
1009 /* The first entry is special because it bypasses the VLAN filter.
1010 Don't use it. */
1011 writew(0, ioaddr + PerfFilterTable);
1012 writew(0, ioaddr + PerfFilterTable + 4);
1013 writew(0, ioaddr + PerfFilterTable + 8);
1014 for (i = 1; i < 16; i++) {
Al Viro88b19432007-08-23 02:29:45 -04001015 __be16 *eaddrs = (__be16 *)dev->dev_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016 void __iomem *setup_frm = ioaddr + PerfFilterTable + i * 16;
Al Viro88b19432007-08-23 02:29:45 -04001017 writew(be16_to_cpu(eaddrs[2]), setup_frm); setup_frm += 4;
1018 writew(be16_to_cpu(eaddrs[1]), setup_frm); setup_frm += 4;
1019 writew(be16_to_cpu(eaddrs[0]), setup_frm); setup_frm += 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001020 }
1021
1022 /* Initialize other registers. */
1023 /* Configure the PCI bus bursts and FIFO thresholds. */
1024 np->tx_mode = TxFlowEnable|RxFlowEnable|PadEnable; /* modified when link is up. */
1025 writel(MiiSoftReset | np->tx_mode, ioaddr + TxMode);
1026 udelay(1000);
1027 writel(np->tx_mode, ioaddr + TxMode);
1028 np->tx_threshold = 4;
1029 writel(np->tx_threshold, ioaddr + TxThreshold);
1030
1031 writel(np->intr_timer_ctrl, ioaddr + IntrTimerCtrl);
1032
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001033 napi_enable(&np->napi);
Francois Romieua6676012008-07-06 20:54:45 -07001034
Linus Torvalds1da177e2005-04-16 15:20:36 -07001035 netif_start_queue(dev);
1036
1037 if (debug > 1)
1038 printk(KERN_DEBUG "%s: Setting the Rx and Tx modes.\n", dev->name);
1039 set_rx_mode(dev);
1040
1041 np->mii_if.advertising = mdio_read(dev, np->phys[0], MII_ADVERTISE);
1042 check_duplex(dev);
1043
1044 /* Enable GPIO interrupts on link change */
1045 writel(0x0f00ff00, ioaddr + GPIOCtrl);
1046
1047 /* Set the interrupt mask */
1048 writel(IntrRxDone | IntrRxEmpty | IntrDMAErr |
1049 IntrTxDMADone | IntrStatsMax | IntrLinkChange |
1050 IntrRxGFPDead | IntrNoTxCsum | IntrTxBadID,
1051 ioaddr + IntrEnable);
1052 /* Enable PCI interrupts. */
1053 writel(0x00800000 | readl(ioaddr + PCIDeviceConfig),
1054 ioaddr + PCIDeviceConfig);
1055
1056#ifdef VLAN_SUPPORT
1057 /* Set VLAN type to 802.1q */
1058 writel(ETH_P_8021Q, ioaddr + VlanType);
1059#endif /* VLAN_SUPPORT */
1060
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -08001061 retval = request_firmware(&fw_rx, FIRMWARE_RX, &np->pci_dev->dev);
1062 if (retval) {
1063 printk(KERN_ERR "starfire: Failed to load firmware \"%s\"\n",
1064 FIRMWARE_RX);
Ben Hutchingsc928feb2010-01-26 18:27:09 +00001065 goto out_init;
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -08001066 }
1067 if (fw_rx->size % 4) {
1068 printk(KERN_ERR "starfire: bogus length %zu in \"%s\"\n",
1069 fw_rx->size, FIRMWARE_RX);
1070 retval = -EINVAL;
1071 goto out_rx;
1072 }
1073 retval = request_firmware(&fw_tx, FIRMWARE_TX, &np->pci_dev->dev);
1074 if (retval) {
1075 printk(KERN_ERR "starfire: Failed to load firmware \"%s\"\n",
1076 FIRMWARE_TX);
1077 goto out_rx;
1078 }
1079 if (fw_tx->size % 4) {
1080 printk(KERN_ERR "starfire: bogus length %zu in \"%s\"\n",
1081 fw_tx->size, FIRMWARE_TX);
1082 retval = -EINVAL;
1083 goto out_tx;
1084 }
1085 fw_rx_data = (const __be32 *)&fw_rx->data[0];
1086 fw_tx_data = (const __be32 *)&fw_tx->data[0];
1087 rx_size = fw_rx->size / 4;
1088 tx_size = fw_tx->size / 4;
1089
Linus Torvalds1da177e2005-04-16 15:20:36 -07001090 /* Load Rx/Tx firmware into the frame processors */
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -08001091 for (i = 0; i < rx_size; i++)
1092 writel(be32_to_cpup(&fw_rx_data[i]), ioaddr + RxGfpMem + i * 4);
1093 for (i = 0; i < tx_size; i++)
1094 writel(be32_to_cpup(&fw_tx_data[i]), ioaddr + TxGfpMem + i * 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001095 if (enable_hw_cksum)
1096 /* Enable the Rx and Tx units, and the Rx/Tx frame processors. */
1097 writel(TxEnable|TxGFPEnable|RxEnable|RxGFPEnable, ioaddr + GenCtrl);
1098 else
1099 /* Enable the Rx and Tx units only. */
1100 writel(TxEnable|RxEnable, ioaddr + GenCtrl);
1101
1102 if (debug > 1)
1103 printk(KERN_DEBUG "%s: Done netdev_open().\n",
1104 dev->name);
1105
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -08001106out_tx:
1107 release_firmware(fw_tx);
1108out_rx:
1109 release_firmware(fw_rx);
Ben Hutchingsc928feb2010-01-26 18:27:09 +00001110out_init:
1111 if (retval)
1112 netdev_close(dev);
Jaswinder Singh Rajputcfc3a442009-01-04 16:12:11 -08001113 return retval;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001114}
1115
1116
1117static void check_duplex(struct net_device *dev)
1118{
1119 struct netdev_private *np = netdev_priv(dev);
1120 u16 reg0;
1121 int silly_count = 1000;
1122
1123 mdio_write(dev, np->phys[0], MII_ADVERTISE, np->mii_if.advertising);
1124 mdio_write(dev, np->phys[0], MII_BMCR, BMCR_RESET);
1125 udelay(500);
1126 while (--silly_count && mdio_read(dev, np->phys[0], MII_BMCR) & BMCR_RESET)
1127 /* do nothing */;
1128 if (!silly_count) {
1129 printk("%s: MII reset failed!\n", dev->name);
1130 return;
1131 }
1132
1133 reg0 = mdio_read(dev, np->phys[0], MII_BMCR);
1134
1135 if (!np->mii_if.force_media) {
1136 reg0 |= BMCR_ANENABLE | BMCR_ANRESTART;
1137 } else {
1138 reg0 &= ~(BMCR_ANENABLE | BMCR_ANRESTART);
1139 if (np->speed100)
1140 reg0 |= BMCR_SPEED100;
1141 if (np->mii_if.full_duplex)
1142 reg0 |= BMCR_FULLDPLX;
1143 printk(KERN_DEBUG "%s: Link forced to %sMbit %s-duplex\n",
1144 dev->name,
1145 np->speed100 ? "100" : "10",
1146 np->mii_if.full_duplex ? "full" : "half");
1147 }
1148 mdio_write(dev, np->phys[0], MII_BMCR, reg0);
1149}
1150
1151
1152static void tx_timeout(struct net_device *dev)
1153{
1154 struct netdev_private *np = netdev_priv(dev);
1155 void __iomem *ioaddr = np->base;
1156 int old_debug;
1157
1158 printk(KERN_WARNING "%s: Transmit timed out, status %#8.8x, "
1159 "resetting...\n", dev->name, (int) readl(ioaddr + IntrStatus));
1160
1161 /* Perhaps we should reinitialize the hardware here. */
1162
1163 /*
1164 * Stop and restart the interface.
1165 * Cheat and increase the debug level temporarily.
1166 */
1167 old_debug = debug;
1168 debug = 2;
1169 netdev_close(dev);
1170 netdev_open(dev);
1171 debug = old_debug;
1172
1173 /* Trigger an immediate transmit demand. */
1174
Eric Dumazet1ae5dc32010-05-10 05:01:31 -07001175 dev->trans_start = jiffies; /* prevent tx timeout */
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001176 dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001177 netif_wake_queue(dev);
1178}
1179
1180
1181/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1182static void init_ring(struct net_device *dev)
1183{
1184 struct netdev_private *np = netdev_priv(dev);
1185 int i;
1186
1187 np->cur_rx = np->cur_tx = np->reap_tx = 0;
1188 np->dirty_rx = np->dirty_tx = np->rx_done = np->tx_done = 0;
1189
1190 np->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1191
1192 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1193 for (i = 0; i < RX_RING_SIZE; i++) {
1194 struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz);
1195 np->rx_info[i].skb = skb;
1196 if (skb == NULL)
1197 break;
David S. Miller689be432005-06-28 15:25:31 -07001198 np->rx_info[i].mapping = pci_map_single(np->pci_dev, skb->data, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001199 skb->dev = dev; /* Mark as being used by this device. */
1200 /* Grrr, we cannot offset to correctly align the IP header. */
1201 np->rx_ring[i].rxaddr = cpu_to_dma(np->rx_info[i].mapping | RxDescValid);
1202 }
1203 writew(i - 1, np->base + RxDescQIdx);
1204 np->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1205
1206 /* Clear the remainder of the Rx buffer ring. */
1207 for ( ; i < RX_RING_SIZE; i++) {
1208 np->rx_ring[i].rxaddr = 0;
1209 np->rx_info[i].skb = NULL;
1210 np->rx_info[i].mapping = 0;
1211 }
1212 /* Mark the last entry as wrapping the ring. */
1213 np->rx_ring[RX_RING_SIZE - 1].rxaddr |= cpu_to_dma(RxDescEndRing);
1214
1215 /* Clear the completion rings. */
1216 for (i = 0; i < DONE_Q_SIZE; i++) {
1217 np->rx_done_q[i].status = 0;
1218 np->tx_done_q[i].status = 0;
1219 }
1220
1221 for (i = 0; i < TX_RING_SIZE; i++)
1222 memset(&np->tx_info[i], 0, sizeof(np->tx_info[i]));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001223}
1224
1225
Stephen Hemminger613573252009-08-31 19:50:58 +00001226static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001227{
1228 struct netdev_private *np = netdev_priv(dev);
1229 unsigned int entry;
1230 u32 status;
1231 int i;
1232
Linus Torvalds1da177e2005-04-16 15:20:36 -07001233 /*
1234 * be cautious here, wrapping the queue has weird semantics
1235 * and we may not have enough slots even when it seems we do.
1236 */
1237 if ((np->cur_tx - np->dirty_tx) + skb_num_frags(skb) * 2 > TX_RING_SIZE) {
1238 netif_stop_queue(dev);
Patrick McHardy5b548142009-06-12 06:22:29 +00001239 return NETDEV_TX_BUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001240 }
1241
1242#if defined(ZEROCOPY) && defined(HAS_BROKEN_FIRMWARE)
Patrick McHardy84fa7932006-08-29 16:44:56 -07001243 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Herbert Xu5b057c62006-06-23 02:06:41 -07001244 if (skb_padto(skb, (skb->len + PADDING_MASK) & ~PADDING_MASK))
Ion Badulescu67974232005-10-03 22:31:36 -04001245 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001246 }
1247#endif /* ZEROCOPY && HAS_BROKEN_FIRMWARE */
1248
1249 entry = np->cur_tx % TX_RING_SIZE;
1250 for (i = 0; i < skb_num_frags(skb); i++) {
1251 int wrap_ring = 0;
1252 status = TxDescID;
1253
1254 if (i == 0) {
1255 np->tx_info[entry].skb = skb;
1256 status |= TxCRCEn;
1257 if (entry >= TX_RING_SIZE - skb_num_frags(skb)) {
1258 status |= TxRingWrap;
1259 wrap_ring = 1;
1260 }
1261 if (np->reap_tx) {
1262 status |= TxDescIntr;
1263 np->reap_tx = 0;
1264 }
Patrick McHardy84fa7932006-08-29 16:44:56 -07001265 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001266 status |= TxCalTCP;
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001267 dev->stats.tx_compressed++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001268 }
1269 status |= skb_first_frag_len(skb) | (skb_num_frags(skb) << 16);
1270
1271 np->tx_info[entry].mapping =
1272 pci_map_single(np->pci_dev, skb->data, skb_first_frag_len(skb), PCI_DMA_TODEVICE);
1273 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001274 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[i - 1];
1275 status |= this_frag->size;
1276 np->tx_info[entry].mapping =
1277 pci_map_single(np->pci_dev, page_address(this_frag->page) + this_frag->page_offset, this_frag->size, PCI_DMA_TODEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001278 }
1279
1280 np->tx_ring[entry].addr = cpu_to_dma(np->tx_info[entry].mapping);
1281 np->tx_ring[entry].status = cpu_to_le32(status);
1282 if (debug > 3)
1283 printk(KERN_DEBUG "%s: Tx #%d/#%d slot %d status %#8.8x.\n",
1284 dev->name, np->cur_tx, np->dirty_tx,
1285 entry, status);
1286 if (wrap_ring) {
1287 np->tx_info[entry].used_slots = TX_RING_SIZE - entry;
1288 np->cur_tx += np->tx_info[entry].used_slots;
1289 entry = 0;
1290 } else {
1291 np->tx_info[entry].used_slots = 1;
1292 np->cur_tx += np->tx_info[entry].used_slots;
1293 entry++;
1294 }
1295 /* scavenge the tx descriptors twice per TX_RING_SIZE */
1296 if (np->cur_tx % (TX_RING_SIZE / 2) == 0)
1297 np->reap_tx = 1;
1298 }
1299
1300 /* Non-x86: explicitly flush descriptor cache lines here. */
1301 /* Ensure all descriptors are written back before the transmit is
1302 initiated. - Jes */
1303 wmb();
1304
1305 /* Update the producer index. */
1306 writel(entry * (sizeof(starfire_tx_desc) / 8), np->base + TxProducerIdx);
1307
1308 /* 4 is arbitrary, but should be ok */
1309 if ((np->cur_tx - np->dirty_tx) + 4 > TX_RING_SIZE)
1310 netif_stop_queue(dev);
1311
Patrick McHardy6ed10652009-06-23 06:03:08 +00001312 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001313}
1314
1315
1316/* The interrupt handler does all of the Rx thread work and cleans up
1317 after the Tx thread. */
David Howells7d12e782006-10-05 14:55:46 +01001318static irqreturn_t intr_handler(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001319{
1320 struct net_device *dev = dev_instance;
1321 struct netdev_private *np = netdev_priv(dev);
1322 void __iomem *ioaddr = np->base;
1323 int boguscnt = max_interrupt_work;
1324 int consumer;
1325 int tx_status;
1326 int handled = 0;
1327
1328 do {
1329 u32 intr_status = readl(ioaddr + IntrClear);
1330
1331 if (debug > 4)
1332 printk(KERN_DEBUG "%s: Interrupt status %#8.8x.\n",
1333 dev->name, intr_status);
1334
1335 if (intr_status == 0 || intr_status == (u32) -1)
1336 break;
1337
1338 handled = 1;
1339
Francois Romieua6676012008-07-06 20:54:45 -07001340 if (intr_status & (IntrRxDone | IntrRxEmpty)) {
1341 u32 enable;
1342
Ben Hutchings288379f2009-01-19 16:43:59 -08001343 if (likely(napi_schedule_prep(&np->napi))) {
1344 __napi_schedule(&np->napi);
Francois Romieua6676012008-07-06 20:54:45 -07001345 enable = readl(ioaddr + IntrEnable);
1346 enable &= ~(IntrRxDone | IntrRxEmpty);
1347 writel(enable, ioaddr + IntrEnable);
1348 /* flush PCI posting buffers */
1349 readl(ioaddr + IntrEnable);
1350 } else {
1351 /* Paranoia check */
1352 enable = readl(ioaddr + IntrEnable);
1353 if (enable & (IntrRxDone | IntrRxEmpty)) {
1354 printk(KERN_INFO
1355 "%s: interrupt while in poll!\n",
1356 dev->name);
1357 enable &= ~(IntrRxDone | IntrRxEmpty);
1358 writel(enable, ioaddr + IntrEnable);
1359 }
1360 }
1361 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001362
1363 /* Scavenge the skbuff list based on the Tx-done queue.
1364 There are redundant checks here that may be cleaned up
1365 after the driver has proven to be reliable. */
1366 consumer = readl(ioaddr + TxConsumerIdx);
1367 if (debug > 3)
1368 printk(KERN_DEBUG "%s: Tx Consumer index is %d.\n",
1369 dev->name, consumer);
1370
1371 while ((tx_status = le32_to_cpu(np->tx_done_q[np->tx_done].status)) != 0) {
1372 if (debug > 3)
1373 printk(KERN_DEBUG "%s: Tx completion #%d entry %d is %#8.8x.\n",
1374 dev->name, np->dirty_tx, np->tx_done, tx_status);
1375 if ((tx_status & 0xe0000000) == 0xa0000000) {
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001376 dev->stats.tx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001377 } else if ((tx_status & 0xe0000000) == 0x80000000) {
1378 u16 entry = (tx_status & 0x7fff) / sizeof(starfire_tx_desc);
1379 struct sk_buff *skb = np->tx_info[entry].skb;
1380 np->tx_info[entry].skb = NULL;
1381 pci_unmap_single(np->pci_dev,
1382 np->tx_info[entry].mapping,
1383 skb_first_frag_len(skb),
1384 PCI_DMA_TODEVICE);
1385 np->tx_info[entry].mapping = 0;
1386 np->dirty_tx += np->tx_info[entry].used_slots;
1387 entry = (entry + np->tx_info[entry].used_slots) % TX_RING_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001388 {
1389 int i;
1390 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1391 pci_unmap_single(np->pci_dev,
1392 np->tx_info[entry].mapping,
1393 skb_shinfo(skb)->frags[i].size,
1394 PCI_DMA_TODEVICE);
1395 np->dirty_tx++;
1396 entry++;
1397 }
1398 }
Jeff Garzikfdecea62005-05-12 20:16:24 -04001399
Linus Torvalds1da177e2005-04-16 15:20:36 -07001400 dev_kfree_skb_irq(skb);
1401 }
1402 np->tx_done_q[np->tx_done].status = 0;
1403 np->tx_done = (np->tx_done + 1) % DONE_Q_SIZE;
1404 }
1405 writew(np->tx_done, ioaddr + CompletionQConsumerIdx + 2);
1406
1407 if (netif_queue_stopped(dev) &&
1408 (np->cur_tx - np->dirty_tx + 4 < TX_RING_SIZE)) {
1409 /* The ring is no longer full, wake the queue. */
1410 netif_wake_queue(dev);
1411 }
1412
1413 /* Stats overflow */
1414 if (intr_status & IntrStatsMax)
1415 get_stats(dev);
1416
1417 /* Media change interrupt. */
1418 if (intr_status & IntrLinkChange)
1419 netdev_media_change(dev);
1420
1421 /* Abnormal error summary/uncommon events handlers. */
1422 if (intr_status & IntrAbnormalSummary)
1423 netdev_error(dev, intr_status);
1424
1425 if (--boguscnt < 0) {
1426 if (debug > 1)
1427 printk(KERN_WARNING "%s: Too much work at interrupt, "
1428 "status=%#8.8x.\n",
1429 dev->name, intr_status);
1430 break;
1431 }
1432 } while (1);
1433
1434 if (debug > 4)
1435 printk(KERN_DEBUG "%s: exiting interrupt, status=%#8.8x.\n",
1436 dev->name, (int) readl(ioaddr + IntrStatus));
1437 return IRQ_RETVAL(handled);
1438}
1439
1440
Francois Romieua6676012008-07-06 20:54:45 -07001441/*
1442 * This routine is logically part of the interrupt/poll handler, but separated
1443 * for clarity and better register allocation.
1444 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001445static int __netdev_rx(struct net_device *dev, int *quota)
1446{
1447 struct netdev_private *np = netdev_priv(dev);
1448 u32 desc_status;
1449 int retcode = 0;
1450
1451 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1452 while ((desc_status = le32_to_cpu(np->rx_done_q[np->rx_done].status)) != 0) {
1453 struct sk_buff *skb;
1454 u16 pkt_len;
1455 int entry;
1456 rx_done_desc *desc = &np->rx_done_q[np->rx_done];
1457
1458 if (debug > 4)
1459 printk(KERN_DEBUG " netdev_rx() status of %d was %#8.8x.\n", np->rx_done, desc_status);
1460 if (!(desc_status & RxOK)) {
Jeff Garzikfdecea62005-05-12 20:16:24 -04001461 /* There was an error. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001462 if (debug > 2)
1463 printk(KERN_DEBUG " netdev_rx() Rx error was %#8.8x.\n", desc_status);
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001464 dev->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001465 if (desc_status & RxFIFOErr)
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001466 dev->stats.rx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001467 goto next_rx;
1468 }
1469
1470 if (*quota <= 0) { /* out of rx quota */
1471 retcode = 1;
1472 goto out;
1473 }
1474 (*quota)--;
1475
1476 pkt_len = desc_status; /* Implicitly Truncate */
1477 entry = (desc_status >> 16) & 0x7ff;
1478
1479 if (debug > 4)
1480 printk(KERN_DEBUG " netdev_rx() normal Rx pkt length %d, quota %d.\n", pkt_len, *quota);
1481 /* Check if the packet is long enough to accept without copying
1482 to a minimally-sized skbuff. */
Joe Perches8e95a202009-12-03 07:58:21 +00001483 if (pkt_len < rx_copybreak &&
1484 (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001485 skb_reserve(skb, 2); /* 16 byte align the IP header */
1486 pci_dma_sync_single_for_cpu(np->pci_dev,
1487 np->rx_info[entry].mapping,
1488 pkt_len, PCI_DMA_FROMDEVICE);
David S. Miller8c7b7fa2007-07-10 22:08:12 -07001489 skb_copy_to_linear_data(skb, np->rx_info[entry].skb->data, pkt_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001490 pci_dma_sync_single_for_device(np->pci_dev,
1491 np->rx_info[entry].mapping,
1492 pkt_len, PCI_DMA_FROMDEVICE);
1493 skb_put(skb, pkt_len);
1494 } else {
1495 pci_unmap_single(np->pci_dev, np->rx_info[entry].mapping, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
1496 skb = np->rx_info[entry].skb;
1497 skb_put(skb, pkt_len);
1498 np->rx_info[entry].skb = NULL;
1499 np->rx_info[entry].mapping = 0;
1500 }
1501#ifndef final_version /* Remove after testing. */
1502 /* You will want this info for the initial debug. */
Joe Perches0795af52007-10-03 17:59:30 -07001503 if (debug > 5) {
Johannes Berge1749612008-10-27 15:59:26 -07001504 printk(KERN_DEBUG " Rx data %pM %pM %2.2x%2.2x.\n",
1505 skb->data, skb->data + 6,
Joe Perches0795af52007-10-03 17:59:30 -07001506 skb->data[12], skb->data[13]);
1507 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001508#endif
1509
1510 skb->protocol = eth_type_trans(skb, dev);
Jeff Garzikfdecea62005-05-12 20:16:24 -04001511#ifdef VLAN_SUPPORT
Linus Torvalds1da177e2005-04-16 15:20:36 -07001512 if (debug > 4)
1513 printk(KERN_DEBUG " netdev_rx() status2 of %d was %#4.4x.\n", np->rx_done, le16_to_cpu(desc->status2));
1514#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001515 if (le16_to_cpu(desc->status2) & 0x0100) {
1516 skb->ip_summed = CHECKSUM_UNNECESSARY;
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001517 dev->stats.rx_compressed++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001518 }
1519 /*
1520 * This feature doesn't seem to be working, at least
1521 * with the two firmware versions I have. If the GFP sees
1522 * an IP fragment, it either ignores it completely, or reports
1523 * "bad checksum" on it.
1524 *
1525 * Maybe I missed something -- corrections are welcome.
1526 * Until then, the printk stays. :-) -Ion
1527 */
1528 else if (le16_to_cpu(desc->status2) & 0x0040) {
Patrick McHardy84fa7932006-08-29 16:44:56 -07001529 skb->ip_summed = CHECKSUM_COMPLETE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001530 skb->csum = le16_to_cpu(desc->csum);
1531 printk(KERN_DEBUG "%s: checksum_hw, status2 = %#x\n", dev->name, le16_to_cpu(desc->status2));
1532 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001533#ifdef VLAN_SUPPORT
1534 if (np->vlgrp && le16_to_cpu(desc->status2) & 0x0200) {
Francois Romieua6676012008-07-06 20:54:45 -07001535 u16 vlid = le16_to_cpu(desc->vlanid);
1536
1537 if (debug > 4) {
1538 printk(KERN_DEBUG " netdev_rx() vlanid = %d\n",
1539 vlid);
1540 }
1541 /*
1542 * vlan_hwaccel_rx expects a packet with the VLAN tag
1543 * stripped out.
1544 */
1545 vlan_hwaccel_rx(skb, np->vlgrp, vlid);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001546 } else
1547#endif /* VLAN_SUPPORT */
Francois Romieua6676012008-07-06 20:54:45 -07001548 netif_receive_skb(skb);
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001549 dev->stats.rx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001550
1551 next_rx:
1552 np->cur_rx++;
1553 desc->status = 0;
1554 np->rx_done = (np->rx_done + 1) % DONE_Q_SIZE;
1555 }
Jarek Poplawski9a3de252008-12-16 15:42:20 -08001556
1557 if (*quota == 0) { /* out of rx quota */
1558 retcode = 1;
1559 goto out;
1560 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001561 writew(np->rx_done, np->base + CompletionQConsumerIdx);
1562
1563 out:
1564 refill_rx_ring(dev);
1565 if (debug > 5)
1566 printk(KERN_DEBUG " exiting netdev_rx(): %d, status of %d was %#8.8x.\n",
1567 retcode, np->rx_done, desc_status);
1568 return retcode;
1569}
1570
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001571static int netdev_poll(struct napi_struct *napi, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001572{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001573 struct netdev_private *np = container_of(napi, struct netdev_private, napi);
1574 struct net_device *dev = np->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001575 u32 intr_status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001576 void __iomem *ioaddr = np->base;
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001577 int quota = budget;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001578
1579 do {
1580 writel(IntrRxDone | IntrRxEmpty, ioaddr + IntrClear);
1581
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001582 if (__netdev_rx(dev, &quota))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001583 goto out;
1584
1585 intr_status = readl(ioaddr + IntrStatus);
1586 } while (intr_status & (IntrRxDone | IntrRxEmpty));
1587
Ben Hutchings288379f2009-01-19 16:43:59 -08001588 napi_complete(napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001589 intr_status = readl(ioaddr + IntrEnable);
1590 intr_status |= IntrRxDone | IntrRxEmpty;
1591 writel(intr_status, ioaddr + IntrEnable);
1592
1593 out:
1594 if (debug > 5)
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001595 printk(KERN_DEBUG " exiting netdev_poll(): %d.\n",
1596 budget - quota);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001597
1598 /* Restart Rx engine if stopped. */
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001599 return budget - quota;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001600}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001601
1602static void refill_rx_ring(struct net_device *dev)
1603{
1604 struct netdev_private *np = netdev_priv(dev);
1605 struct sk_buff *skb;
1606 int entry = -1;
1607
1608 /* Refill the Rx ring buffers. */
1609 for (; np->cur_rx - np->dirty_rx > 0; np->dirty_rx++) {
1610 entry = np->dirty_rx % RX_RING_SIZE;
1611 if (np->rx_info[entry].skb == NULL) {
1612 skb = dev_alloc_skb(np->rx_buf_sz);
1613 np->rx_info[entry].skb = skb;
1614 if (skb == NULL)
1615 break; /* Better luck next round. */
1616 np->rx_info[entry].mapping =
David S. Miller689be432005-06-28 15:25:31 -07001617 pci_map_single(np->pci_dev, skb->data, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001618 skb->dev = dev; /* Mark as being used by this device. */
1619 np->rx_ring[entry].rxaddr =
1620 cpu_to_dma(np->rx_info[entry].mapping | RxDescValid);
1621 }
1622 if (entry == RX_RING_SIZE - 1)
1623 np->rx_ring[entry].rxaddr |= cpu_to_dma(RxDescEndRing);
1624 }
1625 if (entry >= 0)
1626 writew(entry, np->base + RxDescQIdx);
1627}
1628
1629
1630static void netdev_media_change(struct net_device *dev)
1631{
1632 struct netdev_private *np = netdev_priv(dev);
1633 void __iomem *ioaddr = np->base;
1634 u16 reg0, reg1, reg4, reg5;
1635 u32 new_tx_mode;
1636 u32 new_intr_timer_ctrl;
1637
1638 /* reset status first */
1639 mdio_read(dev, np->phys[0], MII_BMCR);
1640 mdio_read(dev, np->phys[0], MII_BMSR);
1641
1642 reg0 = mdio_read(dev, np->phys[0], MII_BMCR);
1643 reg1 = mdio_read(dev, np->phys[0], MII_BMSR);
1644
1645 if (reg1 & BMSR_LSTATUS) {
1646 /* link is up */
1647 if (reg0 & BMCR_ANENABLE) {
1648 /* autonegotiation is enabled */
1649 reg4 = mdio_read(dev, np->phys[0], MII_ADVERTISE);
1650 reg5 = mdio_read(dev, np->phys[0], MII_LPA);
1651 if (reg4 & ADVERTISE_100FULL && reg5 & LPA_100FULL) {
1652 np->speed100 = 1;
1653 np->mii_if.full_duplex = 1;
1654 } else if (reg4 & ADVERTISE_100HALF && reg5 & LPA_100HALF) {
1655 np->speed100 = 1;
1656 np->mii_if.full_duplex = 0;
1657 } else if (reg4 & ADVERTISE_10FULL && reg5 & LPA_10FULL) {
1658 np->speed100 = 0;
1659 np->mii_if.full_duplex = 1;
1660 } else {
1661 np->speed100 = 0;
1662 np->mii_if.full_duplex = 0;
1663 }
1664 } else {
1665 /* autonegotiation is disabled */
1666 if (reg0 & BMCR_SPEED100)
1667 np->speed100 = 1;
1668 else
1669 np->speed100 = 0;
1670 if (reg0 & BMCR_FULLDPLX)
1671 np->mii_if.full_duplex = 1;
1672 else
1673 np->mii_if.full_duplex = 0;
1674 }
1675 netif_carrier_on(dev);
1676 printk(KERN_DEBUG "%s: Link is up, running at %sMbit %s-duplex\n",
1677 dev->name,
1678 np->speed100 ? "100" : "10",
1679 np->mii_if.full_duplex ? "full" : "half");
1680
1681 new_tx_mode = np->tx_mode & ~FullDuplex; /* duplex setting */
1682 if (np->mii_if.full_duplex)
1683 new_tx_mode |= FullDuplex;
1684 if (np->tx_mode != new_tx_mode) {
1685 np->tx_mode = new_tx_mode;
1686 writel(np->tx_mode | MiiSoftReset, ioaddr + TxMode);
1687 udelay(1000);
1688 writel(np->tx_mode, ioaddr + TxMode);
1689 }
1690
1691 new_intr_timer_ctrl = np->intr_timer_ctrl & ~Timer10X;
1692 if (np->speed100)
1693 new_intr_timer_ctrl |= Timer10X;
1694 if (np->intr_timer_ctrl != new_intr_timer_ctrl) {
1695 np->intr_timer_ctrl = new_intr_timer_ctrl;
1696 writel(new_intr_timer_ctrl, ioaddr + IntrTimerCtrl);
1697 }
1698 } else {
1699 netif_carrier_off(dev);
1700 printk(KERN_DEBUG "%s: Link is down\n", dev->name);
1701 }
1702}
1703
1704
1705static void netdev_error(struct net_device *dev, int intr_status)
1706{
1707 struct netdev_private *np = netdev_priv(dev);
1708
1709 /* Came close to underrunning the Tx FIFO, increase threshold. */
1710 if (intr_status & IntrTxDataLow) {
1711 if (np->tx_threshold <= PKT_BUF_SZ / 16) {
1712 writel(++np->tx_threshold, np->base + TxThreshold);
1713 printk(KERN_NOTICE "%s: PCI bus congestion, increasing Tx FIFO threshold to %d bytes\n",
1714 dev->name, np->tx_threshold * 16);
1715 } else
1716 printk(KERN_WARNING "%s: PCI Tx underflow -- adapter is probably malfunctioning\n", dev->name);
1717 }
1718 if (intr_status & IntrRxGFPDead) {
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001719 dev->stats.rx_fifo_errors++;
1720 dev->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001721 }
1722 if (intr_status & (IntrNoTxCsum | IntrDMAErr)) {
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001723 dev->stats.tx_fifo_errors++;
1724 dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001725 }
1726 if ((intr_status & ~(IntrNormalMask | IntrAbnormalSummary | IntrLinkChange | IntrStatsMax | IntrTxDataLow | IntrRxGFPDead | IntrNoTxCsum | IntrPCIPad)) && debug)
1727 printk(KERN_ERR "%s: Something Wicked happened! %#8.8x.\n",
1728 dev->name, intr_status);
1729}
1730
1731
1732static struct net_device_stats *get_stats(struct net_device *dev)
1733{
1734 struct netdev_private *np = netdev_priv(dev);
1735 void __iomem *ioaddr = np->base;
1736
1737 /* This adapter architecture needs no SMP locks. */
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001738 dev->stats.tx_bytes = readl(ioaddr + 0x57010);
1739 dev->stats.rx_bytes = readl(ioaddr + 0x57044);
1740 dev->stats.tx_packets = readl(ioaddr + 0x57000);
1741 dev->stats.tx_aborted_errors =
Linus Torvalds1da177e2005-04-16 15:20:36 -07001742 readl(ioaddr + 0x57024) + readl(ioaddr + 0x57028);
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001743 dev->stats.tx_window_errors = readl(ioaddr + 0x57018);
1744 dev->stats.collisions =
Linus Torvalds1da177e2005-04-16 15:20:36 -07001745 readl(ioaddr + 0x57004) + readl(ioaddr + 0x57008);
1746
1747 /* The chip only need report frame silently dropped. */
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001748 dev->stats.rx_dropped += readw(ioaddr + RxDMAStatus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001749 writew(0, ioaddr + RxDMAStatus);
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001750 dev->stats.rx_crc_errors = readl(ioaddr + 0x5703C);
1751 dev->stats.rx_frame_errors = readl(ioaddr + 0x57040);
1752 dev->stats.rx_length_errors = readl(ioaddr + 0x57058);
1753 dev->stats.rx_missed_errors = readl(ioaddr + 0x5707C);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001754
Kulikov Vasiliy86678a22010-07-05 02:14:34 +00001755 return &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001756}
1757
1758
Linus Torvalds1da177e2005-04-16 15:20:36 -07001759static void set_rx_mode(struct net_device *dev)
1760{
1761 struct netdev_private *np = netdev_priv(dev);
1762 void __iomem *ioaddr = np->base;
1763 u32 rx_mode = MinVLANPrio;
Jiri Pirko22bedad32010-04-01 21:22:57 +00001764 struct netdev_hw_addr *ha;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001765 int i;
1766#ifdef VLAN_SUPPORT
1767
1768 rx_mode |= VlanMode;
1769 if (np->vlgrp) {
1770 int vlan_count = 0;
1771 void __iomem *filter_addr = ioaddr + HashTable + 8;
1772 for (i = 0; i < VLAN_VID_MASK; i++) {
Dan Aloni5c15bde2007-03-02 20:44:51 -08001773 if (vlan_group_get_device(np->vlgrp, i)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001774 if (vlan_count >= 32)
1775 break;
Al Viro813820b2007-12-09 17:00:54 +00001776 writew(i, filter_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001777 filter_addr += 16;
1778 vlan_count++;
1779 }
1780 }
1781 if (i == VLAN_VID_MASK) {
1782 rx_mode |= PerfectFilterVlan;
1783 while (vlan_count < 32) {
1784 writew(0, filter_addr);
1785 filter_addr += 16;
1786 vlan_count++;
1787 }
1788 }
1789 }
1790#endif /* VLAN_SUPPORT */
1791
1792 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1793 rx_mode |= AcceptAll;
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00001794 } else if ((netdev_mc_count(dev) > multicast_filter_limit) ||
Joe Perches8e95a202009-12-03 07:58:21 +00001795 (dev->flags & IFF_ALLMULTI)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001796 /* Too many to match, or accept all multicasts. */
1797 rx_mode |= AcceptBroadcast|AcceptAllMulticast|PerfectFilter;
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00001798 } else if (netdev_mc_count(dev) <= 14) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001799 /* Use the 16 element perfect filter, skip first two entries. */
1800 void __iomem *filter_addr = ioaddr + PerfFilterTable + 2 * 16;
Al Viro88b19432007-08-23 02:29:45 -04001801 __be16 *eaddrs;
Jiri Pirko22bedad32010-04-01 21:22:57 +00001802 netdev_for_each_mc_addr(ha, dev) {
1803 eaddrs = (__be16 *) ha->addr;
Al Viro88b19432007-08-23 02:29:45 -04001804 writew(be16_to_cpu(eaddrs[2]), filter_addr); filter_addr += 4;
1805 writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;
1806 writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001807 }
Al Viro88b19432007-08-23 02:29:45 -04001808 eaddrs = (__be16 *)dev->dev_addr;
Jiri Pirko55085902010-02-18 00:42:54 +00001809 i = netdev_mc_count(dev) + 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001810 while (i++ < 16) {
Al Viro88b19432007-08-23 02:29:45 -04001811 writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 4;
1812 writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;
1813 writew(be16_to_cpu(eaddrs[2]), filter_addr); filter_addr += 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001814 }
1815 rx_mode |= AcceptBroadcast|PerfectFilter;
1816 } else {
1817 /* Must use a multicast hash table. */
1818 void __iomem *filter_addr;
Al Viro88b19432007-08-23 02:29:45 -04001819 __be16 *eaddrs;
1820 __le16 mc_filter[32] __attribute__ ((aligned(sizeof(long)))); /* Multicast hash filter */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001821
1822 memset(mc_filter, 0, sizeof(mc_filter));
Jiri Pirko22bedad32010-04-01 21:22:57 +00001823 netdev_for_each_mc_addr(ha, dev) {
Jeff Garzikfdecea62005-05-12 20:16:24 -04001824 /* The chip uses the upper 9 CRC bits
1825 as index into the hash table */
Jiri Pirko22bedad32010-04-01 21:22:57 +00001826 int bit_nr = ether_crc_le(ETH_ALEN, ha->addr) >> 23;
Al Viro88b19432007-08-23 02:29:45 -04001827 __le32 *fptr = (__le32 *) &mc_filter[(bit_nr >> 4) & ~1];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001828
1829 *fptr |= cpu_to_le32(1 << (bit_nr & 31));
1830 }
1831 /* Clear the perfect filter list, skip first two entries. */
1832 filter_addr = ioaddr + PerfFilterTable + 2 * 16;
Al Viro88b19432007-08-23 02:29:45 -04001833 eaddrs = (__be16 *)dev->dev_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001834 for (i = 2; i < 16; i++) {
Al Viro88b19432007-08-23 02:29:45 -04001835 writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 4;
1836 writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;
1837 writew(be16_to_cpu(eaddrs[2]), filter_addr); filter_addr += 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001838 }
1839 for (filter_addr = ioaddr + HashTable, i = 0; i < 32; filter_addr+= 16, i++)
1840 writew(mc_filter[i], filter_addr);
1841 rx_mode |= AcceptBroadcast|PerfectFilter|HashFilter;
1842 }
1843 writel(rx_mode, ioaddr + RxFilterMode);
1844}
1845
1846static int check_if_running(struct net_device *dev)
1847{
1848 if (!netif_running(dev))
1849 return -EINVAL;
1850 return 0;
1851}
1852
1853static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1854{
1855 struct netdev_private *np = netdev_priv(dev);
1856 strcpy(info->driver, DRV_NAME);
1857 strcpy(info->version, DRV_VERSION);
Jeff Garzikfdecea62005-05-12 20:16:24 -04001858 strcpy(info->bus_info, pci_name(np->pci_dev));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001859}
1860
1861static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1862{
1863 struct netdev_private *np = netdev_priv(dev);
1864 spin_lock_irq(&np->lock);
1865 mii_ethtool_gset(&np->mii_if, ecmd);
1866 spin_unlock_irq(&np->lock);
1867 return 0;
1868}
1869
1870static int set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1871{
1872 struct netdev_private *np = netdev_priv(dev);
1873 int res;
1874 spin_lock_irq(&np->lock);
1875 res = mii_ethtool_sset(&np->mii_if, ecmd);
1876 spin_unlock_irq(&np->lock);
1877 check_duplex(dev);
1878 return res;
1879}
1880
1881static int nway_reset(struct net_device *dev)
1882{
1883 struct netdev_private *np = netdev_priv(dev);
1884 return mii_nway_restart(&np->mii_if);
1885}
1886
1887static u32 get_link(struct net_device *dev)
1888{
1889 struct netdev_private *np = netdev_priv(dev);
1890 return mii_link_ok(&np->mii_if);
1891}
1892
1893static u32 get_msglevel(struct net_device *dev)
1894{
1895 return debug;
1896}
1897
1898static void set_msglevel(struct net_device *dev, u32 val)
1899{
1900 debug = val;
1901}
1902
Jeff Garzik7282d492006-09-13 14:30:00 -04001903static const struct ethtool_ops ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001904 .begin = check_if_running,
1905 .get_drvinfo = get_drvinfo,
1906 .get_settings = get_settings,
1907 .set_settings = set_settings,
1908 .nway_reset = nway_reset,
1909 .get_link = get_link,
1910 .get_msglevel = get_msglevel,
1911 .set_msglevel = set_msglevel,
1912};
1913
1914static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1915{
1916 struct netdev_private *np = netdev_priv(dev);
1917 struct mii_ioctl_data *data = if_mii(rq);
1918 int rc;
1919
1920 if (!netif_running(dev))
1921 return -EINVAL;
1922
1923 spin_lock_irq(&np->lock);
1924 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1925 spin_unlock_irq(&np->lock);
1926
1927 if ((cmd == SIOCSMIIREG) && (data->phy_id == np->phys[0]))
1928 check_duplex(dev);
1929
1930 return rc;
1931}
1932
1933static int netdev_close(struct net_device *dev)
1934{
1935 struct netdev_private *np = netdev_priv(dev);
1936 void __iomem *ioaddr = np->base;
1937 int i;
1938
1939 netif_stop_queue(dev);
Francois Romieua6676012008-07-06 20:54:45 -07001940
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001941 napi_disable(&np->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001942
1943 if (debug > 1) {
1944 printk(KERN_DEBUG "%s: Shutting down ethercard, Intr status %#8.8x.\n",
1945 dev->name, (int) readl(ioaddr + IntrStatus));
1946 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1947 dev->name, np->cur_tx, np->dirty_tx,
1948 np->cur_rx, np->dirty_rx);
1949 }
1950
1951 /* Disable interrupts by clearing the interrupt mask. */
1952 writel(0, ioaddr + IntrEnable);
1953
1954 /* Stop the chip's Tx and Rx processes. */
1955 writel(0, ioaddr + GenCtrl);
1956 readl(ioaddr + GenCtrl);
1957
1958 if (debug > 5) {
1959 printk(KERN_DEBUG" Tx ring at %#llx:\n",
1960 (long long) np->tx_ring_dma);
1961 for (i = 0; i < 8 /* TX_RING_SIZE is huge! */; i++)
1962 printk(KERN_DEBUG " #%d desc. %#8.8x %#llx -> %#8.8x.\n",
1963 i, le32_to_cpu(np->tx_ring[i].status),
1964 (long long) dma_to_cpu(np->tx_ring[i].addr),
1965 le32_to_cpu(np->tx_done_q[i].status));
1966 printk(KERN_DEBUG " Rx ring at %#llx -> %p:\n",
1967 (long long) np->rx_ring_dma, np->rx_done_q);
1968 if (np->rx_done_q)
1969 for (i = 0; i < 8 /* RX_RING_SIZE */; i++) {
1970 printk(KERN_DEBUG " #%d desc. %#llx -> %#8.8x\n",
1971 i, (long long) dma_to_cpu(np->rx_ring[i].rxaddr), le32_to_cpu(np->rx_done_q[i].status));
1972 }
1973 }
1974
1975 free_irq(dev->irq, dev);
1976
1977 /* Free all the skbuffs in the Rx queue. */
1978 for (i = 0; i < RX_RING_SIZE; i++) {
1979 np->rx_ring[i].rxaddr = cpu_to_dma(0xBADF00D0); /* An invalid address. */
1980 if (np->rx_info[i].skb != NULL) {
1981 pci_unmap_single(np->pci_dev, np->rx_info[i].mapping, np->rx_buf_sz, PCI_DMA_FROMDEVICE);
1982 dev_kfree_skb(np->rx_info[i].skb);
1983 }
1984 np->rx_info[i].skb = NULL;
1985 np->rx_info[i].mapping = 0;
1986 }
1987 for (i = 0; i < TX_RING_SIZE; i++) {
1988 struct sk_buff *skb = np->tx_info[i].skb;
1989 if (skb == NULL)
1990 continue;
1991 pci_unmap_single(np->pci_dev,
1992 np->tx_info[i].mapping,
1993 skb_first_frag_len(skb), PCI_DMA_TODEVICE);
1994 np->tx_info[i].mapping = 0;
1995 dev_kfree_skb(skb);
1996 np->tx_info[i].skb = NULL;
1997 }
1998
1999 return 0;
2000}
2001
Stefan Rompfd4fbeab2006-01-17 22:52:51 +01002002#ifdef CONFIG_PM
2003static int starfire_suspend(struct pci_dev *pdev, pm_message_t state)
2004{
2005 struct net_device *dev = pci_get_drvdata(pdev);
2006
2007 if (netif_running(dev)) {
2008 netif_device_detach(dev);
2009 netdev_close(dev);
2010 }
2011
2012 pci_save_state(pdev);
2013 pci_set_power_state(pdev, pci_choose_state(pdev,state));
2014
2015 return 0;
2016}
2017
2018static int starfire_resume(struct pci_dev *pdev)
2019{
2020 struct net_device *dev = pci_get_drvdata(pdev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002021
Stefan Rompfd4fbeab2006-01-17 22:52:51 +01002022 pci_set_power_state(pdev, PCI_D0);
2023 pci_restore_state(pdev);
2024
2025 if (netif_running(dev)) {
2026 netdev_open(dev);
2027 netif_device_attach(dev);
2028 }
2029
2030 return 0;
2031}
2032#endif /* CONFIG_PM */
2033
Linus Torvalds1da177e2005-04-16 15:20:36 -07002034
2035static void __devexit starfire_remove_one (struct pci_dev *pdev)
2036{
2037 struct net_device *dev = pci_get_drvdata(pdev);
2038 struct netdev_private *np = netdev_priv(dev);
2039
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +02002040 BUG_ON(!dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002041
2042 unregister_netdev(dev);
2043
2044 if (np->queue_mem)
2045 pci_free_consistent(pdev, np->queue_mem_size, np->queue_mem, np->queue_mem_dma);
2046
2047
2048 /* XXX: add wakeup code -- requires firmware for MagicPacket */
2049 pci_set_power_state(pdev, PCI_D3hot); /* go to sleep in D3 mode */
2050 pci_disable_device(pdev);
2051
2052 iounmap(np->base);
2053 pci_release_regions(pdev);
2054
2055 pci_set_drvdata(pdev, NULL);
2056 free_netdev(dev); /* Will also free np!! */
2057}
2058
2059
2060static struct pci_driver starfire_driver = {
2061 .name = DRV_NAME,
2062 .probe = starfire_init_one,
2063 .remove = __devexit_p(starfire_remove_one),
Stefan Rompfd4fbeab2006-01-17 22:52:51 +01002064#ifdef CONFIG_PM
2065 .suspend = starfire_suspend,
2066 .resume = starfire_resume,
2067#endif /* CONFIG_PM */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002068 .id_table = starfire_pci_tbl,
2069};
2070
2071
2072static int __init starfire_init (void)
2073{
2074/* when a module, this is printed whether or not devices are found in probe */
2075#ifdef MODULE
2076 printk(version);
Francois Romieua6676012008-07-06 20:54:45 -07002077
Jeff Garzikfdecea62005-05-12 20:16:24 -04002078 printk(KERN_INFO DRV_NAME ": polling (NAPI) enabled\n");
Jeff Garzikfdecea62005-05-12 20:16:24 -04002079#endif
2080
Linus Torvalds1da177e2005-04-16 15:20:36 -07002081 /* we can do this test only at run-time... sigh */
Ion Badulescu67974232005-10-03 22:31:36 -04002082 if (sizeof(dma_addr_t) != sizeof(netdrv_addr_t)) {
2083 printk("This driver has dma_addr_t issues, please send email to maintainer\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07002084 return -ENODEV;
2085 }
Ion Badulescu67974232005-10-03 22:31:36 -04002086
Jeff Garzik29917622006-08-19 17:48:59 -04002087 return pci_register_driver(&starfire_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002088}
2089
2090
2091static void __exit starfire_cleanup (void)
2092{
2093 pci_unregister_driver (&starfire_driver);
2094}
2095
2096
2097module_init(starfire_init);
2098module_exit(starfire_cleanup);
2099
2100
2101/*
2102 * Local variables:
2103 * c-basic-offset: 8
2104 * tab-width: 8
2105 * End:
2106 */