blob: 073e72c8f08b3135931f775de4217cd6d869d322 [file] [log] [blame]
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001/*
2 * The Marvell camera core. This device appears in a number of settings,
3 * so it needs platform-specific support outside of the core.
4 *
5 * Copyright 2011 Jonathan Corbet corbet@lwn.net
6 */
7#include <linux/kernel.h>
8#include <linux/module.h>
9#include <linux/fs.h>
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030010#include <linux/mm.h>
11#include <linux/i2c.h>
12#include <linux/interrupt.h>
13#include <linux/spinlock.h>
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030014#include <linux/slab.h>
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030015#include <linux/device.h>
16#include <linux/wait.h>
17#include <linux/list.h>
18#include <linux/dma-mapping.h>
19#include <linux/delay.h>
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030020#include <linux/vmalloc.h>
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030021#include <linux/io.h>
Jonathan Corbet362d45b2011-06-20 16:14:37 -030022#include <linux/videodev2.h>
23#include <media/v4l2-device.h>
24#include <media/v4l2-ioctl.h>
25#include <media/v4l2-chip-ident.h>
26#include <media/ov7670.h>
27#include <media/videobuf2-vmalloc.h>
Jonathan Corbeta9b36e82011-06-20 16:14:40 -030028#include <media/videobuf2-dma-contig.h>
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -030029#include <media/videobuf2-dma-sg.h>
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030030
31#include "mcam-core.h"
32
Jonathan Corbeta9b36e82011-06-20 16:14:40 -030033/*
34 * Basic frame stats - to be deleted shortly
35 */
36static int frames;
37static int singles;
38static int delivered;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030039
Jonathan Corbet74984692011-07-08 17:50:49 -030040#ifdef MCAM_MODE_VMALLOC
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030041/*
42 * Internal DMA buffer management. Since the controller cannot do S/G I/O,
43 * we must have physically contiguous buffers to bring frames into.
44 * These parameters control how many buffers we use, whether we
45 * allocate them at load time (better chance of success, but nails down
46 * memory) or when somebody tries to use the camera (riskier), and,
47 * for load-time allocation, how big they should be.
48 *
49 * The controller can cycle through three buffers. We could use
50 * more by flipping pointers around, but it probably makes little
51 * sense.
52 */
53
54static int alloc_bufs_at_read;
55module_param(alloc_bufs_at_read, bool, 0444);
56MODULE_PARM_DESC(alloc_bufs_at_read,
57 "Non-zero value causes DMA buffers to be allocated when the "
58 "video capture device is read, rather than at module load "
59 "time. This saves memory, but decreases the chances of "
Jonathan Corbeta9b36e82011-06-20 16:14:40 -030060 "successfully getting those buffers. This parameter is "
61 "only used in the vmalloc buffer mode");
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030062
63static int n_dma_bufs = 3;
64module_param(n_dma_bufs, uint, 0644);
65MODULE_PARM_DESC(n_dma_bufs,
66 "The number of DMA buffers to allocate. Can be either two "
67 "(saves memory, makes timing tighter) or three.");
68
69static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */
70module_param(dma_buf_size, uint, 0444);
71MODULE_PARM_DESC(dma_buf_size,
72 "The size of the allocated DMA buffers. If actual operating "
73 "parameters require larger buffers, an attempt to reallocate "
74 "will be made.");
Jonathan Corbet74984692011-07-08 17:50:49 -030075#else /* MCAM_MODE_VMALLOC */
76static const int alloc_bufs_at_read = 0;
77static const int n_dma_bufs = 3; /* Used by S/G_PARM */
78#endif /* MCAM_MODE_VMALLOC */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030079
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030080static int flip;
81module_param(flip, bool, 0444);
82MODULE_PARM_DESC(flip,
83 "If set, the sensor will be instructed to flip the image "
84 "vertically.");
85
Jonathan Corbeta9b36e82011-06-20 16:14:40 -030086static int buffer_mode = -1;
87module_param(buffer_mode, int, 0444);
88MODULE_PARM_DESC(buffer_mode,
89 "Set the buffer mode to be used; default is to go with what "
90 "the platform driver asks for. Set to 0 for vmalloc, 1 for "
91 "DMA contiguous.");
92
Jonathan Corbetabfa3df2011-06-11 14:46:43 -030093/*
94 * Status flags. Always manipulated with bit operations.
95 */
96#define CF_BUF0_VALID 0 /* Buffers valid - first three */
97#define CF_BUF1_VALID 1
98#define CF_BUF2_VALID 2
99#define CF_DMA_ACTIVE 3 /* A frame is incoming */
100#define CF_CONFIG_NEEDED 4 /* Must configure hardware */
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300101#define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300102#define CF_SG_RESTART 6 /* SG restart needed */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300103
104#define sensor_call(cam, o, f, args...) \
105 v4l2_subdev_call(cam->sensor, o, f, ##args)
106
107static struct mcam_format_struct {
108 __u8 *desc;
109 __u32 pixelformat;
110 int bpp; /* Bytes per pixel */
111 enum v4l2_mbus_pixelcode mbus_code;
112} mcam_formats[] = {
113 {
114 .desc = "YUYV 4:2:2",
115 .pixelformat = V4L2_PIX_FMT_YUYV,
116 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
117 .bpp = 2,
118 },
119 {
120 .desc = "RGB 444",
121 .pixelformat = V4L2_PIX_FMT_RGB444,
122 .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE,
123 .bpp = 2,
124 },
125 {
126 .desc = "RGB 565",
127 .pixelformat = V4L2_PIX_FMT_RGB565,
128 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE,
129 .bpp = 2,
130 },
131 {
132 .desc = "Raw RGB Bayer",
133 .pixelformat = V4L2_PIX_FMT_SBGGR8,
134 .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8,
135 .bpp = 1
136 },
137};
138#define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
139
140static struct mcam_format_struct *mcam_find_format(u32 pixelformat)
141{
142 unsigned i;
143
144 for (i = 0; i < N_MCAM_FMTS; i++)
145 if (mcam_formats[i].pixelformat == pixelformat)
146 return mcam_formats + i;
147 /* Not found? Then return the first format. */
148 return mcam_formats;
149}
150
151/*
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300152 * The default format we use until somebody says otherwise.
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300153 */
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300154static const struct v4l2_pix_format mcam_def_pix_format = {
155 .width = VGA_WIDTH,
156 .height = VGA_HEIGHT,
157 .pixelformat = V4L2_PIX_FMT_YUYV,
158 .field = V4L2_FIELD_NONE,
159 .bytesperline = VGA_WIDTH*2,
160 .sizeimage = VGA_WIDTH*VGA_HEIGHT*2,
161};
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300162
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300163static const enum v4l2_mbus_pixelcode mcam_def_mbus_code =
164 V4L2_MBUS_FMT_YUYV8_2X8;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300165
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300166
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300167/*
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300168 * The two-word DMA descriptor format used by the Armada 610 and like. There
169 * Is a three-word format as well (set C1_DESC_3WORD) where the third
170 * word is a pointer to the next descriptor, but we don't use it. Two-word
171 * descriptors have to be contiguous in memory.
172 */
173struct mcam_dma_desc {
174 u32 dma_addr;
175 u32 segment_len;
176};
177
178/*
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300179 * Our buffer type for working with videobuf2. Note that the vb2
180 * developers have decreed that struct vb2_buffer must be at the
181 * beginning of this structure.
182 */
183struct mcam_vb_buffer {
184 struct vb2_buffer vb_buf;
185 struct list_head queue;
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300186 struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */
187 dma_addr_t dma_desc_pa; /* Descriptor physical address */
188 int dma_desc_nent; /* Number of mapped descriptors */
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300189};
190
191static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb)
192{
193 return container_of(vb, struct mcam_vb_buffer, vb_buf);
194}
195
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300196/*
197 * Hand a completed buffer back to user space.
198 */
199static void mcam_buffer_done(struct mcam_camera *cam, int frame,
200 struct vb2_buffer *vbuf)
201{
202 vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage;
203 vbuf->v4l2_buf.sequence = cam->buf_seq[frame];
204 vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage);
205 vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE);
206}
207
208
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300209
210/*
Jonathan Corbet67a8dbb2011-06-11 14:46:49 -0300211 * Debugging and related.
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300212 */
213#define cam_err(cam, fmt, arg...) \
214 dev_err((cam)->dev, fmt, ##arg);
215#define cam_warn(cam, fmt, arg...) \
216 dev_warn((cam)->dev, fmt, ##arg);
217#define cam_dbg(cam, fmt, arg...) \
218 dev_dbg((cam)->dev, fmt, ##arg);
219
220
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300221/*
222 * Flag manipulation helpers
223 */
224static void mcam_reset_buffers(struct mcam_camera *cam)
225{
226 int i;
227
228 cam->next_buf = -1;
229 for (i = 0; i < cam->nbufs; i++)
230 clear_bit(i, &cam->flags);
231}
232
233static inline int mcam_needs_config(struct mcam_camera *cam)
234{
235 return test_bit(CF_CONFIG_NEEDED, &cam->flags);
236}
237
238static void mcam_set_config_needed(struct mcam_camera *cam, int needed)
239{
240 if (needed)
241 set_bit(CF_CONFIG_NEEDED, &cam->flags);
242 else
243 clear_bit(CF_CONFIG_NEEDED, &cam->flags);
244}
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300245
246/* ------------------------------------------------------------------- */
247/*
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300248 * Make the controller start grabbing images. Everything must
249 * be set up before doing this.
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300250 */
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300251static void mcam_ctlr_start(struct mcam_camera *cam)
252{
253 /* set_bit performs a read, so no other barrier should be
254 needed here */
255 mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
256}
257
258static void mcam_ctlr_stop(struct mcam_camera *cam)
259{
260 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
261}
262
263/* ------------------------------------------------------------------- */
Jonathan Corbet74984692011-07-08 17:50:49 -0300264
265#ifdef MCAM_MODE_VMALLOC
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300266/*
267 * Code specific to the vmalloc buffer mode.
268 */
269
270/*
271 * Allocate in-kernel DMA buffers for vmalloc mode.
272 */
273static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
274{
275 int i;
276
277 mcam_set_config_needed(cam, 1);
278 if (loadtime)
279 cam->dma_buf_size = dma_buf_size;
280 else
281 cam->dma_buf_size = cam->pix_format.sizeimage;
282 if (n_dma_bufs > 3)
283 n_dma_bufs = 3;
284
285 cam->nbufs = 0;
286 for (i = 0; i < n_dma_bufs; i++) {
287 cam->dma_bufs[i] = dma_alloc_coherent(cam->dev,
288 cam->dma_buf_size, cam->dma_handles + i,
289 GFP_KERNEL);
290 if (cam->dma_bufs[i] == NULL) {
291 cam_warn(cam, "Failed to allocate DMA buffer\n");
292 break;
293 }
294 (cam->nbufs)++;
295 }
296
297 switch (cam->nbufs) {
298 case 1:
299 dma_free_coherent(cam->dev, cam->dma_buf_size,
300 cam->dma_bufs[0], cam->dma_handles[0]);
301 cam->nbufs = 0;
302 case 0:
303 cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
304 return -ENOMEM;
305
306 case 2:
307 if (n_dma_bufs > 2)
308 cam_warn(cam, "Will limp along with only 2 buffers\n");
309 break;
310 }
311 return 0;
312}
313
314static void mcam_free_dma_bufs(struct mcam_camera *cam)
315{
316 int i;
317
318 for (i = 0; i < cam->nbufs; i++) {
319 dma_free_coherent(cam->dev, cam->dma_buf_size,
320 cam->dma_bufs[i], cam->dma_handles[i]);
321 cam->dma_bufs[i] = NULL;
322 }
323 cam->nbufs = 0;
324}
325
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300326
327/*
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300328 * Set up DMA buffers when operating in vmalloc mode
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300329 */
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300330static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam)
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300331{
332 /*
333 * Store the first two Y buffers (we aren't supporting
334 * planar formats for now, so no UV bufs). Then either
335 * set the third if it exists, or tell the controller
336 * to just use two.
337 */
338 mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]);
339 mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]);
340 if (cam->nbufs > 2) {
341 mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]);
342 mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS);
343 } else
344 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
Jonathan Corbet67a8dbb2011-06-11 14:46:49 -0300345 if (cam->chip_id == V4L2_IDENT_CAFE)
346 mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300347}
348
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300349/*
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300350 * Copy data out to user space in the vmalloc case
351 */
352static void mcam_frame_tasklet(unsigned long data)
353{
354 struct mcam_camera *cam = (struct mcam_camera *) data;
355 int i;
356 unsigned long flags;
357 struct mcam_vb_buffer *buf;
358
359 spin_lock_irqsave(&cam->dev_lock, flags);
360 for (i = 0; i < cam->nbufs; i++) {
361 int bufno = cam->next_buf;
362
363 if (cam->state != S_STREAMING || bufno < 0)
364 break; /* I/O got stopped */
365 if (++(cam->next_buf) >= cam->nbufs)
366 cam->next_buf = 0;
367 if (!test_bit(bufno, &cam->flags))
368 continue;
369 if (list_empty(&cam->buffers)) {
370 singles++;
371 break; /* Leave it valid, hope for better later */
372 }
373 delivered++;
374 clear_bit(bufno, &cam->flags);
375 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer,
376 queue);
377 list_del_init(&buf->queue);
378 /*
379 * Drop the lock during the big copy. This *should* be safe...
380 */
381 spin_unlock_irqrestore(&cam->dev_lock, flags);
382 memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno],
383 cam->pix_format.sizeimage);
384 mcam_buffer_done(cam, bufno, &buf->vb_buf);
385 spin_lock_irqsave(&cam->dev_lock, flags);
386 }
387 spin_unlock_irqrestore(&cam->dev_lock, flags);
388}
389
390
Jonathan Corbet74984692011-07-08 17:50:49 -0300391/*
392 * Make sure our allocated buffers are up to the task.
393 */
394static int mcam_check_dma_buffers(struct mcam_camera *cam)
395{
396 if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage)
397 mcam_free_dma_bufs(cam);
398 if (cam->nbufs == 0)
399 return mcam_alloc_dma_bufs(cam, 0);
400 return 0;
401}
402
403static void mcam_vmalloc_done(struct mcam_camera *cam, int frame)
404{
405 tasklet_schedule(&cam->s_tasklet);
406}
407
408#else /* MCAM_MODE_VMALLOC */
409
410static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
411{
412 return 0;
413}
414
415static inline void mcam_free_dma_bufs(struct mcam_camera *cam)
416{
417 return;
418}
419
420static inline int mcam_check_dma_buffers(struct mcam_camera *cam)
421{
422 return 0;
423}
424
425
426
427#endif /* MCAM_MODE_VMALLOC */
428
429
430#ifdef MCAM_MODE_DMA_CONTIG
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300431/* ---------------------------------------------------------------------- */
432/*
433 * DMA-contiguous code.
434 */
435/*
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300436 * Set up a contiguous buffer for the given frame. Here also is where
437 * the underrun strategy is set: if there is no buffer available, reuse
438 * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
439 * keep the interrupt handler from giving that buffer back to user
440 * space. In this way, we always have a buffer to DMA to and don't
441 * have to try to play games stopping and restarting the controller.
442 */
443static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
444{
445 struct mcam_vb_buffer *buf;
446 /*
447 * If there are no available buffers, go into single mode
448 */
449 if (list_empty(&cam->buffers)) {
450 buf = cam->vb_bufs[frame ^ 0x1];
451 cam->vb_bufs[frame] = buf;
452 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
453 vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
454 set_bit(CF_SINGLE_BUFFER, &cam->flags);
455 singles++;
456 return;
457 }
458 /*
459 * OK, we have a buffer we can use.
460 */
461 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
462 list_del_init(&buf->queue);
463 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
464 vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
465 cam->vb_bufs[frame] = buf;
466 clear_bit(CF_SINGLE_BUFFER, &cam->flags);
467}
468
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300469/*
470 * Initial B_DMA_contig setup.
471 */
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300472static void mcam_ctlr_dma_contig(struct mcam_camera *cam)
473{
474 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
475 cam->nbufs = 2;
476 mcam_set_contig_buffer(cam, 0);
477 mcam_set_contig_buffer(cam, 1);
478}
479
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300480/*
481 * Frame completion handling.
482 */
483static void mcam_dma_contig_done(struct mcam_camera *cam, int frame)
484{
485 struct mcam_vb_buffer *buf = cam->vb_bufs[frame];
486
487 if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) {
488 delivered++;
489 mcam_buffer_done(cam, frame, &buf->vb_buf);
490 }
491 mcam_set_contig_buffer(cam, frame);
492}
493
Jonathan Corbet74984692011-07-08 17:50:49 -0300494#endif /* MCAM_MODE_DMA_CONTIG */
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300495
Jonathan Corbet74984692011-07-08 17:50:49 -0300496#ifdef MCAM_MODE_DMA_SG
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300497/* ---------------------------------------------------------------------- */
498/*
499 * Scatter/gather-specific code.
500 */
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300501
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300502/*
503 * Set up the next buffer for S/G I/O; caller should be sure that
504 * the controller is stopped and a buffer is available.
505 */
506static void mcam_sg_next_buffer(struct mcam_camera *cam)
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300507{
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300508 struct mcam_vb_buffer *buf;
509
510 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
511 list_del_init(&buf->queue);
512 mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa);
513 mcam_reg_write(cam, REG_DESC_LEN_Y,
514 buf->dma_desc_nent*sizeof(struct mcam_dma_desc));
515 mcam_reg_write(cam, REG_DESC_LEN_U, 0);
516 mcam_reg_write(cam, REG_DESC_LEN_V, 0);
517 cam->vb_bufs[0] = buf;
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300518}
519
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300520/*
521 * Initial B_DMA_sg setup
522 */
523static void mcam_ctlr_dma_sg(struct mcam_camera *cam)
524{
525 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD);
526 mcam_sg_next_buffer(cam);
527 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
528 cam->nbufs = 3;
529}
530
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300531
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300532/*
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300533 * Frame completion with S/G is trickier. We can't muck with
534 * a descriptor chain on the fly, since the controller buffers it
535 * internally. So we have to actually stop and restart; Marvell
536 * says this is the way to do it.
537 *
538 * Of course, stopping is easier said than done; experience shows
539 * that the controller can start a frame *after* C0_ENABLE has been
540 * cleared. So when running in S/G mode, the controller is "stopped"
541 * on receipt of the start-of-frame interrupt. That means we can
542 * safely change the DMA descriptor array here and restart things
543 * (assuming there's another buffer waiting to go).
544 */
545static void mcam_dma_sg_done(struct mcam_camera *cam, int frame)
546{
547 struct mcam_vb_buffer *buf = cam->vb_bufs[0];
548
549 /*
550 * Very Bad Not Good Things happen if you don't clear
551 * C1_DESC_ENA before making any descriptor changes.
552 */
553 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA);
554 /*
555 * If we have another buffer available, put it in and
556 * restart the engine.
557 */
558 if (!list_empty(&cam->buffers)) {
559 mcam_sg_next_buffer(cam);
560 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
561 mcam_ctlr_start(cam);
562 /*
563 * Otherwise set CF_SG_RESTART and the controller will
564 * be restarted once another buffer shows up.
565 */
566 } else {
567 set_bit(CF_SG_RESTART, &cam->flags);
568 singles++;
569 }
570 /*
571 * Now we can give the completed frame back to user space.
572 */
573 delivered++;
574 mcam_buffer_done(cam, frame, &buf->vb_buf);
575}
576
577
578/*
579 * Scatter/gather mode requires stopping the controller between
580 * frames so we can put in a new DMA descriptor array. If no new
581 * buffer exists at frame completion, the controller is left stopped;
582 * this function is charged with gettig things going again.
583 */
584static void mcam_sg_restart(struct mcam_camera *cam)
585{
586 mcam_ctlr_dma_sg(cam);
587 mcam_ctlr_start(cam);
588 clear_bit(CF_SG_RESTART, &cam->flags);
589}
590
Jonathan Corbet74984692011-07-08 17:50:49 -0300591#else /* MCAM_MODE_DMA_SG */
592
593static inline void mcam_sg_restart(struct mcam_camera *cam)
594{
595 return;
596}
597
598#endif /* MCAM_MODE_DMA_SG */
Jonathan Corbetd43dae72011-07-08 17:50:46 -0300599
600/* ---------------------------------------------------------------------- */
601/*
602 * Buffer-mode-independent controller code.
603 */
604
605/*
606 * Image format setup
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300607 */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300608static void mcam_ctlr_image(struct mcam_camera *cam)
609{
610 int imgsz;
611 struct v4l2_pix_format *fmt = &cam->pix_format;
612
613 imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) |
614 (fmt->bytesperline & IMGSZ_H_MASK);
615 mcam_reg_write(cam, REG_IMGSIZE, imgsz);
616 mcam_reg_write(cam, REG_IMGOFFSET, 0);
617 /* YPITCH just drops the last two bits */
618 mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline,
619 IMGP_YP_MASK);
620 /*
621 * Tell the controller about the image format we are using.
622 */
623 switch (cam->pix_format.pixelformat) {
624 case V4L2_PIX_FMT_YUYV:
625 mcam_reg_write_mask(cam, REG_CTRL0,
626 C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV,
627 C0_DF_MASK);
628 break;
629
630 case V4L2_PIX_FMT_RGB444:
631 mcam_reg_write_mask(cam, REG_CTRL0,
632 C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB,
633 C0_DF_MASK);
634 /* Alpha value? */
635 break;
636
637 case V4L2_PIX_FMT_RGB565:
638 mcam_reg_write_mask(cam, REG_CTRL0,
639 C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR,
640 C0_DF_MASK);
641 break;
642
643 default:
644 cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat);
645 break;
646 }
647 /*
648 * Make sure it knows we want to use hsync/vsync.
649 */
650 mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC,
651 C0_SIFM_MASK);
652}
653
654
655/*
656 * Configure the controller for operation; caller holds the
657 * device mutex.
658 */
659static int mcam_ctlr_configure(struct mcam_camera *cam)
660{
661 unsigned long flags;
662
663 spin_lock_irqsave(&cam->dev_lock, flags);
Jonathan Corbet74984692011-07-08 17:50:49 -0300664 cam->dma_setup(cam);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300665 mcam_ctlr_image(cam);
666 mcam_set_config_needed(cam, 0);
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300667 clear_bit(CF_SG_RESTART, &cam->flags);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300668 spin_unlock_irqrestore(&cam->dev_lock, flags);
669 return 0;
670}
671
672static void mcam_ctlr_irq_enable(struct mcam_camera *cam)
673{
674 /*
675 * Clear any pending interrupts, since we do not
676 * expect to have I/O active prior to enabling.
677 */
678 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
679 mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS);
680}
681
682static void mcam_ctlr_irq_disable(struct mcam_camera *cam)
683{
684 mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS);
685}
686
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300687
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300688
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300689static void mcam_ctlr_init(struct mcam_camera *cam)
690{
691 unsigned long flags;
692
693 spin_lock_irqsave(&cam->dev_lock, flags);
694 /*
695 * Make sure it's not powered down.
696 */
697 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
698 /*
699 * Turn off the enable bit. It sure should be off anyway,
700 * but it's good to be sure.
701 */
702 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
703 /*
704 * Clock the sensor appropriately. Controller clock should
705 * be 48MHz, sensor "typical" value is half that.
706 */
707 mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
708 spin_unlock_irqrestore(&cam->dev_lock, flags);
709}
710
711
712/*
713 * Stop the controller, and don't return until we're really sure that no
714 * further DMA is going on.
715 */
716static void mcam_ctlr_stop_dma(struct mcam_camera *cam)
717{
718 unsigned long flags;
719
720 /*
721 * Theory: stop the camera controller (whether it is operating
722 * or not). Delay briefly just in case we race with the SOF
723 * interrupt, then wait until no DMA is active.
724 */
725 spin_lock_irqsave(&cam->dev_lock, flags);
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300726 clear_bit(CF_SG_RESTART, &cam->flags);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300727 mcam_ctlr_stop(cam);
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300728 cam->state = S_IDLE;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300729 spin_unlock_irqrestore(&cam->dev_lock, flags);
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300730 msleep(40);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300731 if (test_bit(CF_DMA_ACTIVE, &cam->flags))
732 cam_err(cam, "Timeout waiting for DMA to end\n");
733 /* This would be bad news - what now? */
734 spin_lock_irqsave(&cam->dev_lock, flags);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300735 mcam_ctlr_irq_disable(cam);
736 spin_unlock_irqrestore(&cam->dev_lock, flags);
737}
738
739/*
740 * Power up and down.
741 */
742static void mcam_ctlr_power_up(struct mcam_camera *cam)
743{
744 unsigned long flags;
745
746 spin_lock_irqsave(&cam->dev_lock, flags);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300747 cam->plat_power_up(cam);
Jonathan Corbet67a8dbb2011-06-11 14:46:49 -0300748 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300749 spin_unlock_irqrestore(&cam->dev_lock, flags);
750 msleep(5); /* Just to be sure */
751}
752
753static void mcam_ctlr_power_down(struct mcam_camera *cam)
754{
755 unsigned long flags;
756
757 spin_lock_irqsave(&cam->dev_lock, flags);
Jonathan Corbet67a8dbb2011-06-11 14:46:49 -0300758 /*
759 * School of hard knocks department: be sure we do any register
760 * twiddling on the controller *before* calling the platform
761 * power down routine.
762 */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300763 mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
Jonathan Corbet67a8dbb2011-06-11 14:46:49 -0300764 cam->plat_power_down(cam);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300765 spin_unlock_irqrestore(&cam->dev_lock, flags);
766}
767
768/* -------------------------------------------------------------------- */
769/*
770 * Communications with the sensor.
771 */
772
773static int __mcam_cam_reset(struct mcam_camera *cam)
774{
775 return sensor_call(cam, core, reset, 0);
776}
777
778/*
779 * We have found the sensor on the i2c. Let's try to have a
780 * conversation.
781 */
782static int mcam_cam_init(struct mcam_camera *cam)
783{
784 struct v4l2_dbg_chip_ident chip;
785 int ret;
786
787 mutex_lock(&cam->s_mutex);
788 if (cam->state != S_NOTREADY)
789 cam_warn(cam, "Cam init with device in funky state %d",
790 cam->state);
791 ret = __mcam_cam_reset(cam);
792 if (ret)
793 goto out;
794 chip.ident = V4L2_IDENT_NONE;
795 chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR;
796 chip.match.addr = cam->sensor_addr;
797 ret = sensor_call(cam, core, g_chip_ident, &chip);
798 if (ret)
799 goto out;
800 cam->sensor_type = chip.ident;
801 if (cam->sensor_type != V4L2_IDENT_OV7670) {
802 cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type);
803 ret = -EINVAL;
804 goto out;
805 }
806/* Get/set parameters? */
807 ret = 0;
808 cam->state = S_IDLE;
809out:
810 mcam_ctlr_power_down(cam);
811 mutex_unlock(&cam->s_mutex);
812 return ret;
813}
814
815/*
816 * Configure the sensor to match the parameters we have. Caller should
817 * hold s_mutex
818 */
819static int mcam_cam_set_flip(struct mcam_camera *cam)
820{
821 struct v4l2_control ctrl;
822
823 memset(&ctrl, 0, sizeof(ctrl));
824 ctrl.id = V4L2_CID_VFLIP;
825 ctrl.value = flip;
826 return sensor_call(cam, core, s_ctrl, &ctrl);
827}
828
829
830static int mcam_cam_configure(struct mcam_camera *cam)
831{
832 struct v4l2_mbus_framefmt mbus_fmt;
833 int ret;
834
835 v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code);
836 ret = sensor_call(cam, core, init, 0);
837 if (ret == 0)
838 ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt);
839 /*
840 * OV7670 does weird things if flip is set *before* format...
841 */
842 ret += mcam_cam_set_flip(cam);
843 return ret;
844}
845
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300846/*
847 * Get everything ready, and start grabbing frames.
848 */
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300849static int mcam_read_setup(struct mcam_camera *cam)
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300850{
851 int ret;
852 unsigned long flags;
853
854 /*
855 * Configuration. If we still don't have DMA buffers,
856 * make one last, desperate attempt.
857 */
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300858 if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 &&
859 mcam_alloc_dma_bufs(cam, 0))
860 return -ENOMEM;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300861
862 if (mcam_needs_config(cam)) {
863 mcam_cam_configure(cam);
864 ret = mcam_ctlr_configure(cam);
865 if (ret)
866 return ret;
867 }
868
869 /*
870 * Turn it loose.
871 */
872 spin_lock_irqsave(&cam->dev_lock, flags);
873 mcam_reset_buffers(cam);
874 mcam_ctlr_irq_enable(cam);
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300875 cam->state = S_STREAMING;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -0300876 mcam_ctlr_start(cam);
877 spin_unlock_irqrestore(&cam->dev_lock, flags);
878 return 0;
879}
880
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300881/* ----------------------------------------------------------------------- */
882/*
883 * Videobuf2 interface code.
884 */
885
886static int mcam_vb_queue_setup(struct vb2_queue *vq, unsigned int *nbufs,
887 unsigned int *num_planes, unsigned long sizes[],
888 void *alloc_ctxs[])
889{
890 struct mcam_camera *cam = vb2_get_drv_priv(vq);
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300891 int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300892
893 sizes[0] = cam->pix_format.sizeimage;
894 *num_planes = 1; /* Someday we have to support planar formats... */
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300895 if (*nbufs < minbufs)
896 *nbufs = minbufs;
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300897 if (cam->buffer_mode == B_DMA_contig)
898 alloc_ctxs[0] = cam->vb_alloc_ctx;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300899 return 0;
900}
901
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300902
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300903static void mcam_vb_buf_queue(struct vb2_buffer *vb)
904{
905 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
906 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
907 unsigned long flags;
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300908 int start;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300909
910 spin_lock_irqsave(&cam->dev_lock, flags);
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300911 start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers);
912 list_add(&mvb->queue, &cam->buffers);
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300913 if (test_bit(CF_SG_RESTART, &cam->flags))
914 mcam_sg_restart(cam);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300915 spin_unlock_irqrestore(&cam->dev_lock, flags);
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300916 if (start)
917 mcam_read_setup(cam);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300918}
919
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300920
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300921/*
922 * vb2 uses these to release the mutex when waiting in dqbuf. I'm
923 * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs
924 * to be called with the mutex held), but better safe than sorry.
925 */
926static void mcam_vb_wait_prepare(struct vb2_queue *vq)
927{
928 struct mcam_camera *cam = vb2_get_drv_priv(vq);
929
930 mutex_unlock(&cam->s_mutex);
931}
932
933static void mcam_vb_wait_finish(struct vb2_queue *vq)
934{
935 struct mcam_camera *cam = vb2_get_drv_priv(vq);
936
937 mutex_lock(&cam->s_mutex);
938}
939
940/*
941 * These need to be called with the mutex held from vb2
942 */
943static int mcam_vb_start_streaming(struct vb2_queue *vq)
944{
945 struct mcam_camera *cam = vb2_get_drv_priv(vq);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300946
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300947 if (cam->state != S_IDLE)
948 return -EINVAL;
949 cam->sequence = 0;
950 /*
951 * Videobuf2 sneakily hoards all the buffers and won't
952 * give them to us until *after* streaming starts. But
953 * we can't actually start streaming until we have a
954 * destination. So go into a wait state and hope they
955 * give us buffers soon.
956 */
957 if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) {
958 cam->state = S_BUFWAIT;
959 return 0;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300960 }
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300961 return mcam_read_setup(cam);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300962}
963
964static int mcam_vb_stop_streaming(struct vb2_queue *vq)
965{
966 struct mcam_camera *cam = vb2_get_drv_priv(vq);
967 unsigned long flags;
968
Jonathan Corbeta9b36e82011-06-20 16:14:40 -0300969 if (cam->state == S_BUFWAIT) {
970 /* They never gave us buffers */
971 cam->state = S_IDLE;
972 return 0;
973 }
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300974 if (cam->state != S_STREAMING)
975 return -EINVAL;
976 mcam_ctlr_stop_dma(cam);
977 /*
978 * VB2 reclaims the buffers, so we need to forget
979 * about them.
980 */
981 spin_lock_irqsave(&cam->dev_lock, flags);
982 INIT_LIST_HEAD(&cam->buffers);
983 spin_unlock_irqrestore(&cam->dev_lock, flags);
984 return 0;
985}
986
987
988static const struct vb2_ops mcam_vb2_ops = {
989 .queue_setup = mcam_vb_queue_setup,
Jonathan Corbetb5210fd2011-06-20 16:14:36 -0300990 .buf_queue = mcam_vb_buf_queue,
991 .start_streaming = mcam_vb_start_streaming,
992 .stop_streaming = mcam_vb_stop_streaming,
993 .wait_prepare = mcam_vb_wait_prepare,
994 .wait_finish = mcam_vb_wait_finish,
995};
996
Jonathan Corbet74984692011-07-08 17:50:49 -0300997
998#ifdef MCAM_MODE_DMA_SG
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -0300999/*
Jonathan Corbetd43dae72011-07-08 17:50:46 -03001000 * Scatter/gather mode uses all of the above functions plus a
1001 * few extras to deal with DMA mapping.
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001002 */
Jonathan Corbetd43dae72011-07-08 17:50:46 -03001003static int mcam_vb_sg_buf_init(struct vb2_buffer *vb)
1004{
1005 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1006 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1007 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
1008
1009 mvb->dma_desc = dma_alloc_coherent(cam->dev,
1010 ndesc * sizeof(struct mcam_dma_desc),
1011 &mvb->dma_desc_pa, GFP_KERNEL);
1012 if (mvb->dma_desc == NULL) {
1013 cam_err(cam, "Unable to get DMA descriptor array\n");
1014 return -ENOMEM;
1015 }
1016 return 0;
1017}
1018
1019static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb)
1020{
1021 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1022 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1023 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
1024 struct mcam_dma_desc *desc = mvb->dma_desc;
1025 struct scatterlist *sg;
1026 int i;
1027
1028 mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages,
1029 DMA_FROM_DEVICE);
1030 if (mvb->dma_desc_nent <= 0)
1031 return -EIO; /* Not sure what's right here */
1032 for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) {
1033 desc->dma_addr = sg_dma_address(sg);
1034 desc->segment_len = sg_dma_len(sg);
1035 desc++;
1036 }
1037 return 0;
1038}
1039
1040static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb)
1041{
1042 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1043 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
1044
1045 dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE);
1046 return 0;
1047}
1048
1049static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb)
1050{
1051 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1052 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1053 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
1054
1055 dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc),
1056 mvb->dma_desc, mvb->dma_desc_pa);
1057}
1058
1059
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001060static const struct vb2_ops mcam_vb2_sg_ops = {
1061 .queue_setup = mcam_vb_queue_setup,
1062 .buf_init = mcam_vb_sg_buf_init,
1063 .buf_prepare = mcam_vb_sg_buf_prepare,
1064 .buf_queue = mcam_vb_buf_queue,
1065 .buf_finish = mcam_vb_sg_buf_finish,
1066 .buf_cleanup = mcam_vb_sg_buf_cleanup,
1067 .start_streaming = mcam_vb_start_streaming,
1068 .stop_streaming = mcam_vb_stop_streaming,
1069 .wait_prepare = mcam_vb_wait_prepare,
1070 .wait_finish = mcam_vb_wait_finish,
1071};
1072
Jonathan Corbet74984692011-07-08 17:50:49 -03001073#endif /* MCAM_MODE_DMA_SG */
1074
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001075static int mcam_setup_vb2(struct mcam_camera *cam)
1076{
1077 struct vb2_queue *vq = &cam->vb_queue;
1078
1079 memset(vq, 0, sizeof(*vq));
1080 vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001081 vq->drv_priv = cam;
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001082 INIT_LIST_HEAD(&cam->buffers);
1083 switch (cam->buffer_mode) {
1084 case B_DMA_contig:
Jonathan Corbet74984692011-07-08 17:50:49 -03001085#ifdef MCAM_MODE_DMA_CONTIG
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001086 vq->ops = &mcam_vb2_ops;
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001087 vq->mem_ops = &vb2_dma_contig_memops;
1088 cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev);
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001089 vq->io_modes = VB2_MMAP | VB2_USERPTR;
Jonathan Corbet74984692011-07-08 17:50:49 -03001090 cam->dma_setup = mcam_ctlr_dma_contig;
1091 cam->frame_complete = mcam_dma_contig_done;
1092#endif
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001093 break;
1094 case B_DMA_sg:
Jonathan Corbet74984692011-07-08 17:50:49 -03001095#ifdef MCAM_MODE_DMA_SG
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001096 vq->ops = &mcam_vb2_sg_ops;
1097 vq->mem_ops = &vb2_dma_sg_memops;
1098 vq->io_modes = VB2_MMAP | VB2_USERPTR;
Jonathan Corbet74984692011-07-08 17:50:49 -03001099 cam->dma_setup = mcam_ctlr_dma_sg;
1100 cam->frame_complete = mcam_dma_sg_done;
1101#endif
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001102 break;
1103 case B_vmalloc:
Jonathan Corbet74984692011-07-08 17:50:49 -03001104#ifdef MCAM_MODE_VMALLOC
1105 tasklet_init(&cam->s_tasklet, mcam_frame_tasklet,
1106 (unsigned long) cam);
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001107 vq->ops = &mcam_vb2_ops;
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001108 vq->mem_ops = &vb2_vmalloc_memops;
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001109 vq->buf_struct_size = sizeof(struct mcam_vb_buffer);
1110 vq->io_modes = VB2_MMAP;
Jonathan Corbet74984692011-07-08 17:50:49 -03001111 cam->dma_setup = mcam_ctlr_dma_vmalloc;
1112 cam->frame_complete = mcam_vmalloc_done;
1113#endif
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001114 break;
1115 }
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001116 return vb2_queue_init(vq);
1117}
1118
1119static void mcam_cleanup_vb2(struct mcam_camera *cam)
1120{
1121 vb2_queue_release(&cam->vb_queue);
Jonathan Corbet74984692011-07-08 17:50:49 -03001122#ifdef MCAM_MODE_DMA_CONTIG
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001123 if (cam->buffer_mode == B_DMA_contig)
1124 vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx);
Jonathan Corbet74984692011-07-08 17:50:49 -03001125#endif
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001126}
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001127
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001128
Jonathan Corbetd43dae72011-07-08 17:50:46 -03001129/* ---------------------------------------------------------------------- */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001130/*
Jonathan Corbetd43dae72011-07-08 17:50:46 -03001131 * The long list of V4L2 ioctl() operations.
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001132 */
1133
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001134static int mcam_vidioc_streamon(struct file *filp, void *priv,
1135 enum v4l2_buf_type type)
1136{
1137 struct mcam_camera *cam = filp->private_data;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001138 int ret;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001139
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001140 mutex_lock(&cam->s_mutex);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001141 ret = vb2_streamon(&cam->vb_queue, type);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001142 mutex_unlock(&cam->s_mutex);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001143 return ret;
1144}
1145
1146
1147static int mcam_vidioc_streamoff(struct file *filp, void *priv,
1148 enum v4l2_buf_type type)
1149{
1150 struct mcam_camera *cam = filp->private_data;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001151 int ret;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001152
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001153 mutex_lock(&cam->s_mutex);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001154 ret = vb2_streamoff(&cam->vb_queue, type);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001155 mutex_unlock(&cam->s_mutex);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001156 return ret;
1157}
1158
1159
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001160static int mcam_vidioc_reqbufs(struct file *filp, void *priv,
1161 struct v4l2_requestbuffers *req)
1162{
1163 struct mcam_camera *cam = filp->private_data;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001164 int ret;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001165
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001166 mutex_lock(&cam->s_mutex);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001167 ret = vb2_reqbufs(&cam->vb_queue, req);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001168 mutex_unlock(&cam->s_mutex);
1169 return ret;
1170}
1171
1172
1173static int mcam_vidioc_querybuf(struct file *filp, void *priv,
1174 struct v4l2_buffer *buf)
1175{
1176 struct mcam_camera *cam = filp->private_data;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001177 int ret;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001178
1179 mutex_lock(&cam->s_mutex);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001180 ret = vb2_querybuf(&cam->vb_queue, buf);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001181 mutex_unlock(&cam->s_mutex);
1182 return ret;
1183}
1184
1185static int mcam_vidioc_qbuf(struct file *filp, void *priv,
1186 struct v4l2_buffer *buf)
1187{
1188 struct mcam_camera *cam = filp->private_data;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001189 int ret;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001190
1191 mutex_lock(&cam->s_mutex);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001192 ret = vb2_qbuf(&cam->vb_queue, buf);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001193 mutex_unlock(&cam->s_mutex);
1194 return ret;
1195}
1196
1197static int mcam_vidioc_dqbuf(struct file *filp, void *priv,
1198 struct v4l2_buffer *buf)
1199{
1200 struct mcam_camera *cam = filp->private_data;
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001201 int ret;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001202
1203 mutex_lock(&cam->s_mutex);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001204 ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001205 mutex_unlock(&cam->s_mutex);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001206 return ret;
1207}
1208
1209
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001210
1211static int mcam_vidioc_queryctrl(struct file *filp, void *priv,
1212 struct v4l2_queryctrl *qc)
1213{
1214 struct mcam_camera *cam = priv;
1215 int ret;
1216
1217 mutex_lock(&cam->s_mutex);
1218 ret = sensor_call(cam, core, queryctrl, qc);
1219 mutex_unlock(&cam->s_mutex);
1220 return ret;
1221}
1222
1223
1224static int mcam_vidioc_g_ctrl(struct file *filp, void *priv,
1225 struct v4l2_control *ctrl)
1226{
1227 struct mcam_camera *cam = priv;
1228 int ret;
1229
1230 mutex_lock(&cam->s_mutex);
1231 ret = sensor_call(cam, core, g_ctrl, ctrl);
1232 mutex_unlock(&cam->s_mutex);
1233 return ret;
1234}
1235
1236
1237static int mcam_vidioc_s_ctrl(struct file *filp, void *priv,
1238 struct v4l2_control *ctrl)
1239{
1240 struct mcam_camera *cam = priv;
1241 int ret;
1242
1243 mutex_lock(&cam->s_mutex);
1244 ret = sensor_call(cam, core, s_ctrl, ctrl);
1245 mutex_unlock(&cam->s_mutex);
1246 return ret;
1247}
1248
1249
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001250static int mcam_vidioc_querycap(struct file *file, void *priv,
1251 struct v4l2_capability *cap)
1252{
1253 strcpy(cap->driver, "marvell_ccic");
1254 strcpy(cap->card, "marvell_ccic");
1255 cap->version = 1;
1256 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
1257 V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
1258 return 0;
1259}
1260
1261
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001262static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp,
1263 void *priv, struct v4l2_fmtdesc *fmt)
1264{
1265 if (fmt->index >= N_MCAM_FMTS)
1266 return -EINVAL;
1267 strlcpy(fmt->description, mcam_formats[fmt->index].desc,
1268 sizeof(fmt->description));
1269 fmt->pixelformat = mcam_formats[fmt->index].pixelformat;
1270 return 0;
1271}
1272
1273static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv,
1274 struct v4l2_format *fmt)
1275{
1276 struct mcam_camera *cam = priv;
1277 struct mcam_format_struct *f;
1278 struct v4l2_pix_format *pix = &fmt->fmt.pix;
1279 struct v4l2_mbus_framefmt mbus_fmt;
1280 int ret;
1281
1282 f = mcam_find_format(pix->pixelformat);
1283 pix->pixelformat = f->pixelformat;
1284 v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code);
1285 mutex_lock(&cam->s_mutex);
1286 ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt);
1287 mutex_unlock(&cam->s_mutex);
1288 v4l2_fill_pix_format(pix, &mbus_fmt);
1289 pix->bytesperline = pix->width * f->bpp;
1290 pix->sizeimage = pix->height * pix->bytesperline;
1291 return ret;
1292}
1293
1294static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv,
1295 struct v4l2_format *fmt)
1296{
1297 struct mcam_camera *cam = priv;
1298 struct mcam_format_struct *f;
1299 int ret;
1300
1301 /*
1302 * Can't do anything if the device is not idle
1303 * Also can't if there are streaming buffers in place.
1304 */
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001305 if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0)
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001306 return -EBUSY;
1307
1308 f = mcam_find_format(fmt->fmt.pix.pixelformat);
1309
1310 /*
1311 * See if the formatting works in principle.
1312 */
1313 ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt);
1314 if (ret)
1315 return ret;
1316 /*
1317 * Now we start to change things for real, so let's do it
1318 * under lock.
1319 */
1320 mutex_lock(&cam->s_mutex);
1321 cam->pix_format = fmt->fmt.pix;
1322 cam->mbus_code = f->mbus_code;
1323
1324 /*
1325 * Make sure we have appropriate DMA buffers.
1326 */
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001327 if (cam->buffer_mode == B_vmalloc) {
Jonathan Corbet74984692011-07-08 17:50:49 -03001328 ret = mcam_check_dma_buffers(cam);
1329 if (ret)
1330 goto out;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001331 }
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001332 mcam_set_config_needed(cam, 1);
1333 ret = 0;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001334out:
1335 mutex_unlock(&cam->s_mutex);
1336 return ret;
1337}
1338
1339/*
1340 * Return our stored notion of how the camera is/should be configured.
1341 * The V4l2 spec wants us to be smarter, and actually get this from
1342 * the camera (and not mess with it at open time). Someday.
1343 */
1344static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv,
1345 struct v4l2_format *f)
1346{
1347 struct mcam_camera *cam = priv;
1348
1349 f->fmt.pix = cam->pix_format;
1350 return 0;
1351}
1352
1353/*
1354 * We only have one input - the sensor - so minimize the nonsense here.
1355 */
1356static int mcam_vidioc_enum_input(struct file *filp, void *priv,
1357 struct v4l2_input *input)
1358{
1359 if (input->index != 0)
1360 return -EINVAL;
1361
1362 input->type = V4L2_INPUT_TYPE_CAMERA;
1363 input->std = V4L2_STD_ALL; /* Not sure what should go here */
1364 strcpy(input->name, "Camera");
1365 return 0;
1366}
1367
1368static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
1369{
1370 *i = 0;
1371 return 0;
1372}
1373
1374static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i)
1375{
1376 if (i != 0)
1377 return -EINVAL;
1378 return 0;
1379}
1380
1381/* from vivi.c */
1382static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a)
1383{
1384 return 0;
1385}
1386
1387/*
1388 * G/S_PARM. Most of this is done by the sensor, but we are
1389 * the level which controls the number of read buffers.
1390 */
1391static int mcam_vidioc_g_parm(struct file *filp, void *priv,
1392 struct v4l2_streamparm *parms)
1393{
1394 struct mcam_camera *cam = priv;
1395 int ret;
1396
1397 mutex_lock(&cam->s_mutex);
1398 ret = sensor_call(cam, video, g_parm, parms);
1399 mutex_unlock(&cam->s_mutex);
1400 parms->parm.capture.readbuffers = n_dma_bufs;
1401 return ret;
1402}
1403
1404static int mcam_vidioc_s_parm(struct file *filp, void *priv,
1405 struct v4l2_streamparm *parms)
1406{
1407 struct mcam_camera *cam = priv;
1408 int ret;
1409
1410 mutex_lock(&cam->s_mutex);
1411 ret = sensor_call(cam, video, s_parm, parms);
1412 mutex_unlock(&cam->s_mutex);
1413 parms->parm.capture.readbuffers = n_dma_bufs;
1414 return ret;
1415}
1416
1417static int mcam_vidioc_g_chip_ident(struct file *file, void *priv,
1418 struct v4l2_dbg_chip_ident *chip)
1419{
1420 struct mcam_camera *cam = priv;
1421
1422 chip->ident = V4L2_IDENT_NONE;
1423 chip->revision = 0;
1424 if (v4l2_chip_match_host(&chip->match)) {
1425 chip->ident = cam->chip_id;
1426 return 0;
1427 }
1428 return sensor_call(cam, core, g_chip_ident, chip);
1429}
1430
1431static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv,
1432 struct v4l2_frmsizeenum *sizes)
1433{
1434 struct mcam_camera *cam = priv;
1435 int ret;
1436
1437 mutex_lock(&cam->s_mutex);
1438 ret = sensor_call(cam, video, enum_framesizes, sizes);
1439 mutex_unlock(&cam->s_mutex);
1440 return ret;
1441}
1442
1443static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv,
1444 struct v4l2_frmivalenum *interval)
1445{
1446 struct mcam_camera *cam = priv;
1447 int ret;
1448
1449 mutex_lock(&cam->s_mutex);
1450 ret = sensor_call(cam, video, enum_frameintervals, interval);
1451 mutex_unlock(&cam->s_mutex);
1452 return ret;
1453}
1454
1455#ifdef CONFIG_VIDEO_ADV_DEBUG
1456static int mcam_vidioc_g_register(struct file *file, void *priv,
1457 struct v4l2_dbg_register *reg)
1458{
1459 struct mcam_camera *cam = priv;
1460
1461 if (v4l2_chip_match_host(&reg->match)) {
1462 reg->val = mcam_reg_read(cam, reg->reg);
1463 reg->size = 4;
1464 return 0;
1465 }
1466 return sensor_call(cam, core, g_register, reg);
1467}
1468
1469static int mcam_vidioc_s_register(struct file *file, void *priv,
1470 struct v4l2_dbg_register *reg)
1471{
1472 struct mcam_camera *cam = priv;
1473
1474 if (v4l2_chip_match_host(&reg->match)) {
1475 mcam_reg_write(cam, reg->reg, reg->val);
1476 return 0;
1477 }
1478 return sensor_call(cam, core, s_register, reg);
1479}
1480#endif
1481
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001482static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = {
1483 .vidioc_querycap = mcam_vidioc_querycap,
1484 .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap,
1485 .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap,
1486 .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap,
1487 .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap,
1488 .vidioc_enum_input = mcam_vidioc_enum_input,
1489 .vidioc_g_input = mcam_vidioc_g_input,
1490 .vidioc_s_input = mcam_vidioc_s_input,
1491 .vidioc_s_std = mcam_vidioc_s_std,
1492 .vidioc_reqbufs = mcam_vidioc_reqbufs,
1493 .vidioc_querybuf = mcam_vidioc_querybuf,
1494 .vidioc_qbuf = mcam_vidioc_qbuf,
1495 .vidioc_dqbuf = mcam_vidioc_dqbuf,
1496 .vidioc_streamon = mcam_vidioc_streamon,
1497 .vidioc_streamoff = mcam_vidioc_streamoff,
1498 .vidioc_queryctrl = mcam_vidioc_queryctrl,
1499 .vidioc_g_ctrl = mcam_vidioc_g_ctrl,
1500 .vidioc_s_ctrl = mcam_vidioc_s_ctrl,
1501 .vidioc_g_parm = mcam_vidioc_g_parm,
1502 .vidioc_s_parm = mcam_vidioc_s_parm,
1503 .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes,
1504 .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals,
1505 .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident,
1506#ifdef CONFIG_VIDEO_ADV_DEBUG
1507 .vidioc_g_register = mcam_vidioc_g_register,
1508 .vidioc_s_register = mcam_vidioc_s_register,
1509#endif
1510};
1511
Jonathan Corbetd43dae72011-07-08 17:50:46 -03001512/* ---------------------------------------------------------------------- */
1513/*
1514 * Our various file operations.
1515 */
1516static int mcam_v4l_open(struct file *filp)
1517{
1518 struct mcam_camera *cam = video_drvdata(filp);
1519 int ret = 0;
1520
1521 filp->private_data = cam;
1522
1523 frames = singles = delivered = 0;
1524 mutex_lock(&cam->s_mutex);
1525 if (cam->users == 0) {
1526 ret = mcam_setup_vb2(cam);
1527 if (ret)
1528 goto out;
1529 mcam_ctlr_power_up(cam);
1530 __mcam_cam_reset(cam);
1531 mcam_set_config_needed(cam, 1);
1532 }
1533 (cam->users)++;
1534out:
1535 mutex_unlock(&cam->s_mutex);
1536 return ret;
1537}
1538
1539
1540static int mcam_v4l_release(struct file *filp)
1541{
1542 struct mcam_camera *cam = filp->private_data;
1543
1544 cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames,
1545 singles, delivered);
1546 mutex_lock(&cam->s_mutex);
1547 (cam->users)--;
1548 if (filp == cam->owner) {
1549 mcam_ctlr_stop_dma(cam);
1550 cam->owner = NULL;
1551 }
1552 if (cam->users == 0) {
1553 mcam_cleanup_vb2(cam);
1554 mcam_ctlr_power_down(cam);
1555 if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read)
1556 mcam_free_dma_bufs(cam);
1557 }
1558 mutex_unlock(&cam->s_mutex);
1559 return 0;
1560}
1561
1562static ssize_t mcam_v4l_read(struct file *filp,
1563 char __user *buffer, size_t len, loff_t *pos)
1564{
1565 struct mcam_camera *cam = filp->private_data;
1566 int ret;
1567
1568 mutex_lock(&cam->s_mutex);
1569 ret = vb2_read(&cam->vb_queue, buffer, len, pos,
1570 filp->f_flags & O_NONBLOCK);
1571 mutex_unlock(&cam->s_mutex);
1572 return ret;
1573}
1574
1575
1576
1577static unsigned int mcam_v4l_poll(struct file *filp,
1578 struct poll_table_struct *pt)
1579{
1580 struct mcam_camera *cam = filp->private_data;
1581 int ret;
1582
1583 mutex_lock(&cam->s_mutex);
1584 ret = vb2_poll(&cam->vb_queue, filp, pt);
1585 mutex_unlock(&cam->s_mutex);
1586 return ret;
1587}
1588
1589
1590static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma)
1591{
1592 struct mcam_camera *cam = filp->private_data;
1593 int ret;
1594
1595 mutex_lock(&cam->s_mutex);
1596 ret = vb2_mmap(&cam->vb_queue, vma);
1597 mutex_unlock(&cam->s_mutex);
1598 return ret;
1599}
1600
1601
1602
1603static const struct v4l2_file_operations mcam_v4l_fops = {
1604 .owner = THIS_MODULE,
1605 .open = mcam_v4l_open,
1606 .release = mcam_v4l_release,
1607 .read = mcam_v4l_read,
1608 .poll = mcam_v4l_poll,
1609 .mmap = mcam_v4l_mmap,
1610 .unlocked_ioctl = video_ioctl2,
1611};
1612
1613
1614/*
1615 * This template device holds all of those v4l2 methods; we
1616 * clone it for specific real devices.
1617 */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001618static struct video_device mcam_v4l_template = {
1619 .name = "mcam",
1620 .tvnorms = V4L2_STD_NTSC_M,
1621 .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */
1622
1623 .fops = &mcam_v4l_fops,
1624 .ioctl_ops = &mcam_v4l_ioctl_ops,
1625 .release = video_device_release_empty,
1626};
1627
1628/* ---------------------------------------------------------------------- */
1629/*
1630 * Interrupt handler stuff
1631 */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001632static void mcam_frame_complete(struct mcam_camera *cam, int frame)
1633{
1634 /*
1635 * Basic frame housekeeping.
1636 */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001637 set_bit(frame, &cam->flags);
1638 clear_bit(CF_DMA_ACTIVE, &cam->flags);
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001639 cam->next_buf = frame;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001640 cam->buf_seq[frame] = ++(cam->sequence);
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001641 cam->last_delivered = frame;
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001642 frames++;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001643 /*
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001644 * "This should never happen"
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001645 */
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001646 if (cam->state != S_STREAMING)
1647 return;
1648 /*
1649 * Process the frame and set up the next one.
1650 */
Jonathan Corbet74984692011-07-08 17:50:49 -03001651 cam->frame_complete(cam, frame);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001652}
1653
1654
Jonathan Corbetd43dae72011-07-08 17:50:46 -03001655/*
1656 * The interrupt handler; this needs to be called from the
1657 * platform irq handler with the lock held.
1658 */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001659int mccic_irq(struct mcam_camera *cam, unsigned int irqs)
1660{
1661 unsigned int frame, handled = 0;
1662
1663 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */
1664 /*
1665 * Handle any frame completions. There really should
1666 * not be more than one of these, or we have fallen
1667 * far behind.
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001668 *
1669 * When running in S/G mode, the frame number lacks any
1670 * real meaning - there's only one descriptor array - but
1671 * the controller still picks a different one to signal
1672 * each time.
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001673 */
1674 for (frame = 0; frame < cam->nbufs; frame++)
1675 if (irqs & (IRQ_EOF0 << frame)) {
1676 mcam_frame_complete(cam, frame);
1677 handled = 1;
1678 }
1679 /*
1680 * If a frame starts, note that we have DMA active. This
1681 * code assumes that we won't get multiple frame interrupts
1682 * at once; may want to rethink that.
1683 */
1684 if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) {
1685 set_bit(CF_DMA_ACTIVE, &cam->flags);
1686 handled = 1;
Jonathan Corbetcbc4f3a2011-06-30 17:05:27 -03001687 if (cam->buffer_mode == B_DMA_sg)
1688 mcam_ctlr_stop(cam);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001689 }
1690 return handled;
1691}
1692
Jonathan Corbetd43dae72011-07-08 17:50:46 -03001693/* ---------------------------------------------------------------------- */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001694/*
1695 * Registration and such.
1696 */
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001697static struct ov7670_config sensor_cfg = {
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001698 /*
1699 * Exclude QCIF mode, because it only captures a tiny portion
1700 * of the sensor FOV
1701 */
1702 .min_width = 320,
1703 .min_height = 240,
1704};
1705
1706
1707int mccic_register(struct mcam_camera *cam)
1708{
1709 struct i2c_board_info ov7670_info = {
1710 .type = "ov7670",
Jonathan Corbet1c68f882011-06-11 14:46:47 -03001711 .addr = 0x42 >> 1,
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001712 .platform_data = &sensor_cfg,
1713 };
1714 int ret;
1715
1716 /*
Jonathan Corbet74984692011-07-08 17:50:49 -03001717 * Validate the requested buffer mode.
1718 */
1719 if (buffer_mode >= 0)
1720 cam->buffer_mode = buffer_mode;
1721 if (cam->buffer_mode == B_DMA_sg &&
1722 cam->chip_id == V4L2_IDENT_CAFE) {
1723 printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, "
1724 "attempting vmalloc mode instead\n");
1725 cam->buffer_mode = B_vmalloc;
1726 }
1727 if (!mcam_buffer_mode_supported(cam->buffer_mode)) {
1728 printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n",
1729 cam->buffer_mode);
1730 return -EINVAL;
1731 }
1732 /*
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001733 * Register with V4L
1734 */
1735 ret = v4l2_device_register(cam->dev, &cam->v4l2_dev);
1736 if (ret)
1737 return ret;
1738
1739 mutex_init(&cam->s_mutex);
1740 cam->state = S_NOTREADY;
1741 mcam_set_config_needed(cam, 1);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001742 cam->pix_format = mcam_def_pix_format;
1743 cam->mbus_code = mcam_def_mbus_code;
1744 INIT_LIST_HEAD(&cam->dev_list);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001745 INIT_LIST_HEAD(&cam->buffers);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001746 mcam_ctlr_init(cam);
1747
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001748 /*
1749 * Try to find the sensor.
1750 */
Jonathan Corbet2164b5a2011-06-11 14:46:44 -03001751 sensor_cfg.clock_speed = cam->clock_speed;
1752 sensor_cfg.use_smbus = cam->use_smbus;
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001753 cam->sensor_addr = ov7670_info.addr;
1754 cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev,
Jonathan Corbet595a93a2011-06-11 14:46:48 -03001755 cam->i2c_adapter, &ov7670_info, NULL);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001756 if (cam->sensor == NULL) {
1757 ret = -ENODEV;
1758 goto out_unregister;
1759 }
1760
1761 ret = mcam_cam_init(cam);
1762 if (ret)
1763 goto out_unregister;
1764 /*
1765 * Get the v4l2 setup done.
1766 */
1767 mutex_lock(&cam->s_mutex);
1768 cam->vdev = mcam_v4l_template;
1769 cam->vdev.debug = 0;
1770 cam->vdev.v4l2_dev = &cam->v4l2_dev;
1771 ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1);
1772 if (ret)
1773 goto out;
1774 video_set_drvdata(&cam->vdev, cam);
1775
1776 /*
1777 * If so requested, try to get our DMA buffers now.
1778 */
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001779 if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) {
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001780 if (mcam_alloc_dma_bufs(cam, 1))
1781 cam_warn(cam, "Unable to alloc DMA buffers at load"
1782 " will try again later.");
1783 }
1784
1785out:
1786 mutex_unlock(&cam->s_mutex);
1787 return ret;
1788out_unregister:
1789 v4l2_device_unregister(&cam->v4l2_dev);
1790 return ret;
1791}
1792
1793
1794void mccic_shutdown(struct mcam_camera *cam)
1795{
Jonathan Corbet67a8dbb2011-06-11 14:46:49 -03001796 /*
1797 * If we have no users (and we really, really should have no
1798 * users) the device will already be powered down. Trying to
1799 * take it down again will wedge the machine, which is frowned
1800 * upon.
1801 */
1802 if (cam->users > 0) {
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001803 cam_warn(cam, "Removing a device with users!\n");
Jonathan Corbet67a8dbb2011-06-11 14:46:49 -03001804 mcam_ctlr_power_down(cam);
1805 }
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001806 vb2_queue_release(&cam->vb_queue);
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001807 if (cam->buffer_mode == B_vmalloc)
1808 mcam_free_dma_bufs(cam);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001809 video_unregister_device(&cam->vdev);
1810 v4l2_device_unregister(&cam->v4l2_dev);
1811}
1812
1813/*
1814 * Power management
1815 */
1816#ifdef CONFIG_PM
1817
1818void mccic_suspend(struct mcam_camera *cam)
1819{
1820 enum mcam_state cstate = cam->state;
1821
1822 mcam_ctlr_stop_dma(cam);
1823 mcam_ctlr_power_down(cam);
1824 cam->state = cstate;
1825}
1826
1827int mccic_resume(struct mcam_camera *cam)
1828{
1829 int ret = 0;
1830
1831 mutex_lock(&cam->s_mutex);
1832 if (cam->users > 0) {
1833 mcam_ctlr_power_up(cam);
1834 __mcam_cam_reset(cam);
1835 } else {
1836 mcam_ctlr_power_down(cam);
1837 }
1838 mutex_unlock(&cam->s_mutex);
1839
1840 set_bit(CF_CONFIG_NEEDED, &cam->flags);
Jonathan Corbetb5210fd2011-06-20 16:14:36 -03001841 if (cam->state == S_STREAMING)
Jonathan Corbeta9b36e82011-06-20 16:14:40 -03001842 ret = mcam_read_setup(cam);
Jonathan Corbetabfa3df2011-06-11 14:46:43 -03001843 return ret;
1844}
1845#endif /* CONFIG_PM */