Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* i915_dma.c -- DMA support for the I915 -*- linux-c -*- |
| 2 | */ |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 3 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
| 5 | * All Rights Reserved. |
Dave Airlie | bc54fd1 | 2005-06-23 22:46:46 +1000 | [diff] [blame] | 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 8 | * copy of this software and associated documentation files (the |
| 9 | * "Software"), to deal in the Software without restriction, including |
| 10 | * without limitation the rights to use, copy, modify, merge, publish, |
| 11 | * distribute, sub license, and/or sell copies of the Software, and to |
| 12 | * permit persons to whom the Software is furnished to do so, subject to |
| 13 | * the following conditions: |
| 14 | * |
| 15 | * The above copyright notice and this permission notice (including the |
| 16 | * next paragraph) shall be included in all copies or substantial portions |
| 17 | * of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| 20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
| 22 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR |
| 23 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 24 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 25 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 26 | * |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 27 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | |
| 29 | #include "drmP.h" |
| 30 | #include "drm.h" |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 31 | #include "drm_crtc_helper.h" |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 32 | #include "drm_fb_helper.h" |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 33 | #include "intel_drv.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include "i915_drm.h" |
| 35 | #include "i915_drv.h" |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 36 | #include "i915_trace.h" |
Dave Airlie | 28d5204 | 2009-09-21 14:33:58 +1000 | [diff] [blame] | 37 | #include <linux/vgaarb.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | /* Really want an OS-independent resettable timer. Would like to have |
| 40 | * this loop run for (eg) 3 sec, but have the timer reset every time |
| 41 | * the head pointer changes, so that EBUSY only happens if the ring |
| 42 | * actually stalls for (eg) 3 seconds. |
| 43 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 44 | int i915_wait_ring(struct drm_device * dev, int n, const char *caller) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | { |
| 46 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 47 | drm_i915_ring_buffer_t *ring = &(dev_priv->ring); |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 48 | u32 acthd_reg = IS_I965G(dev) ? ACTHD_I965 : ACTHD; |
| 49 | u32 last_acthd = I915_READ(acthd_reg); |
| 50 | u32 acthd; |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 51 | u32 last_head = I915_READ(PRB0_HEAD) & HEAD_ADDR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | int i; |
| 53 | |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 54 | trace_i915_ring_wait_begin (dev); |
| 55 | |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 56 | for (i = 0; i < 100000; i++) { |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 57 | ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR; |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 58 | acthd = I915_READ(acthd_reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | ring->space = ring->head - (ring->tail + 8); |
| 60 | if (ring->space < 0) |
| 61 | ring->space += ring->Size; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 62 | if (ring->space >= n) { |
| 63 | trace_i915_ring_wait_end (dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | return 0; |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 65 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | |
Chris Wilson | 98787c0 | 2009-03-06 23:27:52 +0000 | [diff] [blame] | 67 | if (dev->primary->master) { |
| 68 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
| 69 | if (master_priv->sarea_priv) |
| 70 | master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; |
| 71 | } |
| 72 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | |
| 74 | if (ring->head != last_head) |
| 75 | i = 0; |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 76 | if (acthd != last_acthd) |
| 77 | i = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | |
| 79 | last_head = ring->head; |
Keith Packard | d3a6d44 | 2008-07-30 12:21:20 -0700 | [diff] [blame] | 80 | last_acthd = acthd; |
| 81 | msleep_interruptible(10); |
| 82 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | } |
| 84 | |
Chris Wilson | 1c5d22f | 2009-08-25 11:15:50 +0100 | [diff] [blame] | 85 | trace_i915_ring_wait_end (dev); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 86 | return -EBUSY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | } |
| 88 | |
Chris Wilson | 0ef82af | 2009-09-05 18:07:06 +0100 | [diff] [blame] | 89 | /* As a ringbuffer is only allowed to wrap between instructions, fill |
| 90 | * the tail with NOOPs. |
| 91 | */ |
| 92 | int i915_wrap_ring(struct drm_device *dev) |
| 93 | { |
| 94 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 95 | volatile unsigned int *virt; |
| 96 | int rem; |
| 97 | |
| 98 | rem = dev_priv->ring.Size - dev_priv->ring.tail; |
| 99 | if (dev_priv->ring.space < rem) { |
| 100 | int ret = i915_wait_ring(dev, rem, __func__); |
| 101 | if (ret) |
| 102 | return ret; |
| 103 | } |
| 104 | dev_priv->ring.space -= rem; |
| 105 | |
| 106 | virt = (unsigned int *) |
| 107 | (dev_priv->ring.virtual_start + dev_priv->ring.tail); |
| 108 | rem /= 4; |
| 109 | while (rem--) |
| 110 | *virt++ = MI_NOOP; |
| 111 | |
| 112 | dev_priv->ring.tail = 0; |
| 113 | |
| 114 | return 0; |
| 115 | } |
| 116 | |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 117 | /** |
| 118 | * Sets up the hardware status page for devices that need a physical address |
| 119 | * in the register. |
| 120 | */ |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 121 | static int i915_init_phys_hws(struct drm_device *dev) |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 122 | { |
| 123 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 124 | /* Program Hardware Status Page */ |
| 125 | dev_priv->status_page_dmah = |
| 126 | drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff); |
| 127 | |
| 128 | if (!dev_priv->status_page_dmah) { |
| 129 | DRM_ERROR("Can not allocate hardware status page\n"); |
| 130 | return -ENOMEM; |
| 131 | } |
| 132 | dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr; |
| 133 | dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr; |
| 134 | |
| 135 | memset(dev_priv->hw_status_page, 0, PAGE_SIZE); |
| 136 | |
| 137 | I915_WRITE(HWS_PGA, dev_priv->dma_status_page); |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 138 | DRM_DEBUG_DRIVER("Enabled hardware status page\n"); |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 139 | return 0; |
| 140 | } |
| 141 | |
| 142 | /** |
| 143 | * Frees the hardware status page, whether it's a physical address or a virtual |
| 144 | * address set up by the X Server. |
| 145 | */ |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 146 | static void i915_free_hws(struct drm_device *dev) |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 147 | { |
| 148 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 149 | if (dev_priv->status_page_dmah) { |
| 150 | drm_pci_free(dev, dev_priv->status_page_dmah); |
| 151 | dev_priv->status_page_dmah = NULL; |
| 152 | } |
| 153 | |
| 154 | if (dev_priv->status_gfx_addr) { |
| 155 | dev_priv->status_gfx_addr = 0; |
| 156 | drm_core_ioremapfree(&dev_priv->hws_map, dev); |
| 157 | } |
| 158 | |
| 159 | /* Need to rewrite hardware status page */ |
| 160 | I915_WRITE(HWS_PGA, 0x1ffff000); |
| 161 | } |
| 162 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 163 | void i915_kernel_lost_context(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | { |
| 165 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 166 | struct drm_i915_master_private *master_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | drm_i915_ring_buffer_t *ring = &(dev_priv->ring); |
| 168 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 169 | /* |
| 170 | * We should never lose context on the ring with modesetting |
| 171 | * as we don't expose it to userspace |
| 172 | */ |
| 173 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
| 174 | return; |
| 175 | |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 176 | ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR; |
| 177 | ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | ring->space = ring->head - (ring->tail + 8); |
| 179 | if (ring->space < 0) |
| 180 | ring->space += ring->Size; |
| 181 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 182 | if (!dev->primary->master) |
| 183 | return; |
| 184 | |
| 185 | master_priv = dev->primary->master->driver_priv; |
| 186 | if (ring->head == ring->tail && master_priv->sarea_priv) |
| 187 | master_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | } |
| 189 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 190 | static int i915_dma_cleanup(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 192 | drm_i915_private_t *dev_priv = dev->dev_private; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | /* Make sure interrupts are disabled here because the uninstall ioctl |
| 194 | * may not have been called from userspace and after dev_private |
| 195 | * is freed, it's too late. |
| 196 | */ |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 197 | if (dev->irq_enabled) |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 198 | drm_irq_uninstall(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 200 | if (dev_priv->ring.virtual_start) { |
| 201 | drm_core_ioremapfree(&dev_priv->ring.map, dev); |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 202 | dev_priv->ring.virtual_start = NULL; |
| 203 | dev_priv->ring.map.handle = NULL; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 204 | dev_priv->ring.map.size = 0; |
| 205 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 207 | /* Clear the HWS virtual address at teardown */ |
| 208 | if (I915_NEED_GFX_HWS(dev)) |
| 209 | i915_free_hws(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | |
| 211 | return 0; |
| 212 | } |
| 213 | |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 214 | static int i915_initialize(struct drm_device * dev, drm_i915_init_t * init) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 215 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 216 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 217 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 218 | |
Dave Airlie | 3a03ac1 | 2009-01-11 09:03:49 +1000 | [diff] [blame] | 219 | master_priv->sarea = drm_getsarea(dev); |
| 220 | if (master_priv->sarea) { |
| 221 | master_priv->sarea_priv = (drm_i915_sarea_t *) |
| 222 | ((u8 *)master_priv->sarea->handle + init->sarea_priv_offset); |
| 223 | } else { |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 224 | DRM_DEBUG_DRIVER("sarea not found assuming DRI2 userspace\n"); |
Dave Airlie | 3a03ac1 | 2009-01-11 09:03:49 +1000 | [diff] [blame] | 225 | } |
| 226 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 227 | if (init->ring_size != 0) { |
| 228 | if (dev_priv->ring.ring_obj != NULL) { |
| 229 | i915_dma_cleanup(dev); |
| 230 | DRM_ERROR("Client tried to initialize ringbuffer in " |
| 231 | "GEM mode\n"); |
| 232 | return -EINVAL; |
| 233 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 235 | dev_priv->ring.Size = init->ring_size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 236 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 237 | dev_priv->ring.map.offset = init->ring_start; |
| 238 | dev_priv->ring.map.size = init->ring_size; |
| 239 | dev_priv->ring.map.type = 0; |
| 240 | dev_priv->ring.map.flags = 0; |
| 241 | dev_priv->ring.map.mtrr = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | |
Jesse Barnes | 6fb8858 | 2009-02-23 10:08:21 +1000 | [diff] [blame] | 243 | drm_core_ioremap_wc(&dev_priv->ring.map, dev); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 244 | |
| 245 | if (dev_priv->ring.map.handle == NULL) { |
| 246 | i915_dma_cleanup(dev); |
| 247 | DRM_ERROR("can not ioremap virtual address for" |
| 248 | " ring buffer\n"); |
| 249 | return -ENOMEM; |
| 250 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 251 | } |
| 252 | |
| 253 | dev_priv->ring.virtual_start = dev_priv->ring.map.handle; |
| 254 | |
=?utf-8?q?Michel_D=C3=A4nzer?= | a6b54f3 | 2006-10-24 23:37:43 +1000 | [diff] [blame] | 255 | dev_priv->cpp = init->cpp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | dev_priv->back_offset = init->back_offset; |
| 257 | dev_priv->front_offset = init->front_offset; |
| 258 | dev_priv->current_page = 0; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 259 | if (master_priv->sarea_priv) |
| 260 | master_priv->sarea_priv->pf_current_page = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 262 | /* Allow hardware batchbuffers unless told otherwise. |
| 263 | */ |
| 264 | dev_priv->allow_batchbuffer = 1; |
| 265 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | return 0; |
| 267 | } |
| 268 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 269 | static int i915_dma_resume(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 270 | { |
| 271 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
| 272 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 273 | DRM_DEBUG_DRIVER("%s\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 274 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | if (dev_priv->ring.map.handle == NULL) { |
| 276 | DRM_ERROR("can not ioremap virtual address for" |
| 277 | " ring buffer\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 278 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | } |
| 280 | |
| 281 | /* Program Hardware Status Page */ |
| 282 | if (!dev_priv->hw_status_page) { |
| 283 | DRM_ERROR("Can not find hardware status page\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 284 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 285 | } |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 286 | DRM_DEBUG_DRIVER("hw status page @ %p\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 287 | dev_priv->hw_status_page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 289 | if (dev_priv->status_gfx_addr != 0) |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 290 | I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr); |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 291 | else |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 292 | I915_WRITE(HWS_PGA, dev_priv->dma_status_page); |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 293 | DRM_DEBUG_DRIVER("Enabled hardware status page\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | |
| 295 | return 0; |
| 296 | } |
| 297 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 298 | static int i915_dma_init(struct drm_device *dev, void *data, |
| 299 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | { |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 301 | drm_i915_init_t *init = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | int retcode = 0; |
| 303 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 304 | switch (init->func) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | case I915_INIT_DMA: |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 306 | retcode = i915_initialize(dev, init); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | break; |
| 308 | case I915_CLEANUP_DMA: |
| 309 | retcode = i915_dma_cleanup(dev); |
| 310 | break; |
| 311 | case I915_RESUME_DMA: |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 312 | retcode = i915_dma_resume(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | break; |
| 314 | default: |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 315 | retcode = -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | break; |
| 317 | } |
| 318 | |
| 319 | return retcode; |
| 320 | } |
| 321 | |
| 322 | /* Implement basically the same security restrictions as hardware does |
| 323 | * for MI_BATCH_NON_SECURE. These can be made stricter at any time. |
| 324 | * |
| 325 | * Most of the calculations below involve calculating the size of a |
| 326 | * particular instruction. It's important to get the size right as |
| 327 | * that tells us where the next instruction to check is. Any illegal |
| 328 | * instruction detected will be given a size of zero, which is a |
| 329 | * signal to abort the rest of the buffer. |
| 330 | */ |
| 331 | static int do_validate_cmd(int cmd) |
| 332 | { |
| 333 | switch (((cmd >> 29) & 0x7)) { |
| 334 | case 0x0: |
| 335 | switch ((cmd >> 23) & 0x3f) { |
| 336 | case 0x0: |
| 337 | return 1; /* MI_NOOP */ |
| 338 | case 0x4: |
| 339 | return 1; /* MI_FLUSH */ |
| 340 | default: |
| 341 | return 0; /* disallow everything else */ |
| 342 | } |
| 343 | break; |
| 344 | case 0x1: |
| 345 | return 0; /* reserved */ |
| 346 | case 0x2: |
| 347 | return (cmd & 0xff) + 2; /* 2d commands */ |
| 348 | case 0x3: |
| 349 | if (((cmd >> 24) & 0x1f) <= 0x18) |
| 350 | return 1; |
| 351 | |
| 352 | switch ((cmd >> 24) & 0x1f) { |
| 353 | case 0x1c: |
| 354 | return 1; |
| 355 | case 0x1d: |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 356 | switch ((cmd >> 16) & 0xff) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 357 | case 0x3: |
| 358 | return (cmd & 0x1f) + 2; |
| 359 | case 0x4: |
| 360 | return (cmd & 0xf) + 2; |
| 361 | default: |
| 362 | return (cmd & 0xffff) + 2; |
| 363 | } |
| 364 | case 0x1e: |
| 365 | if (cmd & (1 << 23)) |
| 366 | return (cmd & 0xffff) + 1; |
| 367 | else |
| 368 | return 1; |
| 369 | case 0x1f: |
| 370 | if ((cmd & (1 << 23)) == 0) /* inline vertices */ |
| 371 | return (cmd & 0x1ffff) + 2; |
| 372 | else if (cmd & (1 << 17)) /* indirect random */ |
| 373 | if ((cmd & 0xffff) == 0) |
| 374 | return 0; /* unknown length, too hard */ |
| 375 | else |
| 376 | return (((cmd & 0xffff) + 1) / 2) + 1; |
| 377 | else |
| 378 | return 2; /* indirect sequential */ |
| 379 | default: |
| 380 | return 0; |
| 381 | } |
| 382 | default: |
| 383 | return 0; |
| 384 | } |
| 385 | |
| 386 | return 0; |
| 387 | } |
| 388 | |
| 389 | static int validate_cmd(int cmd) |
| 390 | { |
| 391 | int ret = do_validate_cmd(cmd); |
| 392 | |
Dave Airlie | bc5f452 | 2007-11-05 12:50:58 +1000 | [diff] [blame] | 393 | /* printk("validate_cmd( %x ): %d\n", cmd, ret); */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | |
| 395 | return ret; |
| 396 | } |
| 397 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 398 | static int i915_emit_cmds(struct drm_device * dev, int *buffer, int dwords) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 399 | { |
| 400 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 401 | int i; |
| 402 | RING_LOCALS; |
| 403 | |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 404 | if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8) |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 405 | return -EINVAL; |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 406 | |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 407 | BEGIN_LP_RING((dwords+1)&~1); |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 408 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 409 | for (i = 0; i < dwords;) { |
| 410 | int cmd, sz; |
| 411 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 412 | cmd = buffer[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 413 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 414 | if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords) |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 415 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 416 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | OUT_RING(cmd); |
| 418 | |
| 419 | while (++i, --sz) { |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 420 | OUT_RING(buffer[i]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 422 | } |
| 423 | |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 424 | if (dwords & 1) |
| 425 | OUT_RING(0); |
| 426 | |
| 427 | ADVANCE_LP_RING(); |
| 428 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 429 | return 0; |
| 430 | } |
| 431 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 432 | int |
| 433 | i915_emit_box(struct drm_device *dev, |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 434 | struct drm_clip_rect *boxes, |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 435 | int i, int DR1, int DR4) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | { |
| 437 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 438 | struct drm_clip_rect box = boxes[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 439 | RING_LOCALS; |
| 440 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) { |
| 442 | DRM_ERROR("Bad box %d,%d..%d,%d\n", |
| 443 | box.x1, box.y1, box.x2, box.y2); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 444 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | } |
| 446 | |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 447 | if (IS_I965G(dev)) { |
| 448 | BEGIN_LP_RING(4); |
| 449 | OUT_RING(GFX_OP_DRAWRECT_INFO_I965); |
| 450 | OUT_RING((box.x1 & 0xffff) | (box.y1 << 16)); |
Andrew Morton | 78eca43 | 2006-08-16 09:15:51 +1000 | [diff] [blame] | 451 | OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16)); |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 452 | OUT_RING(DR4); |
| 453 | ADVANCE_LP_RING(); |
| 454 | } else { |
| 455 | BEGIN_LP_RING(6); |
| 456 | OUT_RING(GFX_OP_DRAWRECT_INFO); |
| 457 | OUT_RING(DR1); |
| 458 | OUT_RING((box.x1 & 0xffff) | (box.y1 << 16)); |
| 459 | OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16)); |
| 460 | OUT_RING(DR4); |
| 461 | OUT_RING(0); |
| 462 | ADVANCE_LP_RING(); |
| 463 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | |
| 465 | return 0; |
| 466 | } |
| 467 | |
Alan Hourihane | c29b669 | 2006-08-12 16:29:24 +1000 | [diff] [blame] | 468 | /* XXX: Emitting the counter should really be moved to part of the IRQ |
| 469 | * emit. For now, do it in both places: |
| 470 | */ |
| 471 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 472 | static void i915_emit_breadcrumb(struct drm_device *dev) |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 473 | { |
| 474 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 475 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 476 | RING_LOCALS; |
| 477 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 478 | dev_priv->counter++; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 479 | if (dev_priv->counter > 0x7FFFFFFFUL) |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 480 | dev_priv->counter = 0; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 481 | if (master_priv->sarea_priv) |
| 482 | master_priv->sarea_priv->last_enqueue = dev_priv->counter; |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 483 | |
| 484 | BEGIN_LP_RING(4); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 485 | OUT_RING(MI_STORE_DWORD_INDEX); |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 486 | OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT); |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 487 | OUT_RING(dev_priv->counter); |
| 488 | OUT_RING(0); |
| 489 | ADVANCE_LP_RING(); |
| 490 | } |
| 491 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 492 | static int i915_dispatch_cmdbuffer(struct drm_device * dev, |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 493 | drm_i915_cmdbuffer_t *cmd, |
| 494 | struct drm_clip_rect *cliprects, |
| 495 | void *cmdbuf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | { |
| 497 | int nbox = cmd->num_cliprects; |
| 498 | int i = 0, count, ret; |
| 499 | |
| 500 | if (cmd->sz & 0x3) { |
| 501 | DRM_ERROR("alignment"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 502 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 503 | } |
| 504 | |
| 505 | i915_kernel_lost_context(dev); |
| 506 | |
| 507 | count = nbox ? nbox : 1; |
| 508 | |
| 509 | for (i = 0; i < count; i++) { |
| 510 | if (i < nbox) { |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 511 | ret = i915_emit_box(dev, cliprects, i, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 512 | cmd->DR1, cmd->DR4); |
| 513 | if (ret) |
| 514 | return ret; |
| 515 | } |
| 516 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 517 | ret = i915_emit_cmds(dev, cmdbuf, cmd->sz / 4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 518 | if (ret) |
| 519 | return ret; |
| 520 | } |
| 521 | |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 522 | i915_emit_breadcrumb(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | return 0; |
| 524 | } |
| 525 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 526 | static int i915_dispatch_batchbuffer(struct drm_device * dev, |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 527 | drm_i915_batchbuffer_t * batch, |
| 528 | struct drm_clip_rect *cliprects) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | { |
| 530 | drm_i915_private_t *dev_priv = dev->dev_private; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 531 | int nbox = batch->num_cliprects; |
| 532 | int i = 0, count; |
| 533 | RING_LOCALS; |
| 534 | |
| 535 | if ((batch->start | batch->used) & 0x7) { |
| 536 | DRM_ERROR("alignment"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 537 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | } |
| 539 | |
| 540 | i915_kernel_lost_context(dev); |
| 541 | |
| 542 | count = nbox ? nbox : 1; |
| 543 | |
| 544 | for (i = 0; i < count; i++) { |
| 545 | if (i < nbox) { |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 546 | int ret = i915_emit_box(dev, cliprects, i, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 547 | batch->DR1, batch->DR4); |
| 548 | if (ret) |
| 549 | return ret; |
| 550 | } |
| 551 | |
Keith Packard | 0790d5e | 2008-07-30 12:28:47 -0700 | [diff] [blame] | 552 | if (!IS_I830(dev) && !IS_845G(dev)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 553 | BEGIN_LP_RING(2); |
Dave Airlie | 21f1628 | 2007-08-07 09:09:51 +1000 | [diff] [blame] | 554 | if (IS_I965G(dev)) { |
| 555 | OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965); |
| 556 | OUT_RING(batch->start); |
| 557 | } else { |
| 558 | OUT_RING(MI_BATCH_BUFFER_START | (2 << 6)); |
| 559 | OUT_RING(batch->start | MI_BATCH_NON_SECURE); |
| 560 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 561 | ADVANCE_LP_RING(); |
| 562 | } else { |
| 563 | BEGIN_LP_RING(4); |
| 564 | OUT_RING(MI_BATCH_BUFFER); |
| 565 | OUT_RING(batch->start | MI_BATCH_NON_SECURE); |
| 566 | OUT_RING(batch->start + batch->used - 4); |
| 567 | OUT_RING(0); |
| 568 | ADVANCE_LP_RING(); |
| 569 | } |
| 570 | } |
| 571 | |
Dave Airlie | de227f5 | 2006-01-25 15:31:43 +1100 | [diff] [blame] | 572 | i915_emit_breadcrumb(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | |
| 574 | return 0; |
| 575 | } |
| 576 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 577 | static int i915_dispatch_flip(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 578 | { |
| 579 | drm_i915_private_t *dev_priv = dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 580 | struct drm_i915_master_private *master_priv = |
| 581 | dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | RING_LOCALS; |
| 583 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 584 | if (!master_priv->sarea_priv) |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 585 | return -EINVAL; |
| 586 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 587 | DRM_DEBUG_DRIVER("%s: page=%d pfCurrentPage=%d\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 588 | __func__, |
| 589 | dev_priv->current_page, |
| 590 | master_priv->sarea_priv->pf_current_page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 591 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 592 | i915_kernel_lost_context(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 593 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 594 | BEGIN_LP_RING(2); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 595 | OUT_RING(MI_FLUSH | MI_READ_FLUSH); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 596 | OUT_RING(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | ADVANCE_LP_RING(); |
| 598 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 599 | BEGIN_LP_RING(6); |
| 600 | OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP); |
| 601 | OUT_RING(0); |
| 602 | if (dev_priv->current_page == 0) { |
| 603 | OUT_RING(dev_priv->back_offset); |
| 604 | dev_priv->current_page = 1; |
| 605 | } else { |
| 606 | OUT_RING(dev_priv->front_offset); |
| 607 | dev_priv->current_page = 0; |
| 608 | } |
| 609 | OUT_RING(0); |
| 610 | ADVANCE_LP_RING(); |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 611 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 612 | BEGIN_LP_RING(2); |
| 613 | OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP); |
| 614 | OUT_RING(0); |
| 615 | ADVANCE_LP_RING(); |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 616 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 617 | master_priv->sarea_priv->last_enqueue = dev_priv->counter++; |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 618 | |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 619 | BEGIN_LP_RING(4); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 620 | OUT_RING(MI_STORE_DWORD_INDEX); |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 621 | OUT_RING(I915_BREADCRUMB_INDEX << MI_STORE_DWORD_INDEX_SHIFT); |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 622 | OUT_RING(dev_priv->counter); |
| 623 | OUT_RING(0); |
| 624 | ADVANCE_LP_RING(); |
Jesse Barnes | ac741ab | 2008-04-22 16:03:07 +1000 | [diff] [blame] | 625 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 626 | master_priv->sarea_priv->pf_current_page = dev_priv->current_page; |
Dave Airlie | af6061a | 2008-05-07 12:15:39 +1000 | [diff] [blame] | 627 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | } |
| 629 | |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 630 | static int i915_quiescent(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | { |
| 632 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 633 | |
| 634 | i915_kernel_lost_context(dev); |
Harvey Harrison | bf9d892 | 2008-04-30 00:55:10 -0700 | [diff] [blame] | 635 | return i915_wait_ring(dev, dev_priv->ring.Size - 8, __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 636 | } |
| 637 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 638 | static int i915_flush_ioctl(struct drm_device *dev, void *data, |
| 639 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 640 | { |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 641 | int ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 643 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
| 644 | |
| 645 | mutex_lock(&dev->struct_mutex); |
| 646 | ret = i915_quiescent(dev); |
| 647 | mutex_unlock(&dev->struct_mutex); |
| 648 | |
| 649 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 650 | } |
| 651 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 652 | static int i915_batchbuffer(struct drm_device *dev, void *data, |
| 653 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 656 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 657 | drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 658 | master_priv->sarea_priv; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 659 | drm_i915_batchbuffer_t *batch = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 660 | int ret; |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 661 | struct drm_clip_rect *cliprects = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | |
| 663 | if (!dev_priv->allow_batchbuffer) { |
| 664 | DRM_ERROR("Batchbuffer ioctl disabled\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 665 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 666 | } |
| 667 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 668 | DRM_DEBUG_DRIVER("i915 batchbuffer, start %x used %d cliprects %d\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 669 | batch->start, batch->used, batch->num_cliprects); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 671 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 673 | if (batch->num_cliprects < 0) |
| 674 | return -EINVAL; |
| 675 | |
| 676 | if (batch->num_cliprects) { |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 677 | cliprects = kcalloc(batch->num_cliprects, |
| 678 | sizeof(struct drm_clip_rect), |
| 679 | GFP_KERNEL); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 680 | if (cliprects == NULL) |
| 681 | return -ENOMEM; |
| 682 | |
| 683 | ret = copy_from_user(cliprects, batch->cliprects, |
| 684 | batch->num_cliprects * |
| 685 | sizeof(struct drm_clip_rect)); |
| 686 | if (ret != 0) |
| 687 | goto fail_free; |
| 688 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 690 | mutex_lock(&dev->struct_mutex); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 691 | ret = i915_dispatch_batchbuffer(dev, batch, cliprects); |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 692 | mutex_unlock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 693 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 694 | if (sarea_priv) |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 695 | sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 696 | |
| 697 | fail_free: |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 698 | kfree(cliprects); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 699 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 700 | return ret; |
| 701 | } |
| 702 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 703 | static int i915_cmdbuffer(struct drm_device *dev, void *data, |
| 704 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 705 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 706 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 707 | struct drm_i915_master_private *master_priv = dev->primary->master->driver_priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *) |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 709 | master_priv->sarea_priv; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 710 | drm_i915_cmdbuffer_t *cmdbuf = data; |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 711 | struct drm_clip_rect *cliprects = NULL; |
| 712 | void *batch_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 713 | int ret; |
| 714 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 715 | DRM_DEBUG_DRIVER("i915 cmdbuffer, buf %p sz %d cliprects %d\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 716 | cmdbuf->buf, cmdbuf->sz, cmdbuf->num_cliprects); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 718 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 720 | if (cmdbuf->num_cliprects < 0) |
| 721 | return -EINVAL; |
| 722 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 723 | batch_data = kmalloc(cmdbuf->sz, GFP_KERNEL); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 724 | if (batch_data == NULL) |
| 725 | return -ENOMEM; |
| 726 | |
| 727 | ret = copy_from_user(batch_data, cmdbuf->buf, cmdbuf->sz); |
| 728 | if (ret != 0) |
| 729 | goto fail_batch_free; |
| 730 | |
| 731 | if (cmdbuf->num_cliprects) { |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 732 | cliprects = kcalloc(cmdbuf->num_cliprects, |
| 733 | sizeof(struct drm_clip_rect), GFP_KERNEL); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 734 | if (cliprects == NULL) |
| 735 | goto fail_batch_free; |
| 736 | |
| 737 | ret = copy_from_user(cliprects, cmdbuf->cliprects, |
| 738 | cmdbuf->num_cliprects * |
| 739 | sizeof(struct drm_clip_rect)); |
| 740 | if (ret != 0) |
| 741 | goto fail_clip_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 742 | } |
| 743 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 744 | mutex_lock(&dev->struct_mutex); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 745 | ret = i915_dispatch_cmdbuffer(dev, cmdbuf, cliprects, batch_data); |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 746 | mutex_unlock(&dev->struct_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 747 | if (ret) { |
| 748 | DRM_ERROR("i915_dispatch_cmdbuffer failed\n"); |
Chris Wright | 355d7f3 | 2009-04-17 01:18:55 +0000 | [diff] [blame] | 749 | goto fail_clip_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | } |
| 751 | |
Kristian Høgsberg | c99b058 | 2008-08-20 11:20:13 -0400 | [diff] [blame] | 752 | if (sarea_priv) |
Keith Packard | 0baf823 | 2008-11-08 11:44:14 +1000 | [diff] [blame] | 753 | sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 754 | |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 755 | fail_clip_free: |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 756 | kfree(cliprects); |
Chris Wright | 355d7f3 | 2009-04-17 01:18:55 +0000 | [diff] [blame] | 757 | fail_batch_free: |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 758 | kfree(batch_data); |
Eric Anholt | 201361a | 2009-03-11 12:30:04 -0700 | [diff] [blame] | 759 | |
| 760 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 761 | } |
| 762 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 763 | static int i915_flip_bufs(struct drm_device *dev, void *data, |
| 764 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 765 | { |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 766 | int ret; |
| 767 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 768 | DRM_DEBUG_DRIVER("%s\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 769 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 770 | RING_LOCK_TEST_WITH_RETURN(dev, file_priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 771 | |
Eric Anholt | 546b097 | 2008-09-01 16:45:29 -0700 | [diff] [blame] | 772 | mutex_lock(&dev->struct_mutex); |
| 773 | ret = i915_dispatch_flip(dev); |
| 774 | mutex_unlock(&dev->struct_mutex); |
| 775 | |
| 776 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 777 | } |
| 778 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 779 | static int i915_getparam(struct drm_device *dev, void *data, |
| 780 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 782 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 783 | drm_i915_getparam_t *param = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 784 | int value; |
| 785 | |
| 786 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 787 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 788 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 789 | } |
| 790 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 791 | switch (param->param) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 792 | case I915_PARAM_IRQ_ACTIVE: |
Jesse Barnes | 0a3e67a | 2008-09-30 12:14:26 -0700 | [diff] [blame] | 793 | value = dev->pdev->irq ? 1 : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | break; |
| 795 | case I915_PARAM_ALLOW_BATCHBUFFER: |
| 796 | value = dev_priv->allow_batchbuffer ? 1 : 0; |
| 797 | break; |
Dave Airlie | 0d6aa60 | 2006-01-02 20:14:23 +1100 | [diff] [blame] | 798 | case I915_PARAM_LAST_DISPATCH: |
| 799 | value = READ_BREADCRUMB(dev_priv); |
| 800 | break; |
Kristian Høgsberg | ed4c9c4 | 2008-08-20 11:08:52 -0400 | [diff] [blame] | 801 | case I915_PARAM_CHIPSET_ID: |
| 802 | value = dev->pci_device; |
| 803 | break; |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 804 | case I915_PARAM_HAS_GEM: |
Dave Airlie | ac5c4e7 | 2008-12-19 15:38:34 +1000 | [diff] [blame] | 805 | value = dev_priv->has_gem; |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 806 | break; |
Jesse Barnes | 0f973f2 | 2009-01-26 17:10:45 -0800 | [diff] [blame] | 807 | case I915_PARAM_NUM_FENCES_AVAIL: |
| 808 | value = dev_priv->num_fence_regs - dev_priv->fence_reg_start; |
| 809 | break; |
Daniel Vetter | 02e792f | 2009-09-15 22:57:34 +0200 | [diff] [blame] | 810 | case I915_PARAM_HAS_OVERLAY: |
| 811 | value = dev_priv->overlay ? 1 : 0; |
| 812 | break; |
Jesse Barnes | e9560f7 | 2009-11-19 10:49:07 -0800 | [diff] [blame] | 813 | case I915_PARAM_HAS_PAGEFLIPPING: |
| 814 | value = 1; |
| 815 | break; |
Jesse Barnes | 76446ca | 2009-12-17 22:05:42 -0500 | [diff] [blame^] | 816 | case I915_PARAM_HAS_EXECBUF2: |
| 817 | /* depends on GEM */ |
| 818 | value = dev_priv->has_gem; |
| 819 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | default: |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 821 | DRM_DEBUG_DRIVER("Unknown parameter %d\n", |
Jesse Barnes | 76446ca | 2009-12-17 22:05:42 -0500 | [diff] [blame^] | 822 | param->param); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 823 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 824 | } |
| 825 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 826 | if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 827 | DRM_ERROR("DRM_COPY_TO_USER failed\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 828 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 829 | } |
| 830 | |
| 831 | return 0; |
| 832 | } |
| 833 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 834 | static int i915_setparam(struct drm_device *dev, void *data, |
| 835 | struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 836 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 837 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 838 | drm_i915_setparam_t *param = data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | |
| 840 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 841 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 842 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 843 | } |
| 844 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 845 | switch (param->param) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | case I915_SETPARAM_USE_MI_BATCHBUFFER_START: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 847 | break; |
| 848 | case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY: |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 849 | dev_priv->tex_lru_log_granularity = param->value; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 850 | break; |
| 851 | case I915_SETPARAM_ALLOW_BATCHBUFFER: |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 852 | dev_priv->allow_batchbuffer = param->value; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 853 | break; |
Jesse Barnes | 0f973f2 | 2009-01-26 17:10:45 -0800 | [diff] [blame] | 854 | case I915_SETPARAM_NUM_USED_FENCES: |
| 855 | if (param->value > dev_priv->num_fence_regs || |
| 856 | param->value < 0) |
| 857 | return -EINVAL; |
| 858 | /* Userspace can use first N regs */ |
| 859 | dev_priv->fence_reg_start = param->value; |
| 860 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 861 | default: |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 862 | DRM_DEBUG_DRIVER("unknown parameter %d\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 863 | param->param); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 864 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 865 | } |
| 866 | |
| 867 | return 0; |
| 868 | } |
| 869 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 870 | static int i915_set_status_page(struct drm_device *dev, void *data, |
| 871 | struct drm_file *file_priv) |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 872 | { |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 873 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 874 | drm_i915_hws_addr_t *hws = data; |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 875 | |
Zhenyu Wang | b39d50e | 2008-02-19 20:59:09 +1000 | [diff] [blame] | 876 | if (!I915_NEED_GFX_HWS(dev)) |
| 877 | return -EINVAL; |
| 878 | |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 879 | if (!dev_priv) { |
Márton Németh | 3e684ea | 2008-01-24 15:58:57 +1000 | [diff] [blame] | 880 | DRM_ERROR("called with no initialization\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 881 | return -EINVAL; |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 882 | } |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 883 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 884 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 885 | WARN(1, "tried to set status page when mode setting active\n"); |
| 886 | return 0; |
| 887 | } |
| 888 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 889 | DRM_DEBUG_DRIVER("set status page addr 0x%08x\n", (u32)hws->addr); |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 890 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 891 | dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12); |
| 892 | |
Eric Anholt | 8b40958 | 2007-11-22 16:40:37 +1000 | [diff] [blame] | 893 | dev_priv->hws_map.offset = dev->agp->base + hws->addr; |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 894 | dev_priv->hws_map.size = 4*1024; |
| 895 | dev_priv->hws_map.type = 0; |
| 896 | dev_priv->hws_map.flags = 0; |
| 897 | dev_priv->hws_map.mtrr = 0; |
| 898 | |
Dave Airlie | dd0910b | 2009-02-25 14:49:21 +1000 | [diff] [blame] | 899 | drm_core_ioremap_wc(&dev_priv->hws_map, dev); |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 900 | if (dev_priv->hws_map.handle == NULL) { |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 901 | i915_dma_cleanup(dev); |
| 902 | dev_priv->status_gfx_addr = 0; |
| 903 | DRM_ERROR("can not ioremap virtual address for" |
| 904 | " G33 hw status page\n"); |
Eric Anholt | 20caafa | 2007-08-25 19:22:43 +1000 | [diff] [blame] | 905 | return -ENOMEM; |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 906 | } |
| 907 | dev_priv->hw_status_page = dev_priv->hws_map.handle; |
| 908 | |
| 909 | memset(dev_priv->hw_status_page, 0, PAGE_SIZE); |
Jesse Barnes | 585fb11 | 2008-07-29 11:54:06 -0700 | [diff] [blame] | 910 | I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr); |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 911 | DRM_DEBUG_DRIVER("load hws HWS_PGA with gfx mem 0x%x\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 912 | dev_priv->status_gfx_addr); |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 913 | DRM_DEBUG_DRIVER("load hws at %p\n", |
yakui_zhao | be25ed9 | 2009-06-02 14:13:55 +0800 | [diff] [blame] | 914 | dev_priv->hw_status_page); |
Wang Zhenyu | dc7a931 | 2007-06-10 15:58:19 +1000 | [diff] [blame] | 915 | return 0; |
| 916 | } |
| 917 | |
Dave Airlie | ec2a4c3 | 2009-08-04 11:43:41 +1000 | [diff] [blame] | 918 | static int i915_get_bridge_dev(struct drm_device *dev) |
| 919 | { |
| 920 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 921 | |
| 922 | dev_priv->bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); |
| 923 | if (!dev_priv->bridge_dev) { |
| 924 | DRM_ERROR("bridge device not found\n"); |
| 925 | return -1; |
| 926 | } |
| 927 | return 0; |
| 928 | } |
| 929 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 930 | /** |
| 931 | * i915_probe_agp - get AGP bootup configuration |
| 932 | * @pdev: PCI device |
| 933 | * @aperture_size: returns AGP aperture configured size |
| 934 | * @preallocated_size: returns size of BIOS preallocated AGP space |
| 935 | * |
| 936 | * Since Intel integrated graphics are UMA, the BIOS has to set aside |
| 937 | * some RAM for the framebuffer at early boot. This code figures out |
| 938 | * how much was set aside so we can use it for our own purposes. |
| 939 | */ |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 940 | static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size, |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 941 | uint32_t *preallocated_size, |
| 942 | uint32_t *start) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 943 | { |
Dave Airlie | ec2a4c3 | 2009-08-04 11:43:41 +1000 | [diff] [blame] | 944 | struct drm_i915_private *dev_priv = dev->dev_private; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 945 | u16 tmp = 0; |
| 946 | unsigned long overhead; |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 947 | unsigned long stolen; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 948 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 949 | /* Get the fb aperture size and "stolen" memory amount. */ |
Dave Airlie | ec2a4c3 | 2009-08-04 11:43:41 +1000 | [diff] [blame] | 950 | pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &tmp); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 951 | |
| 952 | *aperture_size = 1024 * 1024; |
| 953 | *preallocated_size = 1024 * 1024; |
| 954 | |
Eric Anholt | 60fd99e | 2008-12-03 22:50:02 -0800 | [diff] [blame] | 955 | switch (dev->pdev->device) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 956 | case PCI_DEVICE_ID_INTEL_82830_CGC: |
| 957 | case PCI_DEVICE_ID_INTEL_82845G_IG: |
| 958 | case PCI_DEVICE_ID_INTEL_82855GM_IG: |
| 959 | case PCI_DEVICE_ID_INTEL_82865_IG: |
| 960 | if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M) |
| 961 | *aperture_size *= 64; |
| 962 | else |
| 963 | *aperture_size *= 128; |
| 964 | break; |
| 965 | default: |
| 966 | /* 9xx supports large sizes, just look at the length */ |
Eric Anholt | 60fd99e | 2008-12-03 22:50:02 -0800 | [diff] [blame] | 967 | *aperture_size = pci_resource_len(dev->pdev, 2); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 968 | break; |
| 969 | } |
| 970 | |
| 971 | /* |
| 972 | * Some of the preallocated space is taken by the GTT |
| 973 | * and popup. GTT is 1K per MB of aperture size, and popup is 4K. |
| 974 | */ |
Adam Jackson | f2b115e | 2009-12-03 17:14:42 -0500 | [diff] [blame] | 975 | if (IS_G4X(dev) || IS_PINEVIEW(dev) || IS_IRONLAKE(dev)) |
Eric Anholt | 60fd99e | 2008-12-03 22:50:02 -0800 | [diff] [blame] | 976 | overhead = 4096; |
| 977 | else |
| 978 | overhead = (*aperture_size / 1024) + 4096; |
| 979 | |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 980 | switch (tmp & INTEL_GMCH_GMS_MASK) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 981 | case INTEL_855_GMCH_GMS_DISABLED: |
| 982 | DRM_ERROR("video memory is disabled\n"); |
| 983 | return -1; |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 984 | case INTEL_855_GMCH_GMS_STOLEN_1M: |
| 985 | stolen = 1 * 1024 * 1024; |
| 986 | break; |
| 987 | case INTEL_855_GMCH_GMS_STOLEN_4M: |
| 988 | stolen = 4 * 1024 * 1024; |
| 989 | break; |
| 990 | case INTEL_855_GMCH_GMS_STOLEN_8M: |
| 991 | stolen = 8 * 1024 * 1024; |
| 992 | break; |
| 993 | case INTEL_855_GMCH_GMS_STOLEN_16M: |
| 994 | stolen = 16 * 1024 * 1024; |
| 995 | break; |
| 996 | case INTEL_855_GMCH_GMS_STOLEN_32M: |
| 997 | stolen = 32 * 1024 * 1024; |
| 998 | break; |
| 999 | case INTEL_915G_GMCH_GMS_STOLEN_48M: |
| 1000 | stolen = 48 * 1024 * 1024; |
| 1001 | break; |
| 1002 | case INTEL_915G_GMCH_GMS_STOLEN_64M: |
| 1003 | stolen = 64 * 1024 * 1024; |
| 1004 | break; |
| 1005 | case INTEL_GMCH_GMS_STOLEN_128M: |
| 1006 | stolen = 128 * 1024 * 1024; |
| 1007 | break; |
| 1008 | case INTEL_GMCH_GMS_STOLEN_256M: |
| 1009 | stolen = 256 * 1024 * 1024; |
| 1010 | break; |
| 1011 | case INTEL_GMCH_GMS_STOLEN_96M: |
| 1012 | stolen = 96 * 1024 * 1024; |
| 1013 | break; |
| 1014 | case INTEL_GMCH_GMS_STOLEN_160M: |
| 1015 | stolen = 160 * 1024 * 1024; |
| 1016 | break; |
| 1017 | case INTEL_GMCH_GMS_STOLEN_224M: |
| 1018 | stolen = 224 * 1024 * 1024; |
| 1019 | break; |
| 1020 | case INTEL_GMCH_GMS_STOLEN_352M: |
| 1021 | stolen = 352 * 1024 * 1024; |
| 1022 | break; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1023 | default: |
| 1024 | DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n", |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 1025 | tmp & INTEL_GMCH_GMS_MASK); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1026 | return -1; |
| 1027 | } |
Eric Anholt | 241fa85 | 2009-01-02 18:05:51 -0800 | [diff] [blame] | 1028 | *preallocated_size = stolen - overhead; |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1029 | *start = overhead; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1030 | |
| 1031 | return 0; |
| 1032 | } |
| 1033 | |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1034 | #define PTE_ADDRESS_MASK 0xfffff000 |
| 1035 | #define PTE_ADDRESS_MASK_HIGH 0x000000f0 /* i915+ */ |
| 1036 | #define PTE_MAPPING_TYPE_UNCACHED (0 << 1) |
| 1037 | #define PTE_MAPPING_TYPE_DCACHE (1 << 1) /* i830 only */ |
| 1038 | #define PTE_MAPPING_TYPE_CACHED (3 << 1) |
| 1039 | #define PTE_MAPPING_TYPE_MASK (3 << 1) |
| 1040 | #define PTE_VALID (1 << 0) |
| 1041 | |
| 1042 | /** |
| 1043 | * i915_gtt_to_phys - take a GTT address and turn it into a physical one |
| 1044 | * @dev: drm device |
| 1045 | * @gtt_addr: address to translate |
| 1046 | * |
| 1047 | * Some chip functions require allocations from stolen space but need the |
| 1048 | * physical address of the memory in question. We use this routine |
| 1049 | * to get a physical address suitable for register programming from a given |
| 1050 | * GTT address. |
| 1051 | */ |
| 1052 | static unsigned long i915_gtt_to_phys(struct drm_device *dev, |
| 1053 | unsigned long gtt_addr) |
| 1054 | { |
| 1055 | unsigned long *gtt; |
| 1056 | unsigned long entry, phys; |
| 1057 | int gtt_bar = IS_I9XX(dev) ? 0 : 1; |
| 1058 | int gtt_offset, gtt_size; |
| 1059 | |
| 1060 | if (IS_I965G(dev)) { |
Adam Jackson | f2b115e | 2009-12-03 17:14:42 -0500 | [diff] [blame] | 1061 | if (IS_G4X(dev) || IS_IRONLAKE(dev)) { |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1062 | gtt_offset = 2*1024*1024; |
| 1063 | gtt_size = 2*1024*1024; |
| 1064 | } else { |
| 1065 | gtt_offset = 512*1024; |
| 1066 | gtt_size = 512*1024; |
| 1067 | } |
| 1068 | } else { |
| 1069 | gtt_bar = 3; |
| 1070 | gtt_offset = 0; |
| 1071 | gtt_size = pci_resource_len(dev->pdev, gtt_bar); |
| 1072 | } |
| 1073 | |
| 1074 | gtt = ioremap_wc(pci_resource_start(dev->pdev, gtt_bar) + gtt_offset, |
| 1075 | gtt_size); |
| 1076 | if (!gtt) { |
| 1077 | DRM_ERROR("ioremap of GTT failed\n"); |
| 1078 | return 0; |
| 1079 | } |
| 1080 | |
| 1081 | entry = *(volatile u32 *)(gtt + (gtt_addr / 1024)); |
| 1082 | |
Zhao Yakui | 44d98a6 | 2009-10-09 11:39:40 +0800 | [diff] [blame] | 1083 | DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, PTE: 0x%08lx\n", gtt_addr, entry); |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1084 | |
| 1085 | /* Mask out these reserved bits on this hardware. */ |
| 1086 | if (!IS_I9XX(dev) || IS_I915G(dev) || IS_I915GM(dev) || |
| 1087 | IS_I945G(dev) || IS_I945GM(dev)) { |
| 1088 | entry &= ~PTE_ADDRESS_MASK_HIGH; |
| 1089 | } |
| 1090 | |
| 1091 | /* If it's not a mapping type we know, then bail. */ |
| 1092 | if ((entry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_UNCACHED && |
| 1093 | (entry & PTE_MAPPING_TYPE_MASK) != PTE_MAPPING_TYPE_CACHED) { |
| 1094 | iounmap(gtt); |
| 1095 | return 0; |
| 1096 | } |
| 1097 | |
| 1098 | if (!(entry & PTE_VALID)) { |
| 1099 | DRM_ERROR("bad GTT entry in stolen space\n"); |
| 1100 | iounmap(gtt); |
| 1101 | return 0; |
| 1102 | } |
| 1103 | |
| 1104 | iounmap(gtt); |
| 1105 | |
| 1106 | phys =(entry & PTE_ADDRESS_MASK) | |
| 1107 | ((uint64_t)(entry & PTE_ADDRESS_MASK_HIGH) << (32 - 4)); |
| 1108 | |
Zhao Yakui | 44d98a6 | 2009-10-09 11:39:40 +0800 | [diff] [blame] | 1109 | DRM_DEBUG_DRIVER("GTT addr: 0x%08lx, phys addr: 0x%08lx\n", gtt_addr, phys); |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1110 | |
| 1111 | return phys; |
| 1112 | } |
| 1113 | |
| 1114 | static void i915_warn_stolen(struct drm_device *dev) |
| 1115 | { |
| 1116 | DRM_ERROR("not enough stolen space for compressed buffer, disabling\n"); |
| 1117 | DRM_ERROR("hint: you may be able to increase stolen memory size in the BIOS to avoid this\n"); |
| 1118 | } |
| 1119 | |
| 1120 | static void i915_setup_compression(struct drm_device *dev, int size) |
| 1121 | { |
| 1122 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1123 | struct drm_mm_node *compressed_fb, *compressed_llb; |
| 1124 | unsigned long cfb_base, ll_base; |
| 1125 | |
| 1126 | /* Leave 1M for line length buffer & misc. */ |
| 1127 | compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0); |
| 1128 | if (!compressed_fb) { |
| 1129 | i915_warn_stolen(dev); |
| 1130 | return; |
| 1131 | } |
| 1132 | |
| 1133 | compressed_fb = drm_mm_get_block(compressed_fb, size, 4096); |
| 1134 | if (!compressed_fb) { |
| 1135 | i915_warn_stolen(dev); |
| 1136 | return; |
| 1137 | } |
| 1138 | |
Jesse Barnes | 74dff28 | 2009-09-14 15:39:40 -0700 | [diff] [blame] | 1139 | cfb_base = i915_gtt_to_phys(dev, compressed_fb->start); |
| 1140 | if (!cfb_base) { |
| 1141 | DRM_ERROR("failed to get stolen phys addr, disabling FBC\n"); |
| 1142 | drm_mm_put_block(compressed_fb); |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1143 | } |
| 1144 | |
Jesse Barnes | 74dff28 | 2009-09-14 15:39:40 -0700 | [diff] [blame] | 1145 | if (!IS_GM45(dev)) { |
| 1146 | compressed_llb = drm_mm_search_free(&dev_priv->vram, 4096, |
| 1147 | 4096, 0); |
| 1148 | if (!compressed_llb) { |
| 1149 | i915_warn_stolen(dev); |
| 1150 | return; |
| 1151 | } |
| 1152 | |
| 1153 | compressed_llb = drm_mm_get_block(compressed_llb, 4096, 4096); |
| 1154 | if (!compressed_llb) { |
| 1155 | i915_warn_stolen(dev); |
| 1156 | return; |
| 1157 | } |
| 1158 | |
| 1159 | ll_base = i915_gtt_to_phys(dev, compressed_llb->start); |
| 1160 | if (!ll_base) { |
| 1161 | DRM_ERROR("failed to get stolen phys addr, disabling FBC\n"); |
| 1162 | drm_mm_put_block(compressed_fb); |
| 1163 | drm_mm_put_block(compressed_llb); |
| 1164 | } |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1165 | } |
| 1166 | |
| 1167 | dev_priv->cfb_size = size; |
| 1168 | |
Jesse Barnes | 74dff28 | 2009-09-14 15:39:40 -0700 | [diff] [blame] | 1169 | if (IS_GM45(dev)) { |
| 1170 | g4x_disable_fbc(dev); |
| 1171 | I915_WRITE(DPFC_CB_BASE, compressed_fb->start); |
| 1172 | } else { |
| 1173 | i8xx_disable_fbc(dev); |
| 1174 | I915_WRITE(FBC_CFB_BASE, cfb_base); |
| 1175 | I915_WRITE(FBC_LL_BASE, ll_base); |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1176 | } |
| 1177 | |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1178 | DRM_DEBUG("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n", cfb_base, |
| 1179 | ll_base, size >> 20); |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1180 | } |
| 1181 | |
Dave Airlie | 28d5204 | 2009-09-21 14:33:58 +1000 | [diff] [blame] | 1182 | /* true = enable decode, false = disable decoder */ |
| 1183 | static unsigned int i915_vga_set_decode(void *cookie, bool state) |
| 1184 | { |
| 1185 | struct drm_device *dev = cookie; |
| 1186 | |
| 1187 | intel_modeset_vga_set_state(dev, state); |
| 1188 | if (state) |
| 1189 | return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM | |
| 1190 | VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; |
| 1191 | else |
| 1192 | return VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM; |
| 1193 | } |
| 1194 | |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 1195 | static int i915_load_modeset_init(struct drm_device *dev, |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1196 | unsigned long prealloc_start, |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 1197 | unsigned long prealloc_size, |
| 1198 | unsigned long agp_size) |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1199 | { |
| 1200 | struct drm_i915_private *dev_priv = dev->dev_private; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1201 | int fb_bar = IS_I9XX(dev) ? 2 : 0; |
| 1202 | int ret = 0; |
| 1203 | |
| 1204 | dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) & |
| 1205 | 0xff000000; |
| 1206 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1207 | /* Basic memrange allocator for stolen space (aka vram) */ |
| 1208 | drm_mm_init(&dev_priv->vram, 0, prealloc_size); |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1209 | DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024)); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1210 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 1211 | /* We're off and running w/KMS */ |
| 1212 | dev_priv->mm.suspended = 0; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1213 | |
Eric Anholt | 13f4c43 | 2009-05-12 15:27:36 -0700 | [diff] [blame] | 1214 | /* Let GEM Manage from end of prealloc space to end of aperture. |
| 1215 | * |
| 1216 | * However, leave one page at the end still bound to the scratch page. |
| 1217 | * There are a number of places where the hardware apparently |
| 1218 | * prefetches past the end of the object, and we've seen multiple |
| 1219 | * hangs with the GPU head pointer stuck in a batchbuffer bound |
| 1220 | * at the last page of the aperture. One page should be enough to |
| 1221 | * keep any prefetching inside of the aperture. |
| 1222 | */ |
| 1223 | i915_gem_do_init(dev, prealloc_size, agp_size - 4096); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1224 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 1225 | mutex_lock(&dev->struct_mutex); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1226 | ret = i915_gem_init_ringbuffer(dev); |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 1227 | mutex_unlock(&dev->struct_mutex); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1228 | if (ret) |
Dave Airlie | b8da7de | 2009-06-02 16:50:35 +1000 | [diff] [blame] | 1229 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1230 | |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1231 | /* Try to set up FBC with a reasonable compressed buffer size */ |
Shaohua Li | 9216d44 | 2009-10-10 15:20:55 +0800 | [diff] [blame] | 1232 | if (I915_HAS_FBC(dev) && i915_powersave) { |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1233 | int cfb_size; |
| 1234 | |
| 1235 | /* Try to get an 8M buffer... */ |
| 1236 | if (prealloc_size > (9*1024*1024)) |
| 1237 | cfb_size = 8*1024*1024; |
| 1238 | else /* fall back to 7/8 of the stolen space */ |
| 1239 | cfb_size = prealloc_size * 7 / 8; |
| 1240 | i915_setup_compression(dev, cfb_size); |
| 1241 | } |
| 1242 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1243 | /* Allow hardware batchbuffers unless told otherwise. |
| 1244 | */ |
| 1245 | dev_priv->allow_batchbuffer = 1; |
| 1246 | |
| 1247 | ret = intel_init_bios(dev); |
| 1248 | if (ret) |
| 1249 | DRM_INFO("failed to find VBIOS tables\n"); |
| 1250 | |
Dave Airlie | 28d5204 | 2009-09-21 14:33:58 +1000 | [diff] [blame] | 1251 | /* if we have > 1 VGA cards, then disable the radeon VGA resources */ |
| 1252 | ret = vga_client_register(dev->pdev, dev, NULL, i915_vga_set_decode); |
| 1253 | if (ret) |
| 1254 | goto destroy_ringbuffer; |
| 1255 | |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 1256 | intel_modeset_init(dev); |
| 1257 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1258 | ret = drm_irq_install(dev); |
| 1259 | if (ret) |
| 1260 | goto destroy_ringbuffer; |
| 1261 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1262 | /* Always safe in the mode setting case. */ |
| 1263 | /* FIXME: do pre/post-mode set stuff in core KMS code */ |
| 1264 | dev->vblank_disable_allowed = 1; |
| 1265 | |
| 1266 | /* |
| 1267 | * Initialize the hardware status page IRQ location. |
| 1268 | */ |
| 1269 | |
| 1270 | I915_WRITE(INSTPM, (1 << 5) | (1 << 21)); |
| 1271 | |
Jesse Barnes | 7a1fb5d | 2009-03-27 13:05:19 -0700 | [diff] [blame] | 1272 | drm_helper_initial_config(dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1273 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1274 | return 0; |
| 1275 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1276 | destroy_ringbuffer: |
| 1277 | i915_gem_cleanup_ringbuffer(dev); |
| 1278 | out: |
| 1279 | return ret; |
| 1280 | } |
| 1281 | |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 1282 | int i915_master_create(struct drm_device *dev, struct drm_master *master) |
| 1283 | { |
| 1284 | struct drm_i915_master_private *master_priv; |
| 1285 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1286 | master_priv = kzalloc(sizeof(*master_priv), GFP_KERNEL); |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 1287 | if (!master_priv) |
| 1288 | return -ENOMEM; |
| 1289 | |
| 1290 | master->driver_priv = master_priv; |
| 1291 | return 0; |
| 1292 | } |
| 1293 | |
| 1294 | void i915_master_destroy(struct drm_device *dev, struct drm_master *master) |
| 1295 | { |
| 1296 | struct drm_i915_master_private *master_priv = master->driver_priv; |
| 1297 | |
| 1298 | if (!master_priv) |
| 1299 | return; |
| 1300 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1301 | kfree(master_priv); |
Dave Airlie | 7c1c287 | 2008-11-28 14:22:24 +1000 | [diff] [blame] | 1302 | |
| 1303 | master->driver_priv = NULL; |
| 1304 | } |
| 1305 | |
Shaohua Li | 7662c8b | 2009-06-26 11:23:55 +0800 | [diff] [blame] | 1306 | static void i915_get_mem_freq(struct drm_device *dev) |
| 1307 | { |
| 1308 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1309 | u32 tmp; |
| 1310 | |
Adam Jackson | f2b115e | 2009-12-03 17:14:42 -0500 | [diff] [blame] | 1311 | if (!IS_PINEVIEW(dev)) |
Shaohua Li | 7662c8b | 2009-06-26 11:23:55 +0800 | [diff] [blame] | 1312 | return; |
| 1313 | |
| 1314 | tmp = I915_READ(CLKCFG); |
| 1315 | |
| 1316 | switch (tmp & CLKCFG_FSB_MASK) { |
| 1317 | case CLKCFG_FSB_533: |
| 1318 | dev_priv->fsb_freq = 533; /* 133*4 */ |
| 1319 | break; |
| 1320 | case CLKCFG_FSB_800: |
| 1321 | dev_priv->fsb_freq = 800; /* 200*4 */ |
| 1322 | break; |
| 1323 | case CLKCFG_FSB_667: |
| 1324 | dev_priv->fsb_freq = 667; /* 167*4 */ |
| 1325 | break; |
| 1326 | case CLKCFG_FSB_400: |
| 1327 | dev_priv->fsb_freq = 400; /* 100*4 */ |
| 1328 | break; |
| 1329 | } |
| 1330 | |
| 1331 | switch (tmp & CLKCFG_MEM_MASK) { |
| 1332 | case CLKCFG_MEM_533: |
| 1333 | dev_priv->mem_freq = 533; |
| 1334 | break; |
| 1335 | case CLKCFG_MEM_667: |
| 1336 | dev_priv->mem_freq = 667; |
| 1337 | break; |
| 1338 | case CLKCFG_MEM_800: |
| 1339 | dev_priv->mem_freq = 800; |
| 1340 | break; |
| 1341 | } |
| 1342 | } |
| 1343 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1344 | /** |
| 1345 | * i915_driver_load - setup chip and create an initial config |
| 1346 | * @dev: DRM device |
| 1347 | * @flags: startup flags |
| 1348 | * |
| 1349 | * The driver load routine has to do several things: |
| 1350 | * - drive output discovery via intel_modeset_init() |
| 1351 | * - initialize the memory manager |
| 1352 | * - allocate initial config memory |
| 1353 | * - setup the DRM framebuffer with the allocated memory |
| 1354 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 1355 | int i915_driver_load(struct drm_device *dev, unsigned long flags) |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 1356 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1357 | struct drm_i915_private *dev_priv = dev->dev_private; |
Benjamin Herrenschmidt | d883f7f | 2009-02-02 16:55:45 +1100 | [diff] [blame] | 1358 | resource_size_t base, size; |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 1359 | int ret = 0, mmio_bar; |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1360 | uint32_t agp_size, prealloc_size, prealloc_start; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1361 | |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 1362 | /* i915 has 4 more counters */ |
| 1363 | dev->counters += 4; |
| 1364 | dev->types[6] = _DRM_STAT_IRQ; |
| 1365 | dev->types[7] = _DRM_STAT_PRIMARY; |
| 1366 | dev->types[8] = _DRM_STAT_SECONDARY; |
| 1367 | dev->types[9] = _DRM_STAT_DMA; |
| 1368 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1369 | dev_priv = kzalloc(sizeof(drm_i915_private_t), GFP_KERNEL); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1370 | if (dev_priv == NULL) |
| 1371 | return -ENOMEM; |
| 1372 | |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1373 | dev->dev_private = (void *)dev_priv; |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1374 | dev_priv->dev = dev; |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 1375 | dev_priv->info = (struct intel_device_info *) flags; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1376 | |
| 1377 | /* Add register map (needed for suspend/resume) */ |
Kristian Høgsberg | cfdf1fa | 2009-12-16 15:16:16 -0500 | [diff] [blame] | 1378 | mmio_bar = IS_I9XX(dev) ? 0 : 1; |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1379 | base = drm_get_resource_start(dev, mmio_bar); |
| 1380 | size = drm_get_resource_len(dev, mmio_bar); |
| 1381 | |
Dave Airlie | ec2a4c3 | 2009-08-04 11:43:41 +1000 | [diff] [blame] | 1382 | if (i915_get_bridge_dev(dev)) { |
| 1383 | ret = -EIO; |
| 1384 | goto free_priv; |
| 1385 | } |
| 1386 | |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 1387 | dev_priv->regs = ioremap(base, size); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1388 | if (!dev_priv->regs) { |
| 1389 | DRM_ERROR("failed to map registers\n"); |
| 1390 | ret = -EIO; |
Dave Airlie | ec2a4c3 | 2009-08-04 11:43:41 +1000 | [diff] [blame] | 1391 | goto put_bridge; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1392 | } |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1393 | |
Eric Anholt | ab657db1 | 2009-01-23 12:57:47 -0800 | [diff] [blame] | 1394 | dev_priv->mm.gtt_mapping = |
| 1395 | io_mapping_create_wc(dev->agp->base, |
| 1396 | dev->agp->agp_info.aper_size * 1024*1024); |
Venkatesh Pallipadi | 6644107 | 2009-02-24 17:35:11 -0800 | [diff] [blame] | 1397 | if (dev_priv->mm.gtt_mapping == NULL) { |
| 1398 | ret = -EIO; |
| 1399 | goto out_rmmap; |
| 1400 | } |
| 1401 | |
Eric Anholt | ab657db1 | 2009-01-23 12:57:47 -0800 | [diff] [blame] | 1402 | /* Set up a WC MTRR for non-PAT systems. This is more common than |
| 1403 | * one would think, because the kernel disables PAT on first |
| 1404 | * generation Core chips because WC PAT gets overridden by a UC |
| 1405 | * MTRR if present. Even if a UC MTRR isn't present. |
| 1406 | */ |
| 1407 | dev_priv->mm.gtt_mtrr = mtrr_add(dev->agp->base, |
| 1408 | dev->agp->agp_info.aper_size * |
| 1409 | 1024 * 1024, |
| 1410 | MTRR_TYPE_WRCOMB, 1); |
| 1411 | if (dev_priv->mm.gtt_mtrr < 0) { |
Eric Anholt | 040aefa | 2009-03-10 12:31:12 -0700 | [diff] [blame] | 1412 | DRM_INFO("MTRR allocation failed. Graphics " |
Eric Anholt | ab657db1 | 2009-01-23 12:57:47 -0800 | [diff] [blame] | 1413 | "performance may suffer.\n"); |
| 1414 | } |
| 1415 | |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1416 | ret = i915_probe_agp(dev, &agp_size, &prealloc_size, &prealloc_start); |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 1417 | if (ret) |
| 1418 | goto out_iomapfree; |
| 1419 | |
Chris Wilson | aed5f1d | 2009-10-14 13:40:04 +0100 | [diff] [blame] | 1420 | dev_priv->wq = create_singlethread_workqueue("i915"); |
Eric Anholt | 9c9fe1f | 2009-08-03 16:09:16 -0700 | [diff] [blame] | 1421 | if (dev_priv->wq == NULL) { |
| 1422 | DRM_ERROR("Failed to create our workqueue.\n"); |
| 1423 | ret = -ENOMEM; |
| 1424 | goto out_iomapfree; |
| 1425 | } |
| 1426 | |
Dave Airlie | ac5c4e7 | 2008-12-19 15:38:34 +1000 | [diff] [blame] | 1427 | /* enable GEM by default */ |
| 1428 | dev_priv->has_gem = 1; |
Dave Airlie | ac5c4e7 | 2008-12-19 15:38:34 +1000 | [diff] [blame] | 1429 | |
Eric Anholt | 2a34f5e6 | 2009-07-02 09:30:50 -0700 | [diff] [blame] | 1430 | if (prealloc_size > agp_size * 3 / 4) { |
| 1431 | DRM_ERROR("Detected broken video BIOS with %d/%dkB of video " |
| 1432 | "memory stolen.\n", |
| 1433 | prealloc_size / 1024, agp_size / 1024); |
| 1434 | DRM_ERROR("Disabling GEM. (try reducing stolen memory or " |
| 1435 | "updating the BIOS to fix).\n"); |
| 1436 | dev_priv->has_gem = 0; |
| 1437 | } |
| 1438 | |
Jesse Barnes | 9880b7a | 2009-02-06 10:22:41 -0800 | [diff] [blame] | 1439 | dev->driver->get_vblank_counter = i915_get_vblank_counter; |
Jesse Barnes | 42c2798 | 2009-05-05 13:13:16 -0700 | [diff] [blame] | 1440 | dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ |
Adam Jackson | f2b115e | 2009-12-03 17:14:42 -0500 | [diff] [blame] | 1441 | if (IS_G4X(dev) || IS_IRONLAKE(dev)) { |
Jesse Barnes | 42c2798 | 2009-05-05 13:13:16 -0700 | [diff] [blame] | 1442 | dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */ |
Jesse Barnes | 9880b7a | 2009-02-06 10:22:41 -0800 | [diff] [blame] | 1443 | dev->driver->get_vblank_counter = gm45_get_vblank_counter; |
Jesse Barnes | 42c2798 | 2009-05-05 13:13:16 -0700 | [diff] [blame] | 1444 | } |
Jesse Barnes | 9880b7a | 2009-02-06 10:22:41 -0800 | [diff] [blame] | 1445 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1446 | i915_gem_load(dev); |
| 1447 | |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 1448 | /* Init HWS */ |
| 1449 | if (!I915_NEED_GFX_HWS(dev)) { |
| 1450 | ret = i915_init_phys_hws(dev); |
| 1451 | if (ret != 0) |
Eric Anholt | 9c9fe1f | 2009-08-03 16:09:16 -0700 | [diff] [blame] | 1452 | goto out_workqueue_free; |
Keith Packard | 398c9cb | 2008-07-30 13:03:43 -0700 | [diff] [blame] | 1453 | } |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1454 | |
Shaohua Li | 7662c8b | 2009-06-26 11:23:55 +0800 | [diff] [blame] | 1455 | i915_get_mem_freq(dev); |
| 1456 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1457 | /* On the 945G/GM, the chipset reports the MSI capability on the |
| 1458 | * integrated graphics even though the support isn't actually there |
| 1459 | * according to the published specs. It doesn't appear to function |
| 1460 | * correctly in testing on 945G. |
| 1461 | * This may be a side effect of MSI having been made available for PEG |
| 1462 | * and the registers being closely associated. |
Keith Packard | d1ed629 | 2008-10-17 00:44:42 -0700 | [diff] [blame] | 1463 | * |
| 1464 | * According to chipset errata, on the 965GM, MSI interrupts may |
Keith Packard | b60678a | 2008-12-08 11:12:28 -0800 | [diff] [blame] | 1465 | * be lost or delayed, but we use them anyways to avoid |
| 1466 | * stuck interrupts on some machines. |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1467 | */ |
Keith Packard | b60678a | 2008-12-08 11:12:28 -0800 | [diff] [blame] | 1468 | if (!IS_I945G(dev) && !IS_I945GM(dev)) |
Eric Anholt | d3e74d0 | 2008-11-03 14:46:17 -0800 | [diff] [blame] | 1469 | pci_enable_msi(dev->pdev); |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1470 | |
| 1471 | spin_lock_init(&dev_priv->user_irq_lock); |
Jesse Barnes | 63eeaf3 | 2009-06-18 16:56:52 -0700 | [diff] [blame] | 1472 | spin_lock_init(&dev_priv->error_lock); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1473 | dev_priv->user_irq_refcount = 0; |
Chris Wilson | 9d34e5d | 2009-09-24 05:26:06 +0100 | [diff] [blame] | 1474 | dev_priv->trace_irq_seqno = 0; |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1475 | |
Keith Packard | 5244021 | 2008-11-18 09:30:25 -0800 | [diff] [blame] | 1476 | ret = drm_vblank_init(dev, I915_NUM_PIPE); |
| 1477 | |
| 1478 | if (ret) { |
| 1479 | (void) i915_driver_unload(dev); |
| 1480 | return ret; |
| 1481 | } |
| 1482 | |
Ben Gamari | 11ed50e | 2009-09-14 17:48:45 -0400 | [diff] [blame] | 1483 | /* Start out suspended */ |
| 1484 | dev_priv->mm.suspended = 1; |
| 1485 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1486 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
Jesse Barnes | 8082400 | 2009-09-10 15:28:06 -0700 | [diff] [blame] | 1487 | ret = i915_load_modeset_init(dev, prealloc_start, |
| 1488 | prealloc_size, agp_size); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1489 | if (ret < 0) { |
| 1490 | DRM_ERROR("failed to init modeset\n"); |
Eric Anholt | 9c9fe1f | 2009-08-03 16:09:16 -0700 | [diff] [blame] | 1491 | goto out_workqueue_free; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1492 | } |
| 1493 | } |
| 1494 | |
Matthew Garrett | 74a365b | 2009-03-19 21:35:39 +0000 | [diff] [blame] | 1495 | /* Must be done after probing outputs */ |
Zhao Yakui | 01c6688 | 2009-10-28 05:10:00 +0000 | [diff] [blame] | 1496 | intel_opregion_init(dev, 0); |
Matthew Garrett | 74a365b | 2009-03-19 21:35:39 +0000 | [diff] [blame] | 1497 | |
Ben Gamari | f65d942 | 2009-09-14 17:48:44 -0400 | [diff] [blame] | 1498 | setup_timer(&dev_priv->hangcheck_timer, i915_hangcheck_elapsed, |
| 1499 | (unsigned long) dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1500 | return 0; |
| 1501 | |
Eric Anholt | 9c9fe1f | 2009-08-03 16:09:16 -0700 | [diff] [blame] | 1502 | out_workqueue_free: |
| 1503 | destroy_workqueue(dev_priv->wq); |
Venkatesh Pallipadi | 6644107 | 2009-02-24 17:35:11 -0800 | [diff] [blame] | 1504 | out_iomapfree: |
| 1505 | io_mapping_free(dev_priv->mm.gtt_mapping); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1506 | out_rmmap: |
| 1507 | iounmap(dev_priv->regs); |
Dave Airlie | ec2a4c3 | 2009-08-04 11:43:41 +1000 | [diff] [blame] | 1508 | put_bridge: |
| 1509 | pci_dev_put(dev_priv->bridge_dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1510 | free_priv: |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1511 | kfree(dev_priv); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1512 | return ret; |
| 1513 | } |
| 1514 | |
| 1515 | int i915_driver_unload(struct drm_device *dev) |
| 1516 | { |
| 1517 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 1518 | |
Eric Anholt | 9c9fe1f | 2009-08-03 16:09:16 -0700 | [diff] [blame] | 1519 | destroy_workqueue(dev_priv->wq); |
Ben Gamari | f65d942 | 2009-09-14 17:48:44 -0400 | [diff] [blame] | 1520 | del_timer_sync(&dev_priv->hangcheck_timer); |
Eric Anholt | 9c9fe1f | 2009-08-03 16:09:16 -0700 | [diff] [blame] | 1521 | |
Eric Anholt | ab657db1 | 2009-01-23 12:57:47 -0800 | [diff] [blame] | 1522 | io_mapping_free(dev_priv->mm.gtt_mapping); |
| 1523 | if (dev_priv->mm.gtt_mtrr >= 0) { |
| 1524 | mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base, |
| 1525 | dev->agp->agp_info.aper_size * 1024 * 1024); |
| 1526 | dev_priv->mm.gtt_mtrr = -1; |
| 1527 | } |
| 1528 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1529 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
Zhao Yakui | 6363ee6 | 2009-11-24 09:48:44 +0800 | [diff] [blame] | 1530 | /* |
| 1531 | * free the memory space allocated for the child device |
| 1532 | * config parsed from VBT |
| 1533 | */ |
| 1534 | if (dev_priv->child_dev && dev_priv->child_dev_num) { |
| 1535 | kfree(dev_priv->child_dev); |
| 1536 | dev_priv->child_dev = NULL; |
| 1537 | dev_priv->child_dev_num = 0; |
| 1538 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1539 | drm_irq_uninstall(dev); |
Dave Airlie | 28d5204 | 2009-09-21 14:33:58 +1000 | [diff] [blame] | 1540 | vga_client_register(dev->pdev, NULL, NULL, NULL); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1541 | } |
| 1542 | |
Eric Anholt | ed4cb41 | 2008-07-29 12:10:39 -0700 | [diff] [blame] | 1543 | if (dev->pdev->msi_enabled) |
| 1544 | pci_disable_msi(dev->pdev); |
| 1545 | |
Eric Anholt | 3043c60 | 2008-10-02 12:24:47 -0700 | [diff] [blame] | 1546 | if (dev_priv->regs != NULL) |
| 1547 | iounmap(dev_priv->regs); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1548 | |
Zhao Yakui | 01c6688 | 2009-10-28 05:10:00 +0000 | [diff] [blame] | 1549 | intel_opregion_free(dev, 0); |
Matthew Garrett | 8ee1c3d | 2008-08-05 19:37:25 +0100 | [diff] [blame] | 1550 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1551 | if (drm_core_check_feature(dev, DRIVER_MODESET)) { |
| 1552 | intel_modeset_cleanup(dev); |
| 1553 | |
Dave Airlie | 71acb5e | 2008-12-30 20:31:46 +1000 | [diff] [blame] | 1554 | i915_gem_free_all_phys_object(dev); |
| 1555 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1556 | mutex_lock(&dev->struct_mutex); |
| 1557 | i915_gem_cleanup_ringbuffer(dev); |
| 1558 | mutex_unlock(&dev->struct_mutex); |
| 1559 | drm_mm_takedown(&dev_priv->vram); |
| 1560 | i915_gem_lastclose(dev); |
Daniel Vetter | 02e792f | 2009-09-15 22:57:34 +0200 | [diff] [blame] | 1561 | |
| 1562 | intel_cleanup_overlay(dev); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1563 | } |
| 1564 | |
Dave Airlie | ec2a4c3 | 2009-08-04 11:43:41 +1000 | [diff] [blame] | 1565 | pci_dev_put(dev_priv->bridge_dev); |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1566 | kfree(dev->dev_private); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1567 | |
Dave Airlie | 22eae94 | 2005-11-10 22:16:34 +1100 | [diff] [blame] | 1568 | return 0; |
| 1569 | } |
| 1570 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1571 | int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv) |
| 1572 | { |
| 1573 | struct drm_i915_file_private *i915_file_priv; |
| 1574 | |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 1575 | DRM_DEBUG_DRIVER("\n"); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1576 | i915_file_priv = (struct drm_i915_file_private *) |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1577 | kmalloc(sizeof(*i915_file_priv), GFP_KERNEL); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1578 | |
| 1579 | if (!i915_file_priv) |
| 1580 | return -ENOMEM; |
| 1581 | |
| 1582 | file_priv->driver_priv = i915_file_priv; |
| 1583 | |
Eric Anholt | b962442 | 2009-06-03 07:27:35 +0000 | [diff] [blame] | 1584 | INIT_LIST_HEAD(&i915_file_priv->mm.request_list); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1585 | |
| 1586 | return 0; |
| 1587 | } |
| 1588 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1589 | /** |
| 1590 | * i915_driver_lastclose - clean up after all DRM clients have exited |
| 1591 | * @dev: DRM device |
| 1592 | * |
| 1593 | * Take care of cleaning up after all DRM clients have exited. In the |
| 1594 | * mode setting case, we want to restore the kernel's initial mode (just |
| 1595 | * in case the last client left us in a bad state). |
| 1596 | * |
| 1597 | * Additionally, in the non-mode setting case, we'll tear down the AGP |
| 1598 | * and DMA structures, since the kernel won't be using them, and clea |
| 1599 | * up any GEM state. |
| 1600 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 1601 | void i915_driver_lastclose(struct drm_device * dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1602 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1603 | drm_i915_private_t *dev_priv = dev->dev_private; |
| 1604 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1605 | if (!dev_priv || drm_core_check_feature(dev, DRIVER_MODESET)) { |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 1606 | drm_fb_helper_restore(); |
Dave Airlie | 144a75f | 2008-03-30 07:53:58 +1000 | [diff] [blame] | 1607 | return; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1608 | } |
Dave Airlie | 144a75f | 2008-03-30 07:53:58 +1000 | [diff] [blame] | 1609 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1610 | i915_gem_lastclose(dev); |
| 1611 | |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1612 | if (dev_priv->agp_heap) |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 1613 | i915_mem_takedown(&(dev_priv->agp_heap)); |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1614 | |
Dave Airlie | b5e89ed | 2005-09-25 14:28:13 +1000 | [diff] [blame] | 1615 | i915_dma_cleanup(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1616 | } |
| 1617 | |
Eric Anholt | 6c340ea | 2007-08-25 20:23:09 +1000 | [diff] [blame] | 1618 | void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1619 | { |
Jesse Barnes | ba8bbcf | 2007-11-22 14:14:14 +1000 | [diff] [blame] | 1620 | drm_i915_private_t *dev_priv = dev->dev_private; |
Eric Anholt | b962442 | 2009-06-03 07:27:35 +0000 | [diff] [blame] | 1621 | i915_gem_release(dev, file_priv); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1622 | if (!drm_core_check_feature(dev, DRIVER_MODESET)) |
| 1623 | i915_mem_release(dev, file_priv, dev_priv->agp_heap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1624 | } |
| 1625 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1626 | void i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv) |
| 1627 | { |
| 1628 | struct drm_i915_file_private *i915_file_priv = file_priv->driver_priv; |
| 1629 | |
Eric Anholt | 9a298b2 | 2009-03-24 12:23:04 -0700 | [diff] [blame] | 1630 | kfree(i915_file_priv); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1631 | } |
| 1632 | |
Eric Anholt | c153f45 | 2007-09-03 12:06:45 +1000 | [diff] [blame] | 1633 | struct drm_ioctl_desc i915_ioctls[] = { |
| 1634 | DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 1635 | DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH), |
| 1636 | DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH), |
| 1637 | DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH), |
| 1638 | DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH), |
| 1639 | DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH), |
| 1640 | DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH), |
| 1641 | DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 1642 | DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH), |
| 1643 | DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH), |
| 1644 | DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 1645 | DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH), |
| 1646 | DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP, i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ), |
| 1647 | DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE, i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ), |
| 1648 | DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH ), |
| 1649 | DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH), |
Matthias Hopf | 4b40893 | 2008-10-18 07:18:05 +1000 | [diff] [blame] | 1650 | DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
Dave Airlie | 2bdf00b | 2008-10-07 13:40:10 +1000 | [diff] [blame] | 1651 | DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1652 | DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH), |
Jesse Barnes | 76446ca | 2009-12-17 22:05:42 -0500 | [diff] [blame^] | 1653 | DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH), |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1654 | DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), |
| 1655 | DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY), |
| 1656 | DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH), |
| 1657 | DRM_IOCTL_DEF(DRM_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH), |
Dave Airlie | 2bdf00b | 2008-10-07 13:40:10 +1000 | [diff] [blame] | 1658 | DRM_IOCTL_DEF(DRM_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 1659 | DRM_IOCTL_DEF(DRM_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1660 | DRM_IOCTL_DEF(DRM_I915_GEM_CREATE, i915_gem_create_ioctl, 0), |
| 1661 | DRM_IOCTL_DEF(DRM_I915_GEM_PREAD, i915_gem_pread_ioctl, 0), |
| 1662 | DRM_IOCTL_DEF(DRM_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, 0), |
| 1663 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP, i915_gem_mmap_ioctl, 0), |
Jesse Barnes | de151cf | 2008-11-12 10:03:55 -0800 | [diff] [blame] | 1664 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, 0), |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1665 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, 0), |
| 1666 | DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, 0), |
| 1667 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, 0), |
| 1668 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, 0), |
Eric Anholt | 5a125c3 | 2008-10-22 21:40:13 -0700 | [diff] [blame] | 1669 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, 0), |
Carl Worth | 08d7b3d | 2009-04-29 14:43:54 -0700 | [diff] [blame] | 1670 | DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, 0), |
Chris Wilson | 3ef94da | 2009-09-14 16:50:29 +0100 | [diff] [blame] | 1671 | DRM_IOCTL_DEF(DRM_I915_GEM_MADVISE, i915_gem_madvise_ioctl, 0), |
Daniel Vetter | 02e792f | 2009-09-15 22:57:34 +0200 | [diff] [blame] | 1672 | DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW), |
| 1673 | DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW), |
Dave Airlie | c94f702 | 2005-07-07 21:03:38 +1000 | [diff] [blame] | 1674 | }; |
| 1675 | |
| 1676 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); |
Dave Airlie | cda1738 | 2005-07-10 17:31:26 +1000 | [diff] [blame] | 1677 | |
| 1678 | /** |
| 1679 | * Determine if the device really is AGP or not. |
| 1680 | * |
| 1681 | * All Intel graphics chipsets are treated as AGP, even if they are really |
| 1682 | * PCI-e. |
| 1683 | * |
| 1684 | * \param dev The device to be tested. |
| 1685 | * |
| 1686 | * \returns |
| 1687 | * A value of 1 is always retured to indictate every i9x5 is AGP. |
| 1688 | */ |
Dave Airlie | 84b1fd1 | 2007-07-11 15:53:27 +1000 | [diff] [blame] | 1689 | int i915_driver_device_is_agp(struct drm_device * dev) |
Dave Airlie | cda1738 | 2005-07-10 17:31:26 +1000 | [diff] [blame] | 1690 | { |
| 1691 | return 1; |
| 1692 | } |