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Graeme Gregorye5ce4202012-05-18 16:53:57 +01001/*
2 * Driver for Regulator part of Palmas PMIC Chips
3 *
Graeme Gregory7be859f2013-03-07 13:17:48 +00004 * Copyright 2011-2013 Texas Instruments Inc.
Graeme Gregorye5ce4202012-05-18 16:53:57 +01005 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
Graeme Gregorya7dddf22013-02-23 16:35:40 +00007 * Author: Ian Lartey <ian@slimlogic.co.uk>
Graeme Gregorye5ce4202012-05-18 16:53:57 +01008 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/slab.h>
24#include <linux/regmap.h>
25#include <linux/mfd/palmas.h>
Graeme Gregorya361cd92012-08-28 13:47:40 +020026#include <linux/of.h>
27#include <linux/of_platform.h>
28#include <linux/regulator/of_regulator.h>
Graeme Gregorye5ce4202012-05-18 16:53:57 +010029
Keerthydbabd622014-05-22 14:48:29 +053030static const struct regulator_linear_range smps_low_ranges[] = {
Nishanth Menon6b7f2d82014-06-04 14:34:31 -050031 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
Keerthydbabd622014-05-22 14:48:29 +053032 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
33 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
34 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
35};
36
37static const struct regulator_linear_range smps_high_ranges[] = {
Nishanth Menon6b7f2d82014-06-04 14:34:31 -050038 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
Keerthydbabd622014-05-22 14:48:29 +053039 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
40 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
41 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
42};
43
Nishanth Menon6839cd62014-06-30 10:57:37 -050044static struct palmas_regs_info palmas_generic_regs_info[] = {
Graeme Gregorye5ce4202012-05-18 16:53:57 +010045 {
46 .name = "SMPS12",
Laxman Dewangan504382c2013-03-20 19:26:37 +053047 .sname = "smps1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010048 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
49 .ctrl_addr = PALMAS_SMPS12_CTRL,
50 .tstep_addr = PALMAS_SMPS12_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053051 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010052 },
53 {
54 .name = "SMPS123",
Laxman Dewangan504382c2013-03-20 19:26:37 +053055 .sname = "smps1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010056 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
57 .ctrl_addr = PALMAS_SMPS12_CTRL,
58 .tstep_addr = PALMAS_SMPS12_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053059 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010060 },
61 {
62 .name = "SMPS3",
Laxman Dewangan504382c2013-03-20 19:26:37 +053063 .sname = "smps3-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010064 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
65 .ctrl_addr = PALMAS_SMPS3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053066 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010067 },
68 {
69 .name = "SMPS45",
Laxman Dewangan504382c2013-03-20 19:26:37 +053070 .sname = "smps4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010071 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
72 .ctrl_addr = PALMAS_SMPS45_CTRL,
73 .tstep_addr = PALMAS_SMPS45_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053074 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010075 },
76 {
77 .name = "SMPS457",
Laxman Dewangan504382c2013-03-20 19:26:37 +053078 .sname = "smps4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010079 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
80 .ctrl_addr = PALMAS_SMPS45_CTRL,
81 .tstep_addr = PALMAS_SMPS45_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053082 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010083 },
84 {
85 .name = "SMPS6",
Laxman Dewangan504382c2013-03-20 19:26:37 +053086 .sname = "smps6-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010087 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
88 .ctrl_addr = PALMAS_SMPS6_CTRL,
89 .tstep_addr = PALMAS_SMPS6_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053090 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010091 },
92 {
93 .name = "SMPS7",
Laxman Dewangan504382c2013-03-20 19:26:37 +053094 .sname = "smps7-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +010095 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
96 .ctrl_addr = PALMAS_SMPS7_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +053097 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
Graeme Gregorye5ce4202012-05-18 16:53:57 +010098 },
99 {
100 .name = "SMPS8",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530101 .sname = "smps8-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100102 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
103 .ctrl_addr = PALMAS_SMPS8_CTRL,
104 .tstep_addr = PALMAS_SMPS8_TSTEP,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530105 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100106 },
107 {
108 .name = "SMPS9",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530109 .sname = "smps9-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100110 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
111 .ctrl_addr = PALMAS_SMPS9_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530112 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100113 },
114 {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530115 .name = "SMPS10_OUT2",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530116 .sname = "smps10-in",
Axel Line31089c2013-04-19 20:33:45 +0800117 .ctrl_addr = PALMAS_SMPS10_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530118 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100119 },
120 {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530121 .name = "SMPS10_OUT1",
122 .sname = "smps10-out2",
123 .ctrl_addr = PALMAS_SMPS10_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530124 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530125 },
126 {
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100127 .name = "LDO1",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530128 .sname = "ldo1-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100129 .vsel_addr = PALMAS_LDO1_VOLTAGE,
130 .ctrl_addr = PALMAS_LDO1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530131 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100132 },
133 {
134 .name = "LDO2",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530135 .sname = "ldo2-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100136 .vsel_addr = PALMAS_LDO2_VOLTAGE,
137 .ctrl_addr = PALMAS_LDO2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530138 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100139 },
140 {
141 .name = "LDO3",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530142 .sname = "ldo3-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100143 .vsel_addr = PALMAS_LDO3_VOLTAGE,
144 .ctrl_addr = PALMAS_LDO3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530145 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100146 },
147 {
148 .name = "LDO4",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530149 .sname = "ldo4-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100150 .vsel_addr = PALMAS_LDO4_VOLTAGE,
151 .ctrl_addr = PALMAS_LDO4_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530152 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100153 },
154 {
155 .name = "LDO5",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530156 .sname = "ldo5-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100157 .vsel_addr = PALMAS_LDO5_VOLTAGE,
158 .ctrl_addr = PALMAS_LDO5_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530159 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100160 },
161 {
162 .name = "LDO6",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530163 .sname = "ldo6-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100164 .vsel_addr = PALMAS_LDO6_VOLTAGE,
165 .ctrl_addr = PALMAS_LDO6_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530166 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100167 },
168 {
169 .name = "LDO7",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530170 .sname = "ldo7-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100171 .vsel_addr = PALMAS_LDO7_VOLTAGE,
172 .ctrl_addr = PALMAS_LDO7_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530173 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100174 },
175 {
176 .name = "LDO8",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530177 .sname = "ldo8-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100178 .vsel_addr = PALMAS_LDO8_VOLTAGE,
179 .ctrl_addr = PALMAS_LDO8_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530180 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100181 },
182 {
183 .name = "LDO9",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530184 .sname = "ldo9-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100185 .vsel_addr = PALMAS_LDO9_VOLTAGE,
186 .ctrl_addr = PALMAS_LDO9_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530187 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100188 },
189 {
190 .name = "LDOLN",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530191 .sname = "ldoln-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100192 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
193 .ctrl_addr = PALMAS_LDOLN_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530194 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100195 },
196 {
197 .name = "LDOUSB",
Laxman Dewangan504382c2013-03-20 19:26:37 +0530198 .sname = "ldousb-in",
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100199 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
200 .ctrl_addr = PALMAS_LDOUSB_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530201 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100202 },
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530203 {
204 .name = "REGEN1",
205 .ctrl_addr = PALMAS_REGEN1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530206 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530207 },
208 {
209 .name = "REGEN2",
210 .ctrl_addr = PALMAS_REGEN2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530211 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530212 },
213 {
214 .name = "REGEN3",
215 .ctrl_addr = PALMAS_REGEN3_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530216 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530217 },
218 {
219 .name = "SYSEN1",
220 .ctrl_addr = PALMAS_SYSEN1_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530221 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530222 },
223 {
224 .name = "SYSEN2",
225 .ctrl_addr = PALMAS_SYSEN2_CTRL,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530226 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530227 },
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100228};
229
Nishanth Menone7cf34e2014-06-30 10:57:35 -0500230static struct palmas_regs_info tps65917_regs_info[] = {
Keerthyd6f83372014-06-18 15:29:00 +0530231 {
232 .name = "SMPS1",
233 .sname = "smps1-in",
234 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
235 .ctrl_addr = TPS65917_SMPS1_CTRL,
236 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
237 },
238 {
239 .name = "SMPS2",
240 .sname = "smps2-in",
241 .vsel_addr = TPS65917_SMPS2_VOLTAGE,
242 .ctrl_addr = TPS65917_SMPS2_CTRL,
243 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
244 },
245 {
246 .name = "SMPS3",
247 .sname = "smps3-in",
248 .vsel_addr = TPS65917_SMPS3_VOLTAGE,
249 .ctrl_addr = TPS65917_SMPS3_CTRL,
250 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
251 },
252 {
253 .name = "SMPS4",
254 .sname = "smps4-in",
255 .vsel_addr = TPS65917_SMPS4_VOLTAGE,
256 .ctrl_addr = TPS65917_SMPS4_CTRL,
257 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
258 },
259 {
260 .name = "SMPS5",
261 .sname = "smps5-in",
262 .vsel_addr = TPS65917_SMPS5_VOLTAGE,
263 .ctrl_addr = TPS65917_SMPS5_CTRL,
264 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
265 },
266 {
267 .name = "LDO1",
268 .sname = "ldo1-in",
269 .vsel_addr = TPS65917_LDO1_VOLTAGE,
270 .ctrl_addr = TPS65917_LDO1_CTRL,
271 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
272 },
273 {
274 .name = "LDO2",
275 .sname = "ldo2-in",
276 .vsel_addr = TPS65917_LDO2_VOLTAGE,
277 .ctrl_addr = TPS65917_LDO2_CTRL,
278 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
279 },
280 {
281 .name = "LDO3",
282 .sname = "ldo3-in",
283 .vsel_addr = TPS65917_LDO3_VOLTAGE,
284 .ctrl_addr = TPS65917_LDO3_CTRL,
285 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
286 },
287 {
288 .name = "LDO4",
289 .sname = "ldo4-in",
290 .vsel_addr = TPS65917_LDO4_VOLTAGE,
291 .ctrl_addr = TPS65917_LDO4_CTRL,
292 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
293 },
294 {
295 .name = "LDO5",
296 .sname = "ldo5-in",
297 .vsel_addr = TPS65917_LDO5_VOLTAGE,
298 .ctrl_addr = TPS65917_LDO5_CTRL,
299 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
300 },
301 {
302 .name = "REGEN1",
303 .ctrl_addr = TPS65917_REGEN1_CTRL,
304 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
305 },
306 {
307 .name = "REGEN2",
308 .ctrl_addr = TPS65917_REGEN2_CTRL,
309 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
310 },
311 {
312 .name = "REGEN3",
313 .ctrl_addr = TPS65917_REGEN3_CTRL,
314 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
315 },
316};
317
Keerthycac9e912014-06-18 15:28:59 +0530318#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
319 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
320 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
321 .reg_offset = _offset, \
322 .bit_pos = _pos, \
323 }
324
Nishanth Menon4b09e172014-06-30 10:57:34 -0500325static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
Keerthycac9e912014-06-18 15:28:59 +0530326 EXTERNAL_REQUESTOR(REGEN1, 0, 0),
327 EXTERNAL_REQUESTOR(REGEN2, 0, 1),
328 EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
329 EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
330 EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
331 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
332 EXTERNAL_REQUESTOR(REGEN3, 0, 6),
333 EXTERNAL_REQUESTOR(SMPS12, 1, 0),
334 EXTERNAL_REQUESTOR(SMPS3, 1, 1),
335 EXTERNAL_REQUESTOR(SMPS45, 1, 2),
336 EXTERNAL_REQUESTOR(SMPS6, 1, 3),
337 EXTERNAL_REQUESTOR(SMPS7, 1, 4),
338 EXTERNAL_REQUESTOR(SMPS8, 1, 5),
339 EXTERNAL_REQUESTOR(SMPS9, 1, 6),
340 EXTERNAL_REQUESTOR(SMPS10, 1, 7),
341 EXTERNAL_REQUESTOR(LDO1, 2, 0),
342 EXTERNAL_REQUESTOR(LDO2, 2, 1),
343 EXTERNAL_REQUESTOR(LDO3, 2, 2),
344 EXTERNAL_REQUESTOR(LDO4, 2, 3),
345 EXTERNAL_REQUESTOR(LDO5, 2, 4),
346 EXTERNAL_REQUESTOR(LDO6, 2, 5),
347 EXTERNAL_REQUESTOR(LDO7, 2, 6),
348 EXTERNAL_REQUESTOR(LDO8, 2, 7),
349 EXTERNAL_REQUESTOR(LDO9, 3, 0),
350 EXTERNAL_REQUESTOR(LDOLN, 3, 1),
351 EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
352};
353
Keerthyd6f83372014-06-18 15:29:00 +0530354#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
355 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
356 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
357 .reg_offset = _offset, \
358 .bit_pos = _pos, \
359 }
360
361static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
362 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
363 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
364 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
365 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
366 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
367 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
368 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
369 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
370 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
371 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
372 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
373 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
374 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
375};
376
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530377static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
378
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100379#define SMPS_CTRL_MODE_OFF 0x00
380#define SMPS_CTRL_MODE_ON 0x01
381#define SMPS_CTRL_MODE_ECO 0x02
382#define SMPS_CTRL_MODE_PWM 0x03
383
Laxman Dewangan0f45aa82013-09-04 15:20:06 +0530384#define PALMAS_SMPS_NUM_VOLTAGES 122
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100385#define PALMAS_SMPS10_NUM_VOLTAGES 2
386#define PALMAS_LDO_NUM_VOLTAGES 50
387
388#define SMPS10_VSEL (1<<3)
389#define SMPS10_BOOST_EN (1<<2)
390#define SMPS10_BYPASS_EN (1<<1)
391#define SMPS10_SWITCH_EN (1<<0)
392
393#define REGULATOR_SLAVE 0
394
395static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
396 unsigned int *dest)
397{
398 unsigned int addr;
399
400 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
401
402 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
403}
404
405static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
406 unsigned int value)
407{
408 unsigned int addr;
409
410 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
411
412 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
413}
414
415static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
416 unsigned int *dest)
417{
418 unsigned int addr;
419
420 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
421
422 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
423}
424
425static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
426 unsigned int value)
427{
428 unsigned int addr;
429
430 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
431
432 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
433}
434
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100435static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
436{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500437 int id = rdev_get_id(dev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100438 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
Keerthycac9e912014-06-18 15:28:59 +0530439 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500440 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100441 unsigned int reg;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530442 bool rail_enable = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100443
Nishanth Menoncf910b62014-06-30 10:57:36 -0500444 palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, &reg);
Keerthycac9e912014-06-18 15:28:59 +0530445
Axel Lin999f0c72012-06-07 17:08:21 +0800446 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100447
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530448 if (reg == SMPS_CTRL_MODE_OFF)
449 rail_enable = false;
450
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100451 switch (mode) {
452 case REGULATOR_MODE_NORMAL:
453 reg |= SMPS_CTRL_MODE_ON;
454 break;
455 case REGULATOR_MODE_IDLE:
456 reg |= SMPS_CTRL_MODE_ECO;
457 break;
458 case REGULATOR_MODE_FAST:
459 reg |= SMPS_CTRL_MODE_PWM;
460 break;
461 default:
462 return -EINVAL;
463 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100464
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530465 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
466 if (rail_enable)
Nishanth Menoncf910b62014-06-30 10:57:36 -0500467 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
Nishanth Menon318dbb02014-06-20 12:26:23 -0500468
469 /* Switch the enable value to ensure this is used for enable */
470 pmic->desc[id].enable_val = pmic->current_reg_mode[id];
471
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100472 return 0;
473}
474
475static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
476{
477 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
478 int id = rdev_get_id(dev);
479 unsigned int reg;
480
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +0530481 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100482
483 switch (reg) {
484 case SMPS_CTRL_MODE_ON:
485 return REGULATOR_MODE_NORMAL;
486 case SMPS_CTRL_MODE_ECO:
487 return REGULATOR_MODE_IDLE;
488 case SMPS_CTRL_MODE_PWM:
489 return REGULATOR_MODE_FAST;
490 }
491
492 return 0;
493}
494
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530495static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
496 int ramp_delay)
497{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500498 int id = rdev_get_id(rdev);
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530499 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
Keerthycac9e912014-06-18 15:28:59 +0530500 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500501 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530502 unsigned int reg = 0;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530503 int ret;
504
Axel Linf22c2ba2013-04-19 14:18:48 +0800505 /* SMPS3 and SMPS7 do not have tstep_addr setting */
506 switch (id) {
507 case PALMAS_REG_SMPS3:
508 case PALMAS_REG_SMPS7:
509 return 0;
510 }
511
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530512 if (ramp_delay <= 0)
513 reg = 0;
Axel Lin0ea34b52013-04-22 18:22:49 +0800514 else if (ramp_delay <= 2500)
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530515 reg = 3;
Axel Lin0ea34b52013-04-22 18:22:49 +0800516 else if (ramp_delay <= 5000)
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530517 reg = 2;
518 else
519 reg = 1;
520
Nishanth Menoncf910b62014-06-30 10:57:36 -0500521 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530522 if (ret < 0) {
523 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
524 return ret;
525 }
526
527 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
528 return ret;
529}
530
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100531static struct regulator_ops palmas_ops_smps = {
Keerthydbabd622014-05-22 14:48:29 +0530532 .is_enabled = regulator_is_enabled_regmap,
533 .enable = regulator_enable_regmap,
534 .disable = regulator_disable_regmap,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100535 .set_mode = palmas_set_mode_smps,
536 .get_mode = palmas_get_mode_smps,
Axel Linbdc4baa2012-11-29 10:01:44 +0800537 .get_voltage_sel = regulator_get_voltage_sel_regmap,
538 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Keerthydbabd622014-05-22 14:48:29 +0530539 .list_voltage = regulator_list_voltage_linear_range,
540 .map_voltage = regulator_map_voltage_linear_range,
541 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +0530542 .set_ramp_delay = palmas_smps_set_ramp_delay,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100543};
544
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530545static struct regulator_ops palmas_ops_ext_control_smps = {
546 .set_mode = palmas_set_mode_smps,
547 .get_mode = palmas_get_mode_smps,
548 .get_voltage_sel = regulator_get_voltage_sel_regmap,
549 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Keerthydbabd622014-05-22 14:48:29 +0530550 .list_voltage = regulator_list_voltage_linear_range,
551 .map_voltage = regulator_map_voltage_linear_range,
552 .set_voltage_time_sel = regulator_set_voltage_time_sel,
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530553 .set_ramp_delay = palmas_smps_set_ramp_delay,
554};
555
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100556static struct regulator_ops palmas_ops_smps10 = {
557 .is_enabled = regulator_is_enabled_regmap,
558 .enable = regulator_enable_regmap,
559 .disable = regulator_disable_regmap,
560 .get_voltage_sel = regulator_get_voltage_sel_regmap,
561 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Axel Lin8029a002012-05-22 12:26:42 +0800562 .list_voltage = regulator_list_voltage_linear,
563 .map_voltage = regulator_map_voltage_linear,
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530564 .set_bypass = regulator_set_bypass_regmap,
565 .get_bypass = regulator_get_bypass_regmap,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100566};
567
Keerthyd6f83372014-06-18 15:29:00 +0530568static struct regulator_ops tps65917_ops_smps = {
569 .is_enabled = regulator_is_enabled_regmap,
570 .enable = regulator_enable_regmap,
571 .disable = regulator_disable_regmap,
572 .set_mode = palmas_set_mode_smps,
573 .get_mode = palmas_get_mode_smps,
574 .get_voltage_sel = regulator_get_voltage_sel_regmap,
575 .set_voltage_sel = regulator_set_voltage_sel_regmap,
576 .list_voltage = regulator_list_voltage_linear_range,
577 .map_voltage = regulator_map_voltage_linear_range,
578 .set_voltage_time_sel = regulator_set_voltage_time_sel,
579};
580
581static struct regulator_ops tps65917_ops_ext_control_smps = {
582 .set_mode = palmas_set_mode_smps,
583 .get_mode = palmas_get_mode_smps,
584 .get_voltage_sel = regulator_get_voltage_sel_regmap,
585 .set_voltage_sel = regulator_set_voltage_sel_regmap,
586 .list_voltage = regulator_list_voltage_linear_range,
587 .map_voltage = regulator_map_voltage_linear_range,
588};
589
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100590static int palmas_is_enabled_ldo(struct regulator_dev *dev)
591{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500592 int id = rdev_get_id(dev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100593 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
Keerthycac9e912014-06-18 15:28:59 +0530594 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500595 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100596 unsigned int reg;
597
Nishanth Menoncf910b62014-06-30 10:57:36 -0500598 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, &reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100599
600 reg &= PALMAS_LDO1_CTRL_STATUS;
601
602 return !!(reg);
603}
604
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100605static struct regulator_ops palmas_ops_ldo = {
606 .is_enabled = palmas_is_enabled_ldo,
607 .enable = regulator_enable_regmap,
608 .disable = regulator_disable_regmap,
Axel Lin4a247a92012-07-18 12:34:08 +0800609 .get_voltage_sel = regulator_get_voltage_sel_regmap,
610 .set_voltage_sel = regulator_set_voltage_sel_regmap,
Axel Lin9119ff62012-11-27 10:27:34 +0800611 .list_voltage = regulator_list_voltage_linear,
612 .map_voltage = regulator_map_voltage_linear,
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100613};
614
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530615static struct regulator_ops palmas_ops_ext_control_ldo = {
616 .get_voltage_sel = regulator_get_voltage_sel_regmap,
617 .set_voltage_sel = regulator_set_voltage_sel_regmap,
618 .list_voltage = regulator_list_voltage_linear,
619 .map_voltage = regulator_map_voltage_linear,
620};
621
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530622static struct regulator_ops palmas_ops_extreg = {
623 .is_enabled = regulator_is_enabled_regmap,
624 .enable = regulator_enable_regmap,
625 .disable = regulator_disable_regmap,
626};
627
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530628static struct regulator_ops palmas_ops_ext_control_extreg = {
629};
630
Keerthyd6f83372014-06-18 15:29:00 +0530631static struct regulator_ops tps65917_ops_ldo = {
632 .is_enabled = palmas_is_enabled_ldo,
633 .enable = regulator_enable_regmap,
634 .disable = regulator_disable_regmap,
635 .get_voltage_sel = regulator_get_voltage_sel_regmap,
636 .set_voltage_sel = regulator_set_voltage_sel_regmap,
637 .list_voltage = regulator_list_voltage_linear,
638 .map_voltage = regulator_map_voltage_linear,
639 .set_voltage_time_sel = regulator_set_voltage_time_sel,
640};
641
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530642static int palmas_regulator_config_external(struct palmas *palmas, int id,
643 struct palmas_reg_init *reg_init)
644{
Nishanth Menoncf910b62014-06-30 10:57:36 -0500645 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
646 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530647 int ret;
648
Nishanth Menoncf910b62014-06-30 10:57:36 -0500649 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
650 reg_init->roof_floor, true);
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530651 if (ret < 0)
652 dev_err(palmas->dev,
653 "Ext control config for regulator %d failed %d\n",
654 id, ret);
655 return ret;
656}
657
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100658/*
659 * setup the hardware based sleep configuration of the SMPS/LDO regulators
660 * from the platform data. This is different to the software based control
661 * supported by the regulator framework as it is controlled by toggling
662 * pins on the PMIC such as PREQ, SYSEN, ...
663 */
664static int palmas_smps_init(struct palmas *palmas, int id,
665 struct palmas_reg_init *reg_init)
666{
667 unsigned int reg;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100668 int ret;
Keerthycac9e912014-06-18 15:28:59 +0530669 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500670 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
671 unsigned int addr = rinfo->ctrl_addr;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100672
673 ret = palmas_smps_read(palmas, addr, &reg);
674 if (ret)
675 return ret;
676
Axel Linfedd89b2012-06-06 20:01:38 +0800677 switch (id) {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +0530678 case PALMAS_REG_SMPS10_OUT1:
679 case PALMAS_REG_SMPS10_OUT2:
Laxman Dewangan30590d02013-04-17 15:13:11 +0530680 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
681 if (reg_init->mode_sleep)
Axel Linfedd89b2012-06-06 20:01:38 +0800682 reg |= reg_init->mode_sleep <<
683 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
Axel Linfedd89b2012-06-06 20:01:38 +0800684 break;
685 default:
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100686 if (reg_init->warm_reset)
687 reg |= PALMAS_SMPS12_CTRL_WR_S;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530688 else
689 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100690
691 if (reg_init->roof_floor)
692 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530693 else
694 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100695
Laxman Dewangan30590d02013-04-17 15:13:11 +0530696 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
697 if (reg_init->mode_sleep)
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100698 reg |= reg_init->mode_sleep <<
699 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100700 }
Axel Linfedd89b2012-06-06 20:01:38 +0800701
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100702 ret = palmas_smps_write(palmas, addr, reg);
703 if (ret)
704 return ret;
705
Nishanth Menoncf910b62014-06-30 10:57:36 -0500706 if (rinfo->vsel_addr && reg_init->vsel) {
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100707
708 reg = reg_init->vsel;
709
Nishanth Menoncf910b62014-06-30 10:57:36 -0500710 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100711 if (ret)
712 return ret;
713 }
714
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530715 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
716 (id != PALMAS_REG_SMPS10_OUT2)) {
717 /* Enable externally controlled regulator */
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530718 ret = palmas_smps_read(palmas, addr, &reg);
719 if (ret < 0)
720 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100721
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530722 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
723 reg |= SMPS_CTRL_MODE_ON;
724 ret = palmas_smps_write(palmas, addr, reg);
725 if (ret < 0)
726 return ret;
727 }
728 return palmas_regulator_config_external(palmas, id, reg_init);
729 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100730 return 0;
731}
732
733static int palmas_ldo_init(struct palmas *palmas, int id,
734 struct palmas_reg_init *reg_init)
735{
736 unsigned int reg;
737 unsigned int addr;
738 int ret;
Keerthycac9e912014-06-18 15:28:59 +0530739 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500740 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Keerthycac9e912014-06-18 15:28:59 +0530741
Nishanth Menoncf910b62014-06-30 10:57:36 -0500742 addr = rinfo->ctrl_addr;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100743
Axel Lin2735dae2012-07-18 12:31:59 +0800744 ret = palmas_ldo_read(palmas, addr, &reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100745 if (ret)
746 return ret;
747
748 if (reg_init->warm_reset)
749 reg |= PALMAS_LDO1_CTRL_WR_S;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530750 else
751 reg &= ~PALMAS_LDO1_CTRL_WR_S;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100752
753 if (reg_init->mode_sleep)
754 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
Laxman Dewangan30590d02013-04-17 15:13:11 +0530755 else
756 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100757
Axel Lin2735dae2012-07-18 12:31:59 +0800758 ret = palmas_ldo_write(palmas, addr, reg);
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100759 if (ret)
760 return ret;
761
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530762 if (reg_init->roof_floor) {
763 /* Enable externally controlled regulator */
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530764 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
765 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
766 PALMAS_LDO1_CTRL_MODE_ACTIVE);
767 if (ret < 0) {
768 dev_err(palmas->dev,
769 "LDO Register 0x%02x update failed %d\n",
770 addr, ret);
771 return ret;
772 }
773 return palmas_regulator_config_external(palmas, id, reg_init);
774 }
Graeme Gregorye5ce4202012-05-18 16:53:57 +0100775 return 0;
776}
777
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530778static int palmas_extreg_init(struct palmas *palmas, int id,
779 struct palmas_reg_init *reg_init)
780{
781 unsigned int addr;
782 int ret;
783 unsigned int val = 0;
Keerthycac9e912014-06-18 15:28:59 +0530784 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500785 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
Keerthycac9e912014-06-18 15:28:59 +0530786
Nishanth Menoncf910b62014-06-30 10:57:36 -0500787 addr = rinfo->ctrl_addr;
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530788
789 if (reg_init->mode_sleep)
790 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
791
792 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
793 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
794 if (ret < 0) {
795 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
796 addr, ret);
797 return ret;
798 }
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530799
800 if (reg_init->roof_floor) {
801 /* Enable externally controlled regulator */
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530802 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
803 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
804 PALMAS_REGEN1_CTRL_MODE_ACTIVE);
805 if (ret < 0) {
806 dev_err(palmas->dev,
807 "Resource Register 0x%02x update failed %d\n",
808 addr, ret);
809 return ret;
810 }
811 return palmas_regulator_config_external(palmas, id, reg_init);
812 }
Laxman Dewanganaa07f022013-04-17 15:13:12 +0530813 return 0;
814}
815
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530816static void palmas_enable_ldo8_track(struct palmas *palmas)
817{
818 unsigned int reg;
819 unsigned int addr;
820 int ret;
Keerthycac9e912014-06-18 15:28:59 +0530821 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500822 struct palmas_regs_info *rinfo;
Keerthycac9e912014-06-18 15:28:59 +0530823
Nishanth Menoncf910b62014-06-30 10:57:36 -0500824 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
825 addr = rinfo->ctrl_addr;
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530826
827 ret = palmas_ldo_read(palmas, addr, &reg);
828 if (ret) {
829 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
830 return;
831 }
832
833 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
834 ret = palmas_ldo_write(palmas, addr, reg);
835 if (ret < 0) {
836 dev_err(palmas->dev, "Error in enabling tracking mode\n");
837 return;
838 }
839 /*
840 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
841 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
842 * and can be set from 0.45 to 1.65 V.
843 */
Nishanth Menoncf910b62014-06-30 10:57:36 -0500844 addr = rinfo->vsel_addr;
Laxman Dewangan17c11a72013-04-17 15:13:13 +0530845 ret = palmas_ldo_read(palmas, addr, &reg);
846 if (ret) {
847 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
848 return;
849 }
850
851 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
852 ret = palmas_ldo_write(palmas, addr, reg);
853 if (ret < 0)
854 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
855
856 return;
857}
858
Keerthycac9e912014-06-18 15:28:59 +0530859static int palmas_ldo_registration(struct palmas_pmic *pmic,
860 struct palmas_pmic_driver_data *ddata,
861 struct palmas_pmic_platform_data *pdata,
862 const char *pdev_name,
863 struct regulator_config config)
Graeme Gregorya361cd92012-08-28 13:47:40 +0200864{
Keerthycac9e912014-06-18 15:28:59 +0530865 int id, ret;
866 struct regulator_dev *rdev;
867 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500868 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -0500869 struct regulator_desc *desc;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200870
Keerthycac9e912014-06-18 15:28:59 +0530871 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
872 if (pdata && pdata->reg_init[id])
873 reg_init = pdata->reg_init[id];
874 else
875 reg_init = NULL;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200876
Nishanth Menoncf910b62014-06-30 10:57:36 -0500877 rinfo = &ddata->palmas_regs_info[id];
Keerthycac9e912014-06-18 15:28:59 +0530878 /* Miss out regulators which are not available due
879 * to alternate functions.
880 */
Graeme Gregorya361cd92012-08-28 13:47:40 +0200881
Keerthycac9e912014-06-18 15:28:59 +0530882 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -0500883 desc = &pmic->desc[id];
884 desc->name = rinfo->name;
885 desc->id = id;
886 desc->type = REGULATOR_VOLTAGE;
887 desc->owner = THIS_MODULE;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200888
Keerthycac9e912014-06-18 15:28:59 +0530889 if (id < PALMAS_REG_REGEN1) {
Nishanth Menon429222d2014-06-30 10:57:38 -0500890 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
Keerthycac9e912014-06-18 15:28:59 +0530891 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -0500892 desc->ops = &palmas_ops_ext_control_ldo;
Keerthycac9e912014-06-18 15:28:59 +0530893 else
Nishanth Menon429222d2014-06-30 10:57:38 -0500894 desc->ops = &palmas_ops_ldo;
895 desc->min_uV = 900000;
896 desc->uV_step = 50000;
897 desc->linear_min_sel = 1;
898 desc->enable_time = 500;
899 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
900 rinfo->vsel_addr);
901 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
902 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
903 rinfo->ctrl_addr);
904 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200905
Keerthycac9e912014-06-18 15:28:59 +0530906 /* Check if LDO8 is in tracking mode or not */
907 if (pdata && (id == PALMAS_REG_LDO8) &&
908 pdata->enable_ldo8_tracking) {
909 palmas_enable_ldo8_track(pmic->palmas);
Nishanth Menon429222d2014-06-30 10:57:38 -0500910 desc->min_uV = 450000;
911 desc->uV_step = 25000;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530912 }
Keerthycac9e912014-06-18 15:28:59 +0530913
914 /* LOD6 in vibrator mode will have enable time 2000us */
915 if (pdata && pdata->ldo6_vibrator &&
916 (id == PALMAS_REG_LDO6))
Nishanth Menon429222d2014-06-30 10:57:38 -0500917 desc->enable_time = 2000;
Keerthycac9e912014-06-18 15:28:59 +0530918 } else {
Nishanth Menon429222d2014-06-30 10:57:38 -0500919 desc->n_voltages = 1;
Keerthycac9e912014-06-18 15:28:59 +0530920 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -0500921 desc->ops = &palmas_ops_ext_control_extreg;
Keerthycac9e912014-06-18 15:28:59 +0530922 else
Nishanth Menon429222d2014-06-30 10:57:38 -0500923 desc->ops = &palmas_ops_extreg;
924 desc->enable_reg =
Keerthycac9e912014-06-18 15:28:59 +0530925 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
Nishanth Menoncf910b62014-06-30 10:57:36 -0500926 rinfo->ctrl_addr);
Nishanth Menon429222d2014-06-30 10:57:38 -0500927 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +0530928 }
Graeme Gregorya361cd92012-08-28 13:47:40 +0200929
Keerthycac9e912014-06-18 15:28:59 +0530930 if (pdata)
931 config.init_data = pdata->reg_data[id];
932 else
933 config.init_data = NULL;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200934
Nishanth Menon429222d2014-06-30 10:57:38 -0500935 desc->supply_name = rinfo->sname;
Keerthycac9e912014-06-18 15:28:59 +0530936 config.of_node = ddata->palmas_matches[id].of_node;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200937
Nishanth Menon429222d2014-06-30 10:57:38 -0500938 rdev = devm_regulator_register(pmic->dev, desc, &config);
Keerthycac9e912014-06-18 15:28:59 +0530939 if (IS_ERR(rdev)) {
940 dev_err(pmic->dev,
941 "failed to register %s regulator\n",
942 pdev_name);
943 return PTR_ERR(rdev);
944 }
945
946 /* Save regulator for cleanup */
947 pmic->rdev[id] = rdev;
948
949 /* Initialise sleep/init values from platform data */
950 if (pdata) {
951 reg_init = pdata->reg_init[id];
952 if (reg_init) {
953 if (id <= ddata->ldo_end)
954 ret = palmas_ldo_init(pmic->palmas, id,
955 reg_init);
956 else
957 ret = palmas_extreg_init(pmic->palmas,
958 id, reg_init);
959 if (ret)
960 return ret;
961 }
962 }
Graeme Gregorya361cd92012-08-28 13:47:40 +0200963 }
964
Keerthycac9e912014-06-18 15:28:59 +0530965 return 0;
Graeme Gregorya361cd92012-08-28 13:47:40 +0200966}
967
Keerthyd6f83372014-06-18 15:29:00 +0530968static int tps65917_ldo_registration(struct palmas_pmic *pmic,
969 struct palmas_pmic_driver_data *ddata,
970 struct palmas_pmic_platform_data *pdata,
971 const char *pdev_name,
972 struct regulator_config config)
973{
974 int id, ret;
975 struct regulator_dev *rdev;
976 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -0500977 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -0500978 struct regulator_desc *desc;
Keerthyd6f83372014-06-18 15:29:00 +0530979
980 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
981 if (pdata && pdata->reg_init[id])
982 reg_init = pdata->reg_init[id];
983 else
984 reg_init = NULL;
985
986 /* Miss out regulators which are not available due
987 * to alternate functions.
988 */
Nishanth Menoncf910b62014-06-30 10:57:36 -0500989 rinfo = &ddata->palmas_regs_info[id];
Keerthyd6f83372014-06-18 15:29:00 +0530990
991 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -0500992 desc = &pmic->desc[id];
993 desc->name = rinfo->name;
994 desc->id = id;
995 desc->type = REGULATOR_VOLTAGE;
996 desc->owner = THIS_MODULE;
Keerthyd6f83372014-06-18 15:29:00 +0530997
998 if (id < TPS65917_REG_REGEN1) {
Nishanth Menon429222d2014-06-30 10:57:38 -0500999 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
Keerthyd6f83372014-06-18 15:29:00 +05301000 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001001 desc->ops = &palmas_ops_ext_control_ldo;
Keerthyd6f83372014-06-18 15:29:00 +05301002 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001003 desc->ops = &tps65917_ops_ldo;
1004 desc->min_uV = 900000;
1005 desc->uV_step = 50000;
1006 desc->linear_min_sel = 1;
1007 desc->enable_time = 500;
1008 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1009 rinfo->vsel_addr);
1010 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1011 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1012 rinfo->ctrl_addr);
1013 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
Keerthyd6f83372014-06-18 15:29:00 +05301014 /*
1015 * To be confirmed. Discussion on going with PMIC Team.
1016 * It is of the order of ~60mV/uS.
1017 */
Nishanth Menon429222d2014-06-30 10:57:38 -05001018 desc->ramp_delay = 2500;
Keerthyd6f83372014-06-18 15:29:00 +05301019 } else {
Nishanth Menon429222d2014-06-30 10:57:38 -05001020 desc->n_voltages = 1;
Keerthyd6f83372014-06-18 15:29:00 +05301021 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001022 desc->ops = &palmas_ops_ext_control_extreg;
Keerthyd6f83372014-06-18 15:29:00 +05301023 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001024 desc->ops = &palmas_ops_extreg;
1025 desc->enable_reg =
Keerthyd6f83372014-06-18 15:29:00 +05301026 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
Nishanth Menoncf910b62014-06-30 10:57:36 -05001027 rinfo->ctrl_addr);
Nishanth Menon429222d2014-06-30 10:57:38 -05001028 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
Keerthyd6f83372014-06-18 15:29:00 +05301029 }
1030
1031 if (pdata)
1032 config.init_data = pdata->reg_data[id];
1033 else
1034 config.init_data = NULL;
1035
Nishanth Menon429222d2014-06-30 10:57:38 -05001036 desc->supply_name = rinfo->sname;
Keerthyd6f83372014-06-18 15:29:00 +05301037 config.of_node = ddata->palmas_matches[id].of_node;
1038
Nishanth Menon429222d2014-06-30 10:57:38 -05001039 rdev = devm_regulator_register(pmic->dev, desc, &config);
Keerthyd6f83372014-06-18 15:29:00 +05301040 if (IS_ERR(rdev)) {
1041 dev_err(pmic->dev,
1042 "failed to register %s regulator\n",
1043 pdev_name);
1044 return PTR_ERR(rdev);
1045 }
1046
1047 /* Save regulator for cleanup */
1048 pmic->rdev[id] = rdev;
1049
1050 /* Initialise sleep/init values from platform data */
1051 if (pdata) {
1052 reg_init = pdata->reg_init[id];
1053 if (reg_init) {
1054 if (id < TPS65917_REG_REGEN1)
1055 ret = palmas_ldo_init(pmic->palmas,
1056 id, reg_init);
1057 else
1058 ret = palmas_extreg_init(pmic->palmas,
1059 id, reg_init);
1060 if (ret)
1061 return ret;
1062 }
1063 }
1064 }
1065
1066 return 0;
1067}
1068
Keerthycac9e912014-06-18 15:28:59 +05301069static int palmas_smps_registration(struct palmas_pmic *pmic,
1070 struct palmas_pmic_driver_data *ddata,
1071 struct palmas_pmic_platform_data *pdata,
1072 const char *pdev_name,
1073 struct regulator_config config)
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001074{
Keerthycac9e912014-06-18 15:28:59 +05301075 int id, ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001076 unsigned int addr, reg;
Keerthycac9e912014-06-18 15:28:59 +05301077 struct regulator_dev *rdev;
1078 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -05001079 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -05001080 struct regulator_desc *desc;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001081
Keerthycac9e912014-06-18 15:28:59 +05301082 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301083 bool ramp_delay_support = false;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001084
1085 /*
1086 * Miss out regulators which are not available due
1087 * to slaving configurations.
1088 */
1089 switch (id) {
1090 case PALMAS_REG_SMPS12:
1091 case PALMAS_REG_SMPS3:
1092 if (pmic->smps123)
1093 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301094 if (id == PALMAS_REG_SMPS12)
1095 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001096 break;
1097 case PALMAS_REG_SMPS123:
1098 if (!pmic->smps123)
1099 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301100 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001101 break;
1102 case PALMAS_REG_SMPS45:
1103 case PALMAS_REG_SMPS7:
1104 if (pmic->smps457)
1105 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301106 if (id == PALMAS_REG_SMPS45)
1107 ramp_delay_support = true;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001108 break;
1109 case PALMAS_REG_SMPS457:
1110 if (!pmic->smps457)
1111 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301112 ramp_delay_support = true;
1113 break;
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301114 case PALMAS_REG_SMPS10_OUT1:
1115 case PALMAS_REG_SMPS10_OUT2:
Keerthycac9e912014-06-18 15:28:59 +05301116 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
J Keerthy1ffb0be2013-06-19 11:27:48 +05301117 continue;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301118 }
Nishanth Menoncf910b62014-06-30 10:57:36 -05001119 rinfo = &ddata->palmas_regs_info[id];
Nishanth Menon429222d2014-06-30 10:57:38 -05001120 desc = &pmic->desc[id];
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301121
Sachin Kamat3f4d6362013-05-08 16:09:06 +05301122 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301123 ramp_delay_support = true;
1124
1125 if (ramp_delay_support) {
Nishanth Menoncf910b62014-06-30 10:57:36 -05001126 addr = rinfo->tstep_addr;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301127 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1128 if (ret < 0) {
Keerthycac9e912014-06-18 15:28:59 +05301129 dev_err(pmic->dev,
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301130 "reading TSTEP reg failed: %d\n", ret);
Sachin Kamat51c86b32013-09-04 12:01:01 +05301131 return ret;
Laxman Dewangan28d1e8c2013-04-18 18:32:47 +05301132 }
Nishanth Menon429222d2014-06-30 10:57:38 -05001133 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
1134 pmic->ramp_delay[id] = desc->ramp_delay;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001135 }
1136
Axel Linbdc4baa2012-11-29 10:01:44 +08001137 /* Initialise sleep/init values from platform data */
1138 if (pdata && pdata->reg_init[id]) {
1139 reg_init = pdata->reg_init[id];
Keerthycac9e912014-06-18 15:28:59 +05301140 ret = palmas_smps_init(pmic->palmas, id, reg_init);
Axel Linbdc4baa2012-11-29 10:01:44 +08001141 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301142 return ret;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301143 } else {
1144 reg_init = NULL;
Axel Linbdc4baa2012-11-29 10:01:44 +08001145 }
1146
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001147 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -05001148 desc->name = rinfo->name;
1149 desc->id = id;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001150
Axel Linfedd89b2012-06-06 20:01:38 +08001151 switch (id) {
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301152 case PALMAS_REG_SMPS10_OUT1:
1153 case PALMAS_REG_SMPS10_OUT2:
Nishanth Menon429222d2014-06-30 10:57:38 -05001154 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
1155 desc->ops = &palmas_ops_smps10;
1156 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1157 PALMAS_SMPS10_CTRL);
1158 desc->vsel_mask = SMPS10_VSEL;
1159 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1160 PALMAS_SMPS10_CTRL);
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301161 if (id == PALMAS_REG_SMPS10_OUT1)
Nishanth Menon429222d2014-06-30 10:57:38 -05001162 desc->enable_mask = SMPS10_SWITCH_EN;
Kishon Vijay Abraham I77409d92013-08-12 14:21:14 +05301163 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001164 desc->enable_mask = SMPS10_BOOST_EN;
1165 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1166 PALMAS_SMPS10_CTRL);
1167 desc->bypass_mask = SMPS10_BYPASS_EN;
1168 desc->min_uV = 3750000;
1169 desc->uV_step = 1250000;
Axel Linfedd89b2012-06-06 20:01:38 +08001170 break;
1171 default:
Axel Linbdc4baa2012-11-29 10:01:44 +08001172 /*
1173 * Read and store the RANGE bit for later use
1174 * This must be done before regulator is probed,
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301175 * otherwise we error in probe with unsupportable
1176 * ranges. Read the current smps mode for later use.
Axel Linbdc4baa2012-11-29 10:01:44 +08001177 */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001178 addr = rinfo->vsel_addr;
Nishanth Menon429222d2014-06-30 10:57:38 -05001179 desc->n_linear_ranges = 3;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001180
1181 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1182 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301183 return ret;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001184 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
1185 pmic->range[id] = 1;
Keerthydbabd622014-05-22 14:48:29 +05301186 if (pmic->range[id])
Nishanth Menon429222d2014-06-30 10:57:38 -05001187 desc->linear_ranges = smps_high_ranges;
Keerthydbabd622014-05-22 14:48:29 +05301188 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001189 desc->linear_ranges = smps_low_ranges;
Axel Linbdc4baa2012-11-29 10:01:44 +08001190
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301191 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001192 desc->ops = &palmas_ops_ext_control_smps;
Laxman Dewangan32b6d3f2013-08-21 16:18:16 +05301193 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001194 desc->ops = &palmas_ops_smps;
1195 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1196 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1197 rinfo->vsel_addr);
1198 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301199
1200 /* Read the smps mode for later use. */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001201 addr = rinfo->ctrl_addr;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301202 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1203 if (ret)
Sachin Kamat51c86b32013-09-04 12:01:01 +05301204 return ret;
Laxman Dewangan51d3a0c2013-04-18 18:32:48 +05301205 pmic->current_reg_mode[id] = reg &
1206 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Nishanth Menon318dbb02014-06-20 12:26:23 -05001207
Nishanth Menon429222d2014-06-30 10:57:38 -05001208 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1209 rinfo->ctrl_addr);
1210 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Nishanth Menon318dbb02014-06-20 12:26:23 -05001211 /* set_mode overrides this value */
Nishanth Menon429222d2014-06-30 10:57:38 -05001212 desc->enable_val = SMPS_CTRL_MODE_ON;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001213 }
1214
Nishanth Menon429222d2014-06-30 10:57:38 -05001215 desc->type = REGULATOR_VOLTAGE;
1216 desc->owner = THIS_MODULE;
Axel Linbdc4baa2012-11-29 10:01:44 +08001217
Graeme Gregorya361cd92012-08-28 13:47:40 +02001218 if (pdata)
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001219 config.init_data = pdata->reg_data[id];
1220 else
1221 config.init_data = NULL;
1222
Nishanth Menon429222d2014-06-30 10:57:38 -05001223 desc->supply_name = rinfo->sname;
Keerthycac9e912014-06-18 15:28:59 +05301224 config.of_node = ddata->palmas_matches[id].of_node;
Graeme Gregorya361cd92012-08-28 13:47:40 +02001225
Nishanth Menon429222d2014-06-30 10:57:38 -05001226 rdev = devm_regulator_register(pmic->dev, desc, &config);
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001227 if (IS_ERR(rdev)) {
Keerthycac9e912014-06-18 15:28:59 +05301228 dev_err(pmic->dev,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001229 "failed to register %s regulator\n",
Keerthycac9e912014-06-18 15:28:59 +05301230 pdev_name);
Sachin Kamat51c86b32013-09-04 12:01:01 +05301231 return PTR_ERR(rdev);
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001232 }
1233
1234 /* Save regulator for cleanup */
1235 pmic->rdev[id] = rdev;
1236 }
1237
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001238 return 0;
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001239}
1240
Keerthyd6f83372014-06-18 15:29:00 +05301241static int tps65917_smps_registration(struct palmas_pmic *pmic,
1242 struct palmas_pmic_driver_data *ddata,
1243 struct palmas_pmic_platform_data *pdata,
1244 const char *pdev_name,
1245 struct regulator_config config)
1246{
1247 int id, ret;
1248 unsigned int addr, reg;
1249 struct regulator_dev *rdev;
1250 struct palmas_reg_init *reg_init;
Nishanth Menoncf910b62014-06-30 10:57:36 -05001251 struct palmas_regs_info *rinfo;
Nishanth Menon429222d2014-06-30 10:57:38 -05001252 struct regulator_desc *desc;
Keerthyd6f83372014-06-18 15:29:00 +05301253
1254 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1255 /*
1256 * Miss out regulators which are not available due
1257 * to slaving configurations.
1258 */
Nishanth Menon429222d2014-06-30 10:57:38 -05001259 desc = &pmic->desc[id];
1260 desc->n_linear_ranges = 3;
Keerthyd6f83372014-06-18 15:29:00 +05301261 if ((id == TPS65917_REG_SMPS2) && pmic->smps12)
1262 continue;
1263
1264 /* Initialise sleep/init values from platform data */
1265 if (pdata && pdata->reg_init[id]) {
1266 reg_init = pdata->reg_init[id];
1267 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1268 if (ret)
1269 return ret;
1270 } else {
1271 reg_init = NULL;
1272 }
Nishanth Menoncf910b62014-06-30 10:57:36 -05001273 rinfo = &ddata->palmas_regs_info[id];
Keerthyd6f83372014-06-18 15:29:00 +05301274
1275 /* Register the regulators */
Nishanth Menon429222d2014-06-30 10:57:38 -05001276 desc->name = rinfo->name;
1277 desc->id = id;
Keerthyd6f83372014-06-18 15:29:00 +05301278
1279 /*
1280 * Read and store the RANGE bit for later use
1281 * This must be done before regulator is probed,
1282 * otherwise we error in probe with unsupportable
1283 * ranges. Read the current smps mode for later use.
1284 */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001285 addr = rinfo->vsel_addr;
Keerthyd6f83372014-06-18 15:29:00 +05301286
1287 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1288 if (ret)
1289 return ret;
1290 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
1291 pmic->range[id] = 1;
1292
1293 if (pmic->range[id])
Nishanth Menon429222d2014-06-30 10:57:38 -05001294 desc->linear_ranges = smps_high_ranges;
1295 else
1296 desc->linear_ranges = smps_low_ranges;
Keerthyd6f83372014-06-18 15:29:00 +05301297
1298 if (reg_init && reg_init->roof_floor)
Nishanth Menon429222d2014-06-30 10:57:38 -05001299 desc->ops = &tps65917_ops_ext_control_smps;
Keerthyd6f83372014-06-18 15:29:00 +05301300 else
Nishanth Menon429222d2014-06-30 10:57:38 -05001301 desc->ops = &tps65917_ops_smps;
1302 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1303 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1304 rinfo->vsel_addr);
1305 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1306 desc->ramp_delay = 2500;
Keerthyd6f83372014-06-18 15:29:00 +05301307
1308 /* Read the smps mode for later use. */
Nishanth Menoncf910b62014-06-30 10:57:36 -05001309 addr = rinfo->ctrl_addr;
Keerthyd6f83372014-06-18 15:29:00 +05301310 ret = palmas_smps_read(pmic->palmas, addr, &reg);
1311 if (ret)
1312 return ret;
1313 pmic->current_reg_mode[id] = reg &
1314 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
Nishanth Menonb6328152014-06-30 10:57:39 -05001315 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1316 rinfo->ctrl_addr);
1317 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1318 /* set_mode overrides this value */
1319 desc->enable_val = SMPS_CTRL_MODE_ON;
Keerthyd6f83372014-06-18 15:29:00 +05301320
Nishanth Menon429222d2014-06-30 10:57:38 -05001321 desc->type = REGULATOR_VOLTAGE;
1322 desc->owner = THIS_MODULE;
Keerthyd6f83372014-06-18 15:29:00 +05301323
1324 if (pdata)
1325 config.init_data = pdata->reg_data[id];
1326 else
1327 config.init_data = NULL;
1328
Nishanth Menon429222d2014-06-30 10:57:38 -05001329 desc->supply_name = rinfo->sname;
Keerthyd6f83372014-06-18 15:29:00 +05301330 config.of_node = ddata->palmas_matches[id].of_node;
1331
Nishanth Menon429222d2014-06-30 10:57:38 -05001332 rdev = devm_regulator_register(pmic->dev, desc, &config);
Keerthyd6f83372014-06-18 15:29:00 +05301333 if (IS_ERR(rdev)) {
1334 dev_err(pmic->dev,
1335 "failed to register %s regulator\n",
1336 pdev_name);
1337 return PTR_ERR(rdev);
1338 }
1339
1340 /* Save regulator for cleanup */
1341 pmic->rdev[id] = rdev;
1342 }
1343
1344 return 0;
1345}
1346
Keerthycac9e912014-06-18 15:28:59 +05301347static struct of_regulator_match palmas_matches[] = {
1348 { .name = "smps12", },
1349 { .name = "smps123", },
1350 { .name = "smps3", },
1351 { .name = "smps45", },
1352 { .name = "smps457", },
1353 { .name = "smps6", },
1354 { .name = "smps7", },
1355 { .name = "smps8", },
1356 { .name = "smps9", },
1357 { .name = "smps10_out2", },
1358 { .name = "smps10_out1", },
1359 { .name = "ldo1", },
1360 { .name = "ldo2", },
1361 { .name = "ldo3", },
1362 { .name = "ldo4", },
1363 { .name = "ldo5", },
1364 { .name = "ldo6", },
1365 { .name = "ldo7", },
1366 { .name = "ldo8", },
1367 { .name = "ldo9", },
1368 { .name = "ldoln", },
1369 { .name = "ldousb", },
1370 { .name = "regen1", },
1371 { .name = "regen2", },
1372 { .name = "regen3", },
1373 { .name = "sysen1", },
1374 { .name = "sysen2", },
1375};
1376
Keerthyd6f83372014-06-18 15:29:00 +05301377static struct of_regulator_match tps65917_matches[] = {
1378 { .name = "smps1", },
1379 { .name = "smps2", },
1380 { .name = "smps3", },
1381 { .name = "smps4", },
1382 { .name = "smps5", },
1383 { .name = "ldo1", },
1384 { .name = "ldo2", },
1385 { .name = "ldo3", },
1386 { .name = "ldo4", },
1387 { .name = "ldo5", },
1388 { .name = "regen1", },
1389 { .name = "regen2", },
1390 { .name = "regen3", },
1391 { .name = "sysen1", },
1392 { .name = "sysen2", },
1393};
1394
Nishanth Menon4b09e172014-06-30 10:57:34 -05001395static struct palmas_pmic_driver_data palmas_ddata = {
Keerthycac9e912014-06-18 15:28:59 +05301396 .smps_start = PALMAS_REG_SMPS12,
1397 .smps_end = PALMAS_REG_SMPS10_OUT1,
1398 .ldo_begin = PALMAS_REG_LDO1,
1399 .ldo_end = PALMAS_REG_LDOUSB,
1400 .max_reg = PALMAS_NUM_REGS,
Nishanth Menon6839cd62014-06-30 10:57:37 -05001401 .palmas_regs_info = palmas_generic_regs_info,
Keerthycac9e912014-06-18 15:28:59 +05301402 .palmas_matches = palmas_matches,
1403 .sleep_req_info = palma_sleep_req_info,
1404 .smps_register = palmas_smps_registration,
1405 .ldo_register = palmas_ldo_registration,
1406};
1407
Nishanth Menon4b09e172014-06-30 10:57:34 -05001408static struct palmas_pmic_driver_data tps65917_ddata = {
Keerthyd6f83372014-06-18 15:29:00 +05301409 .smps_start = TPS65917_REG_SMPS1,
1410 .smps_end = TPS65917_REG_SMPS5,
1411 .ldo_begin = TPS65917_REG_LDO1,
1412 .ldo_end = TPS65917_REG_LDO5,
1413 .max_reg = TPS65917_NUM_REGS,
1414 .palmas_regs_info = tps65917_regs_info,
1415 .palmas_matches = tps65917_matches,
1416 .sleep_req_info = tps65917_sleep_req_info,
1417 .smps_register = tps65917_smps_registration,
1418 .ldo_register = tps65917_ldo_registration,
1419};
1420
Keerthycac9e912014-06-18 15:28:59 +05301421static void palmas_dt_to_pdata(struct device *dev,
1422 struct device_node *node,
1423 struct palmas_pmic_platform_data *pdata,
1424 struct palmas_pmic_driver_data *ddata)
1425{
1426 struct device_node *regulators;
1427 u32 prop;
1428 int idx, ret;
1429
1430 node = of_node_get(node);
1431 regulators = of_get_child_by_name(node, "regulators");
1432 if (!regulators) {
1433 dev_info(dev, "regulator node not found\n");
1434 return;
1435 }
1436
1437 ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
1438 ddata->max_reg);
1439 of_node_put(regulators);
1440 if (ret < 0) {
1441 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
1442 return;
1443 }
1444
1445 for (idx = 0; idx < ddata->max_reg; idx++) {
1446 if (!ddata->palmas_matches[idx].init_data ||
1447 !ddata->palmas_matches[idx].of_node)
1448 continue;
1449
1450 pdata->reg_data[idx] = ddata->palmas_matches[idx].init_data;
1451
1452 pdata->reg_init[idx] = devm_kzalloc(dev,
1453 sizeof(struct palmas_reg_init), GFP_KERNEL);
1454
1455 pdata->reg_init[idx]->warm_reset =
1456 of_property_read_bool(ddata->palmas_matches[idx].of_node,
1457 "ti,warm-reset");
1458
1459 ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
1460 "ti,roof-floor", &prop);
1461 /* EINVAL: Property not found */
1462 if (ret != -EINVAL) {
1463 int econtrol;
1464
1465 /* use default value, when no value is specified */
1466 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1467 if (!ret) {
1468 switch (prop) {
1469 case 1:
1470 econtrol = PALMAS_EXT_CONTROL_ENABLE1;
1471 break;
1472 case 2:
1473 econtrol = PALMAS_EXT_CONTROL_ENABLE2;
1474 break;
1475 case 3:
1476 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1477 break;
1478 default:
1479 WARN_ON(1);
1480 dev_warn(dev,
1481 "%s: Invalid roof-floor option: %u\n",
1482 palmas_matches[idx].name, prop);
1483 break;
1484 }
1485 }
1486 pdata->reg_init[idx]->roof_floor = econtrol;
1487 }
1488
1489 ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
1490 "ti,mode-sleep", &prop);
1491 if (!ret)
1492 pdata->reg_init[idx]->mode_sleep = prop;
1493
1494 ret = of_property_read_bool(ddata->palmas_matches[idx].of_node,
1495 "ti,smps-range");
1496 if (ret)
1497 pdata->reg_init[idx]->vsel =
1498 PALMAS_SMPS12_VOLTAGE_RANGE;
1499
1500 if (idx == PALMAS_REG_LDO8)
1501 pdata->enable_ldo8_tracking = of_property_read_bool(
1502 ddata->palmas_matches[idx].of_node,
1503 "ti,enable-ldo8-tracking");
1504 }
1505
1506 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
1507}
1508
1509static struct of_device_id of_palmas_match_tbl[] = {
1510 {
1511 .compatible = "ti,palmas-pmic",
1512 .data = &palmas_ddata,
1513 },
1514 {
1515 .compatible = "ti,twl6035-pmic",
1516 .data = &palmas_ddata,
1517 },
1518 {
1519 .compatible = "ti,twl6036-pmic",
1520 .data = &palmas_ddata,
1521 },
1522 {
1523 .compatible = "ti,twl6037-pmic",
1524 .data = &palmas_ddata,
1525 },
1526 {
1527 .compatible = "ti,tps65913-pmic",
1528 .data = &palmas_ddata,
1529 },
1530 {
1531 .compatible = "ti,tps65914-pmic",
1532 .data = &palmas_ddata,
1533 },
1534 {
1535 .compatible = "ti,tps80036-pmic",
1536 .data = &palmas_ddata,
1537 },
1538 {
1539 .compatible = "ti,tps659038-pmic",
1540 .data = &palmas_ddata,
1541 },
Keerthyd6f83372014-06-18 15:29:00 +05301542 {
1543 .compatible = "ti,tps65917-pmic",
1544 .data = &tps65917_ddata,
1545 },
Graeme Gregorya361cd92012-08-28 13:47:40 +02001546 { /* end */ }
1547};
1548
Keerthycac9e912014-06-18 15:28:59 +05301549static int palmas_regulators_probe(struct platform_device *pdev)
1550{
1551 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
1552 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
1553 struct device_node *node = pdev->dev.of_node;
1554 struct palmas_pmic_driver_data *driver_data;
1555 struct regulator_config config = { };
1556 struct palmas_pmic *pmic;
1557 const char *pdev_name;
1558 const struct of_device_id *match;
1559 int ret = 0;
1560 unsigned int reg;
1561
1562 match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
1563
1564 if (!match)
1565 return -ENODATA;
1566
1567 driver_data = (struct palmas_pmic_driver_data *)match->data;
1568 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1569 if (!pdata)
1570 return -ENOMEM;
1571
1572 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1573 if (!pmic)
1574 return -ENOMEM;
1575
1576 pmic->dev = &pdev->dev;
1577 pmic->palmas = palmas;
1578 palmas->pmic = pmic;
1579 platform_set_drvdata(pdev, pmic);
1580 pmic->palmas->pmic_ddata = driver_data;
1581
1582 palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
1583
1584 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
1585 if (ret)
1586 return ret;
1587
1588 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
1589 pmic->smps123 = 1;
1590
1591 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
1592 pmic->smps457 = 1;
1593
1594 config.regmap = palmas->regmap[REGULATOR_SLAVE];
1595 config.dev = &pdev->dev;
1596 config.driver_data = pmic;
1597 pdev_name = pdev->name;
1598
1599 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
1600 config);
1601 if (ret)
1602 return ret;
1603
1604 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
1605 config);
1606
1607 return ret;
1608}
1609
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001610static struct platform_driver palmas_driver = {
1611 .driver = {
1612 .name = "palmas-pmic",
Graeme Gregorya361cd92012-08-28 13:47:40 +02001613 .of_match_table = of_palmas_match_tbl,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001614 .owner = THIS_MODULE,
1615 },
Laxman Dewanganbbcf50b2013-03-18 14:59:49 +05301616 .probe = palmas_regulators_probe,
Graeme Gregorye5ce4202012-05-18 16:53:57 +01001617};
1618
1619static int __init palmas_init(void)
1620{
1621 return platform_driver_register(&palmas_driver);
1622}
1623subsys_initcall(palmas_init);
1624
1625static void __exit palmas_exit(void)
1626{
1627 platform_driver_unregister(&palmas_driver);
1628}
1629module_exit(palmas_exit);
1630
1631MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1632MODULE_DESCRIPTION("Palmas voltage regulator driver");
1633MODULE_LICENSE("GPL");
1634MODULE_ALIAS("platform:palmas-pmic");
Graeme Gregorya361cd92012-08-28 13:47:40 +02001635MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);