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Ivo van Doorn95ea3622007-09-25 17:57:13 -07001/*
Gertjan van Wingerde9c9a0d12009-11-08 16:39:55 +01002 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
Ivo van Doorn95ea3622007-09-25 17:57:13 -07003 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt73usb
23 Abstract: rt73usb device specific routines.
24 Supported chipsets: rt2571W & rt2671.
25 */
26
Ivo van Doorna7f3a062008-03-09 22:44:54 +010027#include <linux/crc-itu-t.h>
Ivo van Doorn95ea3622007-09-25 17:57:13 -070028#include <linux/delay.h>
29#include <linux/etherdevice.h>
30#include <linux/init.h>
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/usb.h>
34
35#include "rt2x00.h"
36#include "rt2x00usb.h"
37#include "rt73usb.h"
38
39/*
Ivo van Doorn008c4482008-08-06 17:27:31 +020040 * Allow hardware encryption to be disabled.
41 */
42static int modparam_nohwcrypt = 0;
43module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
44MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
45
46/*
Ivo van Doorn95ea3622007-09-25 17:57:13 -070047 * Register access.
48 * All access to the CSR registers will go through the methods
Ivo van Doorn0f829b12008-11-10 19:42:18 +010049 * rt2x00usb_register_read and rt2x00usb_register_write.
Ivo van Doorn95ea3622007-09-25 17:57:13 -070050 * BBP and RF register require indirect register access,
51 * and use the CSR registers BBPCSR and RFCSR to achieve this.
52 * These indirect registers work with busy bits,
53 * and we will try maximal REGISTER_BUSY_COUNT times to access
54 * the register while taking a REGISTER_BUSY_DELAY us delay
55 * between each attampt. When the busy bit is still set at that time,
56 * the access attempt is considered to have failed,
57 * and we will print an error.
Ivo van Doorn8ff48a82008-11-09 23:40:46 +010058 * The _lock versions must be used if you already hold the csr_mutex
Ivo van Doorn95ea3622007-09-25 17:57:13 -070059 */
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +010060#define WAIT_FOR_BBP(__dev, __reg) \
Ivo van Doorn0f829b12008-11-10 19:42:18 +010061 rt2x00usb_regbusy_read((__dev), PHY_CSR3, PHY_CSR3_BUSY, (__reg))
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +010062#define WAIT_FOR_RF(__dev, __reg) \
Ivo van Doorn0f829b12008-11-10 19:42:18 +010063 rt2x00usb_regbusy_read((__dev), PHY_CSR4, PHY_CSR4_BUSY, (__reg))
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +010064
Adam Baker0e14f6d2007-10-27 13:41:25 +020065static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
Ivo van Doorn95ea3622007-09-25 17:57:13 -070066 const unsigned int word, const u8 value)
67{
68 u32 reg;
69
Ivo van Doorn8ff48a82008-11-09 23:40:46 +010070 mutex_lock(&rt2x00dev->csr_mutex);
Adam Baker3d823462007-10-27 13:43:29 +020071
Ivo van Doorn95ea3622007-09-25 17:57:13 -070072 /*
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +010073 * Wait until the BBP becomes available, afterwards we
74 * can safely write the new data into the register.
Ivo van Doorn95ea3622007-09-25 17:57:13 -070075 */
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +010076 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
77 reg = 0;
78 rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
79 rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
80 rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
81 rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
Ivo van Doorn95ea3622007-09-25 17:57:13 -070082
Ivo van Doorn0f829b12008-11-10 19:42:18 +010083 rt2x00usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +010084 }
Ivo van Doorn95ea3622007-09-25 17:57:13 -070085
Ivo van Doorn8ff48a82008-11-09 23:40:46 +010086 mutex_unlock(&rt2x00dev->csr_mutex);
Ivo van Doorn95ea3622007-09-25 17:57:13 -070087}
88
Adam Baker0e14f6d2007-10-27 13:41:25 +020089static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
Ivo van Doorn95ea3622007-09-25 17:57:13 -070090 const unsigned int word, u8 *value)
91{
92 u32 reg;
93
Ivo van Doorn8ff48a82008-11-09 23:40:46 +010094 mutex_lock(&rt2x00dev->csr_mutex);
Adam Baker3d823462007-10-27 13:43:29 +020095
Ivo van Doorn95ea3622007-09-25 17:57:13 -070096 /*
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +010097 * Wait until the BBP becomes available, afterwards we
98 * can safely write the read request into the register.
99 * After the data has been written, we wait until hardware
100 * returns the correct value, if at any time the register
101 * doesn't become available in time, reg will be 0xffffffff
102 * which means we return 0xff to the caller.
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700103 */
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +0100104 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
105 reg = 0;
106 rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
107 rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
108 rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700109
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100110 rt2x00usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700111
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +0100112 WAIT_FOR_BBP(rt2x00dev, &reg);
113 }
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700114
115 *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +0100116
Ivo van Doorn8ff48a82008-11-09 23:40:46 +0100117 mutex_unlock(&rt2x00dev->csr_mutex);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700118}
119
Adam Baker0e14f6d2007-10-27 13:41:25 +0200120static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700121 const unsigned int word, const u32 value)
122{
123 u32 reg;
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700124
Ivo van Doorn8ff48a82008-11-09 23:40:46 +0100125 mutex_lock(&rt2x00dev->csr_mutex);
Adam Baker3d823462007-10-27 13:43:29 +0200126
Ivo van Doorn4f5af6eb2007-10-06 14:16:30 +0200127 /*
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +0100128 * Wait until the RF becomes available, afterwards we
129 * can safely write the new data into the register.
Ivo van Doorn4f5af6eb2007-10-06 14:16:30 +0200130 */
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +0100131 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
132 reg = 0;
133 rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
134 /*
135 * RF5225 and RF2527 contain 21 bits per RF register value,
136 * all others contain 20 bits.
137 */
138 rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
Gertjan van Wingerde5122d892009-12-23 00:03:25 +0100139 20 + (rt2x00_rf(rt2x00dev, RF5225) ||
140 rt2x00_rf(rt2x00dev, RF2527)));
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +0100141 rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
142 rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700143
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100144 rt2x00usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
Ivo van Doornc9c3b1a2008-11-10 19:41:40 +0100145 rt2x00_rf_write(rt2x00dev, word, value);
146 }
Ivo van Doorn8ff48a82008-11-09 23:40:46 +0100147
148 mutex_unlock(&rt2x00dev->csr_mutex);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700149}
150
151#ifdef CONFIG_RT2X00_LIB_DEBUGFS
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700152static const struct rt2x00debug rt73usb_rt2x00debug = {
153 .owner = THIS_MODULE,
154 .csr = {
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100155 .read = rt2x00usb_register_read,
156 .write = rt2x00usb_register_write,
Ivo van Doorn743b97c2008-10-29 19:41:03 +0100157 .flags = RT2X00DEBUGFS_OFFSET,
158 .word_base = CSR_REG_BASE,
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700159 .word_size = sizeof(u32),
160 .word_count = CSR_REG_SIZE / sizeof(u32),
161 },
162 .eeprom = {
163 .read = rt2x00_eeprom_read,
164 .write = rt2x00_eeprom_write,
Ivo van Doorn743b97c2008-10-29 19:41:03 +0100165 .word_base = EEPROM_BASE,
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700166 .word_size = sizeof(u16),
167 .word_count = EEPROM_SIZE / sizeof(u16),
168 },
169 .bbp = {
170 .read = rt73usb_bbp_read,
171 .write = rt73usb_bbp_write,
Ivo van Doorn743b97c2008-10-29 19:41:03 +0100172 .word_base = BBP_BASE,
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700173 .word_size = sizeof(u8),
174 .word_count = BBP_SIZE / sizeof(u8),
175 },
176 .rf = {
177 .read = rt2x00_rf_read,
178 .write = rt73usb_rf_write,
Ivo van Doorn743b97c2008-10-29 19:41:03 +0100179 .word_base = RF_BASE,
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700180 .word_size = sizeof(u32),
181 .word_count = RF_SIZE / sizeof(u32),
182 },
183};
184#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
185
Ivo van Doorn7396faf2008-12-20 10:55:57 +0100186static int rt73usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
187{
188 u32 reg;
189
190 rt2x00usb_register_read(rt2x00dev, MAC_CSR13, &reg);
191 return rt2x00_get_field32(reg, MAC_CSR13_BIT7);
192}
Ivo van Doorn7396faf2008-12-20 10:55:57 +0100193
Ivo van Doorn771fd562008-09-08 19:07:15 +0200194#ifdef CONFIG_RT2X00_LIB_LEDS
Ivo van Doorna2e1d522008-03-31 15:53:44 +0200195static void rt73usb_brightness_set(struct led_classdev *led_cdev,
Ivo van Doorna9450b72008-02-03 15:53:40 +0100196 enum led_brightness brightness)
197{
198 struct rt2x00_led *led =
199 container_of(led_cdev, struct rt2x00_led, led_dev);
200 unsigned int enabled = brightness != LED_OFF;
201 unsigned int a_mode =
202 (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_5GHZ);
203 unsigned int bg_mode =
204 (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
205
206 if (led->type == LED_TYPE_RADIO) {
207 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
208 MCU_LEDCS_RADIO_STATUS, enabled);
209
Ivo van Doorn47b10cd2008-02-17 17:35:28 +0100210 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
211 0, led->rt2x00dev->led_mcu_reg,
212 REGISTER_TIMEOUT);
Ivo van Doorna9450b72008-02-03 15:53:40 +0100213 } else if (led->type == LED_TYPE_ASSOC) {
214 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
215 MCU_LEDCS_LINK_BG_STATUS, bg_mode);
216 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
217 MCU_LEDCS_LINK_A_STATUS, a_mode);
218
Ivo van Doorn47b10cd2008-02-17 17:35:28 +0100219 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
220 0, led->rt2x00dev->led_mcu_reg,
221 REGISTER_TIMEOUT);
Ivo van Doorna9450b72008-02-03 15:53:40 +0100222 } else if (led->type == LED_TYPE_QUALITY) {
223 /*
224 * The brightness is divided into 6 levels (0 - 5),
225 * this means we need to convert the brightness
226 * argument into the matching level within that range.
227 */
Ivo van Doorn47b10cd2008-02-17 17:35:28 +0100228 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
229 brightness / (LED_FULL / 6),
230 led->rt2x00dev->led_mcu_reg,
231 REGISTER_TIMEOUT);
Ivo van Doorna9450b72008-02-03 15:53:40 +0100232 }
233}
Ivo van Doorna2e1d522008-03-31 15:53:44 +0200234
235static int rt73usb_blink_set(struct led_classdev *led_cdev,
236 unsigned long *delay_on,
237 unsigned long *delay_off)
238{
239 struct rt2x00_led *led =
240 container_of(led_cdev, struct rt2x00_led, led_dev);
241 u32 reg;
242
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100243 rt2x00usb_register_read(led->rt2x00dev, MAC_CSR14, &reg);
Ivo van Doorna2e1d522008-03-31 15:53:44 +0200244 rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, *delay_on);
245 rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, *delay_off);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100246 rt2x00usb_register_write(led->rt2x00dev, MAC_CSR14, reg);
Ivo van Doorna2e1d522008-03-31 15:53:44 +0200247
248 return 0;
249}
Ivo van Doorn475433b2008-06-03 20:30:01 +0200250
251static void rt73usb_init_led(struct rt2x00_dev *rt2x00dev,
252 struct rt2x00_led *led,
253 enum led_type type)
254{
255 led->rt2x00dev = rt2x00dev;
256 led->type = type;
257 led->led_dev.brightness_set = rt73usb_brightness_set;
258 led->led_dev.blink_set = rt73usb_blink_set;
259 led->flags = LED_INITIALIZED;
260}
Ivo van Doorn771fd562008-09-08 19:07:15 +0200261#endif /* CONFIG_RT2X00_LIB_LEDS */
Ivo van Doorna9450b72008-02-03 15:53:40 +0100262
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700263/*
264 * Configuration handlers.
265 */
Ivo van Doorn906c1102008-08-04 16:38:24 +0200266static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
267 struct rt2x00lib_crypto *crypto,
268 struct ieee80211_key_conf *key)
269{
270 struct hw_key_entry key_entry;
271 struct rt2x00_field32 field;
272 int timeout;
273 u32 mask;
274 u32 reg;
275
276 if (crypto->cmd == SET_KEY) {
277 /*
278 * rt2x00lib can't determine the correct free
279 * key_idx for shared keys. We have 1 register
280 * with key valid bits. The goal is simple, read
281 * the register, if that is full we have no slots
282 * left.
283 * Note that each BSS is allowed to have up to 4
284 * shared keys, so put a mask over the allowed
285 * entries.
286 */
287 mask = (0xf << crypto->bssidx);
288
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100289 rt2x00usb_register_read(rt2x00dev, SEC_CSR0, &reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200290 reg &= mask;
291
292 if (reg && reg == mask)
293 return -ENOSPC;
294
Ivo van Doornacaf908d2008-09-22 19:40:04 +0200295 key->hw_key_idx += reg ? ffz(reg) : 0;
Ivo van Doorn906c1102008-08-04 16:38:24 +0200296
297 /*
298 * Upload key to hardware
299 */
300 memcpy(key_entry.key, crypto->key,
301 sizeof(key_entry.key));
302 memcpy(key_entry.tx_mic, crypto->tx_mic,
303 sizeof(key_entry.tx_mic));
304 memcpy(key_entry.rx_mic, crypto->rx_mic,
305 sizeof(key_entry.rx_mic));
306
307 reg = SHARED_KEY_ENTRY(key->hw_key_idx);
308 timeout = REGISTER_TIMEOUT32(sizeof(key_entry));
309 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
310 USB_VENDOR_REQUEST_OUT, reg,
311 &key_entry,
312 sizeof(key_entry),
313 timeout);
314
315 /*
316 * The cipher types are stored over 2 registers.
317 * bssidx 0 and 1 keys are stored in SEC_CSR1 and
318 * bssidx 1 and 2 keys are stored in SEC_CSR5.
319 * Using the correct defines correctly will cause overhead,
320 * so just calculate the correct offset.
321 */
322 if (key->hw_key_idx < 8) {
323 field.bit_offset = (3 * key->hw_key_idx);
324 field.bit_mask = 0x7 << field.bit_offset;
325
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100326 rt2x00usb_register_read(rt2x00dev, SEC_CSR1, &reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200327 rt2x00_set_field32(&reg, field, crypto->cipher);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100328 rt2x00usb_register_write(rt2x00dev, SEC_CSR1, reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200329 } else {
330 field.bit_offset = (3 * (key->hw_key_idx - 8));
331 field.bit_mask = 0x7 << field.bit_offset;
332
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100333 rt2x00usb_register_read(rt2x00dev, SEC_CSR5, &reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200334 rt2x00_set_field32(&reg, field, crypto->cipher);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100335 rt2x00usb_register_write(rt2x00dev, SEC_CSR5, reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200336 }
337
338 /*
339 * The driver does not support the IV/EIV generation
340 * in hardware. However it doesn't support the IV/EIV
341 * inside the ieee80211 frame either, but requires it
342 * to be provided seperately for the descriptor.
343 * rt2x00lib will cut the IV/EIV data out of all frames
344 * given to us by mac80211, but we must tell mac80211
345 * to generate the IV/EIV data.
346 */
347 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
348 }
349
350 /*
351 * SEC_CSR0 contains only single-bit fields to indicate
352 * a particular key is valid. Because using the FIELD32()
353 * defines directly will cause a lot of overhead we use
354 * a calculation to determine the correct bit directly.
355 */
356 mask = 1 << key->hw_key_idx;
357
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100358 rt2x00usb_register_read(rt2x00dev, SEC_CSR0, &reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200359 if (crypto->cmd == SET_KEY)
360 reg |= mask;
361 else if (crypto->cmd == DISABLE_KEY)
362 reg &= ~mask;
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100363 rt2x00usb_register_write(rt2x00dev, SEC_CSR0, reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200364
365 return 0;
366}
367
368static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
369 struct rt2x00lib_crypto *crypto,
370 struct ieee80211_key_conf *key)
371{
372 struct hw_pairwise_ta_entry addr_entry;
373 struct hw_key_entry key_entry;
374 int timeout;
375 u32 mask;
376 u32 reg;
377
378 if (crypto->cmd == SET_KEY) {
379 /*
380 * rt2x00lib can't determine the correct free
381 * key_idx for pairwise keys. We have 2 registers
382 * with key valid bits. The goal is simple, read
383 * the first register, if that is full move to
384 * the next register.
385 * When both registers are full, we drop the key,
386 * otherwise we use the first invalid entry.
387 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100388 rt2x00usb_register_read(rt2x00dev, SEC_CSR2, &reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200389 if (reg && reg == ~0) {
390 key->hw_key_idx = 32;
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100391 rt2x00usb_register_read(rt2x00dev, SEC_CSR3, &reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200392 if (reg && reg == ~0)
393 return -ENOSPC;
394 }
395
Ivo van Doornacaf908d2008-09-22 19:40:04 +0200396 key->hw_key_idx += reg ? ffz(reg) : 0;
Ivo van Doorn906c1102008-08-04 16:38:24 +0200397
398 /*
399 * Upload key to hardware
400 */
401 memcpy(key_entry.key, crypto->key,
402 sizeof(key_entry.key));
403 memcpy(key_entry.tx_mic, crypto->tx_mic,
404 sizeof(key_entry.tx_mic));
405 memcpy(key_entry.rx_mic, crypto->rx_mic,
406 sizeof(key_entry.rx_mic));
407
408 reg = PAIRWISE_KEY_ENTRY(key->hw_key_idx);
409 timeout = REGISTER_TIMEOUT32(sizeof(key_entry));
410 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
411 USB_VENDOR_REQUEST_OUT, reg,
412 &key_entry,
413 sizeof(key_entry),
414 timeout);
415
416 /*
417 * Send the address and cipher type to the hardware register.
418 * This data fits within the CSR cache size, so we can use
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100419 * rt2x00usb_register_multiwrite() directly.
Ivo van Doorn906c1102008-08-04 16:38:24 +0200420 */
421 memset(&addr_entry, 0, sizeof(addr_entry));
422 memcpy(&addr_entry, crypto->address, ETH_ALEN);
423 addr_entry.cipher = crypto->cipher;
424
425 reg = PAIRWISE_TA_ENTRY(key->hw_key_idx);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100426 rt2x00usb_register_multiwrite(rt2x00dev, reg,
Ivo van Doorn906c1102008-08-04 16:38:24 +0200427 &addr_entry, sizeof(addr_entry));
428
429 /*
430 * Enable pairwise lookup table for given BSS idx,
431 * without this received frames will not be decrypted
432 * by the hardware.
433 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100434 rt2x00usb_register_read(rt2x00dev, SEC_CSR4, &reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200435 reg |= (1 << crypto->bssidx);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100436 rt2x00usb_register_write(rt2x00dev, SEC_CSR4, reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200437
438 /*
439 * The driver does not support the IV/EIV generation
440 * in hardware. However it doesn't support the IV/EIV
441 * inside the ieee80211 frame either, but requires it
442 * to be provided seperately for the descriptor.
443 * rt2x00lib will cut the IV/EIV data out of all frames
444 * given to us by mac80211, but we must tell mac80211
445 * to generate the IV/EIV data.
446 */
447 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
448 }
449
450 /*
451 * SEC_CSR2 and SEC_CSR3 contain only single-bit fields to indicate
452 * a particular key is valid. Because using the FIELD32()
453 * defines directly will cause a lot of overhead we use
454 * a calculation to determine the correct bit directly.
455 */
456 if (key->hw_key_idx < 32) {
457 mask = 1 << key->hw_key_idx;
458
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100459 rt2x00usb_register_read(rt2x00dev, SEC_CSR2, &reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200460 if (crypto->cmd == SET_KEY)
461 reg |= mask;
462 else if (crypto->cmd == DISABLE_KEY)
463 reg &= ~mask;
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100464 rt2x00usb_register_write(rt2x00dev, SEC_CSR2, reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200465 } else {
466 mask = 1 << (key->hw_key_idx - 32);
467
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100468 rt2x00usb_register_read(rt2x00dev, SEC_CSR3, &reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200469 if (crypto->cmd == SET_KEY)
470 reg |= mask;
471 else if (crypto->cmd == DISABLE_KEY)
472 reg &= ~mask;
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100473 rt2x00usb_register_write(rt2x00dev, SEC_CSR3, reg);
Ivo van Doorn906c1102008-08-04 16:38:24 +0200474 }
475
476 return 0;
477}
478
Ivo van Doorn3a643d22008-03-25 14:13:18 +0100479static void rt73usb_config_filter(struct rt2x00_dev *rt2x00dev,
480 const unsigned int filter_flags)
481{
482 u32 reg;
483
484 /*
485 * Start configuration steps.
486 * Note that the version error will always be dropped
487 * and broadcast frames will always be accepted since
488 * there is no filter for it at this time.
489 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100490 rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
Ivo van Doorn3a643d22008-03-25 14:13:18 +0100491 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
492 !(filter_flags & FIF_FCSFAIL));
493 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
494 !(filter_flags & FIF_PLCPFAIL));
495 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
Igor Perminov1afcfd542009-08-08 23:55:55 +0200496 !(filter_flags & (FIF_CONTROL | FIF_PSPOLL)));
Ivo van Doorn3a643d22008-03-25 14:13:18 +0100497 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
498 !(filter_flags & FIF_PROMISC_IN_BSS));
499 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
Ivo van Doorne0b005f2008-03-31 15:24:53 +0200500 !(filter_flags & FIF_PROMISC_IN_BSS) &&
501 !rt2x00dev->intf_ap_count);
Ivo van Doorn3a643d22008-03-25 14:13:18 +0100502 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
503 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
504 !(filter_flags & FIF_ALLMULTI));
505 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
506 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS,
507 !(filter_flags & FIF_CONTROL));
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100508 rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
Ivo van Doorn3a643d22008-03-25 14:13:18 +0100509}
510
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100511static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
512 struct rt2x00_intf *intf,
513 struct rt2x00intf_conf *conf,
514 const unsigned int flags)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700515{
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100516 unsigned int beacon_base;
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700517 u32 reg;
518
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100519 if (flags & CONFIG_UPDATE_TYPE) {
520 /*
521 * Clear current synchronisation setup.
522 * For the Beacon base registers we only need to clear
523 * the first byte since that byte contains the VALID and OWNER
524 * bits which (when set to 0) will invalidate the entire beacon.
525 */
526 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100527 rt2x00usb_register_write(rt2x00dev, beacon_base, 0);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700528
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100529 /*
530 * Enable synchronisation.
531 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100532 rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
Ivo van Doornfd3c91c2008-03-09 22:47:43 +0100533 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100534 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, conf->sync);
Ivo van Doornfd3c91c2008-03-09 22:47:43 +0100535 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100536 rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
Ivo van Doorn5c58ee52007-10-06 13:34:52 +0200537 }
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700538
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100539 if (flags & CONFIG_UPDATE_MAC) {
540 reg = le32_to_cpu(conf->mac[1]);
541 rt2x00_set_field32(&reg, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
542 conf->mac[1] = cpu_to_le32(reg);
543
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100544 rt2x00usb_register_multiwrite(rt2x00dev, MAC_CSR2,
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100545 conf->mac, sizeof(conf->mac));
546 }
547
548 if (flags & CONFIG_UPDATE_BSSID) {
549 reg = le32_to_cpu(conf->bssid[1]);
550 rt2x00_set_field32(&reg, MAC_CSR5_BSS_ID_MASK, 3);
551 conf->bssid[1] = cpu_to_le32(reg);
552
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100553 rt2x00usb_register_multiwrite(rt2x00dev, MAC_CSR4,
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100554 conf->bssid, sizeof(conf->bssid));
555 }
556}
557
Ivo van Doorn3a643d22008-03-25 14:13:18 +0100558static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
559 struct rt2x00lib_erp *erp)
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100560{
561 u32 reg;
562
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100563 rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
Ivo van Doorn47896662009-09-06 15:14:23 +0200564 rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, 0x32);
Ivo van Doorn8a566af2009-05-21 19:16:46 +0200565 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100566 rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700567
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100568 rt2x00usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
Ivo van Doorn8a566af2009-05-21 19:16:46 +0200569 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
Ivo van Doorn4f5af6eb2007-10-06 14:16:30 +0200570 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
Ivo van Doorn72810372008-03-09 22:46:18 +0100571 !!erp->short_preamble);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100572 rt2x00usb_register_write(rt2x00dev, TXRX_CSR4, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700573
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100574 rt2x00usb_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates);
Ivo van Doornba2ab472008-08-06 16:22:17 +0200575
Ivo van Doorn8a566af2009-05-21 19:16:46 +0200576 rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
577 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
578 erp->beacon_int * 16);
579 rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
580
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100581 rt2x00usb_register_read(rt2x00dev, MAC_CSR9, &reg);
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100582 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100583 rt2x00usb_register_write(rt2x00dev, MAC_CSR9, reg);
Ivo van Doornba2ab472008-08-06 16:22:17 +0200584
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100585 rt2x00usb_register_read(rt2x00dev, MAC_CSR8, &reg);
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100586 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, erp->sifs);
587 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
588 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, erp->eifs);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100589 rt2x00usb_register_write(rt2x00dev, MAC_CSR8, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700590}
591
592static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
Ivo van Doornaddc81bd2007-10-13 16:26:23 +0200593 struct antenna_setup *ant)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700594{
595 u8 r3;
596 u8 r4;
597 u8 r77;
Mattias Nissler2676c942007-10-27 13:42:37 +0200598 u8 temp;
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700599
600 rt73usb_bbp_read(rt2x00dev, 3, &r3);
601 rt73usb_bbp_read(rt2x00dev, 4, &r4);
602 rt73usb_bbp_read(rt2x00dev, 77, &r77);
603
604 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
605
Ivo van Doorne4cd2ff2007-10-27 13:39:57 +0200606 /*
Ivo van Doorne4cd2ff2007-10-27 13:39:57 +0200607 * Configure the RX antenna.
608 */
Ivo van Doornaddc81bd2007-10-13 16:26:23 +0200609 switch (ant->rx) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700610 case ANTENNA_HW_DIVERSITY:
Mattias Nissler2676c942007-10-27 13:42:37 +0200611 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
612 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
Johannes Berg8318d782008-01-24 19:38:38 +0100613 && (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ);
Mattias Nissler2676c942007-10-27 13:42:37 +0200614 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700615 break;
616 case ANTENNA_A:
Mattias Nissler2676c942007-10-27 13:42:37 +0200617 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700618 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
Johannes Berg8318d782008-01-24 19:38:38 +0100619 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
Mattias Nissler2676c942007-10-27 13:42:37 +0200620 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
621 else
622 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700623 break;
624 case ANTENNA_B:
Ivo van Doorna4fe07d2008-03-09 22:45:21 +0100625 default:
Mattias Nissler2676c942007-10-27 13:42:37 +0200626 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700627 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
Johannes Berg8318d782008-01-24 19:38:38 +0100628 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
Mattias Nissler2676c942007-10-27 13:42:37 +0200629 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
630 else
631 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700632 break;
633 }
634
635 rt73usb_bbp_write(rt2x00dev, 77, r77);
636 rt73usb_bbp_write(rt2x00dev, 3, r3);
637 rt73usb_bbp_write(rt2x00dev, 4, r4);
638}
639
640static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
Ivo van Doornaddc81bd2007-10-13 16:26:23 +0200641 struct antenna_setup *ant)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700642{
643 u8 r3;
644 u8 r4;
645 u8 r77;
646
647 rt73usb_bbp_read(rt2x00dev, 3, &r3);
648 rt73usb_bbp_read(rt2x00dev, 4, &r4);
649 rt73usb_bbp_read(rt2x00dev, 77, &r77);
650
651 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
652 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
653 !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
654
Ivo van Doorne4cd2ff2007-10-27 13:39:57 +0200655 /*
Ivo van Doorne4cd2ff2007-10-27 13:39:57 +0200656 * Configure the RX antenna.
657 */
Ivo van Doornaddc81bd2007-10-13 16:26:23 +0200658 switch (ant->rx) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700659 case ANTENNA_HW_DIVERSITY:
Mattias Nissler2676c942007-10-27 13:42:37 +0200660 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700661 break;
662 case ANTENNA_A:
Mattias Nissler2676c942007-10-27 13:42:37 +0200663 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
664 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700665 break;
666 case ANTENNA_B:
Ivo van Doorna4fe07d2008-03-09 22:45:21 +0100667 default:
Mattias Nissler2676c942007-10-27 13:42:37 +0200668 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
669 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700670 break;
671 }
672
673 rt73usb_bbp_write(rt2x00dev, 77, r77);
674 rt73usb_bbp_write(rt2x00dev, 3, r3);
675 rt73usb_bbp_write(rt2x00dev, 4, r4);
676}
677
678struct antenna_sel {
679 u8 word;
680 /*
681 * value[0] -> non-LNA
682 * value[1] -> LNA
683 */
684 u8 value[2];
685};
686
687static const struct antenna_sel antenna_sel_a[] = {
688 { 96, { 0x58, 0x78 } },
689 { 104, { 0x38, 0x48 } },
690 { 75, { 0xfe, 0x80 } },
691 { 86, { 0xfe, 0x80 } },
692 { 88, { 0xfe, 0x80 } },
693 { 35, { 0x60, 0x60 } },
694 { 97, { 0x58, 0x58 } },
695 { 98, { 0x58, 0x58 } },
696};
697
698static const struct antenna_sel antenna_sel_bg[] = {
699 { 96, { 0x48, 0x68 } },
700 { 104, { 0x2c, 0x3c } },
701 { 75, { 0xfe, 0x80 } },
702 { 86, { 0xfe, 0x80 } },
703 { 88, { 0xfe, 0x80 } },
704 { 35, { 0x50, 0x50 } },
705 { 97, { 0x48, 0x48 } },
706 { 98, { 0x48, 0x48 } },
707};
708
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100709static void rt73usb_config_ant(struct rt2x00_dev *rt2x00dev,
710 struct antenna_setup *ant)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700711{
712 const struct antenna_sel *sel;
713 unsigned int lna;
714 unsigned int i;
715 u32 reg;
716
Ivo van Doorna4fe07d2008-03-09 22:45:21 +0100717 /*
718 * We should never come here because rt2x00lib is supposed
719 * to catch this and send us the correct antenna explicitely.
720 */
721 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
722 ant->tx == ANTENNA_SW_DIVERSITY);
723
Johannes Berg8318d782008-01-24 19:38:38 +0100724 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700725 sel = antenna_sel_a;
726 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700727 } else {
728 sel = antenna_sel_bg;
729 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700730 }
731
Mattias Nissler2676c942007-10-27 13:42:37 +0200732 for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
733 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
734
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100735 rt2x00usb_register_read(rt2x00dev, PHY_CSR0, &reg);
Mattias Nissler2676c942007-10-27 13:42:37 +0200736
Ivo van Doornddc827f2007-10-13 16:26:42 +0200737 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
Johannes Berg8318d782008-01-24 19:38:38 +0100738 (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ));
Ivo van Doornddc827f2007-10-13 16:26:42 +0200739 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
Johannes Berg8318d782008-01-24 19:38:38 +0100740 (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ));
Ivo van Doornddc827f2007-10-13 16:26:42 +0200741
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100742 rt2x00usb_register_write(rt2x00dev, PHY_CSR0, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700743
Gertjan van Wingerde5122d892009-12-23 00:03:25 +0100744 if (rt2x00_rf(rt2x00dev, RF5226) || rt2x00_rf(rt2x00dev, RF5225))
Ivo van Doornaddc81bd2007-10-13 16:26:23 +0200745 rt73usb_config_antenna_5x(rt2x00dev, ant);
Gertjan van Wingerde5122d892009-12-23 00:03:25 +0100746 else if (rt2x00_rf(rt2x00dev, RF2528) || rt2x00_rf(rt2x00dev, RF2527))
Ivo van Doornaddc81bd2007-10-13 16:26:23 +0200747 rt73usb_config_antenna_2x(rt2x00dev, ant);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700748}
749
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100750static void rt73usb_config_lna_gain(struct rt2x00_dev *rt2x00dev,
751 struct rt2x00lib_conf *libconf)
752{
753 u16 eeprom;
754 short lna_gain = 0;
755
756 if (libconf->conf->channel->band == IEEE80211_BAND_2GHZ) {
757 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
758 lna_gain += 14;
759
760 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
761 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
762 } else {
763 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
764 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
765 }
766
767 rt2x00dev->lna_gain = lna_gain;
768}
769
770static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
771 struct rf_channel *rf, const int txpower)
772{
773 u8 r3;
774 u8 r94;
775 u8 smart;
776
777 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
778 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
779
Gertjan van Wingerde5122d892009-12-23 00:03:25 +0100780 smart = !(rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527));
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100781
782 rt73usb_bbp_read(rt2x00dev, 3, &r3);
783 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
784 rt73usb_bbp_write(rt2x00dev, 3, r3);
785
786 r94 = 6;
787 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
788 r94 += txpower - MAX_TXPOWER;
789 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
790 r94 += txpower;
791 rt73usb_bbp_write(rt2x00dev, 94, r94);
792
793 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
794 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
795 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
796 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
797
798 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
799 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
800 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
801 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
802
803 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
804 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
805 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
806 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
807
808 udelay(10);
809}
810
811static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
812 const int txpower)
813{
814 struct rf_channel rf;
815
816 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
817 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
818 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
819 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
820
821 rt73usb_config_channel(rt2x00dev, &rf, txpower);
822}
823
824static void rt73usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
825 struct rt2x00lib_conf *libconf)
826{
827 u32 reg;
828
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100829 rt2x00usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100830 rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT,
831 libconf->conf->long_frame_max_tx_count);
832 rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT,
833 libconf->conf->short_frame_max_tx_count);
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100834 rt2x00usb_register_write(rt2x00dev, TXRX_CSR4, reg);
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100835}
836
Ivo van Doorn7d7f19c2008-12-20 10:52:42 +0100837static void rt73usb_config_ps(struct rt2x00_dev *rt2x00dev,
838 struct rt2x00lib_conf *libconf)
839{
840 enum dev_state state =
841 (libconf->conf->flags & IEEE80211_CONF_PS) ?
842 STATE_SLEEP : STATE_AWAKE;
843 u32 reg;
844
845 if (state == STATE_SLEEP) {
846 rt2x00usb_register_read(rt2x00dev, MAC_CSR11, &reg);
847 rt2x00_set_field32(&reg, MAC_CSR11_DELAY_AFTER_TBCN,
Ivo van Doorn6b347bf2009-05-23 21:09:28 +0200848 rt2x00dev->beacon_int - 10);
Ivo van Doorn7d7f19c2008-12-20 10:52:42 +0100849 rt2x00_set_field32(&reg, MAC_CSR11_TBCN_BEFORE_WAKEUP,
850 libconf->conf->listen_interval - 1);
851 rt2x00_set_field32(&reg, MAC_CSR11_WAKEUP_LATENCY, 5);
852
853 /* We must first disable autowake before it can be enabled */
854 rt2x00_set_field32(&reg, MAC_CSR11_AUTOWAKE, 0);
855 rt2x00usb_register_write(rt2x00dev, MAC_CSR11, reg);
856
857 rt2x00_set_field32(&reg, MAC_CSR11_AUTOWAKE, 1);
858 rt2x00usb_register_write(rt2x00dev, MAC_CSR11, reg);
859
860 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
861 USB_MODE_SLEEP, REGISTER_TIMEOUT);
862 } else {
Ivo van Doorn7d7f19c2008-12-20 10:52:42 +0100863 rt2x00usb_register_read(rt2x00dev, MAC_CSR11, &reg);
864 rt2x00_set_field32(&reg, MAC_CSR11_DELAY_AFTER_TBCN, 0);
865 rt2x00_set_field32(&reg, MAC_CSR11_TBCN_BEFORE_WAKEUP, 0);
866 rt2x00_set_field32(&reg, MAC_CSR11_AUTOWAKE, 0);
867 rt2x00_set_field32(&reg, MAC_CSR11_WAKEUP_LATENCY, 0);
868 rt2x00usb_register_write(rt2x00dev, MAC_CSR11, reg);
Gertjan van Wingerde57318582010-03-30 23:50:23 +0200869
870 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
871 USB_MODE_WAKEUP, REGISTER_TIMEOUT);
Ivo van Doorn7d7f19c2008-12-20 10:52:42 +0100872 }
873}
874
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700875static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100876 struct rt2x00lib_conf *libconf,
877 const unsigned int flags)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700878{
Ivo van Doornba2ab472008-08-06 16:22:17 +0200879 /* Always recalculate LNA gain before changing configuration */
880 rt73usb_config_lna_gain(rt2x00dev, libconf);
881
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100882 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
Ivo van Doorn5c58ee52007-10-06 13:34:52 +0200883 rt73usb_config_channel(rt2x00dev, &libconf->rf,
884 libconf->conf->power_level);
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100885 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
886 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
Ivo van Doorn5c58ee52007-10-06 13:34:52 +0200887 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
Ivo van Doorne4ea1c42008-10-29 17:17:57 +0100888 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
889 rt73usb_config_retry_limit(rt2x00dev, libconf);
Ivo van Doorn7d7f19c2008-12-20 10:52:42 +0100890 if (flags & IEEE80211_CONF_CHANGE_PS)
891 rt73usb_config_ps(rt2x00dev, libconf);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700892}
893
894/*
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700895 * Link tuning
896 */
Ivo van Doornebcf26d2007-10-13 16:26:12 +0200897static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
898 struct link_qual *qual)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700899{
900 u32 reg;
901
902 /*
903 * Update FCS error count from register.
904 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100905 rt2x00usb_register_read(rt2x00dev, STA_CSR0, &reg);
Ivo van Doornebcf26d2007-10-13 16:26:12 +0200906 qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700907
908 /*
909 * Update False CCA count from register.
910 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +0100911 rt2x00usb_register_read(rt2x00dev, STA_CSR1, &reg);
Ivo van Doornebcf26d2007-10-13 16:26:12 +0200912 qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700913}
914
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100915static inline void rt73usb_set_vgc(struct rt2x00_dev *rt2x00dev,
916 struct link_qual *qual, u8 vgc_level)
Ivo van Doorneb20b4e2008-12-20 10:54:22 +0100917{
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100918 if (qual->vgc_level != vgc_level) {
Ivo van Doorneb20b4e2008-12-20 10:54:22 +0100919 rt73usb_bbp_write(rt2x00dev, 17, vgc_level);
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100920 qual->vgc_level = vgc_level;
921 qual->vgc_level_reg = vgc_level;
Ivo van Doorneb20b4e2008-12-20 10:54:22 +0100922 }
923}
924
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100925static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
926 struct link_qual *qual)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700927{
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100928 rt73usb_set_vgc(rt2x00dev, qual, 0x20);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700929}
930
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100931static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev,
932 struct link_qual *qual, const u32 count)
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700933{
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700934 u8 up_bound;
935 u8 low_bound;
936
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700937 /*
938 * Determine r17 bounds.
939 */
Johannes Berg8318d782008-01-24 19:38:38 +0100940 if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700941 low_bound = 0x28;
942 up_bound = 0x48;
943
944 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
945 low_bound += 0x10;
946 up_bound += 0x10;
947 }
948 } else {
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100949 if (qual->rssi > -82) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700950 low_bound = 0x1c;
951 up_bound = 0x40;
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100952 } else if (qual->rssi > -84) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700953 low_bound = 0x1c;
954 up_bound = 0x20;
955 } else {
956 low_bound = 0x1c;
957 up_bound = 0x1c;
958 }
959
960 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
961 low_bound += 0x14;
962 up_bound += 0x10;
963 }
964 }
965
966 /*
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +0100967 * If we are not associated, we should go straight to the
968 * dynamic CCA tuning.
969 */
970 if (!rt2x00dev->intf_associated)
971 goto dynamic_cca_tune;
972
973 /*
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700974 * Special big-R17 for very short distance
975 */
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100976 if (qual->rssi > -35) {
977 rt73usb_set_vgc(rt2x00dev, qual, 0x60);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700978 return;
979 }
980
981 /*
982 * Special big-R17 for short distance
983 */
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100984 if (qual->rssi >= -58) {
985 rt73usb_set_vgc(rt2x00dev, qual, up_bound);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700986 return;
987 }
988
989 /*
990 * Special big-R17 for middle-short distance
991 */
Ivo van Doorn5352ff62008-12-20 10:54:54 +0100992 if (qual->rssi >= -66) {
993 rt73usb_set_vgc(rt2x00dev, qual, low_bound + 0x10);
Ivo van Doorn95ea3622007-09-25 17:57:13 -0700994 return;
995 }
996
997 /*
998 * Special mid-R17 for middle distance
999 */
Ivo van Doorn5352ff62008-12-20 10:54:54 +01001000 if (qual->rssi >= -74) {
1001 rt73usb_set_vgc(rt2x00dev, qual, low_bound + 0x08);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001002 return;
1003 }
1004
1005 /*
1006 * Special case: Change up_bound based on the rssi.
1007 * Lower up_bound when rssi is weaker then -74 dBm.
1008 */
Ivo van Doorn5352ff62008-12-20 10:54:54 +01001009 up_bound -= 2 * (-74 - qual->rssi);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001010 if (low_bound > up_bound)
1011 up_bound = low_bound;
1012
Ivo van Doorn5352ff62008-12-20 10:54:54 +01001013 if (qual->vgc_level > up_bound) {
1014 rt73usb_set_vgc(rt2x00dev, qual, up_bound);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001015 return;
1016 }
1017
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +01001018dynamic_cca_tune:
1019
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001020 /*
1021 * r17 does not yet exceed upper limit, continue and base
1022 * the r17 tuning on the false CCA count.
1023 */
Ivo van Doorn5352ff62008-12-20 10:54:54 +01001024 if ((qual->false_cca > 512) && (qual->vgc_level < up_bound))
1025 rt73usb_set_vgc(rt2x00dev, qual,
1026 min_t(u8, qual->vgc_level + 4, up_bound));
1027 else if ((qual->false_cca < 100) && (qual->vgc_level > low_bound))
1028 rt73usb_set_vgc(rt2x00dev, qual,
1029 max_t(u8, qual->vgc_level - 4, low_bound));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001030}
1031
1032/*
Ivo van Doorna7f3a062008-03-09 22:44:54 +01001033 * Firmware functions
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001034 */
1035static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
1036{
1037 return FIRMWARE_RT2571;
1038}
1039
Ivo van Doorn0cbe0062009-01-28 00:33:47 +01001040static int rt73usb_check_firmware(struct rt2x00_dev *rt2x00dev,
1041 const u8 *data, const size_t len)
Ivo van Doorna7f3a062008-03-09 22:44:54 +01001042{
Ivo van Doorn0cbe0062009-01-28 00:33:47 +01001043 u16 fw_crc;
Ivo van Doorna7f3a062008-03-09 22:44:54 +01001044 u16 crc;
1045
1046 /*
Ivo van Doorn0cbe0062009-01-28 00:33:47 +01001047 * Only support 2kb firmware files.
1048 */
1049 if (len != 2048)
1050 return FW_BAD_LENGTH;
1051
1052 /*
Ivo van Doorna7f3a062008-03-09 22:44:54 +01001053 * The last 2 bytes in the firmware array are the crc checksum itself,
1054 * this means that we should never pass those 2 bytes to the crc
1055 * algorithm.
1056 */
Ivo van Doorn0cbe0062009-01-28 00:33:47 +01001057 fw_crc = (data[len - 2] << 8 | data[len - 1]);
1058
1059 /*
1060 * Use the crc itu-t algorithm.
1061 */
Ivo van Doorna7f3a062008-03-09 22:44:54 +01001062 crc = crc_itu_t(0, data, len - 2);
1063 crc = crc_itu_t_byte(crc, 0);
1064 crc = crc_itu_t_byte(crc, 0);
1065
Ivo van Doorn0cbe0062009-01-28 00:33:47 +01001066 return (fw_crc == crc) ? FW_OK : FW_BAD_CRC;
Ivo van Doorna7f3a062008-03-09 22:44:54 +01001067}
1068
Ivo van Doorn0cbe0062009-01-28 00:33:47 +01001069static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1070 const u8 *data, const size_t len)
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001071{
1072 unsigned int i;
1073 int status;
1074 u32 reg;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001075
1076 /*
1077 * Wait for stable hardware.
1078 */
1079 for (i = 0; i < 100; i++) {
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001080 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001081 if (reg)
1082 break;
1083 msleep(1);
1084 }
1085
1086 if (!reg) {
1087 ERROR(rt2x00dev, "Unstable hardware.\n");
1088 return -EBUSY;
1089 }
1090
1091 /*
1092 * Write firmware to device.
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001093 */
Iwo Mergler3e0c1ab2008-07-19 16:17:16 +02001094 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
1095 USB_VENDOR_REQUEST_OUT,
1096 FIRMWARE_IMAGE_BASE,
1097 data, len,
1098 REGISTER_TIMEOUT32(len));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001099
1100 /*
1101 * Send firmware request to device to load firmware,
1102 * we need to specify a long timeout time.
1103 */
1104 status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
Ivo van Doorn3b640f22008-02-03 15:54:11 +01001105 0, USB_MODE_FIRMWARE,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001106 REGISTER_TIMEOUT_FIRMWARE);
1107 if (status < 0) {
1108 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
1109 return status;
1110 }
1111
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001112 return 0;
1113}
1114
Ivo van Doorna7f3a062008-03-09 22:44:54 +01001115/*
1116 * Initialization functions.
1117 */
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001118static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
1119{
1120 u32 reg;
1121
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001122 rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001123 rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
1124 rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
1125 rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001126 rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001127
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001128 rt2x00usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001129 rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
1130 rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
1131 rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
1132 rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
1133 rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
1134 rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
1135 rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
1136 rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001137 rt2x00usb_register_write(rt2x00dev, TXRX_CSR1, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001138
1139 /*
1140 * CCK TXD BBP registers
1141 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001142 rt2x00usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001143 rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
1144 rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
1145 rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
1146 rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
1147 rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
1148 rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
1149 rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
1150 rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001151 rt2x00usb_register_write(rt2x00dev, TXRX_CSR2, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001152
1153 /*
1154 * OFDM TXD BBP registers
1155 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001156 rt2x00usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001157 rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
1158 rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
1159 rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
1160 rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
1161 rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
1162 rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001163 rt2x00usb_register_write(rt2x00dev, TXRX_CSR3, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001164
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001165 rt2x00usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001166 rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
1167 rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
1168 rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
1169 rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001170 rt2x00usb_register_write(rt2x00dev, TXRX_CSR7, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001171
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001172 rt2x00usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001173 rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
1174 rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
1175 rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
1176 rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001177 rt2x00usb_register_write(rt2x00dev, TXRX_CSR8, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001178
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001179 rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
Ivo van Doorn1f909162008-07-08 13:45:20 +02001180 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL, 0);
1181 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 0);
1182 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, 0);
1183 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 0);
1184 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
1185 rt2x00_set_field32(&reg, TXRX_CSR9_TIMESTAMP_COMPENSATE, 0);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001186 rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
Ivo van Doorn1f909162008-07-08 13:45:20 +02001187
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001188 rt2x00usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001189
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001190 rt2x00usb_register_read(rt2x00dev, MAC_CSR6, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001191 rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001192 rt2x00usb_register_write(rt2x00dev, MAC_CSR6, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001193
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001194 rt2x00usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001195
1196 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
1197 return -EBUSY;
1198
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001199 rt2x00usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001200
1201 /*
1202 * Invalidate all Shared Keys (SEC_CSR0),
1203 * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
1204 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001205 rt2x00usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1206 rt2x00usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1207 rt2x00usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001208
1209 reg = 0x000023b0;
Gertjan van Wingerde5122d892009-12-23 00:03:25 +01001210 if (rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527))
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001211 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001212 rt2x00usb_register_write(rt2x00dev, PHY_CSR1, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001213
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001214 rt2x00usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1215 rt2x00usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1216 rt2x00usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001217
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001218 rt2x00usb_register_read(rt2x00dev, MAC_CSR9, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001219 rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001220 rt2x00usb_register_write(rt2x00dev, MAC_CSR9, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001221
1222 /*
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +01001223 * Clear all beacons
1224 * For the Beacon base registers we only need to clear
1225 * the first byte since that byte contains the VALID and OWNER
1226 * bits which (when set to 0) will invalidate the entire beacon.
1227 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001228 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1229 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1230 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1231 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +01001232
1233 /*
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001234 * We must clear the error counters.
1235 * These registers are cleared on read,
1236 * so we may pass a useless variable to store the value.
1237 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001238 rt2x00usb_register_read(rt2x00dev, STA_CSR0, &reg);
1239 rt2x00usb_register_read(rt2x00dev, STA_CSR1, &reg);
1240 rt2x00usb_register_read(rt2x00dev, STA_CSR2, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001241
1242 /*
1243 * Reset MAC and BBP registers.
1244 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001245 rt2x00usb_register_read(rt2x00dev, MAC_CSR1, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001246 rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1247 rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001248 rt2x00usb_register_write(rt2x00dev, MAC_CSR1, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001249
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001250 rt2x00usb_register_read(rt2x00dev, MAC_CSR1, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001251 rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1252 rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001253 rt2x00usb_register_write(rt2x00dev, MAC_CSR1, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001254
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001255 rt2x00usb_register_read(rt2x00dev, MAC_CSR1, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001256 rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001257 rt2x00usb_register_write(rt2x00dev, MAC_CSR1, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001258
1259 return 0;
1260}
1261
Ivo van Doorn2b08da32008-06-03 18:58:56 +02001262static int rt73usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
1263{
1264 unsigned int i;
1265 u8 value;
1266
1267 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1268 rt73usb_bbp_read(rt2x00dev, 0, &value);
1269 if ((value != 0xff) && (value != 0x00))
1270 return 0;
1271 udelay(REGISTER_BUSY_DELAY);
1272 }
1273
1274 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1275 return -EACCES;
1276}
1277
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001278static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1279{
1280 unsigned int i;
1281 u16 eeprom;
1282 u8 reg_id;
1283 u8 value;
1284
Ivo van Doorn2b08da32008-06-03 18:58:56 +02001285 if (unlikely(rt73usb_wait_bbp_ready(rt2x00dev)))
1286 return -EACCES;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001287
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001288 rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1289 rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1290 rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1291 rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1292 rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1293 rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1294 rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1295 rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1296 rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1297 rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1298 rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1299 rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1300 rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1301 rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1302 rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1303 rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1304 rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1305 rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1306 rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1307 rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1308 rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1309 rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1310 rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1311 rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1312 rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1313
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001314 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1315 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1316
1317 if (eeprom != 0xffff && eeprom != 0x0000) {
1318 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1319 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001320 rt73usb_bbp_write(rt2x00dev, reg_id, value);
1321 }
1322 }
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001323
1324 return 0;
1325}
1326
1327/*
1328 * Device state switch handlers.
1329 */
1330static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1331 enum dev_state state)
1332{
1333 u32 reg;
1334
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001335 rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001336 rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
Ivo van Doorn2b08da32008-06-03 18:58:56 +02001337 (state == STATE_RADIO_RX_OFF) ||
1338 (state == STATE_RADIO_RX_OFF_LINK));
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001339 rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001340}
1341
1342static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1343{
1344 /*
1345 * Initialize all registers.
1346 */
Ivo van Doorn2b08da32008-06-03 18:58:56 +02001347 if (unlikely(rt73usb_init_registers(rt2x00dev) ||
1348 rt73usb_init_bbp(rt2x00dev)))
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001349 return -EIO;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001350
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001351 return 0;
1352}
1353
1354static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1355{
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001356 rt2x00usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001357
1358 /*
1359 * Disable synchronisation.
1360 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001361 rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, 0);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001362
1363 rt2x00usb_disable_radio(rt2x00dev);
1364}
1365
1366static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1367{
1368 u32 reg;
1369 unsigned int i;
1370 char put_to_sleep;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001371
1372 put_to_sleep = (state != STATE_AWAKE);
1373
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001374 rt2x00usb_register_read(rt2x00dev, MAC_CSR12, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001375 rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1376 rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001377 rt2x00usb_register_write(rt2x00dev, MAC_CSR12, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001378
1379 /*
1380 * Device is not guaranteed to be in the requested state yet.
1381 * We must wait until the register indicates that the
1382 * device has entered the correct state.
1383 */
1384 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001385 rt2x00usb_register_read(rt2x00dev, MAC_CSR12, &reg);
Ivo van Doorn2b08da32008-06-03 18:58:56 +02001386 state = rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1387 if (state == !put_to_sleep)
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001388 return 0;
1389 msleep(10);
1390 }
1391
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001392 return -EBUSY;
1393}
1394
1395static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1396 enum dev_state state)
1397{
1398 int retval = 0;
1399
1400 switch (state) {
1401 case STATE_RADIO_ON:
1402 retval = rt73usb_enable_radio(rt2x00dev);
1403 break;
1404 case STATE_RADIO_OFF:
1405 rt73usb_disable_radio(rt2x00dev);
1406 break;
1407 case STATE_RADIO_RX_ON:
Ivo van Doorn61667d82008-02-25 23:15:05 +01001408 case STATE_RADIO_RX_ON_LINK:
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001409 case STATE_RADIO_RX_OFF:
Ivo van Doorn61667d82008-02-25 23:15:05 +01001410 case STATE_RADIO_RX_OFF_LINK:
Ivo van Doorn2b08da32008-06-03 18:58:56 +02001411 rt73usb_toggle_rx(rt2x00dev, state);
1412 break;
1413 case STATE_RADIO_IRQ_ON:
1414 case STATE_RADIO_IRQ_OFF:
1415 /* No support, but no error either */
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001416 break;
1417 case STATE_DEEP_SLEEP:
1418 case STATE_SLEEP:
1419 case STATE_STANDBY:
1420 case STATE_AWAKE:
1421 retval = rt73usb_set_state(rt2x00dev, state);
1422 break;
1423 default:
1424 retval = -ENOTSUPP;
1425 break;
1426 }
1427
Ivo van Doorn2b08da32008-06-03 18:58:56 +02001428 if (unlikely(retval))
1429 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1430 state, retval);
1431
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001432 return retval;
1433}
1434
1435/*
1436 * TX descriptor initialization
1437 */
1438static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
Ivo van Doorn906c1102008-08-04 16:38:24 +02001439 struct sk_buff *skb,
1440 struct txentry_desc *txdesc)
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001441{
Ivo van Doorn181d6902008-02-05 16:42:23 -05001442 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
Ivo van Doorndd3193e2008-01-06 23:41:10 +01001443 __le32 *txd = skbdesc->desc;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001444 u32 word;
1445
1446 /*
1447 * Start writing the descriptor words.
1448 */
1449 rt2x00_desc_read(txd, 1, &word);
Ivo van Doorn181d6902008-02-05 16:42:23 -05001450 rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue);
1451 rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs);
1452 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1453 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
Ivo van Doorn906c1102008-08-04 16:38:24 +02001454 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
Ivo van Doorn5adf6d62008-07-20 18:03:38 +02001455 rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE,
1456 test_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001457 rt2x00_desc_write(txd, 1, word);
1458
1459 rt2x00_desc_read(txd, 2, &word);
Ivo van Doorn181d6902008-02-05 16:42:23 -05001460 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1461 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1462 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1463 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001464 rt2x00_desc_write(txd, 2, word);
1465
Ivo van Doorn906c1102008-08-04 16:38:24 +02001466 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
Ivo van Doorn1ce9cda2008-12-02 18:19:48 +01001467 _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
1468 _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
Ivo van Doorn906c1102008-08-04 16:38:24 +02001469 }
1470
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001471 rt2x00_desc_read(txd, 5, &word);
1472 rt2x00_set_field32(&word, TXD_W5_TX_POWER,
Ivo van Doornac1aa7e2008-02-17 17:31:48 +01001473 TXPOWER_TO_DEV(rt2x00dev->tx_power));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001474 rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1475 rt2x00_desc_write(txd, 5, word);
1476
1477 rt2x00_desc_read(txd, 0, &word);
1478 rt2x00_set_field32(&word, TXD_W0_BURST,
Ivo van Doorn181d6902008-02-05 16:42:23 -05001479 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001480 rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1481 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
Ivo van Doorn181d6902008-02-05 16:42:23 -05001482 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001483 rt2x00_set_field32(&word, TXD_W0_ACK,
Ivo van Doorn181d6902008-02-05 16:42:23 -05001484 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001485 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
Ivo van Doorn181d6902008-02-05 16:42:23 -05001486 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001487 rt2x00_set_field32(&word, TXD_W0_OFDM,
Ivo van Doorn076f9582008-12-20 10:59:02 +01001488 (txdesc->rate_mode == RATE_MODE_OFDM));
Ivo van Doorn181d6902008-02-05 16:42:23 -05001489 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001490 rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
Ivo van Doorn61486e02008-05-10 13:42:31 +02001491 test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags));
Ivo van Doorn906c1102008-08-04 16:38:24 +02001492 rt2x00_set_field32(&word, TXD_W0_TKIP_MIC,
1493 test_bit(ENTRY_TXD_ENCRYPT_MMIC, &txdesc->flags));
1494 rt2x00_set_field32(&word, TXD_W0_KEY_TABLE,
1495 test_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags));
1496 rt2x00_set_field32(&word, TXD_W0_KEY_INDEX, txdesc->key_idx);
Gertjan van Wingerdedf624ca2010-05-03 22:43:05 +02001497 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001498 rt2x00_set_field32(&word, TXD_W0_BURST2,
Ivo van Doorn181d6902008-02-05 16:42:23 -05001499 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
Ivo van Doorn906c1102008-08-04 16:38:24 +02001500 rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, txdesc->cipher);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001501 rt2x00_desc_write(txd, 0, word);
1502}
1503
Ivo van Doornbd88a782008-07-09 15:12:44 +02001504/*
1505 * TX data initialization
1506 */
1507static void rt73usb_write_beacon(struct queue_entry *entry)
1508{
1509 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1510 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1511 unsigned int beacon_base;
1512 u32 reg;
1513
1514 /*
1515 * Add the descriptor in front of the skb.
1516 */
1517 skb_push(entry->skb, entry->queue->desc_size);
1518 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1519 skbdesc->desc = entry->skb->data;
1520
1521 /*
1522 * Disable beaconing while we are reloading the beacon data,
1523 * otherwise we might be sending out invalid data.
1524 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001525 rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
Ivo van Doornbd88a782008-07-09 15:12:44 +02001526 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001527 rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
Ivo van Doornbd88a782008-07-09 15:12:44 +02001528
1529 /*
1530 * Write entire beacon with descriptor to register.
1531 */
1532 beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
Iwo Mergler3e0c1ab2008-07-19 16:17:16 +02001533 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
1534 USB_VENDOR_REQUEST_OUT, beacon_base,
1535 entry->skb->data, entry->skb->len,
1536 REGISTER_TIMEOUT32(entry->skb->len));
Ivo van Doornbd88a782008-07-09 15:12:44 +02001537
1538 /*
1539 * Clean up the beacon skb.
1540 */
1541 dev_kfree_skb(entry->skb);
1542 entry->skb = NULL;
1543}
1544
Ivo van Doornf1ca2162008-11-13 23:07:33 +01001545static int rt73usb_get_tx_data_len(struct queue_entry *entry)
Ivo van Doorndd9fa2d2007-10-06 14:15:46 +02001546{
1547 int length;
1548
1549 /*
1550 * The length _must_ be a multiple of 4,
1551 * but it must _not_ be a multiple of the USB packet size.
1552 */
Ivo van Doornf1ca2162008-11-13 23:07:33 +01001553 length = roundup(entry->skb->len, 4);
1554 length += (4 * !(length % entry->queue->usb_maxpacket));
Ivo van Doorndd9fa2d2007-10-06 14:15:46 +02001555
1556 return length;
1557}
1558
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001559static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
Ivo van Doorne58c6ac2008-04-21 19:00:47 +02001560 const enum data_queue_qid queue)
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001561{
1562 u32 reg;
1563
Ivo van Doornf019d512008-06-06 22:47:39 +02001564 if (queue != QID_BEACON) {
1565 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001566 return;
Ivo van Doornf019d512008-06-06 22:47:39 +02001567 }
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001568
1569 /*
1570 * For Wi-Fi faily generated beacons between participating stations.
1571 * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1572 */
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001573 rt2x00usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001574
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001575 rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001576 if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
Ivo van Doorn8af244c2008-03-09 22:42:59 +01001577 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1578 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001579 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001580 rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001581 }
1582}
1583
1584/*
1585 * RX control handlers
1586 */
1587static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1588{
Ivo van Doornba2ab472008-08-06 16:22:17 +02001589 u8 offset = rt2x00dev->lna_gain;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001590 u8 lna;
1591
1592 lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1593 switch (lna) {
1594 case 3:
Ivo van Doornba2ab472008-08-06 16:22:17 +02001595 offset += 90;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001596 break;
1597 case 2:
Ivo van Doornba2ab472008-08-06 16:22:17 +02001598 offset += 74;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001599 break;
1600 case 1:
Ivo van Doornba2ab472008-08-06 16:22:17 +02001601 offset += 64;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001602 break;
1603 default:
1604 return 0;
1605 }
1606
Johannes Berg8318d782008-01-24 19:38:38 +01001607 if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001608 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1609 if (lna == 3 || lna == 2)
1610 offset += 10;
1611 } else {
1612 if (lna == 3)
1613 offset += 6;
1614 else if (lna == 2)
1615 offset += 8;
1616 }
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001617 }
1618
1619 return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1620}
1621
Ivo van Doorn181d6902008-02-05 16:42:23 -05001622static void rt73usb_fill_rxdone(struct queue_entry *entry,
John Daiker55887512008-10-17 12:16:17 -07001623 struct rxdone_entry_desc *rxdesc)
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001624{
Ivo van Doorn906c1102008-08-04 16:38:24 +02001625 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
Ivo van Doorn181d6902008-02-05 16:42:23 -05001626 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
Ivo van Doorn4bd7c452008-01-24 00:48:03 -08001627 __le32 *rxd = (__le32 *)entry->skb->data;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001628 u32 word0;
1629 u32 word1;
1630
Ivo van Doornf855c102008-03-09 22:38:18 +01001631 /*
Gertjan van Wingerdea26cbc62008-06-06 22:54:28 +02001632 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1633 * frame data in rt2x00usb.
Ivo van Doornf855c102008-03-09 22:38:18 +01001634 */
Gertjan van Wingerdea26cbc62008-06-06 22:54:28 +02001635 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
Ivo van Doorn70a96102008-05-10 13:43:38 +02001636 rxd = (__le32 *)skbdesc->desc;
Ivo van Doornf855c102008-03-09 22:38:18 +01001637
1638 /*
Ivo van Doorn70a96102008-05-10 13:43:38 +02001639 * It is now safe to read the descriptor on all architectures.
Ivo van Doornf855c102008-03-09 22:38:18 +01001640 */
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001641 rt2x00_desc_read(rxd, 0, &word0);
1642 rt2x00_desc_read(rxd, 1, &word1);
1643
Johannes Berg4150c572007-09-17 01:29:23 -04001644 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
Ivo van Doorn181d6902008-02-05 16:42:23 -05001645 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001646
Gertjan van Wingerde78b8f3b2010-05-08 23:40:20 +02001647 rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER_ALG);
1648 rxdesc->cipher_status = rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR);
Ivo van Doorn906c1102008-08-04 16:38:24 +02001649
1650 if (rxdesc->cipher != CIPHER_NONE) {
Ivo van Doorn1ce9cda2008-12-02 18:19:48 +01001651 _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
1652 _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
Ivo van Doorn74415ed2008-12-02 22:50:33 +01001653 rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
1654
Ivo van Doorn906c1102008-08-04 16:38:24 +02001655 _rt2x00_desc_read(rxd, 4, &rxdesc->icv);
Ivo van Doorn74415ed2008-12-02 22:50:33 +01001656 rxdesc->dev_flags |= RXDONE_CRYPTO_ICV;
Ivo van Doorn906c1102008-08-04 16:38:24 +02001657
1658 /*
1659 * Hardware has stripped IV/EIV data from 802.11 frame during
1660 * decryption. It has provided the data seperately but rt2x00lib
1661 * should decide if it should be reinserted.
1662 */
1663 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
1664
1665 /*
1666 * FIXME: Legacy driver indicates that the frame does
1667 * contain the Michael Mic. Unfortunately, in rt2x00
1668 * the MIC seems to be missing completely...
1669 */
1670 rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
1671
1672 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
1673 rxdesc->flags |= RX_FLAG_DECRYPTED;
1674 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
1675 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
1676 }
1677
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001678 /*
1679 * Obtain the status about this packet.
Ivo van Doorn89993892008-03-09 22:49:04 +01001680 * When frame was received with an OFDM bitrate,
1681 * the signal is the PLCP value. If it was received with
1682 * a CCK bitrate the signal is the rate in 100kbit/s.
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001683 */
Ivo van Doorn89993892008-03-09 22:49:04 +01001684 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
Ivo van Doorn906c1102008-08-04 16:38:24 +02001685 rxdesc->rssi = rt73usb_agc_to_rssi(rt2x00dev, word1);
Ivo van Doorn181d6902008-02-05 16:42:23 -05001686 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
Ivo van Doorn19d30e02008-03-15 21:38:07 +01001687
Ivo van Doorn19d30e02008-03-15 21:38:07 +01001688 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1689 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
Ivo van Doorn6c6aa3c2008-08-29 21:07:16 +02001690 else
1691 rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
Ivo van Doorn19d30e02008-03-15 21:38:07 +01001692 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1693 rxdesc->dev_flags |= RXDONE_MY_BSS;
Ivo van Doorn181d6902008-02-05 16:42:23 -05001694
1695 /*
Ivo van Doorn70a96102008-05-10 13:43:38 +02001696 * Set skb pointers, and update frame information.
Mattias Nissler2ae23852008-03-09 22:41:22 +01001697 */
Ivo van Doorn70a96102008-05-10 13:43:38 +02001698 skb_pull(entry->skb, entry->queue->desc_size);
Mattias Nissler2ae23852008-03-09 22:41:22 +01001699 skb_trim(entry->skb, rxdesc->size);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001700}
1701
1702/*
1703 * Device probe functions.
1704 */
1705static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1706{
1707 u16 word;
1708 u8 *mac;
1709 s8 value;
1710
1711 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1712
1713 /*
1714 * Start validation of the data that has been read.
1715 */
1716 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1717 if (!is_valid_ether_addr(mac)) {
1718 random_ether_addr(mac);
Johannes Berge1749612008-10-27 15:59:26 -07001719 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001720 }
1721
1722 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1723 if (word == 0xffff) {
1724 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
Ivo van Doorn362f3b62007-10-13 16:26:18 +02001725 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1726 ANTENNA_B);
1727 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1728 ANTENNA_B);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001729 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1730 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1731 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1732 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1733 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1734 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1735 }
1736
1737 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1738 if (word == 0xffff) {
1739 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1740 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1741 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1742 }
1743
1744 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1745 if (word == 0xffff) {
1746 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1747 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1748 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1749 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1750 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1751 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1752 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1753 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1754 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1755 LED_MODE_DEFAULT);
1756 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1757 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1758 }
1759
1760 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1761 if (word == 0xffff) {
1762 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1763 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1764 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1765 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1766 }
1767
1768 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1769 if (word == 0xffff) {
1770 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1771 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1772 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1773 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1774 } else {
1775 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1776 if (value < -10 || value > 10)
1777 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1778 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1779 if (value < -10 || value > 10)
1780 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1781 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1782 }
1783
1784 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1785 if (word == 0xffff) {
1786 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1787 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1788 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
Ivo van Doorn417f4122008-02-10 22:50:58 +01001789 EEPROM(rt2x00dev, "RSSI OFFSET A: 0x%04x\n", word);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001790 } else {
1791 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1792 if (value < -10 || value > 10)
1793 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1794 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1795 if (value < -10 || value > 10)
1796 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1797 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1798 }
1799
1800 return 0;
1801}
1802
1803static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1804{
1805 u32 reg;
1806 u16 value;
1807 u16 eeprom;
1808
1809 /*
1810 * Read EEPROM word for configuration.
1811 */
1812 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1813
1814 /*
1815 * Identify RF chipset.
1816 */
1817 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01001818 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
Gertjan van Wingerde49e721e2010-02-13 20:55:49 +01001819 rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
1820 value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001821
Gertjan van Wingerde49e721e2010-02-13 20:55:49 +01001822 if (!rt2x00_rt(rt2x00dev, RT2573) || (rt2x00_rev(rt2x00dev) == 0)) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001823 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1824 return -ENODEV;
1825 }
1826
Gertjan van Wingerde5122d892009-12-23 00:03:25 +01001827 if (!rt2x00_rf(rt2x00dev, RF5226) &&
1828 !rt2x00_rf(rt2x00dev, RF2528) &&
1829 !rt2x00_rf(rt2x00dev, RF5225) &&
1830 !rt2x00_rf(rt2x00dev, RF2527)) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001831 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1832 return -ENODEV;
1833 }
1834
1835 /*
1836 * Identify default antenna configuration.
1837 */
Ivo van Doornaddc81bd2007-10-13 16:26:23 +02001838 rt2x00dev->default_ant.tx =
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001839 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
Ivo van Doornaddc81bd2007-10-13 16:26:23 +02001840 rt2x00dev->default_ant.rx =
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001841 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1842
1843 /*
1844 * Read the Frame type.
1845 */
1846 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1847 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1848
1849 /*
Ivo van Doorn7396faf2008-12-20 10:55:57 +01001850 * Detect if this device has an hardware controlled radio.
1851 */
Ivo van Doorn7396faf2008-12-20 10:55:57 +01001852 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
1853 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
Ivo van Doorn7396faf2008-12-20 10:55:57 +01001854
1855 /*
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001856 * Read frequency offset.
1857 */
1858 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1859 rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1860
1861 /*
1862 * Read external LNA informations.
1863 */
1864 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1865
1866 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1867 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1868 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1869 }
1870
1871 /*
1872 * Store led settings, for correct led behaviour.
1873 */
Ivo van Doorn771fd562008-09-08 19:07:15 +02001874#ifdef CONFIG_RT2X00_LIB_LEDS
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001875 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1876
Ivo van Doorn475433b2008-06-03 20:30:01 +02001877 rt73usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1878 rt73usb_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
1879 if (value == LED_MODE_SIGNAL_STRENGTH)
1880 rt73usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1881 LED_TYPE_QUALITY);
Ivo van Doorna9450b72008-02-03 15:53:40 +01001882
1883 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value);
1884 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001885 rt2x00_get_field16(eeprom,
1886 EEPROM_LED_POLARITY_GPIO_0));
Ivo van Doorna9450b72008-02-03 15:53:40 +01001887 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_1,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001888 rt2x00_get_field16(eeprom,
1889 EEPROM_LED_POLARITY_GPIO_1));
Ivo van Doorna9450b72008-02-03 15:53:40 +01001890 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_2,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001891 rt2x00_get_field16(eeprom,
1892 EEPROM_LED_POLARITY_GPIO_2));
Ivo van Doorna9450b72008-02-03 15:53:40 +01001893 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_3,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001894 rt2x00_get_field16(eeprom,
1895 EEPROM_LED_POLARITY_GPIO_3));
Ivo van Doorna9450b72008-02-03 15:53:40 +01001896 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_4,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001897 rt2x00_get_field16(eeprom,
1898 EEPROM_LED_POLARITY_GPIO_4));
Ivo van Doorna9450b72008-02-03 15:53:40 +01001899 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_ACT,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001900 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
Ivo van Doorna9450b72008-02-03 15:53:40 +01001901 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_BG,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001902 rt2x00_get_field16(eeprom,
1903 EEPROM_LED_POLARITY_RDY_G));
Ivo van Doorna9450b72008-02-03 15:53:40 +01001904 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_A,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001905 rt2x00_get_field16(eeprom,
1906 EEPROM_LED_POLARITY_RDY_A));
Ivo van Doorn771fd562008-09-08 19:07:15 +02001907#endif /* CONFIG_RT2X00_LIB_LEDS */
Ivo van Doorn95ea3622007-09-25 17:57:13 -07001908
1909 return 0;
1910}
1911
1912/*
1913 * RF value list for RF2528
1914 * Supports: 2.4 GHz
1915 */
1916static const struct rf_channel rf_vals_bg_2528[] = {
1917 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1918 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1919 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1920 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1921 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1922 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1923 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1924 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1925 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1926 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1927 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1928 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1929 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1930 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1931};
1932
1933/*
1934 * RF value list for RF5226
1935 * Supports: 2.4 GHz & 5.2 GHz
1936 */
1937static const struct rf_channel rf_vals_5226[] = {
1938 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1939 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1940 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1941 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1942 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1943 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1944 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1945 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1946 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1947 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1948 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1949 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1950 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1951 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1952
1953 /* 802.11 UNI / HyperLan 2 */
1954 { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1955 { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1956 { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1957 { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1958 { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1959 { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1960 { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1961 { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1962
1963 /* 802.11 HyperLan 2 */
1964 { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1965 { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1966 { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1967 { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1968 { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1969 { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1970 { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1971 { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1972 { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1973 { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1974
1975 /* 802.11 UNII */
1976 { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1977 { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1978 { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1979 { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1980 { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1981 { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1982
1983 /* MMAC(Japan)J52 ch 34,38,42,46 */
1984 { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1985 { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1986 { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1987 { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1988};
1989
1990/*
1991 * RF value list for RF5225 & RF2527
1992 * Supports: 2.4 GHz & 5.2 GHz
1993 */
1994static const struct rf_channel rf_vals_5225_2527[] = {
1995 { 1, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1996 { 2, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1997 { 3, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1998 { 4, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1999 { 5, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
2000 { 6, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
2001 { 7, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
2002 { 8, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
2003 { 9, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
2004 { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
2005 { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
2006 { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
2007 { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
2008 { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
2009
2010 /* 802.11 UNI / HyperLan 2 */
2011 { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
2012 { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
2013 { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
2014 { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
2015 { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
2016 { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
2017 { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
2018 { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
2019
2020 /* 802.11 HyperLan 2 */
2021 { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
2022 { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
2023 { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
2024 { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
2025 { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
2026 { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
2027 { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
2028 { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
2029 { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
2030 { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
2031
2032 /* 802.11 UNII */
2033 { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
2034 { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
2035 { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
2036 { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
2037 { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
2038 { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
2039
2040 /* MMAC(Japan)J52 ch 34,38,42,46 */
2041 { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
2042 { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
2043 { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
2044 { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
2045};
2046
2047
Ivo van Doorn8c5e7a52008-08-04 16:38:47 +02002048static int rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002049{
2050 struct hw_mode_spec *spec = &rt2x00dev->spec;
Ivo van Doorn8c5e7a52008-08-04 16:38:47 +02002051 struct channel_info *info;
2052 char *tx_power;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002053 unsigned int i;
2054
2055 /*
2056 * Initialize all hw fields.
2057 */
2058 rt2x00dev->hw->flags =
Bruno Randolf566bfe52008-05-08 19:15:40 +02002059 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
Johannes Berg4be8c382009-01-07 18:28:20 +01002060 IEEE80211_HW_SIGNAL_DBM |
2061 IEEE80211_HW_SUPPORTS_PS |
2062 IEEE80211_HW_PS_NULLFUNC_STACK;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002063
Gertjan van Wingerde14a3bf82008-06-16 19:55:43 +02002064 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002065 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
2066 rt2x00_eeprom_addr(rt2x00dev,
2067 EEPROM_MAC_ADDR_0));
2068
2069 /*
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002070 * Initialize hw_mode information.
2071 */
Ivo van Doorn31562e82008-02-17 17:35:05 +01002072 spec->supported_bands = SUPPORT_BAND_2GHZ;
2073 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002074
Gertjan van Wingerde5122d892009-12-23 00:03:25 +01002075 if (rt2x00_rf(rt2x00dev, RF2528)) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002076 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
2077 spec->channels = rf_vals_bg_2528;
Gertjan van Wingerde5122d892009-12-23 00:03:25 +01002078 } else if (rt2x00_rf(rt2x00dev, RF5226)) {
Ivo van Doorn31562e82008-02-17 17:35:05 +01002079 spec->supported_bands |= SUPPORT_BAND_5GHZ;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002080 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
2081 spec->channels = rf_vals_5226;
Gertjan van Wingerde5122d892009-12-23 00:03:25 +01002082 } else if (rt2x00_rf(rt2x00dev, RF2527)) {
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002083 spec->num_channels = 14;
2084 spec->channels = rf_vals_5225_2527;
Gertjan van Wingerde5122d892009-12-23 00:03:25 +01002085 } else if (rt2x00_rf(rt2x00dev, RF5225)) {
Ivo van Doorn31562e82008-02-17 17:35:05 +01002086 spec->supported_bands |= SUPPORT_BAND_5GHZ;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002087 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
2088 spec->channels = rf_vals_5225_2527;
2089 }
2090
Ivo van Doorn8c5e7a52008-08-04 16:38:47 +02002091 /*
2092 * Create channel information array
2093 */
2094 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
2095 if (!info)
2096 return -ENOMEM;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002097
Ivo van Doorn8c5e7a52008-08-04 16:38:47 +02002098 spec->channels_info = info;
2099
2100 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
2101 for (i = 0; i < 14; i++)
2102 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
2103
2104 if (spec->num_channels > 14) {
2105 tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
2106 for (i = 14; i < spec->num_channels; i++)
2107 info[i].tx_power1 = TXPOWER_FROM_DEV(tx_power[i]);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002108 }
Ivo van Doorn8c5e7a52008-08-04 16:38:47 +02002109
2110 return 0;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002111}
2112
2113static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
2114{
2115 int retval;
2116
2117 /*
2118 * Allocate eeprom data.
2119 */
2120 retval = rt73usb_validate_eeprom(rt2x00dev);
2121 if (retval)
2122 return retval;
2123
2124 retval = rt73usb_init_eeprom(rt2x00dev);
2125 if (retval)
2126 return retval;
2127
2128 /*
2129 * Initialize hw specifications.
2130 */
Ivo van Doorn8c5e7a52008-08-04 16:38:47 +02002131 retval = rt73usb_probe_hw_mode(rt2x00dev);
2132 if (retval)
2133 return retval;
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002134
2135 /*
Igor Perminov1afcfd542009-08-08 23:55:55 +02002136 * This device has multiple filters for control frames,
2137 * but has no a separate filter for PS Poll frames.
2138 */
2139 __set_bit(DRIVER_SUPPORT_CONTROL_FILTERS, &rt2x00dev->flags);
2140
2141 /*
Ivo van Doorn9404ef32008-02-03 15:48:38 +01002142 * This device requires firmware.
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002143 */
Ivo van Doorn066cb632007-09-25 20:55:39 +02002144 __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
Ivo van Doorn008c4482008-08-06 17:27:31 +02002145 if (!modparam_nohwcrypt)
2146 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002147
2148 /*
2149 * Set the rssi offset.
2150 */
2151 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
2152
2153 return 0;
2154}
2155
2156/*
2157 * IEEE80211 stack callback functions.
2158 */
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002159static int rt73usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2160 const struct ieee80211_tx_queue_params *params)
2161{
2162 struct rt2x00_dev *rt2x00dev = hw->priv;
2163 struct data_queue *queue;
2164 struct rt2x00_field32 field;
2165 int retval;
2166 u32 reg;
Ivo van Doorn5e790022009-01-17 20:42:58 +01002167 u32 offset;
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002168
2169 /*
2170 * First pass the configuration through rt2x00lib, that will
2171 * update the queue settings and validate the input. After that
2172 * we are free to update the registers based on the value
2173 * in the queue parameter.
2174 */
2175 retval = rt2x00mac_conf_tx(hw, queue_idx, params);
2176 if (retval)
2177 return retval;
2178
Ivo van Doorn5e790022009-01-17 20:42:58 +01002179 /*
2180 * We only need to perform additional register initialization
2181 * for WMM queues/
2182 */
2183 if (queue_idx >= 4)
2184 return 0;
2185
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002186 queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
2187
2188 /* Update WMM TXOP register */
Ivo van Doorn5e790022009-01-17 20:42:58 +01002189 offset = AC_TXOP_CSR0 + (sizeof(u32) * (!!(queue_idx & 2)));
2190 field.bit_offset = (queue_idx & 1) * 16;
2191 field.bit_mask = 0xffff << field.bit_offset;
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002192
Ivo van Doorn5e790022009-01-17 20:42:58 +01002193 rt2x00usb_register_read(rt2x00dev, offset, &reg);
2194 rt2x00_set_field32(&reg, field, queue->txop);
2195 rt2x00usb_register_write(rt2x00dev, offset, reg);
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002196
2197 /* Update WMM registers */
2198 field.bit_offset = queue_idx * 4;
2199 field.bit_mask = 0xf << field.bit_offset;
2200
Ivo van Doorn0f829b12008-11-10 19:42:18 +01002201 rt2x00usb_register_read(rt2x00dev, AIFSN_CSR, &reg);
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002202 rt2x00_set_field32(&reg, field, queue->aifs);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01002203 rt2x00usb_register_write(rt2x00dev, AIFSN_CSR, reg);
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002204
Ivo van Doorn0f829b12008-11-10 19:42:18 +01002205 rt2x00usb_register_read(rt2x00dev, CWMIN_CSR, &reg);
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002206 rt2x00_set_field32(&reg, field, queue->cw_min);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01002207 rt2x00usb_register_write(rt2x00dev, CWMIN_CSR, reg);
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002208
Ivo van Doorn0f829b12008-11-10 19:42:18 +01002209 rt2x00usb_register_read(rt2x00dev, CWMAX_CSR, &reg);
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002210 rt2x00_set_field32(&reg, field, queue->cw_max);
Ivo van Doorn0f829b12008-11-10 19:42:18 +01002211 rt2x00usb_register_write(rt2x00dev, CWMAX_CSR, reg);
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002212
2213 return 0;
2214}
2215
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002216static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
2217{
2218 struct rt2x00_dev *rt2x00dev = hw->priv;
2219 u64 tsf;
2220 u32 reg;
2221
Ivo van Doorn0f829b12008-11-10 19:42:18 +01002222 rt2x00usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002223 tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
Ivo van Doorn0f829b12008-11-10 19:42:18 +01002224 rt2x00usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002225 tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
2226
2227 return tsf;
2228}
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002229
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002230static const struct ieee80211_ops rt73usb_mac80211_ops = {
2231 .tx = rt2x00mac_tx,
Johannes Berg4150c572007-09-17 01:29:23 -04002232 .start = rt2x00mac_start,
2233 .stop = rt2x00mac_stop,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002234 .add_interface = rt2x00mac_add_interface,
2235 .remove_interface = rt2x00mac_remove_interface,
2236 .config = rt2x00mac_config,
Ivo van Doorn3a643d22008-03-25 14:13:18 +01002237 .configure_filter = rt2x00mac_configure_filter,
Stefan Steuerwald930c06f2009-07-10 20:42:55 +02002238 .set_tim = rt2x00mac_set_tim,
Ivo van Doorn906c1102008-08-04 16:38:24 +02002239 .set_key = rt2x00mac_set_key,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002240 .get_stats = rt2x00mac_get_stats,
Johannes Berg471b3ef2007-12-28 14:32:58 +01002241 .bss_info_changed = rt2x00mac_bss_info_changed,
Ivo van Doorn2af0a572008-08-29 21:05:45 +02002242 .conf_tx = rt73usb_conf_tx,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002243 .get_tsf = rt73usb_get_tsf,
Ivo van Doorne47a5cd2009-07-01 15:17:35 +02002244 .rfkill_poll = rt2x00mac_rfkill_poll,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002245};
2246
2247static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2248 .probe_hw = rt73usb_probe_hw,
2249 .get_firmware_name = rt73usb_get_firmware_name,
Ivo van Doorn0cbe0062009-01-28 00:33:47 +01002250 .check_firmware = rt73usb_check_firmware,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002251 .load_firmware = rt73usb_load_firmware,
2252 .initialize = rt2x00usb_initialize,
2253 .uninitialize = rt2x00usb_uninitialize,
Ivo van Doorn798b7ad2008-11-08 15:25:33 +01002254 .clear_entry = rt2x00usb_clear_entry,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002255 .set_device_state = rt73usb_set_device_state,
Ivo van Doorn7396faf2008-12-20 10:55:57 +01002256 .rfkill_poll = rt73usb_rfkill_poll,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002257 .link_stats = rt73usb_link_stats,
2258 .reset_tuner = rt73usb_reset_tuner,
2259 .link_tuner = rt73usb_link_tuner,
2260 .write_tx_desc = rt73usb_write_tx_desc,
2261 .write_tx_data = rt2x00usb_write_tx_data,
Ivo van Doornbd88a782008-07-09 15:12:44 +02002262 .write_beacon = rt73usb_write_beacon,
Ivo van Doorndd9fa2d2007-10-06 14:15:46 +02002263 .get_tx_data_len = rt73usb_get_tx_data_len,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002264 .kick_tx_queue = rt73usb_kick_tx_queue,
Ivo van Doorna2c9b652009-01-28 00:32:33 +01002265 .kill_tx_queue = rt2x00usb_kill_tx_queue,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002266 .fill_rxdone = rt73usb_fill_rxdone,
Ivo van Doorn906c1102008-08-04 16:38:24 +02002267 .config_shared_key = rt73usb_config_shared_key,
2268 .config_pairwise_key = rt73usb_config_pairwise_key,
Ivo van Doorn3a643d22008-03-25 14:13:18 +01002269 .config_filter = rt73usb_config_filter,
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +01002270 .config_intf = rt73usb_config_intf,
Ivo van Doorn72810372008-03-09 22:46:18 +01002271 .config_erp = rt73usb_config_erp,
Ivo van Doorne4ea1c42008-10-29 17:17:57 +01002272 .config_ant = rt73usb_config_ant,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002273 .config = rt73usb_config,
2274};
2275
Ivo van Doorn181d6902008-02-05 16:42:23 -05002276static const struct data_queue_desc rt73usb_queue_rx = {
2277 .entry_num = RX_ENTRIES,
2278 .data_size = DATA_FRAME_SIZE,
2279 .desc_size = RXD_DESC_SIZE,
Ivo van Doornb8be63f2008-05-10 13:46:03 +02002280 .priv_size = sizeof(struct queue_entry_priv_usb),
Ivo van Doorn181d6902008-02-05 16:42:23 -05002281};
2282
2283static const struct data_queue_desc rt73usb_queue_tx = {
2284 .entry_num = TX_ENTRIES,
2285 .data_size = DATA_FRAME_SIZE,
2286 .desc_size = TXD_DESC_SIZE,
Ivo van Doornb8be63f2008-05-10 13:46:03 +02002287 .priv_size = sizeof(struct queue_entry_priv_usb),
Ivo van Doorn181d6902008-02-05 16:42:23 -05002288};
2289
2290static const struct data_queue_desc rt73usb_queue_bcn = {
Ivo van Doorn6bb40dd2008-02-03 15:49:59 +01002291 .entry_num = 4 * BEACON_ENTRIES,
Ivo van Doorn181d6902008-02-05 16:42:23 -05002292 .data_size = MGMT_FRAME_SIZE,
2293 .desc_size = TXINFO_SIZE,
Ivo van Doornb8be63f2008-05-10 13:46:03 +02002294 .priv_size = sizeof(struct queue_entry_priv_usb),
Ivo van Doorn181d6902008-02-05 16:42:23 -05002295};
2296
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002297static const struct rt2x00_ops rt73usb_ops = {
Gertjan van Wingerde04d03622009-11-23 22:44:51 +01002298 .name = KBUILD_MODNAME,
2299 .max_sta_intf = 1,
2300 .max_ap_intf = 4,
2301 .eeprom_size = EEPROM_SIZE,
2302 .rf_size = RF_SIZE,
2303 .tx_queues = NUM_TX_QUEUES,
Gertjan van Wingerdee6218cc2009-11-23 22:44:52 +01002304 .extra_tx_headroom = TXD_DESC_SIZE,
Gertjan van Wingerde04d03622009-11-23 22:44:51 +01002305 .rx = &rt73usb_queue_rx,
2306 .tx = &rt73usb_queue_tx,
2307 .bcn = &rt73usb_queue_bcn,
2308 .lib = &rt73usb_rt2x00_ops,
2309 .hw = &rt73usb_mac80211_ops,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002310#ifdef CONFIG_RT2X00_LIB_DEBUGFS
Gertjan van Wingerde04d03622009-11-23 22:44:51 +01002311 .debugfs = &rt73usb_rt2x00debug,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002312#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2313};
2314
2315/*
2316 * rt73usb module information.
2317 */
2318static struct usb_device_id rt73usb_device_table[] = {
2319 /* AboCom */
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002320 { USB_DEVICE(0x07b8, 0xb21b), USB_DEVICE_DATA(&rt73usb_ops) },
2321 { USB_DEVICE(0x07b8, 0xb21c), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002322 { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002323 { USB_DEVICE(0x07b8, 0xb21e), USB_DEVICE_DATA(&rt73usb_ops) },
2324 { USB_DEVICE(0x07b8, 0xb21f), USB_DEVICE_DATA(&rt73usb_ops) },
2325 /* AL */
2326 { USB_DEVICE(0x14b2, 0x3c10), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn144d9ad2009-02-15 17:43:05 +01002327 /* Amigo */
2328 { USB_DEVICE(0x148f, 0x9021), USB_DEVICE_DATA(&rt73usb_ops) },
2329 { USB_DEVICE(0x0eb0, 0x9021), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002330 /* AMIT */
2331 { USB_DEVICE(0x18c5, 0x0002), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002332 /* Askey */
2333 { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2334 /* ASUS */
2335 { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2336 { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2337 /* Belkin */
2338 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2339 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2340 { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn1f068622007-10-13 16:27:13 +02002341 { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002342 /* Billionton */
2343 { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002344 { USB_DEVICE(0x08dd, 0x0120), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002345 /* Buffalo */
Ivo van Doorn964d6ad2009-01-31 10:07:39 +01002346 { USB_DEVICE(0x0411, 0x00d8), USB_DEVICE_DATA(&rt73usb_ops) },
Kenichi HORIO050e8a42009-12-04 23:46:56 +01002347 { USB_DEVICE(0x0411, 0x00d9), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002348 { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn6aabd4c2009-03-28 20:52:14 +01002349 { USB_DEVICE(0x0411, 0x0116), USB_DEVICE_DATA(&rt73usb_ops) },
2350 { USB_DEVICE(0x0411, 0x0119), USB_DEVICE_DATA(&rt73usb_ops) },
Bryan Polk51b28532010-03-01 12:23:28 -05002351 /* CEIVA */
2352 { USB_DEVICE(0x178d, 0x02be), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002353 /* CNet */
2354 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2355 { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2356 /* Conceptronic */
2357 { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
Masakazu Mokuno0a748922008-03-15 21:38:29 +01002358 /* Corega */
2359 { USB_DEVICE(0x07aa, 0x002e), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002360 /* D-Link */
2361 { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2362 { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorncb62ecc2008-06-12 20:47:17 +02002363 { USB_DEVICE(0x07d1, 0x3c06), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn445815d2008-03-09 22:42:32 +01002364 { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002365 /* Edimax */
2366 { USB_DEVICE(0x7392, 0x7318), USB_DEVICE_DATA(&rt73usb_ops) },
2367 { USB_DEVICE(0x7392, 0x7618), USB_DEVICE_DATA(&rt73usb_ops) },
2368 /* EnGenius */
2369 { USB_DEVICE(0x1740, 0x3701), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002370 /* Gemtek */
2371 { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2372 /* Gigabyte */
2373 { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2374 { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2375 /* Huawei-3Com */
2376 { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2377 /* Hercules */
Michal Szalata78bd6bb2009-09-29 15:37:53 +02002378 { USB_DEVICE(0x06f8, 0xe002), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002379 { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2380 { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2381 /* Linksys */
2382 { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2383 { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
Stefan Lippers-Hollmann3be36ae2009-01-04 01:10:49 +01002384 { USB_DEVICE(0x13b1, 0x0028), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002385 /* MSI */
Xose Vazquez Perez22720642009-10-19 11:51:11 +02002386 { USB_DEVICE(0x0db0, 0x4600), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002387 { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2388 { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2389 { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2390 { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perez22720642009-10-19 11:51:11 +02002391 /* Ovislink */
2392 { USB_DEVICE(0x1b75, 0x7318), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002393 /* Ralink */
Ivo van Doorn144d9ad2009-02-15 17:43:05 +01002394 { USB_DEVICE(0x04bb, 0x093d), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002395 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2396 { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2397 /* Qcom */
2398 { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2399 { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2400 { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002401 /* Samsung */
2402 { USB_DEVICE(0x04e8, 0x4471), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002403 /* Senao */
2404 { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2405 /* Sitecom */
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002406 { USB_DEVICE(0x0df6, 0x0024), USB_DEVICE_DATA(&rt73usb_ops) },
2407 { USB_DEVICE(0x0df6, 0x0027), USB_DEVICE_DATA(&rt73usb_ops) },
2408 { USB_DEVICE(0x0df6, 0x002f), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002409 { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002410 { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002411 /* Surecom */
2412 { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn14344b82009-03-21 00:00:57 +01002413 /* Tilgin */
2414 { USB_DEVICE(0x6933, 0x5001), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002415 /* Philips */
2416 { USB_DEVICE(0x0471, 0x200a), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002417 /* Planex */
2418 { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2419 { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perez22720642009-10-19 11:51:11 +02002420 /* WideTell */
2421 { USB_DEVICE(0x7167, 0x3840), USB_DEVICE_DATA(&rt73usb_ops) },
Xose Vazquez Perezef4bb702009-02-28 00:34:23 +01002422 /* Zcom */
2423 { USB_DEVICE(0x0cde, 0x001c), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn144d9ad2009-02-15 17:43:05 +01002424 /* ZyXEL */
2425 { USB_DEVICE(0x0586, 0x3415), USB_DEVICE_DATA(&rt73usb_ops) },
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002426 { 0, }
2427};
2428
2429MODULE_AUTHOR(DRV_PROJECT);
2430MODULE_VERSION(DRV_VERSION);
2431MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2432MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2433MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2434MODULE_FIRMWARE(FIRMWARE_RT2571);
2435MODULE_LICENSE("GPL");
2436
2437static struct usb_driver rt73usb_driver = {
Ivo van Doorn23601572007-11-27 21:47:34 +01002438 .name = KBUILD_MODNAME,
Ivo van Doorn95ea3622007-09-25 17:57:13 -07002439 .id_table = rt73usb_device_table,
2440 .probe = rt2x00usb_probe,
2441 .disconnect = rt2x00usb_disconnect,
2442 .suspend = rt2x00usb_suspend,
2443 .resume = rt2x00usb_resume,
2444};
2445
2446static int __init rt73usb_init(void)
2447{
2448 return usb_register(&rt73usb_driver);
2449}
2450
2451static void __exit rt73usb_exit(void)
2452{
2453 usb_deregister(&rt73usb_driver);
2454}
2455
2456module_init(rt73usb_init);
2457module_exit(rt73usb_exit);