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Ramax Lo4ab989712008-07-07 18:12:36 +01001/* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
2 *
3 * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
4 * Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
5 * and modifications by SBZ <sbz@spgui.org> and
6 * Weibing <http://weibing.blogbus.com>
7 *
8 * For product information, visit http://www.arm9e.com/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/list.h>
19#include <linux/timer.h>
20#include <linux/init.h>
21#include <linux/io.h>
22#include <linux/serial_core.h>
Ramax Lo66493c22008-07-07 18:12:37 +010023#include <linux/dm9000.h>
Ramax Lo4ab989712008-07-07 18:12:36 +010024#include <linux/platform_device.h>
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
Russell Kinga09e64f2008-08-05 16:14:15 +010030#include <mach/hardware.h>
Ramax Lo4ab989712008-07-07 18:12:36 +010031#include <asm/irq.h>
32#include <asm/mach-types.h>
33
Ben Dooksa2b7ba92008-10-07 22:26:09 +010034#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010035#include <mach/regs-gpio.h>
36#include <mach/regs-mem.h>
37#include <mach/regs-lcd.h>
Ben Dooks7926b5a2008-10-30 10:14:35 +000038#include <plat/nand.h>
Ramax Lo4ab989712008-07-07 18:12:36 +010039
40#include <linux/mtd/mtd.h>
41#include <linux/mtd/nand.h>
42#include <linux/mtd/nand_ecc.h>
43#include <linux/mtd/partitions.h>
44
Ben Dooksd5120ae2008-10-07 23:09:51 +010045#include <plat/clock.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010046#include <plat/devs.h>
47#include <plat/cpu.h>
Ramax Lo4ab989712008-07-07 18:12:36 +010048
49static struct map_desc at2440evb_iodesc[] __initdata = {
50 /* Nothing here */
51};
52
53#define UCON S3C2410_UCON_DEFAULT
54#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
55#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
56
57static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
58 [0] = {
59 .name = "uclk",
60 .divisor = 1,
61 .min_baud = 0,
62 .max_baud = 0,
63 },
64 [1] = {
65 .name = "pclk",
66 .divisor = 1,
67 .min_baud = 0,
68 .max_baud = 0,
69 }
70};
71
72
73static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
74 [0] = {
75 .hwport = 0,
76 .flags = 0,
77 .ucon = UCON,
78 .ulcon = ULCON,
79 .ufcon = UFCON,
80 .clocks = at2440evb_serial_clocks,
81 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
82 },
83 [1] = {
84 .hwport = 1,
85 .flags = 0,
86 .ucon = UCON,
87 .ulcon = ULCON,
88 .ufcon = UFCON,
89 .clocks = at2440evb_serial_clocks,
90 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
91 },
92};
93
94/* NAND Flash on AT2440EVB board */
95
96static struct mtd_partition at2440evb_default_nand_part[] = {
97 [0] = {
98 .name = "Boot Agent",
99 .size = SZ_256K,
100 .offset = 0,
101 },
102 [1] = {
103 .name = "Kernel",
104 .size = SZ_2M,
105 .offset = SZ_256K,
106 },
107 [2] = {
108 .name = "Root",
109 .offset = SZ_256K + SZ_2M,
110 .size = MTDPART_SIZ_FULL,
111 },
112};
113
114static struct s3c2410_nand_set at2440evb_nand_sets[] = {
115 [0] = {
116 .name = "nand",
117 .nr_chips = 1,
118 .nr_partitions = ARRAY_SIZE(at2440evb_default_nand_part),
119 .partitions = at2440evb_default_nand_part,
120 },
121};
122
123static struct s3c2410_platform_nand at2440evb_nand_info = {
124 .tacls = 25,
125 .twrph0 = 55,
126 .twrph1 = 40,
127 .nr_sets = ARRAY_SIZE(at2440evb_nand_sets),
128 .sets = at2440evb_nand_sets,
129};
130
Ramax Lo66493c22008-07-07 18:12:37 +0100131/* DM9000AEP 10/100 ethernet controller */
132
133static struct resource at2440evb_dm9k_resource[] = {
134 [0] = {
135 .start = S3C2410_CS3,
136 .end = S3C2410_CS3 + 3,
137 .flags = IORESOURCE_MEM
138 },
139 [1] = {
140 .start = S3C2410_CS3 + 4,
141 .end = S3C2410_CS3 + 7,
142 .flags = IORESOURCE_MEM
143 },
144 [2] = {
145 .start = IRQ_EINT7,
146 .end = IRQ_EINT7,
147 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
148 }
149};
150
151static struct dm9000_plat_data at2440evb_dm9k_pdata = {
152 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
153};
154
155static struct platform_device at2440evb_device_eth = {
156 .name = "dm9000",
157 .id = -1,
158 .num_resources = ARRAY_SIZE(at2440evb_dm9k_resource),
159 .resource = at2440evb_dm9k_resource,
160 .dev = {
161 .platform_data = &at2440evb_dm9k_pdata,
162 },
163};
164
Ramax Lo4ab989712008-07-07 18:12:36 +0100165static struct platform_device *at2440evb_devices[] __initdata = {
166 &s3c_device_usb,
167 &s3c_device_wdt,
168 &s3c_device_adc,
169 &s3c_device_i2c,
170 &s3c_device_rtc,
171 &s3c_device_nand,
Ramax Lo66493c22008-07-07 18:12:37 +0100172 &at2440evb_device_eth,
Ramax Lo4ab989712008-07-07 18:12:36 +0100173};
174
175static void __init at2440evb_map_io(void)
176{
177 s3c_device_nand.dev.platform_data = &at2440evb_nand_info;
178
179 s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
180 s3c24xx_init_clocks(16934400);
181 s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
182}
183
184static void __init at2440evb_init(void)
185{
186 platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
187}
188
189
190MACHINE_START(AT2440EVB, "AT2440EVB")
191 .phys_io = S3C2410_PA_UART,
192 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
193 .boot_params = S3C2410_SDRAM_PA + 0x100,
194 .map_io = at2440evb_map_io,
195 .init_machine = at2440evb_init,
196 .init_irq = s3c24xx_init_irq,
197 .timer = &s3c24xx_timer,
198MACHINE_END