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gerrit-public.fairphone.software / kernel / msm-4.9 / 797b085724f7fa764ac14d0197ffb3860c4a5b37 / . / arch / arm / mach-omap2 / omap-secure.h
blob: c509cde71f931ab959cc751462d924a04fc0778f [file] [log] [blame]
Santosh Shilimkarba9456a2011-06-06 17:56:49 +0530[diff] [blame]1/*
2 * omap-secure.h: OMAP Secure infrastructure header.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
Pali Rohár4748a722013-09-18 21:43:56 +0200[diff] [blame]6 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
7 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
Santosh Shilimkarba9456a2011-06-06 17:56:49 +0530[diff] [blame]8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#ifndef OMAP_ARCH_OMAP_SECURE_H
14#define OMAP_ARCH_OMAP_SECURE_H
15
16/* Monitor error code */
17#define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE
18#define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF
19
20/* HAL API error codes */
21#define API_HAL_RET_VALUE_OK 0x00
22#define API_HAL_RET_VALUE_FAIL 0x01
23
24/* Secure HAL API flags */
25#define FLAG_START_CRITICAL 0x4
26#define FLAG_IRQFIQ_MASK 0x3
27#define FLAG_IRQ_ENABLE 0x2
28#define FLAG_FIQ_ENABLE 0x1
29#define NO_FLAG 0x0
30
Santosh Shilimkar259ee572011-06-06 20:28:23 +0530[diff] [blame]31/* Maximum Secure memory storage size */
32#define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
Santosh Shilimkarba9456a2011-06-06 17:56:49 +0530[diff] [blame]33
Tony Lindgren909ae612017-11-27 08:57:26 -0800[diff] [blame]34#define OMAP3_SAVE_SECURE_RAM_SZ 0x803F
35
Santosh Shilimkarba9456a2011-06-06 17:56:49 +0530[diff] [blame]36/* Secure low power HAL API index */
37#define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
38#define OMAP4_HAL_SAVEHW_INDEX 0x1b
39#define OMAP4_HAL_SAVEALL_INDEX 0x1c
40#define OMAP4_HAL_SAVEGIC_INDEX 0x1d
41
Santosh Shilimkarb2b97622010-06-16 22:19:48 +0530[diff] [blame]42/* Secure Monitor mode APIs */
43#define OMAP4_MON_SCU_PWR_INDEX 0x108
Santosh Shilimkar5e94c6e32011-01-09 02:59:09 +0530[diff] [blame]44#define OMAP4_MON_L2X0_DBG_CTRL_INDEX 0x100
45#define OMAP4_MON_L2X0_CTRL_INDEX 0x102
46#define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109
47#define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113
Santosh Shilimkarb2b97622010-06-16 22:19:48 +0530[diff] [blame]48
R Sricharan5523e402013-10-10 13:13:48 +0530[diff] [blame]49#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
Santosh Shilimkar4664d4d2013-02-08 17:07:31 +0530[diff] [blame]50#define OMAP5_MON_AMBA_IF_INDEX 0x108
Nishanth Menonc0053bd2015-08-06 10:54:24 -0500[diff] [blame]51#define OMAP5_DRA7_MON_SET_ACR_INDEX 0x107
R Sricharan5523e402013-10-10 13:13:48 +0530[diff] [blame]52
Santosh Shilimkarb2b97622010-06-16 22:19:48 +0530[diff] [blame]53/* Secure PPA(Primary Protected Application) APIs */
Santosh Shilimkar5e94c6e32011-01-09 02:59:09 +0530[diff] [blame]54#define OMAP4_PPA_L2_POR_INDEX 0x23
Santosh Shilimkarb2b97622010-06-16 22:19:48 +0530[diff] [blame]55#define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
56
Pali Rohár4748a722013-09-18 21:43:56 +0200[diff] [blame]57/* Secure RX-51 PPA (Primary Protected Application) APIs */
58#define RX51_PPA_HWRNG 29
59#define RX51_PPA_L2_INVAL 40
60#define RX51_PPA_WRITE_ACR 42
61
Santosh Shilimkarb2b97622010-06-16 22:19:48 +0530[diff] [blame]62#ifndef __ASSEMBLER__
63
Santosh Shilimkarba9456a2011-06-06 17:56:49 +0530[diff] [blame]64extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
65 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
66extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
Pali Rohára33f1782013-09-08 09:43:29 +0200[diff] [blame]67extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
Santosh Shilimkar259ee572011-06-06 20:28:23 +0530[diff] [blame]68extern phys_addr_t omap_secure_ram_mempool_base(void);
Lokesh Vutlaf7a9b8a2012-10-02 00:17:06 +0530[diff] [blame]69extern int omap_secure_ram_reserve_memblock(void);
Tony Lindgren909ae612017-11-27 08:57:26 -0800[diff] [blame]70extern u32 save_secure_ram_context(u32 args_pa);
71extern u32 omap3_save_secure_ram(void __iomem *save_regs, int size);
Santosh Shilimkarba9456a2011-06-06 17:56:49 +0530[diff] [blame]72
Pali Rohár4748a722013-09-18 21:43:56 +0200[diff] [blame]73extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
74 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
75extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
Pali Rohárd2065e22013-09-20 15:25:07 +0200[diff] [blame]76extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
Pali Rohár4748a722013-09-18 21:43:56 +0200[diff] [blame]77
Tony Lindgren39cec622013-11-18 13:56:48 -0800[diff] [blame]78#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
R Sricharan5523e402013-10-10 13:13:48 +0530[diff] [blame]79void set_cntfreq(void);
Tony Lindgren39cec622013-11-18 13:56:48 -0800[diff] [blame]80#else
81static inline void set_cntfreq(void)
82{
83}
84#endif
85
Santosh Shilimkarb2b97622010-06-16 22:19:48 +0530[diff] [blame]86#endif /* __ASSEMBLER__ */
Santosh Shilimkarba9456a2011-06-06 17:56:49 +0530[diff] [blame]87#endif /* OMAP_ARCH_OMAP_SECURE_H */