Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * ck804xrom.c |
| 3 | * |
| 4 | * Normal mappings of chips in physical memory |
| 5 | * |
| 6 | * Dave Olsen <dolsen@lnxi.com> |
| 7 | * Ryan Jackson <rjackson@lnxi.com> |
| 8 | */ |
| 9 | |
| 10 | #include <linux/module.h> |
| 11 | #include <linux/types.h> |
| 12 | #include <linux/version.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <asm/io.h> |
| 16 | #include <linux/mtd/mtd.h> |
| 17 | #include <linux/mtd/map.h> |
| 18 | #include <linux/mtd/cfi.h> |
| 19 | #include <linux/mtd/flashchip.h> |
| 20 | #include <linux/pci.h> |
| 21 | #include <linux/pci_ids.h> |
| 22 | #include <linux/list.h> |
| 23 | |
| 24 | |
| 25 | #define MOD_NAME KBUILD_BASENAME |
| 26 | |
| 27 | #define ADDRESS_NAME_LEN 18 |
| 28 | |
David Woodhouse | c9ac597 | 2006-11-30 08:17:38 +0000 | [diff] [blame] | 29 | #define ROM_PROBE_STEP_SIZE (64*1024) |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 30 | |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 31 | #define DEV_CK804 1 |
| 32 | #define DEV_MCP55 2 |
| 33 | |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 34 | struct ck804xrom_window { |
| 35 | void __iomem *virt; |
| 36 | unsigned long phys; |
| 37 | unsigned long size; |
| 38 | struct list_head maps; |
| 39 | struct resource rsrc; |
| 40 | struct pci_dev *pdev; |
| 41 | }; |
| 42 | |
| 43 | struct ck804xrom_map_info { |
| 44 | struct list_head list; |
| 45 | struct map_info map; |
| 46 | struct mtd_info *mtd; |
| 47 | struct resource rsrc; |
| 48 | char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN]; |
| 49 | }; |
| 50 | |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 51 | /* |
| 52 | * The following applies to ck804 only: |
| 53 | * The 2 bits controlling the window size are often set to allow reading |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 54 | * the BIOS, but too small to allow writing, since the lock registers are |
| 55 | * 4MiB lower in the address space than the data. |
| 56 | * |
| 57 | * This is intended to prevent flashing the bios, perhaps accidentally. |
| 58 | * |
| 59 | * This parameter allows the normal driver to override the BIOS settings. |
| 60 | * |
| 61 | * The bits are 6 and 7. If both bits are set, it is a 5MiB window. |
| 62 | * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a |
| 63 | * 64KiB window. |
| 64 | * |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 65 | * The following applies to mcp55 only: |
| 66 | * The 15 bits controlling the window size are distributed as follows: |
| 67 | * byte @0x88: bit 0..7 |
| 68 | * byte @0x8c: bit 8..15 |
| 69 | * word @0x90: bit 16..30 |
| 70 | * If all bits are enabled, we have a 16? MiB window |
| 71 | * Please set win_size_bits to 0x7fffffff if you actually want to do something |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 72 | */ |
| 73 | static uint win_size_bits = 0; |
| 74 | module_param(win_size_bits, uint, 0); |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 75 | MODULE_PARM_DESC(win_size_bits, "ROM window size bits override, normally set by BIOS."); |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 76 | |
| 77 | static struct ck804xrom_window ck804xrom_window = { |
| 78 | .maps = LIST_HEAD_INIT(ck804xrom_window.maps), |
| 79 | }; |
| 80 | |
| 81 | static void ck804xrom_cleanup(struct ck804xrom_window *window) |
| 82 | { |
| 83 | struct ck804xrom_map_info *map, *scratch; |
| 84 | u8 byte; |
| 85 | |
| 86 | if (window->pdev) { |
| 87 | /* Disable writes through the rom window */ |
| 88 | pci_read_config_byte(window->pdev, 0x6d, &byte); |
| 89 | pci_write_config_byte(window->pdev, 0x6d, byte & ~1); |
| 90 | } |
| 91 | |
| 92 | /* Free all of the mtd devices */ |
| 93 | list_for_each_entry_safe(map, scratch, &window->maps, list) { |
| 94 | if (map->rsrc.parent) |
| 95 | release_resource(&map->rsrc); |
| 96 | |
| 97 | del_mtd_device(map->mtd); |
| 98 | map_destroy(map->mtd); |
| 99 | list_del(&map->list); |
| 100 | kfree(map); |
| 101 | } |
| 102 | if (window->rsrc.parent) |
| 103 | release_resource(&window->rsrc); |
| 104 | |
| 105 | if (window->virt) { |
| 106 | iounmap(window->virt); |
| 107 | window->virt = NULL; |
| 108 | window->phys = 0; |
| 109 | window->size = 0; |
| 110 | } |
| 111 | pci_dev_put(window->pdev); |
| 112 | } |
| 113 | |
| 114 | |
| 115 | static int __devinit ck804xrom_init_one (struct pci_dev *pdev, |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 116 | const struct pci_device_id *ent) |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 117 | { |
| 118 | static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL }; |
| 119 | u8 byte; |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 120 | u16 word; |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 121 | struct ck804xrom_window *window = &ck804xrom_window; |
| 122 | struct ck804xrom_map_info *map = NULL; |
| 123 | unsigned long map_top; |
| 124 | |
| 125 | /* Remember the pci dev I find the window in */ |
| 126 | window->pdev = pci_dev_get(pdev); |
| 127 | |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 128 | switch (ent->driver_data) { |
| 129 | case DEV_CK804: |
| 130 | /* Enable the selected rom window. This is often incorrectly |
| 131 | * set up by the BIOS, and the 4MiB offset for the lock registers |
| 132 | * requires the full 5MiB of window space. |
| 133 | * |
| 134 | * This 'write, then read' approach leaves the bits for |
| 135 | * other uses of the hardware info. |
| 136 | */ |
| 137 | pci_read_config_byte(pdev, 0x88, &byte); |
| 138 | pci_write_config_byte(pdev, 0x88, byte | win_size_bits ); |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 139 | |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 140 | /* Assume the rom window is properly setup, and find it's size */ |
| 141 | pci_read_config_byte(pdev, 0x88, &byte); |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 142 | |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 143 | if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) |
| 144 | window->phys = 0xffb00000; /* 5MiB */ |
| 145 | else if ((byte & (1<<7)) == (1<<7)) |
| 146 | window->phys = 0xffc00000; /* 4MiB */ |
| 147 | else |
| 148 | window->phys = 0xffff0000; /* 64KiB */ |
| 149 | break; |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 150 | |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 151 | case DEV_MCP55: |
| 152 | pci_read_config_byte(pdev, 0x88, &byte); |
| 153 | pci_write_config_byte(pdev, 0x88, byte | (win_size_bits & 0xff)); |
| 154 | |
| 155 | pci_read_config_byte(pdev, 0x8c, &byte); |
| 156 | pci_write_config_byte(pdev, 0x8c, byte | ((win_size_bits & 0xff00) >> 8)); |
| 157 | |
| 158 | pci_read_config_word(pdev, 0x90, &word); |
| 159 | pci_write_config_word(pdev, 0x90, word | ((win_size_bits & 0x7fff0000) >> 16)); |
| 160 | |
| 161 | window->phys = 0xff000000; /* 16MiB, hardcoded for now */ |
| 162 | break; |
| 163 | } |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 164 | |
| 165 | window->size = 0xffffffffUL - window->phys + 1UL; |
| 166 | |
| 167 | /* |
| 168 | * Try to reserve the window mem region. If this fails then |
| 169 | * it is likely due to a fragment of the window being |
| 170 | * "reserved" by the BIOS. In the case that the |
| 171 | * request_mem_region() fails then once the rom size is |
| 172 | * discovered we will try to reserve the unreserved fragment. |
| 173 | */ |
| 174 | window->rsrc.name = MOD_NAME; |
| 175 | window->rsrc.start = window->phys; |
| 176 | window->rsrc.end = window->phys + window->size - 1; |
| 177 | window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
| 178 | if (request_resource(&iomem_resource, &window->rsrc)) { |
| 179 | window->rsrc.parent = NULL; |
| 180 | printk(KERN_ERR MOD_NAME |
| 181 | " %s(): Unable to register resource" |
| 182 | " 0x%.016llx-0x%.016llx - kernel bug?\n", |
| 183 | __func__, |
| 184 | (unsigned long long)window->rsrc.start, |
| 185 | (unsigned long long)window->rsrc.end); |
| 186 | } |
| 187 | |
| 188 | |
| 189 | /* Enable writes through the rom window */ |
| 190 | pci_read_config_byte(pdev, 0x6d, &byte); |
| 191 | pci_write_config_byte(pdev, 0x6d, byte | 1); |
| 192 | |
| 193 | /* FIXME handle registers 0x80 - 0x8C the bios region locks */ |
| 194 | |
| 195 | /* For write accesses caches are useless */ |
| 196 | window->virt = ioremap_nocache(window->phys, window->size); |
| 197 | if (!window->virt) { |
| 198 | printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", |
| 199 | window->phys, window->size); |
| 200 | goto out; |
| 201 | } |
| 202 | |
| 203 | /* Get the first address to look for a rom chip at */ |
| 204 | map_top = window->phys; |
| 205 | #if 1 |
| 206 | /* The probe sequence run over the firmware hub lock |
| 207 | * registers sets them to 0x7 (no access). |
| 208 | * Probe at most the last 4MiB of the address space. |
| 209 | */ |
| 210 | if (map_top < 0xffc00000) |
| 211 | map_top = 0xffc00000; |
| 212 | #endif |
| 213 | /* Loop through and look for rom chips. Since we don't know the |
| 214 | * starting address for each chip, probe every ROM_PROBE_STEP_SIZE |
| 215 | * bytes from the starting address of the window. |
| 216 | */ |
| 217 | while((map_top - 1) < 0xffffffffUL) { |
| 218 | struct cfi_private *cfi; |
| 219 | unsigned long offset; |
| 220 | int i; |
| 221 | |
| 222 | if (!map) |
| 223 | map = kmalloc(sizeof(*map), GFP_KERNEL); |
| 224 | |
| 225 | if (!map) { |
| 226 | printk(KERN_ERR MOD_NAME ": kmalloc failed"); |
| 227 | goto out; |
| 228 | } |
| 229 | memset(map, 0, sizeof(*map)); |
| 230 | INIT_LIST_HEAD(&map->list); |
| 231 | map->map.name = map->map_name; |
| 232 | map->map.phys = map_top; |
| 233 | offset = map_top - window->phys; |
| 234 | map->map.virt = (void __iomem *) |
| 235 | (((unsigned long)(window->virt)) + offset); |
| 236 | map->map.size = 0xffffffffUL - map_top + 1UL; |
| 237 | /* Set the name of the map to the address I am trying */ |
Andrew Morton | 65af071 | 2007-02-17 16:02:07 -0800 | [diff] [blame] | 238 | sprintf(map->map_name, "%s @%08Lx", |
| 239 | MOD_NAME, (unsigned long long)map->map.phys); |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 240 | |
| 241 | /* There is no generic VPP support */ |
| 242 | for(map->map.bankwidth = 32; map->map.bankwidth; |
| 243 | map->map.bankwidth >>= 1) |
| 244 | { |
| 245 | char **probe_type; |
| 246 | /* Skip bankwidths that are not supported */ |
| 247 | if (!map_bankwidth_supported(map->map.bankwidth)) |
| 248 | continue; |
| 249 | |
| 250 | /* Setup the map methods */ |
| 251 | simple_map_init(&map->map); |
| 252 | |
| 253 | /* Try all of the probe methods */ |
| 254 | probe_type = rom_probe_types; |
| 255 | for(; *probe_type; probe_type++) { |
| 256 | map->mtd = do_map_probe(*probe_type, &map->map); |
| 257 | if (map->mtd) |
| 258 | goto found; |
| 259 | } |
| 260 | } |
| 261 | map_top += ROM_PROBE_STEP_SIZE; |
| 262 | continue; |
| 263 | found: |
| 264 | /* Trim the size if we are larger than the map */ |
| 265 | if (map->mtd->size > map->map.size) { |
| 266 | printk(KERN_WARNING MOD_NAME |
| 267 | " rom(%u) larger than window(%lu). fixing...\n", |
| 268 | map->mtd->size, map->map.size); |
| 269 | map->mtd->size = map->map.size; |
| 270 | } |
| 271 | if (window->rsrc.parent) { |
| 272 | /* |
| 273 | * Registering the MTD device in iomem may not be possible |
| 274 | * if there is a BIOS "reserved" and BUSY range. If this |
| 275 | * fails then continue anyway. |
| 276 | */ |
| 277 | map->rsrc.name = map->map_name; |
| 278 | map->rsrc.start = map->map.phys; |
| 279 | map->rsrc.end = map->map.phys + map->mtd->size - 1; |
| 280 | map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
| 281 | if (request_resource(&window->rsrc, &map->rsrc)) { |
| 282 | printk(KERN_ERR MOD_NAME |
| 283 | ": cannot reserve MTD resource\n"); |
| 284 | map->rsrc.parent = NULL; |
| 285 | } |
| 286 | } |
| 287 | |
| 288 | /* Make the whole region visible in the map */ |
| 289 | map->map.virt = window->virt; |
| 290 | map->map.phys = window->phys; |
| 291 | cfi = map->map.fldrv_priv; |
| 292 | for(i = 0; i < cfi->numchips; i++) |
| 293 | cfi->chips[i].start += offset; |
| 294 | |
| 295 | /* Now that the mtd devices is complete claim and export it */ |
| 296 | map->mtd->owner = THIS_MODULE; |
| 297 | if (add_mtd_device(map->mtd)) { |
| 298 | map_destroy(map->mtd); |
| 299 | map->mtd = NULL; |
| 300 | goto out; |
| 301 | } |
| 302 | |
| 303 | |
| 304 | /* Calculate the new value of map_top */ |
| 305 | map_top += map->mtd->size; |
| 306 | |
| 307 | /* File away the map structure */ |
| 308 | list_add(&map->list, &window->maps); |
| 309 | map = NULL; |
| 310 | } |
| 311 | |
| 312 | out: |
| 313 | /* Free any left over map structures */ |
| 314 | if (map) |
| 315 | kfree(map); |
| 316 | |
| 317 | /* See if I have any map structures */ |
| 318 | if (list_empty(&window->maps)) { |
| 319 | ck804xrom_cleanup(window); |
| 320 | return -ENODEV; |
| 321 | } |
| 322 | return 0; |
| 323 | } |
| 324 | |
| 325 | |
| 326 | static void __devexit ck804xrom_remove_one (struct pci_dev *pdev) |
| 327 | { |
| 328 | struct ck804xrom_window *window = &ck804xrom_window; |
| 329 | |
| 330 | ck804xrom_cleanup(window); |
| 331 | } |
| 332 | |
| 333 | static struct pci_device_id ck804xrom_pci_tbl[] = { |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 334 | { PCI_VENDOR_ID_NVIDIA, 0x0051, PCI_ANY_ID, PCI_ANY_ID, DEV_CK804 }, |
| 335 | { PCI_VENDOR_ID_NVIDIA, 0x0360, PCI_ANY_ID, PCI_ANY_ID, DEV_MCP55 }, |
| 336 | { PCI_VENDOR_ID_NVIDIA, 0x0361, PCI_ANY_ID, PCI_ANY_ID, DEV_MCP55 }, |
| 337 | { PCI_VENDOR_ID_NVIDIA, 0x0362, PCI_ANY_ID, PCI_ANY_ID, DEV_MCP55 }, |
| 338 | { PCI_VENDOR_ID_NVIDIA, 0x0363, PCI_ANY_ID, PCI_ANY_ID, DEV_MCP55 }, |
| 339 | { PCI_VENDOR_ID_NVIDIA, 0x0364, PCI_ANY_ID, PCI_ANY_ID, DEV_MCP55 }, |
| 340 | { PCI_VENDOR_ID_NVIDIA, 0x0365, PCI_ANY_ID, PCI_ANY_ID, DEV_MCP55 }, |
| 341 | { PCI_VENDOR_ID_NVIDIA, 0x0366, PCI_ANY_ID, PCI_ANY_ID, DEV_MCP55 }, |
| 342 | { PCI_VENDOR_ID_NVIDIA, 0x0367, PCI_ANY_ID, PCI_ANY_ID, DEV_MCP55 }, |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 343 | { 0, } |
| 344 | }; |
| 345 | |
| 346 | MODULE_DEVICE_TABLE(pci, ck804xrom_pci_tbl); |
| 347 | |
| 348 | #if 0 |
| 349 | static struct pci_driver ck804xrom_driver = { |
| 350 | .name = MOD_NAME, |
| 351 | .id_table = ck804xrom_pci_tbl, |
| 352 | .probe = ck804xrom_init_one, |
| 353 | .remove = ck804xrom_remove_one, |
| 354 | }; |
| 355 | #endif |
| 356 | |
| 357 | static int __init init_ck804xrom(void) |
| 358 | { |
| 359 | struct pci_dev *pdev; |
| 360 | struct pci_device_id *id; |
| 361 | int retVal; |
| 362 | pdev = NULL; |
| 363 | |
| 364 | for(id = ck804xrom_pci_tbl; id->vendor; id++) { |
Alan | c033a7e | 2007-01-31 17:00:28 +0000 | [diff] [blame] | 365 | pdev = pci_get_device(id->vendor, id->device, NULL); |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 366 | if (pdev) |
| 367 | break; |
| 368 | } |
| 369 | if (pdev) { |
Carl-Daniel Hailfinger | c3f08b3 | 2008-01-16 15:45:20 +0100 | [diff] [blame] | 370 | retVal = ck804xrom_init_one(pdev, id); |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 371 | pci_dev_put(pdev); |
| 372 | return retVal; |
| 373 | } |
| 374 | return -ENXIO; |
| 375 | #if 0 |
Adrian Bunk | 28b57cd | 2007-04-27 01:48:01 +0200 | [diff] [blame] | 376 | return pci_register_driver(&ck804xrom_driver); |
Dave Olsen | 90afffc | 2006-11-06 16:33:57 -0700 | [diff] [blame] | 377 | #endif |
| 378 | } |
| 379 | |
| 380 | static void __exit cleanup_ck804xrom(void) |
| 381 | { |
| 382 | ck804xrom_remove_one(ck804xrom_window.pdev); |
| 383 | } |
| 384 | |
| 385 | module_init(init_ck804xrom); |
| 386 | module_exit(cleanup_ck804xrom); |
| 387 | |
| 388 | MODULE_LICENSE("GPL"); |
| 389 | MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>, Dave Olsen <dolsen@lnxi.com>"); |
| 390 | MODULE_DESCRIPTION("MTD map driver for BIOS chips on the Nvidia ck804 southbridge"); |
| 391 | |