blob: 5b3274b465eb5b22cdf525bc26d4855e4c371096 [file] [log] [blame]
Takashi Iwai2c484df2005-06-30 18:54:04 +02001/*
2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
3 *
4 * Author: Nicolas Pitre
5 * Created: Dec 02, 2004
6 * Copyright: MontaVista Software Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/kernel.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010016#include <linux/platform_device.h>
Takashi Iwai2c484df2005-06-30 18:54:04 +020017#include <linux/interrupt.h>
18#include <linux/wait.h>
Mark Brown93873fb2008-03-04 11:14:25 +010019#include <linux/clk.h>
Takashi Iwai2c484df2005-06-30 18:54:04 +020020#include <linux/delay.h>
21
Takashi Iwai2c484df2005-06-30 18:54:04 +020022#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/ac97_codec.h>
25#include <sound/initval.h>
26
27#include <asm/irq.h>
Ingo Molnar12aa7572006-01-16 16:36:05 +010028#include <linux/mutex.h>
Takashi Iwai2c484df2005-06-30 18:54:04 +020029#include <asm/hardware.h>
30#include <asm/arch/pxa-regs.h>
eric miaoa683b142008-03-03 09:44:25 +080031#include <asm/arch/pxa2xx-gpio.h>
Takashi Iwai2c484df2005-06-30 18:54:04 +020032#include <asm/arch/audio.h>
33
34#include "pxa2xx-pcm.h"
35
36
Ingo Molnar12aa7572006-01-16 16:36:05 +010037static DEFINE_MUTEX(car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +020038static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
39static volatile long gsr_bits;
Mark Brown93873fb2008-03-04 11:14:25 +010040static struct clk *ac97_clk;
41#ifdef CONFIG_PXA27x
42static struct clk *ac97conf_clk;
43#endif
Takashi Iwai2c484df2005-06-30 18:54:04 +020044
Nicolas Pitreea265c02005-12-12 15:41:47 +010045/*
46 * Beware PXA27x bugs:
47 *
48 * o Slot 12 read from modem space will hang controller.
49 * o CDONE, SDONE interrupt fails after any slot 12 IO.
50 *
51 * We therefore have an hybrid approach for waiting on SDONE (interrupt or
52 * 1 jiffy timeout if interrupt never comes).
53 */
54
Takashi Iwaid18f8372005-11-17 15:10:38 +010055static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
Takashi Iwai2c484df2005-06-30 18:54:04 +020056{
57 unsigned short val = -1;
58 volatile u32 *reg_addr;
59
Ingo Molnar12aa7572006-01-16 16:36:05 +010060 mutex_lock(&car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +020061
62 /* set up primary or secondary codec space */
63 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
64 reg_addr += (reg >> 1);
65
66 /* start read access across the ac97 link */
Nicolas Pitreea265c02005-12-12 15:41:47 +010067 GSR = GSR_CDONE | GSR_SDONE;
Takashi Iwai2c484df2005-06-30 18:54:04 +020068 gsr_bits = 0;
69 val = *reg_addr;
70 if (reg == AC97_GPIO_STATUS)
71 goto out;
Nicolas Pitreea265c02005-12-12 15:41:47 +010072 if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
73 !((GSR | gsr_bits) & GSR_SDONE)) {
Takashi Iwai2c484df2005-06-30 18:54:04 +020074 printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
Harvey Harrison9bf8e7d2008-03-03 15:32:18 -080075 __func__, reg, GSR | gsr_bits);
Takashi Iwai2c484df2005-06-30 18:54:04 +020076 val = -1;
77 goto out;
78 }
79
80 /* valid data now */
Nicolas Pitreea265c02005-12-12 15:41:47 +010081 GSR = GSR_CDONE | GSR_SDONE;
Takashi Iwai2c484df2005-06-30 18:54:04 +020082 gsr_bits = 0;
83 val = *reg_addr;
84 /* but we've just started another cycle... */
Nicolas Pitreea265c02005-12-12 15:41:47 +010085 wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);
Takashi Iwai2c484df2005-06-30 18:54:04 +020086
Ingo Molnar12aa7572006-01-16 16:36:05 +010087out: mutex_unlock(&car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +020088 return val;
89}
90
Takashi Iwaid18f8372005-11-17 15:10:38 +010091static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
Takashi Iwai2c484df2005-06-30 18:54:04 +020092{
93 volatile u32 *reg_addr;
94
Ingo Molnar12aa7572006-01-16 16:36:05 +010095 mutex_lock(&car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +020096
Takashi Iwai2c484df2005-06-30 18:54:04 +020097 /* set up primary or secondary codec space */
98 reg_addr = (ac97->num & 1) ? &SAC_REG_BASE : &PAC_REG_BASE;
99 reg_addr += (reg >> 1);
Nicolas Pitreea265c02005-12-12 15:41:47 +0100100
101 GSR = GSR_CDONE | GSR_SDONE;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200102 gsr_bits = 0;
103 *reg_addr = val;
Nicolas Pitreea265c02005-12-12 15:41:47 +0100104 if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1) <= 0 &&
105 !((GSR | gsr_bits) & GSR_CDONE))
Takashi Iwai2c484df2005-06-30 18:54:04 +0200106 printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
Harvey Harrison9bf8e7d2008-03-03 15:32:18 -0800107 __func__, reg, GSR | gsr_bits);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200108
Ingo Molnar12aa7572006-01-16 16:36:05 +0100109 mutex_unlock(&car_mutex);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200110}
111
Takashi Iwaid18f8372005-11-17 15:10:38 +0100112static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200113{
114 /* First, try cold reset */
Mark Brown815c1be2008-04-22 17:09:49 +0200115#ifdef CONFIG_PXA3xx
116 int timeout;
117
118 /* Hold CLKBPB for 100us */
119 GCR = 0;
120 GCR = GCR_CLKBPB;
121 udelay(100);
122 GCR = 0;
123#endif
124
Takashi Iwai2c484df2005-06-30 18:54:04 +0200125 GCR &= GCR_COLD_RST; /* clear everything but nCRST */
126 GCR &= ~GCR_COLD_RST; /* then assert nCRST */
127
128 gsr_bits = 0;
129#ifdef CONFIG_PXA27x
130 /* PXA27x Developers Manual section 13.5.2.2.1 */
Mark Brown93873fb2008-03-04 11:14:25 +0100131 clk_enable(ac97conf_clk);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200132 udelay(5);
Mark Brown93873fb2008-03-04 11:14:25 +0100133 clk_disable(ac97conf_clk);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200134 GCR = GCR_COLD_RST;
135 udelay(50);
Mark Brown815c1be2008-04-22 17:09:49 +0200136#elif defined(CONFIG_PXA3xx)
137 timeout = 1000;
138 /* Can't use interrupts on PXA3xx */
139 GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
140
141 GCR = GCR_WARM_RST | GCR_COLD_RST;
142 while (!(GSR & (GSR_PCR | GSR_SCR)) && timeout--)
143 mdelay(10);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200144#else
145 GCR = GCR_COLD_RST;
146 GCR |= GCR_CDONE_IE|GCR_SDONE_IE;
147 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
148#endif
149
150 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR))) {
151 printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
Harvey Harrison9bf8e7d2008-03-03 15:32:18 -0800152 __func__, gsr_bits);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200153
154 /* let's try warm reset */
155 gsr_bits = 0;
156#ifdef CONFIG_PXA27x
157 /* warm reset broken on Bulverde,
158 so manually keep AC97 reset high */
159 pxa_gpio_mode(113 | GPIO_OUT | GPIO_DFLT_HIGH);
160 udelay(10);
161 GCR |= GCR_WARM_RST;
162 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
Liam Girdwood4a677ac52005-08-05 10:24:36 +0200163 udelay(500);
Mark Brown815c1be2008-04-22 17:09:49 +0200164#elif defined(CONFIG_PXA3xx)
165 timeout = 100;
166 /* Can't use interrupts */
167 GCR |= GCR_WARM_RST;
168 while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--)
169 mdelay(1);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200170#else
Liam Girdwood4a677ac52005-08-05 10:24:36 +0200171 GCR |= GCR_WARM_RST|GCR_PRIRDY_IEN|GCR_SECRDY_IEN;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200172 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
173#endif
174
175 if (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)))
176 printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
Harvey Harrison9bf8e7d2008-03-03 15:32:18 -0800177 __func__, gsr_bits);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200178 }
179
180 GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
181 GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
182}
183
David Howells7d12e782006-10-05 14:55:46 +0100184static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200185{
186 long status;
187
188 status = GSR;
189 if (status) {
190 GSR = status;
191 gsr_bits |= status;
192 wake_up(&gsr_wq);
193
194#ifdef CONFIG_PXA27x
195 /* Although we don't use those we still need to clear them
196 since they tend to spuriously trigger when MMC is used
197 (hardware bug? go figure)... */
198 MISR = MISR_EOC;
199 PISR = PISR_EOC;
200 MCSR = MCSR_EOC;
201#endif
202
203 return IRQ_HANDLED;
204 }
205
206 return IRQ_NONE;
207}
208
Takashi Iwaid18f8372005-11-17 15:10:38 +0100209static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200210 .read = pxa2xx_ac97_read,
211 .write = pxa2xx_ac97_write,
212 .reset = pxa2xx_ac97_reset,
213};
214
Takashi Iwaid18f8372005-11-17 15:10:38 +0100215static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_out = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200216 .name = "AC97 PCM out",
217 .dev_addr = __PREG(PCDR),
218 .drcmr = &DRCMRTXPCDR,
219 .dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG |
220 DCMD_BURST32 | DCMD_WIDTH4,
221};
222
Takashi Iwaid18f8372005-11-17 15:10:38 +0100223static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_in = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200224 .name = "AC97 PCM in",
225 .dev_addr = __PREG(PCDR),
226 .drcmr = &DRCMRRXPCDR,
227 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
228 DCMD_BURST32 | DCMD_WIDTH4,
229};
230
Takashi Iwaid18f8372005-11-17 15:10:38 +0100231static struct snd_pcm *pxa2xx_ac97_pcm;
232static struct snd_ac97 *pxa2xx_ac97_ac97;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200233
Takashi Iwaid18f8372005-11-17 15:10:38 +0100234static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200235{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100236 struct snd_pcm_runtime *runtime = substream->runtime;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200237 pxa2xx_audio_ops_t *platform_ops;
238 int r;
239
240 runtime->hw.channels_min = 2;
241 runtime->hw.channels_max = 2;
242
243 r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
244 AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
245 runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
246 snd_pcm_limit_hw_rates(runtime);
247
248 platform_ops = substream->pcm->card->dev->platform_data;
249 if (platform_ops && platform_ops->startup)
250 return platform_ops->startup(substream, platform_ops->priv);
251 else
252 return 0;
253}
254
Takashi Iwaid18f8372005-11-17 15:10:38 +0100255static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200256{
257 pxa2xx_audio_ops_t *platform_ops;
258
259 platform_ops = substream->pcm->card->dev->platform_data;
260 if (platform_ops && platform_ops->shutdown)
261 platform_ops->shutdown(substream, platform_ops->priv);
262}
263
Takashi Iwaid18f8372005-11-17 15:10:38 +0100264static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200265{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100266 struct snd_pcm_runtime *runtime = substream->runtime;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200267 int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
268 AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
269 return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
270}
271
Takashi Iwaid18f8372005-11-17 15:10:38 +0100272static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200273 .playback_params = &pxa2xx_ac97_pcm_out,
274 .capture_params = &pxa2xx_ac97_pcm_in,
275 .startup = pxa2xx_ac97_pcm_startup,
276 .shutdown = pxa2xx_ac97_pcm_shutdown,
277 .prepare = pxa2xx_ac97_pcm_prepare,
278};
279
280#ifdef CONFIG_PM
281
Takashi Iwaid18f8372005-11-17 15:10:38 +0100282static int pxa2xx_ac97_do_suspend(struct snd_card *card, pm_message_t state)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200283{
Takashi Iwai792a6c52005-11-17 17:19:25 +0100284 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
285
286 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
287 snd_pcm_suspend_all(pxa2xx_ac97_pcm);
288 snd_ac97_suspend(pxa2xx_ac97_ac97);
289 if (platform_ops && platform_ops->suspend)
290 platform_ops->suspend(platform_ops->priv);
291 GCR |= GCR_ACLINK_OFF;
Mark Brown93873fb2008-03-04 11:14:25 +0100292 clk_disable(ac97_clk);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200293
294 return 0;
295}
296
Takashi Iwaid18f8372005-11-17 15:10:38 +0100297static int pxa2xx_ac97_do_resume(struct snd_card *card)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200298{
Takashi Iwai792a6c52005-11-17 17:19:25 +0100299 pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
300
Mark Brown93873fb2008-03-04 11:14:25 +0100301 clk_enable(ac97_clk);
Takashi Iwai792a6c52005-11-17 17:19:25 +0100302 if (platform_ops && platform_ops->resume)
303 platform_ops->resume(platform_ops->priv);
304 snd_ac97_resume(pxa2xx_ac97_ac97);
305 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200306
307 return 0;
308}
309
Russell King3ae5eae2005-11-09 22:32:44 +0000310static int pxa2xx_ac97_suspend(struct platform_device *dev, pm_message_t state)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200311{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100312 struct snd_card *card = platform_get_drvdata(dev);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200313 int ret = 0;
314
Russell King9480e302005-10-28 09:52:56 -0700315 if (card)
Dirk Opfera55bfdc2005-08-08 16:29:43 +0200316 ret = pxa2xx_ac97_do_suspend(card, PMSG_SUSPEND);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200317
318 return ret;
319}
320
Russell King3ae5eae2005-11-09 22:32:44 +0000321static int pxa2xx_ac97_resume(struct platform_device *dev)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200322{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100323 struct snd_card *card = platform_get_drvdata(dev);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200324 int ret = 0;
325
Russell King9480e302005-10-28 09:52:56 -0700326 if (card)
Dirk Opfera55bfdc2005-08-08 16:29:43 +0200327 ret = pxa2xx_ac97_do_resume(card);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200328
329 return ret;
330}
331
332#else
333#define pxa2xx_ac97_suspend NULL
334#define pxa2xx_ac97_resume NULL
335#endif
336
Prarit Bhargava788c6042007-02-13 13:11:11 +0100337static int __devinit pxa2xx_ac97_probe(struct platform_device *dev)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200338{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100339 struct snd_card *card;
340 struct snd_ac97_bus *ac97_bus;
341 struct snd_ac97_template ac97_template;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200342 int ret;
343
344 ret = -ENOMEM;
345 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
346 THIS_MODULE, 0);
347 if (!card)
348 goto err;
349
Russell King3ae5eae2005-11-09 22:32:44 +0000350 card->dev = &dev->dev;
351 strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
Takashi Iwai2c484df2005-06-30 18:54:04 +0200352
353 ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
354 if (ret)
355 goto err;
356
357 ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
358 if (ret < 0)
359 goto err;
360
361 pxa_gpio_mode(GPIO31_SYNC_AC97_MD);
362 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD);
363 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD);
364 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD);
365#ifdef CONFIG_PXA27x
366 /* Use GPIO 113 as AC97 Reset on Bulverde */
367 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
Mark Brown93873fb2008-03-04 11:14:25 +0100368 ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
369 if (IS_ERR(ac97conf_clk)) {
370 ret = PTR_ERR(ac97conf_clk);
371 ac97conf_clk = NULL;
372 goto err;
373 }
Takashi Iwai2c484df2005-06-30 18:54:04 +0200374#endif
Mark Brown93873fb2008-03-04 11:14:25 +0100375
376 ac97_clk = clk_get(&dev->dev, "AC97CLK");
377 if (IS_ERR(ac97_clk)) {
378 ret = PTR_ERR(ac97_clk);
379 ac97_clk = NULL;
380 goto err;
381 }
382 clk_enable(ac97_clk);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200383
384 ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
385 if (ret)
386 goto err;
387 memset(&ac97_template, 0, sizeof(ac97_template));
388 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
389 if (ret)
390 goto err;
391
392 snprintf(card->shortname, sizeof(card->shortname),
393 "%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
394 snprintf(card->longname, sizeof(card->longname),
Russell King3ae5eae2005-11-09 22:32:44 +0000395 "%s (%s)", dev->dev.driver->name, card->mixername);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200396
Takashi Iwaif78dfac2007-12-17 16:24:04 +0100397 snd_card_set_dev(card, &dev->dev);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200398 ret = snd_card_register(card);
399 if (ret == 0) {
Russell King3ae5eae2005-11-09 22:32:44 +0000400 platform_set_drvdata(dev, card);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200401 return 0;
402 }
403
404 err:
405 if (card)
406 snd_card_free(card);
Mark Brown93873fb2008-03-04 11:14:25 +0100407 if (ac97_clk) {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200408 GCR |= GCR_ACLINK_OFF;
409 free_irq(IRQ_AC97, NULL);
Mark Brown93873fb2008-03-04 11:14:25 +0100410 clk_disable(ac97_clk);
411 clk_put(ac97_clk);
412 ac97_clk = NULL;
Takashi Iwai2c484df2005-06-30 18:54:04 +0200413 }
Mark Brown93873fb2008-03-04 11:14:25 +0100414#ifdef CONFIG_PXA27x
415 if (ac97conf_clk) {
416 clk_put(ac97conf_clk);
417 ac97conf_clk = NULL;
418 }
419#endif
Takashi Iwai2c484df2005-06-30 18:54:04 +0200420 return ret;
421}
422
Prarit Bhargava788c6042007-02-13 13:11:11 +0100423static int __devexit pxa2xx_ac97_remove(struct platform_device *dev)
Takashi Iwai2c484df2005-06-30 18:54:04 +0200424{
Takashi Iwaid18f8372005-11-17 15:10:38 +0100425 struct snd_card *card = platform_get_drvdata(dev);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200426
427 if (card) {
428 snd_card_free(card);
Russell King3ae5eae2005-11-09 22:32:44 +0000429 platform_set_drvdata(dev, NULL);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200430 GCR |= GCR_ACLINK_OFF;
431 free_irq(IRQ_AC97, NULL);
Mark Brown93873fb2008-03-04 11:14:25 +0100432 clk_disable(ac97_clk);
433 clk_put(ac97_clk);
434 ac97_clk = NULL;
435#ifdef CONFIG_PXA27x
436 clk_put(ac97conf_clk);
437 ac97conf_clk = NULL;
438#endif
Takashi Iwai2c484df2005-06-30 18:54:04 +0200439 }
440
441 return 0;
442}
443
Russell King3ae5eae2005-11-09 22:32:44 +0000444static struct platform_driver pxa2xx_ac97_driver = {
Takashi Iwai2c484df2005-06-30 18:54:04 +0200445 .probe = pxa2xx_ac97_probe,
Prarit Bhargava788c6042007-02-13 13:11:11 +0100446 .remove = __devexit_p(pxa2xx_ac97_remove),
Takashi Iwai2c484df2005-06-30 18:54:04 +0200447 .suspend = pxa2xx_ac97_suspend,
448 .resume = pxa2xx_ac97_resume,
Russell King3ae5eae2005-11-09 22:32:44 +0000449 .driver = {
450 .name = "pxa2xx-ac97",
Kay Sievers8b45a202008-04-14 13:33:36 +0200451 .owner = THIS_MODULE,
Russell King3ae5eae2005-11-09 22:32:44 +0000452 },
Takashi Iwai2c484df2005-06-30 18:54:04 +0200453};
454
455static int __init pxa2xx_ac97_init(void)
456{
Russell King3ae5eae2005-11-09 22:32:44 +0000457 return platform_driver_register(&pxa2xx_ac97_driver);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200458}
459
460static void __exit pxa2xx_ac97_exit(void)
461{
Russell King3ae5eae2005-11-09 22:32:44 +0000462 platform_driver_unregister(&pxa2xx_ac97_driver);
Takashi Iwai2c484df2005-06-30 18:54:04 +0200463}
464
465module_init(pxa2xx_ac97_init);
466module_exit(pxa2xx_ac97_exit);
467
468MODULE_AUTHOR("Nicolas Pitre");
469MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
470MODULE_LICENSE("GPL");
Kay Sievers8b45a202008-04-14 13:33:36 +0200471MODULE_ALIAS("platform:pxa2xx-ac97");