| Greg Ungerer | 7067222 | 2007-06-04 06:45:38 +0100 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-arm/arch-at91/at91x40.h |
| 3 | * |
| 4 | * (C) Copyright 2007, Greg Ungerer <gerg@snapgear.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #ifndef AT91X40_H |
| 13 | #define AT91X40_H |
| 14 | |
| 15 | /* |
| 16 | * IRQ list. |
| 17 | */ |
| 18 | #define AT91_ID_FIQ 0 /* FIQ */ |
| 19 | #define AT91_ID_SYS 1 /* System Peripheral */ |
| 20 | #define AT91X40_ID_USART0 2 /* USART port 0 */ |
| 21 | #define AT91X40_ID_USART1 3 /* USART port 1 */ |
| 22 | #define AT91X40_ID_TC0 4 /* Timer/Counter 0 */ |
| 23 | #define AT91X40_ID_TC1 5 /* Timer/Counter 1*/ |
| 24 | #define AT91X40_ID_TC2 6 /* Timer/Counter 2*/ |
| 25 | #define AT91X40_ID_WD 7 /* Watchdog? */ |
| 26 | #define AT91X40_ID_PIOA 8 /* Parallel IO Controller A */ |
| 27 | |
| 28 | #define AT91X40_ID_IRQ0 16 /* External IRQ 0 */ |
| 29 | #define AT91X40_ID_IRQ1 17 /* External IRQ 1 */ |
| 30 | #define AT91X40_ID_IRQ2 18 /* External IRQ 2 */ |
| 31 | |
| 32 | /* |
| 33 | * System Peripherals (offset from AT91_BASE_SYS) |
| 34 | */ |
| 35 | #define AT91_BASE_SYS 0xffc00000 |
| 36 | |
| 37 | #define AT91_EBI (0xffe00000 - AT91_BASE_SYS) /* External Bus Interface */ |
| 38 | #define AT91_SF (0xfff00000 - AT91_BASE_SYS) /* Special Function */ |
| 39 | #define AT91_USART1 (0xfffcc000 - AT91_BASE_SYS) /* USART 1 */ |
| 40 | #define AT91_USART0 (0xfffd0000 - AT91_BASE_SYS) /* USART 0 */ |
| 41 | #define AT91_TC (0xfffe0000 - AT91_BASE_SYS) /* Timer Counter */ |
| 42 | #define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ |
| 43 | #define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ |
| 44 | #define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ |
| 45 | #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ |
| 46 | |
| 47 | /* |
| 48 | * The AT91x40 series doesn't have a debug unit like the other AT91 parts. |
| 49 | * But it does have a chip identify register and extension ID, so define at |
| 50 | * least these here. |
| 51 | */ |
| 52 | #define AT91_DBGU_CIDR (AT91_SF + 0) /* CIDR in PS segment */ |
| 53 | #define AT91_DBGU_EXID (AT91_SF + 4) /* EXID in PS segment */ |
| 54 | |
| 55 | #endif /* AT91X40_H */ |