blob: e930f4f7ca89979973239e609eb74e8e44c088ce [file] [log] [blame]
Kumar Galaab827d92011-10-26 01:01:54 -05001/*
2 * P1022/P1013 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36/ {
37 compatible = "fsl,P1022";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 aliases {
43 serial0 = &serial0;
44 serial1 = &serial1;
45 ethernet0 = &enet0;
46 ethernet1 = &enet1;
47 pci0 = &pci0;
48 pci1 = &pci1;
49 pci2 = &pci2;
50 };
51
52 cpus {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 PowerPC,P1022@0 {
57 device_type = "cpu";
58 reg = <0x0>;
59 next-level-cache = <&L2>;
60 };
61
62 PowerPC,P1022@1 {
63 device_type = "cpu";
64 reg = <0x1>;
65 next-level-cache = <&L2>;
66 };
67 };
68};