blob: b1a76bff775f8f2c11e0c1d35efc41039fa95acf [file] [log] [blame]
Grant Likely42bbb702009-11-04 15:34:18 -07001/*
2 * MPC52xx SPI bus driver.
3 *
4 * Copyright (C) 2008 Secret Lab Technologies Ltd.
5 *
6 * This file is released under the GPLv2
7 *
8 * This is the driver for the MPC5200's dedicated SPI controller.
9 *
10 * Note: this driver does not support the MPC5200 PSC in SPI mode. For
11 * that driver see drivers/spi/mpc52xx_psc_spi.c
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/of_platform.h>
18#include <linux/interrupt.h>
19#include <linux/delay.h>
20#include <linux/spi/spi.h>
Grant Likely42bbb702009-11-04 15:34:18 -070021#include <linux/of_spi.h>
22#include <linux/io.h>
Luotao Fub8d4e2c2009-11-13 10:41:17 +010023#include <linux/of_gpio.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090024#include <linux/slab.h>
Grant Likely42bbb702009-11-04 15:34:18 -070025#include <asm/time.h>
26#include <asm/mpc52xx.h>
27
28MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
29MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
30MODULE_LICENSE("GPL");
31
32/* Register offsets */
33#define SPI_CTRL1 0x00
34#define SPI_CTRL1_SPIE (1 << 7)
35#define SPI_CTRL1_SPE (1 << 6)
36#define SPI_CTRL1_MSTR (1 << 4)
37#define SPI_CTRL1_CPOL (1 << 3)
38#define SPI_CTRL1_CPHA (1 << 2)
39#define SPI_CTRL1_SSOE (1 << 1)
40#define SPI_CTRL1_LSBFE (1 << 0)
41
42#define SPI_CTRL2 0x01
43#define SPI_BRR 0x04
44
45#define SPI_STATUS 0x05
46#define SPI_STATUS_SPIF (1 << 7)
47#define SPI_STATUS_WCOL (1 << 6)
48#define SPI_STATUS_MODF (1 << 4)
49
50#define SPI_DATA 0x09
51#define SPI_PORTDATA 0x0d
52#define SPI_DATADIR 0x10
53
54/* FSM state return values */
55#define FSM_STOP 0 /* Nothing more for the state machine to */
56 /* do. If something interesting happens */
Wolfram Sang937041e2009-11-24 17:18:31 -070057 /* then an IRQ will be received */
Grant Likely42bbb702009-11-04 15:34:18 -070058#define FSM_POLL 1 /* need to poll for completion, an IRQ is */
59 /* not expected */
60#define FSM_CONTINUE 2 /* Keep iterating the state machine */
61
62/* Driver internal data */
63struct mpc52xx_spi {
64 struct spi_master *master;
Grant Likely42bbb702009-11-04 15:34:18 -070065 void __iomem *regs;
66 int irq0; /* MODF irq */
67 int irq1; /* SPIF irq */
Wolfram Sang937041e2009-11-24 17:18:31 -070068 unsigned int ipb_freq;
Grant Likely42bbb702009-11-04 15:34:18 -070069
Wolfram Sang937041e2009-11-24 17:18:31 -070070 /* Statistics; not used now, but will be reintroduced for debugfs */
Grant Likely42bbb702009-11-04 15:34:18 -070071 int msg_count;
72 int wcol_count;
73 int wcol_ticks;
74 u32 wcol_tx_timestamp;
75 int modf_count;
76 int byte_count;
77
78 struct list_head queue; /* queue of pending messages */
79 spinlock_t lock;
80 struct work_struct work;
81
Grant Likely42bbb702009-11-04 15:34:18 -070082 /* Details of current transfer (length, and buffer pointers) */
83 struct spi_message *message; /* current message */
84 struct spi_transfer *transfer; /* current transfer */
85 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
86 int len;
87 int timestamp;
88 u8 *rx_buf;
89 const u8 *tx_buf;
90 int cs_change;
Luotao Fub8d4e2c2009-11-13 10:41:17 +010091 int gpio_cs_count;
92 unsigned int *gpio_cs;
Grant Likely42bbb702009-11-04 15:34:18 -070093};
94
95/*
96 * CS control function
97 */
98static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
99{
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100100 int cs;
101
102 if (ms->gpio_cs_count > 0) {
103 cs = ms->message->spi->chip_select;
104 gpio_set_value(ms->gpio_cs[cs], value ? 0 : 1);
105 } else
106 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
Grant Likely42bbb702009-11-04 15:34:18 -0700107}
108
109/*
110 * Start a new transfer. This is called both by the idle state
111 * for the first transfer in a message, and by the wait state when the
112 * previous transfer in a message is complete.
113 */
114static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
115{
116 ms->rx_buf = ms->transfer->rx_buf;
117 ms->tx_buf = ms->transfer->tx_buf;
118 ms->len = ms->transfer->len;
119
120 /* Activate the chip select */
121 if (ms->cs_change)
122 mpc52xx_spi_chipsel(ms, 1);
123 ms->cs_change = ms->transfer->cs_change;
124
125 /* Write out the first byte */
126 ms->wcol_tx_timestamp = get_tbl();
127 if (ms->tx_buf)
128 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
129 else
130 out_8(ms->regs + SPI_DATA, 0);
131}
132
133/* Forward declaration of state handlers */
134static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
135 u8 status, u8 data);
136static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
137 u8 status, u8 data);
138
139/*
140 * IDLE state
141 *
142 * No transfers are in progress; if another transfer is pending then retrieve
143 * it and kick it off. Otherwise, stop processing the state machine
144 */
145static int
146mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
147{
148 struct spi_device *spi;
149 int spr, sppr;
150 u8 ctrl1;
151
152 if (status && (irq != NO_IRQ))
153 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
154 status);
155
156 /* Check if there is another transfer waiting. */
157 if (list_empty(&ms->queue))
158 return FSM_STOP;
159
160 /* get the head of the queue */
161 ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
162 list_del_init(&ms->message->queue);
163
164 /* Setup the controller parameters */
165 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
166 spi = ms->message->spi;
167 if (spi->mode & SPI_CPHA)
168 ctrl1 |= SPI_CTRL1_CPHA;
169 if (spi->mode & SPI_CPOL)
170 ctrl1 |= SPI_CTRL1_CPOL;
171 if (spi->mode & SPI_LSB_FIRST)
172 ctrl1 |= SPI_CTRL1_LSBFE;
173 out_8(ms->regs + SPI_CTRL1, ctrl1);
174
175 /* Setup the controller speed */
176 /* minimum divider is '2'. Also, add '1' to force rounding the
177 * divider up. */
178 sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
179 spr = 0;
180 if (sppr < 1)
181 sppr = 1;
182 while (((sppr - 1) & ~0x7) != 0) {
183 sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
184 spr++;
185 }
186 sppr--; /* sppr quantity in register is offset by 1 */
187 if (spr > 7) {
188 /* Don't overrun limits of SPI baudrate register */
189 spr = 7;
190 sppr = 7;
191 }
192 out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
193
194 ms->cs_change = 1;
195 ms->transfer = container_of(ms->message->transfers.next,
196 struct spi_transfer, transfer_list);
197
198 mpc52xx_spi_start_transfer(ms);
199 ms->state = mpc52xx_spi_fsmstate_transfer;
200
201 return FSM_CONTINUE;
202}
203
204/*
205 * TRANSFER state
206 *
207 * In the middle of a transfer. If the SPI core has completed processing
208 * a byte, then read out the received data and write out the next byte
209 * (unless this transfer is finished; in which case go on to the wait
210 * state)
211 */
212static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
213 u8 status, u8 data)
214{
215 if (!status)
216 return ms->irq0 ? FSM_STOP : FSM_POLL;
217
218 if (status & SPI_STATUS_WCOL) {
219 /* The SPI controller is stoopid. At slower speeds, it may
220 * raise the SPIF flag before the state machine is actually
221 * finished, which causes a collision (internal to the state
222 * machine only). The manual recommends inserting a delay
223 * between receiving the interrupt and sending the next byte,
224 * but it can also be worked around simply by retrying the
225 * transfer which is what we do here. */
226 ms->wcol_count++;
227 ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
228 ms->wcol_tx_timestamp = get_tbl();
229 data = 0;
230 if (ms->tx_buf)
Wolfram Sang937041e2009-11-24 17:18:31 -0700231 data = *(ms->tx_buf - 1);
Grant Likely42bbb702009-11-04 15:34:18 -0700232 out_8(ms->regs + SPI_DATA, data); /* try again */
233 return FSM_CONTINUE;
234 } else if (status & SPI_STATUS_MODF) {
235 ms->modf_count++;
236 dev_err(&ms->master->dev, "mode fault\n");
237 mpc52xx_spi_chipsel(ms, 0);
238 ms->message->status = -EIO;
239 ms->message->complete(ms->message->context);
240 ms->state = mpc52xx_spi_fsmstate_idle;
241 return FSM_CONTINUE;
242 }
243
244 /* Read data out of the spi device */
245 ms->byte_count++;
246 if (ms->rx_buf)
247 *ms->rx_buf++ = data;
248
249 /* Is the transfer complete? */
250 ms->len--;
251 if (ms->len == 0) {
252 ms->timestamp = get_tbl();
253 ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
254 ms->state = mpc52xx_spi_fsmstate_wait;
255 return FSM_CONTINUE;
256 }
257
258 /* Write out the next byte */
259 ms->wcol_tx_timestamp = get_tbl();
260 if (ms->tx_buf)
261 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
262 else
263 out_8(ms->regs + SPI_DATA, 0);
264
265 return FSM_CONTINUE;
266}
267
268/*
269 * WAIT state
270 *
271 * A transfer has completed; need to wait for the delay period to complete
272 * before starting the next transfer
273 */
274static int
275mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
276{
277 if (status && irq)
278 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
279 status);
280
281 if (((int)get_tbl()) - ms->timestamp < 0)
282 return FSM_POLL;
283
284 ms->message->actual_length += ms->transfer->len;
285
286 /* Check if there is another transfer in this message. If there
287 * aren't then deactivate CS, notify sender, and drop back to idle
288 * to start the next message. */
289 if (ms->transfer->transfer_list.next == &ms->message->transfers) {
290 ms->msg_count++;
291 mpc52xx_spi_chipsel(ms, 0);
292 ms->message->status = 0;
293 ms->message->complete(ms->message->context);
294 ms->state = mpc52xx_spi_fsmstate_idle;
295 return FSM_CONTINUE;
296 }
297
298 /* There is another transfer; kick it off */
299
300 if (ms->cs_change)
301 mpc52xx_spi_chipsel(ms, 0);
302
303 ms->transfer = container_of(ms->transfer->transfer_list.next,
304 struct spi_transfer, transfer_list);
305 mpc52xx_spi_start_transfer(ms);
306 ms->state = mpc52xx_spi_fsmstate_transfer;
307 return FSM_CONTINUE;
308}
309
310/**
311 * mpc52xx_spi_fsm_process - Finite State Machine iteration function
312 * @irq: irq number that triggered the FSM or 0 for polling
313 * @ms: pointer to mpc52xx_spi driver data
314 */
315static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
316{
317 int rc = FSM_CONTINUE;
318 u8 status, data;
319
320 while (rc == FSM_CONTINUE) {
321 /* Interrupt cleared by read of STATUS followed by
322 * read of DATA registers */
323 status = in_8(ms->regs + SPI_STATUS);
324 data = in_8(ms->regs + SPI_DATA);
325 rc = ms->state(irq, ms, status, data);
326 }
327
328 if (rc == FSM_POLL)
329 schedule_work(&ms->work);
330}
331
332/**
333 * mpc52xx_spi_irq - IRQ handler
334 */
335static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
336{
337 struct mpc52xx_spi *ms = _ms;
338 spin_lock(&ms->lock);
339 mpc52xx_spi_fsm_process(irq, ms);
340 spin_unlock(&ms->lock);
341 return IRQ_HANDLED;
342}
343
344/**
345 * mpc52xx_spi_wq - Workqueue function for polling the state machine
346 */
347static void mpc52xx_spi_wq(struct work_struct *work)
348{
349 struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
350 unsigned long flags;
351
352 spin_lock_irqsave(&ms->lock, flags);
353 mpc52xx_spi_fsm_process(0, ms);
354 spin_unlock_irqrestore(&ms->lock, flags);
355}
356
357/*
358 * spi_master ops
359 */
360
361static int mpc52xx_spi_setup(struct spi_device *spi)
362{
363 if (spi->bits_per_word % 8)
364 return -EINVAL;
365
366 if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST))
367 return -EINVAL;
368
369 if (spi->chip_select >= spi->master->num_chipselect)
370 return -EINVAL;
371
372 return 0;
373}
374
375static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
376{
377 struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
378 unsigned long flags;
379
380 m->actual_length = 0;
381 m->status = -EINPROGRESS;
382
383 spin_lock_irqsave(&ms->lock, flags);
384 list_add_tail(&m->queue, &ms->queue);
385 spin_unlock_irqrestore(&ms->lock, flags);
386 schedule_work(&ms->work);
387
388 return 0;
389}
390
391/*
392 * OF Platform Bus Binding
393 */
394static int __devinit mpc52xx_spi_probe(struct of_device *op,
395 const struct of_device_id *match)
396{
397 struct spi_master *master;
398 struct mpc52xx_spi *ms;
399 void __iomem *regs;
Luotao Fu4a495b12009-11-13 10:41:15 +0100400 u8 ctrl1;
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100401 int rc, i = 0;
402 int gpio_cs;
Grant Likely42bbb702009-11-04 15:34:18 -0700403
404 /* MMIO registers */
405 dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
Grant Likely61c7a082010-04-13 16:12:29 -0700406 regs = of_iomap(op->dev.of_node, 0);
Grant Likely42bbb702009-11-04 15:34:18 -0700407 if (!regs)
408 return -ENODEV;
409
410 /* initialize the device */
Luotao Fu4a495b12009-11-13 10:41:15 +0100411 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
412 out_8(regs + SPI_CTRL1, ctrl1);
Grant Likely42bbb702009-11-04 15:34:18 -0700413 out_8(regs + SPI_CTRL2, 0x0);
414 out_8(regs + SPI_DATADIR, 0xe); /* Set output pins */
415 out_8(regs + SPI_PORTDATA, 0x8); /* Deassert /SS signal */
416
417 /* Clear the status register and re-read it to check for a MODF
418 * failure. This driver cannot currently handle multiple masters
419 * on the SPI bus. This fault will also occur if the SPI signals
420 * are not connected to any pins (port_config setting) */
421 in_8(regs + SPI_STATUS);
Luotao Fu4a495b12009-11-13 10:41:15 +0100422 out_8(regs + SPI_CTRL1, ctrl1);
423
Grant Likely42bbb702009-11-04 15:34:18 -0700424 in_8(regs + SPI_DATA);
425 if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
426 dev_err(&op->dev, "mode fault; is port_config correct?\n");
427 rc = -EIO;
428 goto err_init;
429 }
430
431 dev_dbg(&op->dev, "allocating spi_master struct\n");
432 master = spi_alloc_master(&op->dev, sizeof *ms);
433 if (!master) {
434 rc = -ENOMEM;
435 goto err_alloc;
436 }
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100437
Grant Likely42bbb702009-11-04 15:34:18 -0700438 master->bus_num = -1;
Grant Likely42bbb702009-11-04 15:34:18 -0700439 master->setup = mpc52xx_spi_setup;
440 master->transfer = mpc52xx_spi_transfer;
Luotao Fud65aea92009-11-13 10:41:16 +0100441 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
442
Grant Likely42bbb702009-11-04 15:34:18 -0700443 dev_set_drvdata(&op->dev, master);
444
445 ms = spi_master_get_devdata(master);
446 ms->master = master;
447 ms->regs = regs;
Grant Likely61c7a082010-04-13 16:12:29 -0700448 ms->irq0 = irq_of_parse_and_map(op->dev.of_node, 0);
449 ms->irq1 = irq_of_parse_and_map(op->dev.of_node, 1);
Grant Likely42bbb702009-11-04 15:34:18 -0700450 ms->state = mpc52xx_spi_fsmstate_idle;
Grant Likely61c7a082010-04-13 16:12:29 -0700451 ms->ipb_freq = mpc5xxx_get_bus_frequency(op->dev.of_node);
452 ms->gpio_cs_count = of_gpio_count(op->dev.of_node);
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100453 if (ms->gpio_cs_count > 0) {
454 master->num_chipselect = ms->gpio_cs_count;
455 ms->gpio_cs = kmalloc(ms->gpio_cs_count * sizeof(unsigned int),
456 GFP_KERNEL);
457 if (!ms->gpio_cs) {
458 rc = -ENOMEM;
459 goto err_alloc;
460 }
461
462 for (i = 0; i < ms->gpio_cs_count; i++) {
Grant Likely61c7a082010-04-13 16:12:29 -0700463 gpio_cs = of_get_gpio(op->dev.of_node, i);
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100464 if (gpio_cs < 0) {
465 dev_err(&op->dev,
466 "could not parse the gpio field "
467 "in oftree\n");
468 rc = -ENODEV;
469 goto err_gpio;
470 }
471
472 rc = gpio_request(gpio_cs, dev_name(&op->dev));
473 if (rc) {
474 dev_err(&op->dev,
475 "can't request spi cs gpio #%d "
476 "on gpio line %d\n", i, gpio_cs);
477 goto err_gpio;
478 }
479
480 gpio_direction_output(gpio_cs, 1);
481 ms->gpio_cs[i] = gpio_cs;
482 }
Wolfram Sang937041e2009-11-24 17:18:31 -0700483 } else {
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100484 master->num_chipselect = 1;
Wolfram Sang937041e2009-11-24 17:18:31 -0700485 }
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100486
Grant Likely42bbb702009-11-04 15:34:18 -0700487 spin_lock_init(&ms->lock);
488 INIT_LIST_HEAD(&ms->queue);
489 INIT_WORK(&ms->work, mpc52xx_spi_wq);
490
491 /* Decide if interrupts can be used */
492 if (ms->irq0 && ms->irq1) {
Wolfram Sang937041e2009-11-24 17:18:31 -0700493 rc = request_irq(ms->irq0, mpc52xx_spi_irq, 0,
Grant Likely42bbb702009-11-04 15:34:18 -0700494 "mpc5200-spi-modf", ms);
Wolfram Sang937041e2009-11-24 17:18:31 -0700495 rc |= request_irq(ms->irq1, mpc52xx_spi_irq, 0,
496 "mpc5200-spi-spif", ms);
Grant Likely42bbb702009-11-04 15:34:18 -0700497 if (rc) {
498 free_irq(ms->irq0, ms);
499 free_irq(ms->irq1, ms);
500 ms->irq0 = ms->irq1 = 0;
501 }
502 } else {
503 /* operate in polled mode */
504 ms->irq0 = ms->irq1 = 0;
505 }
506
507 if (!ms->irq0)
508 dev_info(&op->dev, "using polled mode\n");
509
510 dev_dbg(&op->dev, "registering spi_master struct\n");
511 rc = spi_register_master(master);
512 if (rc)
513 goto err_register;
514
Grant Likely61c7a082010-04-13 16:12:29 -0700515 of_register_spi_devices(master, op->dev.of_node);
Grant Likely42bbb702009-11-04 15:34:18 -0700516 dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
517
518 return rc;
519
520 err_register:
521 dev_err(&ms->master->dev, "initialization failed\n");
522 spi_master_put(master);
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100523 err_gpio:
524 while (i-- > 0)
525 gpio_free(ms->gpio_cs[i]);
526
Wolfram Sang937041e2009-11-24 17:18:31 -0700527 kfree(ms->gpio_cs);
Grant Likely42bbb702009-11-04 15:34:18 -0700528 err_alloc:
529 err_init:
530 iounmap(regs);
531 return rc;
532}
533
534static int __devexit mpc52xx_spi_remove(struct of_device *op)
535{
536 struct spi_master *master = dev_get_drvdata(&op->dev);
537 struct mpc52xx_spi *ms = spi_master_get_devdata(master);
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100538 int i;
Grant Likely42bbb702009-11-04 15:34:18 -0700539
540 free_irq(ms->irq0, ms);
541 free_irq(ms->irq1, ms);
542
Luotao Fub8d4e2c2009-11-13 10:41:17 +0100543 for (i = 0; i < ms->gpio_cs_count; i++)
544 gpio_free(ms->gpio_cs[i]);
545
Wolfram Sang937041e2009-11-24 17:18:31 -0700546 kfree(ms->gpio_cs);
Grant Likely42bbb702009-11-04 15:34:18 -0700547 spi_unregister_master(master);
548 spi_master_put(master);
549 iounmap(ms->regs);
550
551 return 0;
552}
553
Márton Németh631e61b2010-01-20 13:49:44 -0700554static const struct of_device_id mpc52xx_spi_match[] __devinitconst = {
Grant Likely42bbb702009-11-04 15:34:18 -0700555 { .compatible = "fsl,mpc5200-spi", },
556 {}
557};
558MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
559
560static struct of_platform_driver mpc52xx_spi_of_driver = {
Grant Likely40182942010-04-13 16:13:02 -0700561 .driver = {
562 .name = "mpc52xx-spi",
563 .owner = THIS_MODULE,
564 .of_match_table = mpc52xx_spi_match,
565 },
Grant Likely42bbb702009-11-04 15:34:18 -0700566 .probe = mpc52xx_spi_probe,
567 .remove = __exit_p(mpc52xx_spi_remove),
568};
569
570static int __init mpc52xx_spi_init(void)
571{
572 return of_register_platform_driver(&mpc52xx_spi_of_driver);
573}
574module_init(mpc52xx_spi_init);
575
576static void __exit mpc52xx_spi_exit(void)
577{
578 of_unregister_platform_driver(&mpc52xx_spi_of_driver);
579}
580module_exit(mpc52xx_spi_exit);
581