Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 1 | /* |
Grant Likely | ca632f5 | 2011-06-06 01:16:30 -0600 | [diff] [blame] | 2 | * TXx9 SPI controller driver. |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 3 | * |
| 4 | * Based on linux/arch/mips/tx4938/toshiba_rbtx4938/spi_txx9.c |
| 5 | * Copyright (C) 2000-2001 Toshiba Corporation |
| 6 | * |
| 7 | * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the |
| 8 | * terms of the GNU General Public License version 2. This program is |
| 9 | * licensed "as is" without any warranty of any kind, whether express |
| 10 | * or implied. |
| 11 | * |
| 12 | * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com) |
| 13 | * |
| 14 | * Convert to generic SPI framework - Atsushi Nemoto (anemo@mba.ocn.ne.jp) |
| 15 | */ |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/errno.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/sched.h> |
| 22 | #include <linux/spinlock.h> |
| 23 | #include <linux/workqueue.h> |
| 24 | #include <linux/spi/spi.h> |
| 25 | #include <linux/err.h> |
| 26 | #include <linux/clk.h> |
Atsushi Nemoto | ba0a7f39 | 2007-11-14 16:59:23 -0800 | [diff] [blame] | 27 | #include <linux/io.h> |
Paul Gortmaker | d7614de | 2011-07-03 15:44:29 -0400 | [diff] [blame] | 28 | #include <linux/module.h> |
Mark Brown | e221fa4 | 2013-07-30 11:43:57 +0100 | [diff] [blame] | 29 | #include <linux/gpio.h> |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 30 | |
| 31 | |
| 32 | #define SPI_FIFO_SIZE 4 |
Atsushi Nemoto | dbf763a | 2009-09-03 22:59:01 +0900 | [diff] [blame] | 33 | #define SPI_MAX_DIVIDER 0xff /* Max. value for SPCR1.SER */ |
| 34 | #define SPI_MIN_DIVIDER 1 /* Min. value for SPCR1.SER */ |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 35 | |
| 36 | #define TXx9_SPMCR 0x00 |
| 37 | #define TXx9_SPCR0 0x04 |
| 38 | #define TXx9_SPCR1 0x08 |
| 39 | #define TXx9_SPFS 0x0c |
| 40 | #define TXx9_SPSR 0x14 |
| 41 | #define TXx9_SPDR 0x18 |
| 42 | |
| 43 | /* SPMCR : SPI Master Control */ |
| 44 | #define TXx9_SPMCR_OPMODE 0xc0 |
| 45 | #define TXx9_SPMCR_CONFIG 0x40 |
| 46 | #define TXx9_SPMCR_ACTIVE 0x80 |
| 47 | #define TXx9_SPMCR_SPSTP 0x02 |
| 48 | #define TXx9_SPMCR_BCLR 0x01 |
| 49 | |
| 50 | /* SPCR0 : SPI Control 0 */ |
| 51 | #define TXx9_SPCR0_TXIFL_MASK 0xc000 |
| 52 | #define TXx9_SPCR0_RXIFL_MASK 0x3000 |
| 53 | #define TXx9_SPCR0_SIDIE 0x0800 |
| 54 | #define TXx9_SPCR0_SOEIE 0x0400 |
| 55 | #define TXx9_SPCR0_RBSIE 0x0200 |
| 56 | #define TXx9_SPCR0_TBSIE 0x0100 |
| 57 | #define TXx9_SPCR0_IFSPSE 0x0010 |
| 58 | #define TXx9_SPCR0_SBOS 0x0004 |
| 59 | #define TXx9_SPCR0_SPHA 0x0002 |
| 60 | #define TXx9_SPCR0_SPOL 0x0001 |
| 61 | |
| 62 | /* SPSR : SPI Status */ |
| 63 | #define TXx9_SPSR_TBSI 0x8000 |
| 64 | #define TXx9_SPSR_RBSI 0x4000 |
| 65 | #define TXx9_SPSR_TBS_MASK 0x3800 |
| 66 | #define TXx9_SPSR_RBS_MASK 0x0700 |
| 67 | #define TXx9_SPSR_SPOE 0x0080 |
| 68 | #define TXx9_SPSR_IFSD 0x0008 |
| 69 | #define TXx9_SPSR_SIDLE 0x0004 |
| 70 | #define TXx9_SPSR_STRDY 0x0002 |
| 71 | #define TXx9_SPSR_SRRDY 0x0001 |
| 72 | |
| 73 | |
| 74 | struct txx9spi { |
| 75 | struct workqueue_struct *workqueue; |
| 76 | struct work_struct work; |
| 77 | spinlock_t lock; /* protect 'queue' */ |
| 78 | struct list_head queue; |
| 79 | wait_queue_head_t waitq; |
| 80 | void __iomem *membase; |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 81 | int baseclk; |
| 82 | struct clk *clk; |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 83 | int last_chipselect; |
| 84 | int last_chipselect_val; |
| 85 | }; |
| 86 | |
| 87 | static u32 txx9spi_rd(struct txx9spi *c, int reg) |
| 88 | { |
| 89 | return __raw_readl(c->membase + reg); |
| 90 | } |
| 91 | static void txx9spi_wr(struct txx9spi *c, u32 val, int reg) |
| 92 | { |
| 93 | __raw_writel(val, c->membase + reg); |
| 94 | } |
| 95 | |
| 96 | static void txx9spi_cs_func(struct spi_device *spi, struct txx9spi *c, |
| 97 | int on, unsigned int cs_delay) |
| 98 | { |
| 99 | int val = (spi->mode & SPI_CS_HIGH) ? on : !on; |
Jingoo Han | a2cea98 | 2014-09-02 11:53:54 +0900 | [diff] [blame] | 100 | |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 101 | if (on) { |
| 102 | /* deselect the chip with cs_change hint in last transfer */ |
| 103 | if (c->last_chipselect >= 0) |
| 104 | gpio_set_value(c->last_chipselect, |
| 105 | !c->last_chipselect_val); |
| 106 | c->last_chipselect = spi->chip_select; |
| 107 | c->last_chipselect_val = val; |
| 108 | } else { |
| 109 | c->last_chipselect = -1; |
| 110 | ndelay(cs_delay); /* CS Hold Time */ |
| 111 | } |
| 112 | gpio_set_value(spi->chip_select, val); |
| 113 | ndelay(cs_delay); /* CS Setup Time / CS Recovery Time */ |
| 114 | } |
| 115 | |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 116 | static int txx9spi_setup(struct spi_device *spi) |
| 117 | { |
| 118 | struct txx9spi *c = spi_master_get_devdata(spi->master); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 119 | |
Axel Lin | 425f96d | 2014-02-09 12:15:07 +0800 | [diff] [blame] | 120 | if (!spi->max_speed_hz) |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 121 | return -EINVAL; |
| 122 | |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 123 | if (gpio_direction_output(spi->chip_select, |
| 124 | !(spi->mode & SPI_CS_HIGH))) { |
| 125 | dev_err(&spi->dev, "Cannot setup GPIO for chipselect.\n"); |
| 126 | return -EINVAL; |
| 127 | } |
| 128 | |
| 129 | /* deselect chip */ |
| 130 | spin_lock(&c->lock); |
| 131 | txx9spi_cs_func(spi, c, 0, (NSEC_PER_SEC / 2) / spi->max_speed_hz); |
| 132 | spin_unlock(&c->lock); |
| 133 | |
| 134 | return 0; |
| 135 | } |
| 136 | |
| 137 | static irqreturn_t txx9spi_interrupt(int irq, void *dev_id) |
| 138 | { |
| 139 | struct txx9spi *c = dev_id; |
| 140 | |
| 141 | /* disable rx intr */ |
| 142 | txx9spi_wr(c, txx9spi_rd(c, TXx9_SPCR0) & ~TXx9_SPCR0_RBSIE, |
| 143 | TXx9_SPCR0); |
| 144 | wake_up(&c->waitq); |
| 145 | return IRQ_HANDLED; |
| 146 | } |
| 147 | |
| 148 | static void txx9spi_work_one(struct txx9spi *c, struct spi_message *m) |
| 149 | { |
| 150 | struct spi_device *spi = m->spi; |
| 151 | struct spi_transfer *t; |
| 152 | unsigned int cs_delay; |
| 153 | unsigned int cs_change = 1; |
| 154 | int status = 0; |
| 155 | u32 mcr; |
| 156 | u32 prev_speed_hz = 0; |
| 157 | u8 prev_bits_per_word = 0; |
| 158 | |
| 159 | /* CS setup/hold/recovery time in nsec */ |
| 160 | cs_delay = 100 + (NSEC_PER_SEC / 2) / spi->max_speed_hz; |
| 161 | |
| 162 | mcr = txx9spi_rd(c, TXx9_SPMCR); |
| 163 | if (unlikely((mcr & TXx9_SPMCR_OPMODE) == TXx9_SPMCR_ACTIVE)) { |
| 164 | dev_err(&spi->dev, "Bad mode.\n"); |
| 165 | status = -EIO; |
| 166 | goto exit; |
| 167 | } |
| 168 | mcr &= ~(TXx9_SPMCR_OPMODE | TXx9_SPMCR_SPSTP | TXx9_SPMCR_BCLR); |
| 169 | |
| 170 | /* enter config mode */ |
| 171 | txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR); |
| 172 | txx9spi_wr(c, TXx9_SPCR0_SBOS |
| 173 | | ((spi->mode & SPI_CPOL) ? TXx9_SPCR0_SPOL : 0) |
| 174 | | ((spi->mode & SPI_CPHA) ? TXx9_SPCR0_SPHA : 0) |
| 175 | | 0x08, |
| 176 | TXx9_SPCR0); |
| 177 | |
Jingoo Han | 256fbf3 | 2013-10-14 10:36:31 +0900 | [diff] [blame] | 178 | list_for_each_entry(t, &m->transfers, transfer_list) { |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 179 | const void *txbuf = t->tx_buf; |
| 180 | void *rxbuf = t->rx_buf; |
| 181 | u32 data; |
| 182 | unsigned int len = t->len; |
| 183 | unsigned int wsize; |
| 184 | u32 speed_hz = t->speed_hz ? : spi->max_speed_hz; |
Laxman Dewangan | 766ed70 | 2012-12-18 14:25:43 +0530 | [diff] [blame] | 185 | u8 bits_per_word = t->bits_per_word; |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 186 | |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 187 | wsize = bits_per_word >> 3; /* in bytes */ |
| 188 | |
| 189 | if (prev_speed_hz != speed_hz |
| 190 | || prev_bits_per_word != bits_per_word) { |
Atsushi Nemoto | dbf763a | 2009-09-03 22:59:01 +0900 | [diff] [blame] | 191 | int n = DIV_ROUND_UP(c->baseclk, speed_hz) - 1; |
Jingoo Han | a2cea98 | 2014-09-02 11:53:54 +0900 | [diff] [blame] | 192 | |
Atsushi Nemoto | dbf763a | 2009-09-03 22:59:01 +0900 | [diff] [blame] | 193 | n = clamp(n, SPI_MIN_DIVIDER, SPI_MAX_DIVIDER); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 194 | /* enter config mode */ |
| 195 | txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, |
| 196 | TXx9_SPMCR); |
| 197 | txx9spi_wr(c, (n << 8) | bits_per_word, TXx9_SPCR1); |
| 198 | /* enter active mode */ |
| 199 | txx9spi_wr(c, mcr | TXx9_SPMCR_ACTIVE, TXx9_SPMCR); |
| 200 | |
| 201 | prev_speed_hz = speed_hz; |
| 202 | prev_bits_per_word = bits_per_word; |
| 203 | } |
| 204 | |
| 205 | if (cs_change) |
| 206 | txx9spi_cs_func(spi, c, 1, cs_delay); |
| 207 | cs_change = t->cs_change; |
| 208 | while (len) { |
| 209 | unsigned int count = SPI_FIFO_SIZE; |
| 210 | int i; |
| 211 | u32 cr0; |
| 212 | |
| 213 | if (len < count * wsize) |
| 214 | count = len / wsize; |
| 215 | /* now tx must be idle... */ |
| 216 | while (!(txx9spi_rd(c, TXx9_SPSR) & TXx9_SPSR_SIDLE)) |
| 217 | cpu_relax(); |
| 218 | cr0 = txx9spi_rd(c, TXx9_SPCR0); |
| 219 | cr0 &= ~TXx9_SPCR0_RXIFL_MASK; |
| 220 | cr0 |= (count - 1) << 12; |
| 221 | /* enable rx intr */ |
| 222 | cr0 |= TXx9_SPCR0_RBSIE; |
| 223 | txx9spi_wr(c, cr0, TXx9_SPCR0); |
| 224 | /* send */ |
| 225 | for (i = 0; i < count; i++) { |
| 226 | if (txbuf) { |
| 227 | data = (wsize == 1) |
| 228 | ? *(const u8 *)txbuf |
| 229 | : *(const u16 *)txbuf; |
| 230 | txx9spi_wr(c, data, TXx9_SPDR); |
| 231 | txbuf += wsize; |
| 232 | } else |
| 233 | txx9spi_wr(c, 0, TXx9_SPDR); |
| 234 | } |
| 235 | /* wait all rx data */ |
| 236 | wait_event(c->waitq, |
| 237 | txx9spi_rd(c, TXx9_SPSR) & TXx9_SPSR_RBSI); |
| 238 | /* receive */ |
| 239 | for (i = 0; i < count; i++) { |
| 240 | data = txx9spi_rd(c, TXx9_SPDR); |
| 241 | if (rxbuf) { |
| 242 | if (wsize == 1) |
| 243 | *(u8 *)rxbuf = data; |
| 244 | else |
| 245 | *(u16 *)rxbuf = data; |
| 246 | rxbuf += wsize; |
| 247 | } |
| 248 | } |
| 249 | len -= count * wsize; |
| 250 | } |
| 251 | m->actual_length += t->len; |
| 252 | if (t->delay_usecs) |
| 253 | udelay(t->delay_usecs); |
| 254 | |
| 255 | if (!cs_change) |
| 256 | continue; |
| 257 | if (t->transfer_list.next == &m->transfers) |
| 258 | break; |
| 259 | /* sometimes a short mid-message deselect of the chip |
| 260 | * may be needed to terminate a mode or command |
| 261 | */ |
| 262 | txx9spi_cs_func(spi, c, 0, cs_delay); |
| 263 | } |
| 264 | |
| 265 | exit: |
| 266 | m->status = status; |
Axel Lin | 0a6d387 | 2014-04-02 22:21:04 +0800 | [diff] [blame] | 267 | if (m->complete) |
| 268 | m->complete(m->context); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 269 | |
| 270 | /* normally deactivate chipselect ... unless no error and |
| 271 | * cs_change has hinted that the next message will probably |
| 272 | * be for this chip too. |
| 273 | */ |
| 274 | if (!(status == 0 && cs_change)) |
| 275 | txx9spi_cs_func(spi, c, 0, cs_delay); |
| 276 | |
| 277 | /* enter config mode */ |
| 278 | txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR); |
| 279 | } |
| 280 | |
| 281 | static void txx9spi_work(struct work_struct *work) |
| 282 | { |
| 283 | struct txx9spi *c = container_of(work, struct txx9spi, work); |
| 284 | unsigned long flags; |
| 285 | |
| 286 | spin_lock_irqsave(&c->lock, flags); |
| 287 | while (!list_empty(&c->queue)) { |
| 288 | struct spi_message *m; |
| 289 | |
| 290 | m = container_of(c->queue.next, struct spi_message, queue); |
| 291 | list_del_init(&m->queue); |
| 292 | spin_unlock_irqrestore(&c->lock, flags); |
| 293 | |
| 294 | txx9spi_work_one(c, m); |
| 295 | |
| 296 | spin_lock_irqsave(&c->lock, flags); |
| 297 | } |
| 298 | spin_unlock_irqrestore(&c->lock, flags); |
| 299 | } |
| 300 | |
| 301 | static int txx9spi_transfer(struct spi_device *spi, struct spi_message *m) |
| 302 | { |
| 303 | struct spi_master *master = spi->master; |
| 304 | struct txx9spi *c = spi_master_get_devdata(master); |
| 305 | struct spi_transfer *t; |
| 306 | unsigned long flags; |
| 307 | |
| 308 | m->actual_length = 0; |
| 309 | |
| 310 | /* check each transfer's parameters */ |
Jingoo Han | 256fbf3 | 2013-10-14 10:36:31 +0900 | [diff] [blame] | 311 | list_for_each_entry(t, &m->transfers, transfer_list) { |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 312 | if (!t->tx_buf && !t->rx_buf && t->len) |
| 313 | return -EINVAL; |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 314 | } |
| 315 | |
| 316 | spin_lock_irqsave(&c->lock, flags); |
| 317 | list_add_tail(&m->queue, &c->queue); |
| 318 | queue_work(c->workqueue, &c->work); |
| 319 | spin_unlock_irqrestore(&c->lock, flags); |
| 320 | |
| 321 | return 0; |
| 322 | } |
| 323 | |
Grant Likely | 2deff8d | 2013-02-05 13:27:35 +0000 | [diff] [blame] | 324 | static int txx9spi_probe(struct platform_device *dev) |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 325 | { |
| 326 | struct spi_master *master; |
| 327 | struct txx9spi *c; |
| 328 | struct resource *res; |
| 329 | int ret = -ENODEV; |
| 330 | u32 mcr; |
Atsushi Nemoto | ba0a7f39 | 2007-11-14 16:59:23 -0800 | [diff] [blame] | 331 | int irq; |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 332 | |
| 333 | master = spi_alloc_master(&dev->dev, sizeof(*c)); |
| 334 | if (!master) |
| 335 | return ret; |
| 336 | c = spi_master_get_devdata(master); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 337 | platform_set_drvdata(dev, master); |
| 338 | |
| 339 | INIT_WORK(&c->work, txx9spi_work); |
| 340 | spin_lock_init(&c->lock); |
| 341 | INIT_LIST_HEAD(&c->queue); |
| 342 | init_waitqueue_head(&c->waitq); |
| 343 | |
Jingoo Han | 18e34d5 | 2013-12-09 19:23:12 +0900 | [diff] [blame] | 344 | c->clk = devm_clk_get(&dev->dev, "spi-baseclk"); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 345 | if (IS_ERR(c->clk)) { |
| 346 | ret = PTR_ERR(c->clk); |
| 347 | c->clk = NULL; |
| 348 | goto exit; |
| 349 | } |
| 350 | ret = clk_enable(c->clk); |
| 351 | if (ret) { |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 352 | c->clk = NULL; |
| 353 | goto exit; |
| 354 | } |
| 355 | c->baseclk = clk_get_rate(c->clk); |
Axel Lin | 425f96d | 2014-02-09 12:15:07 +0800 | [diff] [blame] | 356 | master->min_speed_hz = DIV_ROUND_UP(c->baseclk, SPI_MAX_DIVIDER + 1); |
| 357 | master->max_speed_hz = c->baseclk / (SPI_MIN_DIVIDER + 1); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 358 | |
| 359 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
Jingoo Han | 7bdadd8 | 2014-02-26 10:35:09 +0900 | [diff] [blame] | 360 | c->membase = devm_ioremap_resource(&dev->dev, res); |
| 361 | if (IS_ERR(c->membase)) |
Atsushi Nemoto | ba0a7f39 | 2007-11-14 16:59:23 -0800 | [diff] [blame] | 362 | goto exit_busy; |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 363 | |
| 364 | /* enter config mode */ |
| 365 | mcr = txx9spi_rd(c, TXx9_SPMCR); |
| 366 | mcr &= ~(TXx9_SPMCR_OPMODE | TXx9_SPMCR_SPSTP | TXx9_SPMCR_BCLR); |
| 367 | txx9spi_wr(c, mcr | TXx9_SPMCR_CONFIG | TXx9_SPMCR_BCLR, TXx9_SPMCR); |
| 368 | |
Atsushi Nemoto | ba0a7f39 | 2007-11-14 16:59:23 -0800 | [diff] [blame] | 369 | irq = platform_get_irq(dev, 0); |
| 370 | if (irq < 0) |
| 371 | goto exit_busy; |
| 372 | ret = devm_request_irq(&dev->dev, irq, txx9spi_interrupt, 0, |
| 373 | "spi_txx9", c); |
| 374 | if (ret) |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 375 | goto exit; |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 376 | |
Kay Sievers | 6c7377a | 2009-03-24 16:38:21 -0700 | [diff] [blame] | 377 | c->workqueue = create_singlethread_workqueue( |
| 378 | dev_name(master->dev.parent)); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 379 | if (!c->workqueue) |
Atsushi Nemoto | ba0a7f39 | 2007-11-14 16:59:23 -0800 | [diff] [blame] | 380 | goto exit_busy; |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 381 | c->last_chipselect = -1; |
| 382 | |
| 383 | dev_info(&dev->dev, "at %#llx, irq %d, %dMHz\n", |
Atsushi Nemoto | ba0a7f39 | 2007-11-14 16:59:23 -0800 | [diff] [blame] | 384 | (unsigned long long)res->start, irq, |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 385 | (c->baseclk + 500000) / 1000000); |
| 386 | |
David Brownell | e7db06b | 2009-06-17 16:26:04 -0700 | [diff] [blame] | 387 | /* the spi->mode bits understood by this driver: */ |
| 388 | master->mode_bits = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA; |
| 389 | |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 390 | master->bus_num = dev->id; |
| 391 | master->setup = txx9spi_setup; |
| 392 | master->transfer = txx9spi_transfer; |
| 393 | master->num_chipselect = (u16)UINT_MAX; /* any GPIO numbers */ |
Stephen Warren | 24778be | 2013-05-21 20:36:35 -0600 | [diff] [blame] | 394 | master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 395 | |
Jingoo Han | 2fe7e4a | 2013-09-24 13:53:37 +0900 | [diff] [blame] | 396 | ret = devm_spi_register_master(&dev->dev, master); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 397 | if (ret) |
| 398 | goto exit; |
| 399 | return 0; |
Atsushi Nemoto | ba0a7f39 | 2007-11-14 16:59:23 -0800 | [diff] [blame] | 400 | exit_busy: |
| 401 | ret = -EBUSY; |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 402 | exit: |
| 403 | if (c->workqueue) |
| 404 | destroy_workqueue(c->workqueue); |
Markus Elfring | 7d57cd8 | 2014-11-29 18:34:20 +0100 | [diff] [blame^] | 405 | clk_disable(c->clk); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 406 | spi_master_put(master); |
| 407 | return ret; |
| 408 | } |
| 409 | |
Grant Likely | 2deff8d | 2013-02-05 13:27:35 +0000 | [diff] [blame] | 410 | static int txx9spi_remove(struct platform_device *dev) |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 411 | { |
Wei Yongjun | b38f87e | 2013-11-15 15:49:29 +0800 | [diff] [blame] | 412 | struct spi_master *master = platform_get_drvdata(dev); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 413 | struct txx9spi *c = spi_master_get_devdata(master); |
| 414 | |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 415 | destroy_workqueue(c->workqueue); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 416 | clk_disable(c->clk); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 417 | return 0; |
| 418 | } |
| 419 | |
Kay Sievers | 7e38c3c | 2008-04-10 21:29:20 -0700 | [diff] [blame] | 420 | /* work with hotplug and coldplug */ |
| 421 | MODULE_ALIAS("platform:spi_txx9"); |
| 422 | |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 423 | static struct platform_driver txx9spi_driver = { |
Wolfram Sang | 1d82d0c | 2013-10-08 22:35:41 +0200 | [diff] [blame] | 424 | .probe = txx9spi_probe, |
Grant Likely | 2deff8d | 2013-02-05 13:27:35 +0000 | [diff] [blame] | 425 | .remove = txx9spi_remove, |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 426 | .driver = { |
Atsushi Nemoto | 4ccdb4c | 2007-08-30 23:56:25 -0700 | [diff] [blame] | 427 | .name = "spi_txx9", |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 428 | .owner = THIS_MODULE, |
| 429 | }, |
| 430 | }; |
| 431 | |
| 432 | static int __init txx9spi_init(void) |
| 433 | { |
Wolfram Sang | 1d82d0c | 2013-10-08 22:35:41 +0200 | [diff] [blame] | 434 | return platform_driver_register(&txx9spi_driver); |
Atsushi Nemoto | f2cac67 | 2007-07-17 04:04:15 -0700 | [diff] [blame] | 435 | } |
| 436 | subsys_initcall(txx9spi_init); |
| 437 | |
| 438 | static void __exit txx9spi_exit(void) |
| 439 | { |
| 440 | platform_driver_unregister(&txx9spi_driver); |
| 441 | } |
| 442 | module_exit(txx9spi_exit); |
| 443 | |
| 444 | MODULE_DESCRIPTION("TXx9 SPI Driver"); |
| 445 | MODULE_LICENSE("GPL"); |