Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu> |
| 3 | */ |
Stephen Rothwell | bbeb3f4 | 2005-09-27 13:51:59 +1000 | [diff] [blame] | 4 | #ifndef _ASM_POWERPC_SYSTEM_H |
| 5 | #define _ASM_POWERPC_SYSTEM_H |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 6 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 7 | #include <linux/kernel.h> |
| 8 | |
| 9 | #include <asm/hw_irq.h> |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 10 | |
| 11 | /* |
| 12 | * Memory barrier. |
| 13 | * The sync instruction guarantees that all memory accesses initiated |
| 14 | * by this processor have been performed (with respect to all other |
| 15 | * mechanisms that access memory). The eieio instruction is a barrier |
| 16 | * providing an ordering (separately) for (a) cacheable stores and (b) |
| 17 | * loads and stores to non-cacheable memory (e.g. I/O devices). |
| 18 | * |
| 19 | * mb() prevents loads and stores being reordered across this point. |
| 20 | * rmb() prevents loads being reordered across this point. |
| 21 | * wmb() prevents stores being reordered across this point. |
| 22 | * read_barrier_depends() prevents data-dependent loads being reordered |
| 23 | * across this point (nop on PPC). |
| 24 | * |
| 25 | * We have to use the sync instructions for mb(), since lwsync doesn't |
| 26 | * order loads with respect to previous stores. Lwsync is fine for |
Andy Fleming | e0da0da | 2006-10-27 14:31:07 -0500 | [diff] [blame] | 27 | * rmb(), though. Note that rmb() actually uses a sync on 32-bit |
| 28 | * architectures. |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 29 | * |
| 30 | * For wmb(), we use sync since wmb is used in drivers to order |
| 31 | * stores to system memory with respect to writes to the device. |
| 32 | * However, smp_wmb() can be a lighter-weight eieio barrier on |
| 33 | * SMP since it is only used to order updates to system memory. |
| 34 | */ |
| 35 | #define mb() __asm__ __volatile__ ("sync" : : : "memory") |
Andy Fleming | e0da0da | 2006-10-27 14:31:07 -0500 | [diff] [blame] | 36 | #define rmb() __asm__ __volatile__ (__stringify(LWSYNC) : : : "memory") |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 37 | #define wmb() __asm__ __volatile__ ("sync" : : : "memory") |
| 38 | #define read_barrier_depends() do { } while(0) |
| 39 | |
| 40 | #define set_mb(var, value) do { var = value; mb(); } while (0) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 41 | |
Arnd Bergmann | 88ced03 | 2005-12-16 22:43:46 +0100 | [diff] [blame] | 42 | #ifdef __KERNEL__ |
Olaf Hering | 4f9a58d | 2007-10-16 23:30:12 -0700 | [diff] [blame] | 43 | #define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */ |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 44 | #ifdef CONFIG_SMP |
| 45 | #define smp_mb() mb() |
| 46 | #define smp_rmb() rmb() |
Kumar Gala | 74a0ba6 | 2007-07-09 23:49:09 -0500 | [diff] [blame] | 47 | #define smp_wmb() eieio() |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 48 | #define smp_read_barrier_depends() read_barrier_depends() |
| 49 | #else |
| 50 | #define smp_mb() barrier() |
| 51 | #define smp_rmb() barrier() |
| 52 | #define smp_wmb() barrier() |
| 53 | #define smp_read_barrier_depends() do { } while(0) |
| 54 | #endif /* CONFIG_SMP */ |
| 55 | |
Nathan Lynch | 5db9fa9 | 2006-08-22 20:36:05 -0500 | [diff] [blame] | 56 | /* |
| 57 | * This is a barrier which prevents following instructions from being |
| 58 | * started until the value of the argument x is known. For example, if |
| 59 | * x is a variable loaded from memory, this prevents following |
| 60 | * instructions from being executed until the load has been performed. |
| 61 | */ |
| 62 | #define data_barrier(x) \ |
| 63 | asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory"); |
| 64 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 65 | struct task_struct; |
| 66 | struct pt_regs; |
| 67 | |
| 68 | #ifdef CONFIG_DEBUGGER |
| 69 | |
| 70 | extern int (*__debugger)(struct pt_regs *regs); |
| 71 | extern int (*__debugger_ipi)(struct pt_regs *regs); |
| 72 | extern int (*__debugger_bpt)(struct pt_regs *regs); |
| 73 | extern int (*__debugger_sstep)(struct pt_regs *regs); |
| 74 | extern int (*__debugger_iabr_match)(struct pt_regs *regs); |
| 75 | extern int (*__debugger_dabr_match)(struct pt_regs *regs); |
| 76 | extern int (*__debugger_fault_handler)(struct pt_regs *regs); |
| 77 | |
| 78 | #define DEBUGGER_BOILERPLATE(__NAME) \ |
| 79 | static inline int __NAME(struct pt_regs *regs) \ |
| 80 | { \ |
| 81 | if (unlikely(__ ## __NAME)) \ |
| 82 | return __ ## __NAME(regs); \ |
| 83 | return 0; \ |
| 84 | } |
| 85 | |
| 86 | DEBUGGER_BOILERPLATE(debugger) |
| 87 | DEBUGGER_BOILERPLATE(debugger_ipi) |
| 88 | DEBUGGER_BOILERPLATE(debugger_bpt) |
| 89 | DEBUGGER_BOILERPLATE(debugger_sstep) |
| 90 | DEBUGGER_BOILERPLATE(debugger_iabr_match) |
| 91 | DEBUGGER_BOILERPLATE(debugger_dabr_match) |
| 92 | DEBUGGER_BOILERPLATE(debugger_fault_handler) |
| 93 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 94 | #else |
| 95 | static inline int debugger(struct pt_regs *regs) { return 0; } |
| 96 | static inline int debugger_ipi(struct pt_regs *regs) { return 0; } |
| 97 | static inline int debugger_bpt(struct pt_regs *regs) { return 0; } |
| 98 | static inline int debugger_sstep(struct pt_regs *regs) { return 0; } |
| 99 | static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; } |
| 100 | static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; } |
| 101 | static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; } |
| 102 | #endif |
| 103 | |
| 104 | extern int set_dabr(unsigned long dabr); |
| 105 | extern void print_backtrace(unsigned long *); |
| 106 | extern void show_regs(struct pt_regs * regs); |
| 107 | extern void flush_instruction_cache(void); |
| 108 | extern void hard_reset_now(void); |
| 109 | extern void poweroff_now(void); |
| 110 | |
| 111 | #ifdef CONFIG_6xx |
| 112 | extern long _get_L2CR(void); |
| 113 | extern long _get_L3CR(void); |
| 114 | extern void _set_L2CR(unsigned long); |
| 115 | extern void _set_L3CR(unsigned long); |
| 116 | #else |
| 117 | #define _get_L2CR() 0L |
| 118 | #define _get_L3CR() 0L |
| 119 | #define _set_L2CR(val) do { } while(0) |
| 120 | #define _set_L3CR(val) do { } while(0) |
| 121 | #endif |
| 122 | |
| 123 | extern void via_cuda_init(void); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 124 | extern void read_rtc_time(void); |
| 125 | extern void pmac_find_display(void); |
| 126 | extern void giveup_fpu(struct task_struct *); |
Stephen Rothwell | cabb558 | 2005-09-30 16:16:52 +1000 | [diff] [blame] | 127 | extern void disable_kernel_fp(void); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 128 | extern void enable_kernel_fp(void); |
| 129 | extern void flush_fp_to_thread(struct task_struct *); |
| 130 | extern void enable_kernel_altivec(void); |
| 131 | extern void giveup_altivec(struct task_struct *); |
| 132 | extern void load_up_altivec(struct task_struct *); |
Paul Mackerras | 40ef8cb | 2005-10-10 22:50:37 +1000 | [diff] [blame] | 133 | extern int emulate_altivec(struct pt_regs *); |
Johannes Berg | d169d14 | 2007-04-28 08:00:03 +1000 | [diff] [blame] | 134 | extern void enable_kernel_spe(void); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 135 | extern void giveup_spe(struct task_struct *); |
| 136 | extern void load_up_spe(struct task_struct *); |
| 137 | extern int fix_alignment(struct pt_regs *); |
David Gibson | 25c8a78 | 2005-10-27 16:27:25 +1000 | [diff] [blame] | 138 | extern void cvt_fd(float *from, double *to, struct thread_struct *thread); |
| 139 | extern void cvt_df(double *from, float *to, struct thread_struct *thread); |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 140 | |
Paul Mackerras | 5388fb1 | 2006-01-11 22:11:39 +1100 | [diff] [blame] | 141 | #ifndef CONFIG_SMP |
| 142 | extern void discard_lazy_cpu_state(void); |
| 143 | #else |
| 144 | static inline void discard_lazy_cpu_state(void) |
| 145 | { |
| 146 | } |
| 147 | #endif |
| 148 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 149 | #ifdef CONFIG_ALTIVEC |
| 150 | extern void flush_altivec_to_thread(struct task_struct *); |
| 151 | #else |
| 152 | static inline void flush_altivec_to_thread(struct task_struct *t) |
| 153 | { |
| 154 | } |
| 155 | #endif |
| 156 | |
| 157 | #ifdef CONFIG_SPE |
| 158 | extern void flush_spe_to_thread(struct task_struct *); |
| 159 | #else |
| 160 | static inline void flush_spe_to_thread(struct task_struct *t) |
| 161 | { |
| 162 | } |
| 163 | #endif |
| 164 | |
| 165 | extern int call_rtas(const char *, int, int, unsigned long *, ...); |
| 166 | extern void cacheable_memzero(void *p, unsigned int nb); |
| 167 | extern void *cacheable_memcpy(void *, const void *, unsigned int); |
| 168 | extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long); |
| 169 | extern void bad_page_fault(struct pt_regs *, unsigned long, int); |
| 170 | extern int die(const char *, struct pt_regs *, long); |
| 171 | extern void _exception(int, struct pt_regs *, int, unsigned long); |
Jon Loeliger | 1d59483 | 2008-01-23 12:42:07 -0600 | [diff] [blame] | 172 | extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); |
| 173 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 174 | #ifdef CONFIG_BOOKE_WDT |
| 175 | extern u32 booke_wdt_enabled; |
| 176 | extern u32 booke_wdt_period; |
| 177 | #endif /* CONFIG_BOOKE_WDT */ |
| 178 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 179 | struct device_node; |
| 180 | extern void note_scsi_host(struct device_node *, void *); |
| 181 | |
| 182 | extern struct task_struct *__switch_to(struct task_struct *, |
| 183 | struct task_struct *); |
| 184 | #define switch_to(prev, next, last) ((last) = __switch_to((prev), (next))) |
| 185 | |
| 186 | struct thread_struct; |
| 187 | extern struct task_struct *_switch(struct thread_struct *prev, |
| 188 | struct thread_struct *next); |
| 189 | |
| 190 | extern unsigned int rtas_data; |
Paul Mackerras | 40ef8cb | 2005-10-10 22:50:37 +1000 | [diff] [blame] | 191 | extern int mem_init_done; /* set on boot once kmalloc can be called */ |
Paul Mackerras | cf00a8d | 2005-10-31 13:07:02 +1100 | [diff] [blame] | 192 | extern unsigned long memory_limit; |
Paul Mackerras | 49b0985 | 2005-11-10 15:53:40 +1100 | [diff] [blame] | 193 | extern unsigned long klimit; |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 194 | |
Stephen Rothwell | 7b2c3c5 | 2007-09-17 14:08:06 +1000 | [diff] [blame] | 195 | extern void *alloc_maybe_bootmem(size_t size, gfp_t mask); |
Stephen Rothwell | 5669c3c | 2007-10-02 13:37:53 +1000 | [diff] [blame] | 196 | extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask); |
Stephen Rothwell | 7b2c3c5 | 2007-09-17 14:08:06 +1000 | [diff] [blame] | 197 | |
Paul Mackerras | 17a6392 | 2005-10-20 21:10:09 +1000 | [diff] [blame] | 198 | extern int powersave_nap; /* set if nap mode can be used in idle loop */ |
| 199 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 200 | /* |
| 201 | * Atomic exchange |
| 202 | * |
| 203 | * Changes the memory location '*ptr' to be val and returns |
| 204 | * the previous value stored there. |
| 205 | */ |
| 206 | static __inline__ unsigned long |
| 207 | __xchg_u32(volatile void *p, unsigned long val) |
| 208 | { |
| 209 | unsigned long prev; |
| 210 | |
| 211 | __asm__ __volatile__( |
Anton Blanchard | 144b9c1 | 2006-01-13 15:37:17 +1100 | [diff] [blame] | 212 | LWSYNC_ON_SMP |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 213 | "1: lwarx %0,0,%2 \n" |
| 214 | PPC405_ERR77(0,%2) |
| 215 | " stwcx. %3,0,%2 \n\ |
| 216 | bne- 1b" |
| 217 | ISYNC_ON_SMP |
Linus Torvalds | e2a3d40 | 2006-07-08 15:00:28 -0700 | [diff] [blame] | 218 | : "=&r" (prev), "+m" (*(volatile unsigned int *)p) |
| 219 | : "r" (p), "r" (val) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 220 | : "cc", "memory"); |
| 221 | |
| 222 | return prev; |
| 223 | } |
| 224 | |
Mathieu Desnoyers | f46e477 | 2007-05-08 00:34:27 -0700 | [diff] [blame] | 225 | /* |
| 226 | * Atomic exchange |
| 227 | * |
| 228 | * Changes the memory location '*ptr' to be val and returns |
| 229 | * the previous value stored there. |
| 230 | */ |
| 231 | static __inline__ unsigned long |
| 232 | __xchg_u32_local(volatile void *p, unsigned long val) |
| 233 | { |
| 234 | unsigned long prev; |
| 235 | |
| 236 | __asm__ __volatile__( |
| 237 | "1: lwarx %0,0,%2 \n" |
| 238 | PPC405_ERR77(0,%2) |
| 239 | " stwcx. %3,0,%2 \n\ |
| 240 | bne- 1b" |
| 241 | : "=&r" (prev), "+m" (*(volatile unsigned int *)p) |
| 242 | : "r" (p), "r" (val) |
| 243 | : "cc", "memory"); |
| 244 | |
| 245 | return prev; |
| 246 | } |
| 247 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 248 | #ifdef CONFIG_PPC64 |
| 249 | static __inline__ unsigned long |
| 250 | __xchg_u64(volatile void *p, unsigned long val) |
| 251 | { |
| 252 | unsigned long prev; |
| 253 | |
| 254 | __asm__ __volatile__( |
Anton Blanchard | 144b9c1 | 2006-01-13 15:37:17 +1100 | [diff] [blame] | 255 | LWSYNC_ON_SMP |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 256 | "1: ldarx %0,0,%2 \n" |
| 257 | PPC405_ERR77(0,%2) |
| 258 | " stdcx. %3,0,%2 \n\ |
| 259 | bne- 1b" |
| 260 | ISYNC_ON_SMP |
Linus Torvalds | e2a3d40 | 2006-07-08 15:00:28 -0700 | [diff] [blame] | 261 | : "=&r" (prev), "+m" (*(volatile unsigned long *)p) |
| 262 | : "r" (p), "r" (val) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 263 | : "cc", "memory"); |
| 264 | |
| 265 | return prev; |
| 266 | } |
Mathieu Desnoyers | f46e477 | 2007-05-08 00:34:27 -0700 | [diff] [blame] | 267 | |
| 268 | static __inline__ unsigned long |
| 269 | __xchg_u64_local(volatile void *p, unsigned long val) |
| 270 | { |
| 271 | unsigned long prev; |
| 272 | |
| 273 | __asm__ __volatile__( |
| 274 | "1: ldarx %0,0,%2 \n" |
| 275 | PPC405_ERR77(0,%2) |
| 276 | " stdcx. %3,0,%2 \n\ |
| 277 | bne- 1b" |
| 278 | : "=&r" (prev), "+m" (*(volatile unsigned long *)p) |
| 279 | : "r" (p), "r" (val) |
| 280 | : "cc", "memory"); |
| 281 | |
| 282 | return prev; |
| 283 | } |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 284 | #endif |
| 285 | |
| 286 | /* |
| 287 | * This function doesn't exist, so you'll get a linker error |
| 288 | * if something tries to do an invalid xchg(). |
| 289 | */ |
| 290 | extern void __xchg_called_with_bad_pointer(void); |
| 291 | |
| 292 | static __inline__ unsigned long |
| 293 | __xchg(volatile void *ptr, unsigned long x, unsigned int size) |
| 294 | { |
| 295 | switch (size) { |
| 296 | case 4: |
| 297 | return __xchg_u32(ptr, x); |
| 298 | #ifdef CONFIG_PPC64 |
| 299 | case 8: |
| 300 | return __xchg_u64(ptr, x); |
| 301 | #endif |
| 302 | } |
| 303 | __xchg_called_with_bad_pointer(); |
| 304 | return x; |
| 305 | } |
| 306 | |
Mathieu Desnoyers | f46e477 | 2007-05-08 00:34:27 -0700 | [diff] [blame] | 307 | static __inline__ unsigned long |
| 308 | __xchg_local(volatile void *ptr, unsigned long x, unsigned int size) |
| 309 | { |
| 310 | switch (size) { |
| 311 | case 4: |
| 312 | return __xchg_u32_local(ptr, x); |
| 313 | #ifdef CONFIG_PPC64 |
| 314 | case 8: |
| 315 | return __xchg_u64_local(ptr, x); |
| 316 | #endif |
| 317 | } |
| 318 | __xchg_called_with_bad_pointer(); |
| 319 | return x; |
| 320 | } |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 321 | #define xchg(ptr,x) \ |
| 322 | ({ \ |
| 323 | __typeof__(*(ptr)) _x_ = (x); \ |
| 324 | (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \ |
| 325 | }) |
| 326 | |
Mathieu Desnoyers | f46e477 | 2007-05-08 00:34:27 -0700 | [diff] [blame] | 327 | #define xchg_local(ptr,x) \ |
| 328 | ({ \ |
| 329 | __typeof__(*(ptr)) _x_ = (x); \ |
| 330 | (__typeof__(*(ptr))) __xchg_local((ptr), \ |
| 331 | (unsigned long)_x_, sizeof(*(ptr))); \ |
| 332 | }) |
| 333 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 334 | /* |
| 335 | * Compare and exchange - if *p == old, set it to new, |
| 336 | * and return the old value of *p. |
| 337 | */ |
| 338 | #define __HAVE_ARCH_CMPXCHG 1 |
| 339 | |
| 340 | static __inline__ unsigned long |
| 341 | __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new) |
| 342 | { |
| 343 | unsigned int prev; |
| 344 | |
| 345 | __asm__ __volatile__ ( |
Anton Blanchard | 144b9c1 | 2006-01-13 15:37:17 +1100 | [diff] [blame] | 346 | LWSYNC_ON_SMP |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 347 | "1: lwarx %0,0,%2 # __cmpxchg_u32\n\ |
| 348 | cmpw 0,%0,%3\n\ |
| 349 | bne- 2f\n" |
| 350 | PPC405_ERR77(0,%2) |
| 351 | " stwcx. %4,0,%2\n\ |
| 352 | bne- 1b" |
| 353 | ISYNC_ON_SMP |
| 354 | "\n\ |
| 355 | 2:" |
Linus Torvalds | e2a3d40 | 2006-07-08 15:00:28 -0700 | [diff] [blame] | 356 | : "=&r" (prev), "+m" (*p) |
| 357 | : "r" (p), "r" (old), "r" (new) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 358 | : "cc", "memory"); |
| 359 | |
| 360 | return prev; |
| 361 | } |
| 362 | |
Mathieu Desnoyers | f46e477 | 2007-05-08 00:34:27 -0700 | [diff] [blame] | 363 | static __inline__ unsigned long |
| 364 | __cmpxchg_u32_local(volatile unsigned int *p, unsigned long old, |
| 365 | unsigned long new) |
| 366 | { |
| 367 | unsigned int prev; |
| 368 | |
| 369 | __asm__ __volatile__ ( |
| 370 | "1: lwarx %0,0,%2 # __cmpxchg_u32\n\ |
| 371 | cmpw 0,%0,%3\n\ |
| 372 | bne- 2f\n" |
| 373 | PPC405_ERR77(0,%2) |
| 374 | " stwcx. %4,0,%2\n\ |
| 375 | bne- 1b" |
| 376 | "\n\ |
| 377 | 2:" |
| 378 | : "=&r" (prev), "+m" (*p) |
| 379 | : "r" (p), "r" (old), "r" (new) |
| 380 | : "cc", "memory"); |
| 381 | |
| 382 | return prev; |
| 383 | } |
| 384 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 385 | #ifdef CONFIG_PPC64 |
| 386 | static __inline__ unsigned long |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 387 | __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 388 | { |
| 389 | unsigned long prev; |
| 390 | |
| 391 | __asm__ __volatile__ ( |
Anton Blanchard | 144b9c1 | 2006-01-13 15:37:17 +1100 | [diff] [blame] | 392 | LWSYNC_ON_SMP |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 393 | "1: ldarx %0,0,%2 # __cmpxchg_u64\n\ |
| 394 | cmpd 0,%0,%3\n\ |
| 395 | bne- 2f\n\ |
| 396 | stdcx. %4,0,%2\n\ |
| 397 | bne- 1b" |
| 398 | ISYNC_ON_SMP |
| 399 | "\n\ |
| 400 | 2:" |
Linus Torvalds | e2a3d40 | 2006-07-08 15:00:28 -0700 | [diff] [blame] | 401 | : "=&r" (prev), "+m" (*p) |
| 402 | : "r" (p), "r" (old), "r" (new) |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 403 | : "cc", "memory"); |
| 404 | |
| 405 | return prev; |
| 406 | } |
Mathieu Desnoyers | f46e477 | 2007-05-08 00:34:27 -0700 | [diff] [blame] | 407 | |
| 408 | static __inline__ unsigned long |
| 409 | __cmpxchg_u64_local(volatile unsigned long *p, unsigned long old, |
| 410 | unsigned long new) |
| 411 | { |
| 412 | unsigned long prev; |
| 413 | |
| 414 | __asm__ __volatile__ ( |
| 415 | "1: ldarx %0,0,%2 # __cmpxchg_u64\n\ |
| 416 | cmpd 0,%0,%3\n\ |
| 417 | bne- 2f\n\ |
| 418 | stdcx. %4,0,%2\n\ |
| 419 | bne- 1b" |
| 420 | "\n\ |
| 421 | 2:" |
| 422 | : "=&r" (prev), "+m" (*p) |
| 423 | : "r" (p), "r" (old), "r" (new) |
| 424 | : "cc", "memory"); |
| 425 | |
| 426 | return prev; |
| 427 | } |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 428 | #endif |
| 429 | |
| 430 | /* This function doesn't exist, so you'll get a linker error |
| 431 | if something tries to do an invalid cmpxchg(). */ |
| 432 | extern void __cmpxchg_called_with_bad_pointer(void); |
| 433 | |
| 434 | static __inline__ unsigned long |
| 435 | __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, |
| 436 | unsigned int size) |
| 437 | { |
| 438 | switch (size) { |
| 439 | case 4: |
| 440 | return __cmpxchg_u32(ptr, old, new); |
| 441 | #ifdef CONFIG_PPC64 |
| 442 | case 8: |
| 443 | return __cmpxchg_u64(ptr, old, new); |
| 444 | #endif |
| 445 | } |
| 446 | __cmpxchg_called_with_bad_pointer(); |
| 447 | return old; |
| 448 | } |
| 449 | |
Mathieu Desnoyers | f46e477 | 2007-05-08 00:34:27 -0700 | [diff] [blame] | 450 | static __inline__ unsigned long |
| 451 | __cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new, |
| 452 | unsigned int size) |
| 453 | { |
| 454 | switch (size) { |
| 455 | case 4: |
| 456 | return __cmpxchg_u32_local(ptr, old, new); |
| 457 | #ifdef CONFIG_PPC64 |
| 458 | case 8: |
| 459 | return __cmpxchg_u64_local(ptr, old, new); |
| 460 | #endif |
| 461 | } |
| 462 | __cmpxchg_called_with_bad_pointer(); |
| 463 | return old; |
| 464 | } |
| 465 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 466 | #define cmpxchg(ptr,o,n) \ |
| 467 | ({ \ |
| 468 | __typeof__(*(ptr)) _o_ = (o); \ |
| 469 | __typeof__(*(ptr)) _n_ = (n); \ |
| 470 | (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ |
| 471 | (unsigned long)_n_, sizeof(*(ptr))); \ |
| 472 | }) |
| 473 | |
Mathieu Desnoyers | f46e477 | 2007-05-08 00:34:27 -0700 | [diff] [blame] | 474 | |
| 475 | #define cmpxchg_local(ptr,o,n) \ |
| 476 | ({ \ |
| 477 | __typeof__(*(ptr)) _o_ = (o); \ |
| 478 | __typeof__(*(ptr)) _n_ = (n); \ |
| 479 | (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \ |
| 480 | (unsigned long)_n_, sizeof(*(ptr))); \ |
| 481 | }) |
| 482 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 483 | #ifdef CONFIG_PPC64 |
| 484 | /* |
| 485 | * We handle most unaligned accesses in hardware. On the other hand |
| 486 | * unaligned DMA can be very expensive on some ppc64 IO chips (it does |
| 487 | * powers of 2 writes until it reaches sufficient alignment). |
| 488 | * |
| 489 | * Based on this we disable the IP header alignment in network drivers. |
Anton Blanchard | 025be81 | 2006-03-31 02:27:06 -0800 | [diff] [blame] | 490 | * We also modify NET_SKB_PAD to be a cacheline in size, thus maintaining |
| 491 | * cacheline alignment of buffers. |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 492 | */ |
Anton Blanchard | 025be81 | 2006-03-31 02:27:06 -0800 | [diff] [blame] | 493 | #define NET_IP_ALIGN 0 |
| 494 | #define NET_SKB_PAD L1_CACHE_BYTES |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 495 | #endif |
| 496 | |
| 497 | #define arch_align_stack(x) (x) |
| 498 | |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 499 | /* Used in very early kernel initialization. */ |
Stephen Rothwell | cabb558 | 2005-09-30 16:16:52 +1000 | [diff] [blame] | 500 | extern unsigned long reloc_offset(void); |
Paul Mackerras | 9b6b563 | 2005-10-06 12:06:20 +1000 | [diff] [blame] | 501 | extern unsigned long add_reloc_offset(unsigned long); |
| 502 | extern void reloc_got2(unsigned long); |
| 503 | |
| 504 | #define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x))) |
Stephen Rothwell | cabb558 | 2005-09-30 16:16:52 +1000 | [diff] [blame] | 505 | |
Michael Ellerman | c87ef11 | 2005-11-03 17:57:53 +1100 | [diff] [blame] | 506 | static inline void create_instruction(unsigned long addr, unsigned int instr) |
| 507 | { |
| 508 | unsigned int *p; |
| 509 | p = (unsigned int *)addr; |
| 510 | *p = instr; |
| 511 | asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (p)); |
| 512 | } |
| 513 | |
| 514 | /* Flags for create_branch: |
| 515 | * "b" == create_branch(addr, target, 0); |
| 516 | * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE); |
| 517 | * "bl" == create_branch(addr, target, BRANCH_SET_LINK); |
| 518 | * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK); |
| 519 | */ |
| 520 | #define BRANCH_SET_LINK 0x1 |
| 521 | #define BRANCH_ABSOLUTE 0x2 |
| 522 | |
| 523 | static inline void create_branch(unsigned long addr, |
| 524 | unsigned long target, int flags) |
| 525 | { |
| 526 | unsigned int instruction; |
| 527 | |
| 528 | if (! (flags & BRANCH_ABSOLUTE)) |
| 529 | target = target - addr; |
| 530 | |
| 531 | /* Mask out the flags and target, so they don't step on each other. */ |
| 532 | instruction = 0x48000000 | (flags & 0x3) | (target & 0x03FFFFFC); |
| 533 | |
| 534 | create_instruction(addr, instruction); |
| 535 | } |
| 536 | |
| 537 | static inline void create_function_call(unsigned long addr, void * func) |
| 538 | { |
| 539 | unsigned long func_addr; |
| 540 | |
| 541 | #ifdef CONFIG_PPC64 |
| 542 | /* |
| 543 | * On PPC64 the function pointer actually points to the function's |
| 544 | * descriptor. The first entry in the descriptor is the address |
| 545 | * of the function text. |
| 546 | */ |
| 547 | func_addr = *(unsigned long *)func; |
| 548 | #else |
| 549 | func_addr = (unsigned long)func; |
| 550 | #endif |
| 551 | create_branch(addr, func_addr, BRANCH_SET_LINK); |
| 552 | } |
| 553 | |
Paul Mackerras | c6622f6 | 2006-02-24 10:06:59 +1100 | [diff] [blame] | 554 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
| 555 | extern void account_system_vtime(struct task_struct *); |
| 556 | #endif |
| 557 | |
Michael Ellerman | 94a3807 | 2007-06-20 10:54:19 +1000 | [diff] [blame] | 558 | extern struct dentry *powerpc_debugfs_root; |
| 559 | |
Paul Mackerras | 14cf11a | 2005-09-26 16:04:21 +1000 | [diff] [blame] | 560 | #endif /* __KERNEL__ */ |
Stephen Rothwell | bbeb3f4 | 2005-09-27 13:51:59 +1000 | [diff] [blame] | 561 | #endif /* _ASM_POWERPC_SYSTEM_H */ |