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Greg Ungerer0e152d82011-06-20 15:49:09 +10001comment "Processor Type"
2
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +01003choice
4 prompt "CPU family support"
5 default M68KCLASSIC if MMU
6 default COLDFIRE if !MMU
7 help
8 The Freescale (was Motorola) M68K family of processors implements
9 the full 68000 processor instruction set.
Masanari Iida6b2aac42012-04-14 00:14:11 +090010 The Freescale ColdFire family of processors is a modern derivative
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010011 of the 68000 processor family. They are mainly targeted at embedded
12 applications, and are all System-On-Chip (SOC) devices, as opposed
13 to stand alone CPUs. They implement a subset of the original 68000
14 processor instruction set.
15 If you anticipate running this kernel on a computer with a classic
16 MC68xxx processor, select M68KCLASSIC.
17 If you anticipate running this kernel on a computer with a ColdFire
18 processor, select COLDFIRE.
19
20config M68KCLASSIC
21 bool "Classic M68K CPU family support"
22
23config COLDFIRE
24 bool "Coldfire CPU family support"
25 select GENERIC_GPIO
26 select ARCH_REQUIRE_GPIOLIB
Mark Brown7563bbf2012-04-15 10:52:54 +010027 select ARCH_HAVE_CUSTOM_GPIO_H
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010028 select CPU_HAS_NO_BITFIELDS
29 select CPU_HAS_NO_MULDIV64
Geert Uytterhoeven9f1f1182012-06-06 19:37:52 +020030 select CPU_HAS_NO_UNALIGNED
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +010031 select GENERIC_CSUM
32
33endchoice
34
35if M68KCLASSIC
36
Greg Ungerer0e152d82011-06-20 15:49:09 +100037config M68000
38 bool
39 select CPU_HAS_NO_BITFIELDS
Greg Ungerer84f3fb72011-11-11 15:13:08 +100040 select CPU_HAS_NO_MULDIV64
Geert Uytterhoeven9f1f1182012-06-06 19:37:52 +020041 select CPU_HAS_NO_UNALIGNED
Greg Ungerer7f73baf2011-10-18 15:49:19 +100042 select GENERIC_CSUM
Greg Ungerer0e152d82011-06-20 15:49:09 +100043 help
44 The Freescale (was Motorola) 68000 CPU is the first generation of
45 the well known M68K family of processors. The CPU core as well as
46 being available as a stand alone CPU was also used in many
47 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
48 a paging MMU.
49
50config MCPU32
51 bool
52 select CPU_HAS_NO_BITFIELDS
Geert Uytterhoeven7df0d272012-06-06 19:39:39 +020053 select CPU_HAS_NO_UNALIGNED
Greg Ungerer0e152d82011-06-20 15:49:09 +100054 help
55 The Freescale (was then Motorola) CPU32 is a CPU core that is
56 based on the 68020 processor. For the most part it is used in
57 System-On-Chip parts, and does not contain a paging MMU.
58
Greg Ungerer0e152d82011-06-20 15:49:09 +100059config M68020
60 bool "68020 support"
61 depends on MMU
Greg Ungerer5717a022011-10-19 16:27:30 +100062 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100063 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100064 help
65 If you anticipate running this kernel on a computer with a MC68020
66 processor, say Y. Otherwise, say N. Note that the 68020 requires a
67 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
68 Sun 3, which provides its own version.
69
70config M68030
71 bool "68030 support"
72 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100073 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100074 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100075 help
76 If you anticipate running this kernel on a computer with a MC68030
77 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
78 work, as it does not include an MMU (Memory Management Unit).
79
80config M68040
81 bool "68040 support"
82 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100083 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100084 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100085 help
86 If you anticipate running this kernel on a computer with a MC68LC040
87 or MC68040 processor, say Y. Otherwise, say N. Note that an
88 MC68EC040 will not work, as it does not include an MMU (Memory
89 Management Unit).
90
91config M68060
92 bool "68060 support"
93 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100094 select GENERIC_ATOMIC64
Greg Ungerere08d7032011-10-14 14:43:30 +100095 select CPU_HAS_ADDRESS_SPACES
Greg Ungerer0e152d82011-06-20 15:49:09 +100096 help
97 If you anticipate running this kernel on a computer with a MC68060
98 processor, say Y. Otherwise, say N.
99
100config M68328
101 bool "MC68328"
102 depends on !MMU
103 select M68000
104 help
105 Motorola 68328 processor support.
106
107config M68EZ328
108 bool "MC68EZ328"
109 depends on !MMU
110 select M68000
111 help
112 Motorola 68EX328 processor support.
113
114config M68VZ328
115 bool "MC68VZ328"
116 depends on !MMU
117 select M68000
118 help
119 Motorola 68VZ328 processor support.
120
121config M68360
122 bool "MC68360"
123 depends on !MMU
124 select MCPU32
125 help
126 Motorola 68360 processor support.
127
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +0100128endif # M68KCLASSIC
129
130if COLDFIRE
131
Greg Ungerer0e152d82011-06-20 15:49:09 +1000132config M5206
133 bool "MCF5206"
134 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000135 select COLDFIRE_SW_A7
136 select HAVE_MBAR
137 help
138 Motorola ColdFire 5206 processor support.
139
140config M5206e
141 bool "MCF5206e"
142 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000143 select COLDFIRE_SW_A7
144 select HAVE_MBAR
145 help
146 Motorola ColdFire 5206e processor support.
147
148config M520x
149 bool "MCF520x"
150 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000151 select GENERIC_CLOCKEVENTS
152 select HAVE_CACHE_SPLIT
153 help
154 Freescale Coldfire 5207/5208 processor support.
155
156config M523x
157 bool "MCF523x"
158 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000159 select GENERIC_CLOCKEVENTS
160 select HAVE_CACHE_SPLIT
161 select HAVE_IPSBAR
162 help
163 Freescale Coldfire 5230/1/2/4/5 processor support
164
165config M5249
166 bool "MCF5249"
167 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000168 select COLDFIRE_SW_A7
169 select HAVE_MBAR
170 help
171 Motorola ColdFire 5249 processor support.
172
173config M527x
174 bool
175
176config M5271
177 bool "MCF5271"
178 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000179 select M527x
180 select HAVE_CACHE_SPLIT
181 select HAVE_IPSBAR
182 select GENERIC_CLOCKEVENTS
183 help
184 Freescale (Motorola) ColdFire 5270/5271 processor support.
185
186config M5272
187 bool "MCF5272"
188 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000189 select COLDFIRE_SW_A7
190 select HAVE_MBAR
191 help
192 Motorola ColdFire 5272 processor support.
193
194config M5275
195 bool "MCF5275"
196 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000197 select M527x
198 select HAVE_CACHE_SPLIT
199 select HAVE_IPSBAR
200 select GENERIC_CLOCKEVENTS
201 help
202 Freescale (Motorola) ColdFire 5274/5275 processor support.
203
204config M528x
205 bool "MCF528x"
206 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000207 select GENERIC_CLOCKEVENTS
208 select HAVE_CACHE_SPLIT
209 select HAVE_IPSBAR
210 help
211 Motorola ColdFire 5280/5282 processor support.
212
213config M5307
214 bool "MCF5307"
215 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000216 select COLDFIRE_SW_A7
217 select HAVE_CACHE_CB
218 select HAVE_MBAR
219 help
220 Motorola ColdFire 5307 processor support.
221
222config M532x
223 bool "MCF532x"
224 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000225 select HAVE_CACHE_CB
226 help
227 Freescale (Motorola) ColdFire 532x processor support.
228
229config M5407
230 bool "MCF5407"
231 depends on !MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000232 select COLDFIRE_SW_A7
233 select HAVE_CACHE_CB
234 select HAVE_MBAR
235 help
236 Motorola ColdFire 5407 processor support.
237
238config M54xx
239 bool
240
241config M547x
242 bool "MCF547x"
Greg Ungerer0e152d82011-06-20 15:49:09 +1000243 select M54xx
Greg Ungerer1f7034b2011-10-19 14:13:18 +1000244 select MMU_COLDFIRE if MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000245 select HAVE_CACHE_CB
246 select HAVE_MBAR
247 help
248 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
249
250config M548x
251 bool "MCF548x"
Greg Ungerer1f7034b2011-10-19 14:13:18 +1000252 select MMU_COLDFIRE if MMU
Greg Ungerer0e152d82011-06-20 15:49:09 +1000253 select M54xx
254 select HAVE_CACHE_CB
255 select HAVE_MBAR
256 help
257 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
258
Geert Uytterhoevenad8f9552011-12-26 20:32:02 +0100259endif # COLDFIRE
260
Greg Ungerer0e152d82011-06-20 15:49:09 +1000261
262comment "Processor Specific Options"
263
264config M68KFPU_EMU
265 bool "Math emulation support (EXPERIMENTAL)"
266 depends on MMU
267 depends on EXPERIMENTAL
268 help
269 At some point in the future, this will cause floating-point math
270 instructions to be emulated by the kernel on machines that lack a
271 floating-point math coprocessor. Thrill-seekers and chronically
272 sleep-deprived psychotic hacker types can say Y now, everyone else
273 should probably wait a while.
274
275config M68KFPU_EMU_EXTRAPREC
276 bool "Math emulation extra precision"
277 depends on M68KFPU_EMU
278 help
279 The fpu uses normally a few bit more during calculations for
280 correct rounding, the emulator can (often) do the same but this
281 extra calculation can cost quite some time, so you can disable
282 it here. The emulator will then "only" calculate with a 64 bit
283 mantissa and round slightly incorrect, what is more than enough
284 for normal usage.
285
286config M68KFPU_EMU_ONLY
287 bool "Math emulation only kernel"
288 depends on M68KFPU_EMU
289 help
290 This option prevents any floating-point instructions from being
291 compiled into the kernel, thereby the kernel doesn't save any
292 floating point context anymore during task switches, so this
293 kernel will only be usable on machines without a floating-point
294 math coprocessor. This makes the kernel a bit faster as no tests
295 needs to be executed whether a floating-point instruction in the
296 kernel should be executed or not.
297
298config ADVANCED
299 bool "Advanced configuration options"
300 depends on MMU
301 ---help---
302 This gives you access to some advanced options for the CPU. The
303 defaults should be fine for most users, but these options may make
304 it possible for you to improve performance somewhat if you know what
305 you are doing.
306
307 Note that the answer to this question won't directly affect the
308 kernel: saying N will just cause the configurator to skip all
309 the questions about these options.
310
311 Most users should say N to this question.
312
313config RMW_INSNS
314 bool "Use read-modify-write instructions"
315 depends on ADVANCED
316 ---help---
317 This allows to use certain instructions that work with indivisible
318 read-modify-write bus cycles. While this is faster than the
319 workaround of disabling interrupts, it can conflict with DMA
320 ( = direct memory access) on many Amiga systems, and it is also said
321 to destabilize other machines. It is very likely that this will
322 cause serious problems on any Amiga or Atari Medusa if set. The only
323 configuration where it should work are 68030-based Ataris, where it
324 apparently improves performance. But you've been warned! Unless you
325 really know what you are doing, say N. Try Y only if you're quite
326 adventurous.
327
328config SINGLE_MEMORY_CHUNK
329 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
330 depends on MMU
331 default y if SUN3
332 select NEED_MULTIPLE_NODES
333 help
334 Ignore all but the first contiguous chunk of physical memory for VM
335 purposes. This will save a few bytes kernel size and may speed up
336 some operations. Say N if not sure.
337
338config ARCH_DISCONTIGMEM_ENABLE
339 def_bool MMU && !SINGLE_MEMORY_CHUNK
340
341config 060_WRITETHROUGH
342 bool "Use write-through caching for 68060 supervisor accesses"
343 depends on ADVANCED && M68060
344 ---help---
345 The 68060 generally uses copyback caching of recently accessed data.
346 Copyback caching means that memory writes will be held in an on-chip
347 cache and only written back to memory some time later. Saying Y
348 here will force supervisor (kernel) accesses to use writethrough
349 caching. Writethrough caching means that data is written to memory
350 straight away, so that cache and memory data always agree.
351 Writethrough caching is less efficient, but is needed for some
352 drivers on 68060 based systems where the 68060 bus snooping signal
353 is hardwired on. The 53c710 SCSI driver is known to suffer from
354 this problem.
355
356config M68K_L2_CACHE
357 bool
358 depends on MAC
359 default y
360
361config NODES_SHIFT
362 int
363 default "3"
364 depends on !SINGLE_MEMORY_CHUNK
365
Geert Uytterhoeven022613e2012-06-06 17:26:35 +0200366config CPU_HAS_NO_BITFIELDS
367 bool
368
369config CPU_HAS_NO_MULDIV64
370 bool
371
Geert Uytterhoeven9f1f1182012-06-06 19:37:52 +0200372config CPU_HAS_NO_UNALIGNED
373 bool
374
Geert Uytterhoeven022613e2012-06-06 17:26:35 +0200375config CPU_HAS_ADDRESS_SPACES
376 bool
377
Greg Ungerer0e152d82011-06-20 15:49:09 +1000378config FPU
379 bool
380
381config COLDFIRE_SW_A7
382 bool
383
384config HAVE_CACHE_SPLIT
385 bool
386
387config HAVE_CACHE_CB
388 bool
389
390config HAVE_MBAR
391 bool
392
393config HAVE_IPSBAR
394 bool
395
396config CLOCK_SET
397 bool "Enable setting the CPU clock frequency"
398 depends on COLDFIRE
399 default n
400 help
401 On some CPU's you do not need to know what the core CPU clock
402 frequency is. On these you can disable clock setting. On some
403 traditional 68K parts, and on all ColdFire parts you need to set
404 the appropriate CPU clock frequency. On these devices many of the
405 onboard peripherals derive their timing from the master CPU clock
406 frequency.
407
408config CLOCK_FREQ
409 int "Set the core clock frequency"
410 default "66666666"
411 depends on CLOCK_SET
412 help
413 Define the CPU clock frequency in use. This is the core clock
414 frequency, it may or may not be the same as the external clock
415 crystal fitted to your board. Some processors have an internal
416 PLL and can have their frequency programmed at run time, others
417 use internal dividers. In general the kernel won't setup a PLL
418 if it is fitted (there are some exceptions). This value will be
419 specific to the exact CPU that you are using.
420
421config OLDMASK
422 bool "Old mask 5307 (1H55J) silicon"
423 depends on M5307
424 help
425 Build support for the older revision ColdFire 5307 silicon.
426 Specifically this is the 1H55J mask revision.
427
428if HAVE_CACHE_SPLIT
429choice
430 prompt "Split Cache Configuration"
431 default CACHE_I
432
433config CACHE_I
434 bool "Instruction"
435 help
436 Use all of the ColdFire CPU cache memory as an instruction cache.
437
438config CACHE_D
439 bool "Data"
440 help
441 Use all of the ColdFire CPU cache memory as a data cache.
442
443config CACHE_BOTH
444 bool "Both"
445 help
446 Split the ColdFire CPU cache, and use half as an instruction cache
447 and half as a data cache.
448endchoice
449endif
450
451if HAVE_CACHE_CB
452choice
453 prompt "Data cache mode"
454 default CACHE_WRITETHRU
455
456config CACHE_WRITETHRU
457 bool "Write-through"
458 help
459 The ColdFire CPU cache is set into Write-through mode.
460
461config CACHE_COPYBACK
462 bool "Copy-back"
463 help
464 The ColdFire CPU cache is set into Copy-back mode.
465endchoice
466endif
467