Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms and conditions of the GNU General Public License, |
| 6 | * version 2, as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 11 | * more details. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/clk.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/io.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/of.h> |
| 20 | #include <linux/of_address.h> |
| 21 | #include <linux/of_irq.h> |
| 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/reset.h> |
| 24 | #include <linux/thermal.h> |
| 25 | |
| 26 | /** |
| 27 | * If the temperature over a period of time High, |
| 28 | * the resulting TSHUT gave CRU module,let it reset the entire chip, |
| 29 | * or via GPIO give PMIC. |
| 30 | */ |
| 31 | enum tshut_mode { |
| 32 | TSHUT_MODE_CRU = 0, |
| 33 | TSHUT_MODE_GPIO, |
| 34 | }; |
| 35 | |
| 36 | /** |
| 37 | * the system Temperature Sensors tshut(tshut) polarity |
| 38 | * the bit 8 is tshut polarity. |
| 39 | * 0: low active, 1: high active |
| 40 | */ |
| 41 | enum tshut_polarity { |
| 42 | TSHUT_LOW_ACTIVE = 0, |
| 43 | TSHUT_HIGH_ACTIVE, |
| 44 | }; |
| 45 | |
| 46 | /** |
| 47 | * The system has three Temperature Sensors. channel 0 is reserved, |
| 48 | * channel 1 is for CPU, and channel 2 is for GPU. |
| 49 | */ |
| 50 | enum sensor_id { |
| 51 | SENSOR_CPU = 1, |
| 52 | SENSOR_GPU, |
| 53 | }; |
| 54 | |
| 55 | struct rockchip_tsadc_chip { |
| 56 | /* The hardware-controlled tshut property */ |
| 57 | long tshut_temp; |
| 58 | enum tshut_mode tshut_mode; |
| 59 | enum tshut_polarity tshut_polarity; |
| 60 | |
| 61 | /* Chip-wide methods */ |
| 62 | void (*initialize)(void __iomem *reg, enum tshut_polarity p); |
| 63 | void (*irq_ack)(void __iomem *reg); |
| 64 | void (*control)(void __iomem *reg, bool on); |
| 65 | |
| 66 | /* Per-sensor methods */ |
Sascha Hauer | 17e8351 | 2015-07-24 08:12:54 +0200 | [diff] [blame] | 67 | int (*get_temp)(int chn, void __iomem *reg, int *temp); |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 68 | void (*set_tshut_temp)(int chn, void __iomem *reg, long temp); |
| 69 | void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m); |
| 70 | }; |
| 71 | |
| 72 | struct rockchip_thermal_sensor { |
| 73 | struct rockchip_thermal_data *thermal; |
| 74 | struct thermal_zone_device *tzd; |
| 75 | enum sensor_id id; |
| 76 | }; |
| 77 | |
| 78 | #define NUM_SENSORS 2 /* Ignore unused sensor 0 */ |
| 79 | |
| 80 | struct rockchip_thermal_data { |
| 81 | const struct rockchip_tsadc_chip *chip; |
| 82 | struct platform_device *pdev; |
| 83 | struct reset_control *reset; |
| 84 | |
| 85 | struct rockchip_thermal_sensor sensors[NUM_SENSORS]; |
| 86 | |
| 87 | struct clk *clk; |
| 88 | struct clk *pclk; |
| 89 | |
| 90 | void __iomem *regs; |
| 91 | |
| 92 | long tshut_temp; |
| 93 | enum tshut_mode tshut_mode; |
| 94 | enum tshut_polarity tshut_polarity; |
| 95 | }; |
| 96 | |
| 97 | /* TSADC V2 Sensor info define: */ |
| 98 | #define TSADCV2_AUTO_CON 0x04 |
| 99 | #define TSADCV2_INT_EN 0x08 |
| 100 | #define TSADCV2_INT_PD 0x0c |
| 101 | #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04) |
| 102 | #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04) |
| 103 | #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60 |
| 104 | #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64 |
| 105 | #define TSADCV2_AUTO_PERIOD 0x68 |
| 106 | #define TSADCV2_AUTO_PERIOD_HT 0x6c |
| 107 | |
| 108 | #define TSADCV2_AUTO_EN BIT(0) |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 109 | #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn)) |
| 110 | #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8) |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 111 | |
| 112 | #define TSADCV2_INT_SRC_EN(chn) BIT(chn) |
| 113 | #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn)) |
| 114 | #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn)) |
| 115 | |
Dmitry Torokhov | 452e01b | 2015-08-07 14:00:52 -0700 | [diff] [blame] | 116 | #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8) |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 117 | |
| 118 | #define TSADCV2_DATA_MASK 0xfff |
| 119 | #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4 |
| 120 | #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4 |
| 121 | #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */ |
| 122 | #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */ |
| 123 | |
| 124 | struct tsadc_table { |
Dmitry Torokhov | d9a241c | 2015-08-07 13:59:23 -0700 | [diff] [blame] | 125 | u32 code; |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 126 | long temp; |
| 127 | }; |
| 128 | |
| 129 | static const struct tsadc_table v2_code_table[] = { |
| 130 | {TSADCV2_DATA_MASK, -40000}, |
| 131 | {3800, -40000}, |
| 132 | {3792, -35000}, |
| 133 | {3783, -30000}, |
| 134 | {3774, -25000}, |
| 135 | {3765, -20000}, |
| 136 | {3756, -15000}, |
| 137 | {3747, -10000}, |
| 138 | {3737, -5000}, |
| 139 | {3728, 0}, |
| 140 | {3718, 5000}, |
| 141 | {3708, 10000}, |
| 142 | {3698, 15000}, |
| 143 | {3688, 20000}, |
| 144 | {3678, 25000}, |
| 145 | {3667, 30000}, |
| 146 | {3656, 35000}, |
| 147 | {3645, 40000}, |
| 148 | {3634, 45000}, |
| 149 | {3623, 50000}, |
| 150 | {3611, 55000}, |
| 151 | {3600, 60000}, |
| 152 | {3588, 65000}, |
| 153 | {3575, 70000}, |
| 154 | {3563, 75000}, |
| 155 | {3550, 80000}, |
| 156 | {3537, 85000}, |
| 157 | {3524, 90000}, |
| 158 | {3510, 95000}, |
| 159 | {3496, 100000}, |
| 160 | {3482, 105000}, |
| 161 | {3467, 110000}, |
| 162 | {3452, 115000}, |
| 163 | {3437, 120000}, |
| 164 | {3421, 125000}, |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 165 | }; |
| 166 | |
| 167 | static u32 rk_tsadcv2_temp_to_code(long temp) |
| 168 | { |
| 169 | int high, low, mid; |
| 170 | |
| 171 | low = 0; |
| 172 | high = ARRAY_SIZE(v2_code_table) - 1; |
| 173 | mid = (high + low) / 2; |
| 174 | |
| 175 | if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp) |
| 176 | return 0; |
| 177 | |
| 178 | while (low <= high) { |
| 179 | if (temp == v2_code_table[mid].temp) |
| 180 | return v2_code_table[mid].code; |
| 181 | else if (temp < v2_code_table[mid].temp) |
| 182 | high = mid - 1; |
| 183 | else |
| 184 | low = mid + 1; |
| 185 | mid = (low + high) / 2; |
| 186 | } |
| 187 | |
| 188 | return 0; |
| 189 | } |
| 190 | |
Dmitry Torokhov | d9a241c | 2015-08-07 13:59:23 -0700 | [diff] [blame] | 191 | static int rk_tsadcv2_code_to_temp(u32 code, int *temp) |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 192 | { |
Dmitry Torokhov | d9a241c | 2015-08-07 13:59:23 -0700 | [diff] [blame] | 193 | unsigned int low = 1; |
Caesar Wang | 1e9a1ae | 2015-01-25 10:11:11 +0800 | [diff] [blame] | 194 | unsigned int high = ARRAY_SIZE(v2_code_table) - 1; |
| 195 | unsigned int mid = (low + high) / 2; |
| 196 | unsigned int num; |
| 197 | unsigned long denom; |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 198 | |
Dmitry Torokhov | d9a241c | 2015-08-07 13:59:23 -0700 | [diff] [blame] | 199 | BUILD_BUG_ON(ARRAY_SIZE(v2_code_table) < 2); |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 200 | |
Dmitry Torokhov | d9a241c | 2015-08-07 13:59:23 -0700 | [diff] [blame] | 201 | code &= TSADCV2_DATA_MASK; |
| 202 | if (code < v2_code_table[high].code) |
| 203 | return -EAGAIN; /* Incorrect reading */ |
| 204 | |
| 205 | while (low <= high) { |
Caesar Wang | 1e9a1ae | 2015-01-25 10:11:11 +0800 | [diff] [blame] | 206 | if (code >= v2_code_table[mid].code && |
| 207 | code < v2_code_table[mid - 1].code) |
| 208 | break; |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 209 | else if (code < v2_code_table[mid].code) |
| 210 | low = mid + 1; |
| 211 | else |
| 212 | high = mid - 1; |
| 213 | mid = (low + high) / 2; |
| 214 | } |
| 215 | |
Caesar Wang | 1e9a1ae | 2015-01-25 10:11:11 +0800 | [diff] [blame] | 216 | /* |
| 217 | * The 5C granularity provided by the table is too much. Let's |
| 218 | * assume that the relationship between sensor readings and |
| 219 | * temperature between 2 table entries is linear and interpolate |
| 220 | * to produce less granular result. |
| 221 | */ |
| 222 | num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp; |
| 223 | num *= v2_code_table[mid - 1].code - code; |
| 224 | denom = v2_code_table[mid - 1].code - v2_code_table[mid].code; |
Dmitry Torokhov | d9a241c | 2015-08-07 13:59:23 -0700 | [diff] [blame] | 225 | *temp = v2_code_table[mid - 1].temp + (num / denom); |
| 226 | |
| 227 | return 0; |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 228 | } |
| 229 | |
| 230 | /** |
| 231 | * rk_tsadcv2_initialize - initialize TASDC Controller |
| 232 | * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between |
| 233 | * every two accessing of TSADC in normal operation. |
| 234 | * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between |
| 235 | * every two accessing of TSADC after the temperature is higher |
| 236 | * than COM_SHUT or COM_INT. |
| 237 | * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE, |
| 238 | * if the temperature is higher than COMP_INT or COMP_SHUT for |
| 239 | * "debounce" times, TSADC controller will generate interrupt or TSHUT. |
| 240 | */ |
| 241 | static void rk_tsadcv2_initialize(void __iomem *regs, |
| 242 | enum tshut_polarity tshut_polarity) |
| 243 | { |
| 244 | if (tshut_polarity == TSHUT_HIGH_ACTIVE) |
Dmitry Torokhov | 452e01b | 2015-08-07 14:00:52 -0700 | [diff] [blame] | 245 | writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH, |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 246 | regs + TSADCV2_AUTO_CON); |
| 247 | else |
Dmitry Torokhov | 452e01b | 2015-08-07 14:00:52 -0700 | [diff] [blame] | 248 | writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH, |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 249 | regs + TSADCV2_AUTO_CON); |
| 250 | |
| 251 | writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD); |
| 252 | writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT, |
| 253 | regs + TSADCV2_HIGHT_INT_DEBOUNCE); |
| 254 | writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME, |
| 255 | regs + TSADCV2_AUTO_PERIOD_HT); |
| 256 | writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT, |
| 257 | regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE); |
| 258 | } |
| 259 | |
| 260 | static void rk_tsadcv2_irq_ack(void __iomem *regs) |
| 261 | { |
| 262 | u32 val; |
| 263 | |
| 264 | val = readl_relaxed(regs + TSADCV2_INT_PD); |
Dmitry Torokhov | 452e01b | 2015-08-07 14:00:52 -0700 | [diff] [blame] | 265 | writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD); |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 266 | } |
| 267 | |
| 268 | static void rk_tsadcv2_control(void __iomem *regs, bool enable) |
| 269 | { |
| 270 | u32 val; |
| 271 | |
| 272 | val = readl_relaxed(regs + TSADCV2_AUTO_CON); |
| 273 | if (enable) |
| 274 | val |= TSADCV2_AUTO_EN; |
| 275 | else |
| 276 | val &= ~TSADCV2_AUTO_EN; |
| 277 | |
| 278 | writel_relaxed(val, regs + TSADCV2_AUTO_CON); |
| 279 | } |
| 280 | |
Sascha Hauer | 17e8351 | 2015-07-24 08:12:54 +0200 | [diff] [blame] | 281 | static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, int *temp) |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 282 | { |
| 283 | u32 val; |
| 284 | |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 285 | val = readl_relaxed(regs + TSADCV2_DATA(chn)); |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 286 | |
Dmitry Torokhov | d9a241c | 2015-08-07 13:59:23 -0700 | [diff] [blame] | 287 | return rk_tsadcv2_code_to_temp(val, temp); |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp) |
| 291 | { |
| 292 | u32 tshut_value, val; |
| 293 | |
| 294 | tshut_value = rk_tsadcv2_temp_to_code(temp); |
| 295 | writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn)); |
| 296 | |
| 297 | /* TSHUT will be valid */ |
| 298 | val = readl_relaxed(regs + TSADCV2_AUTO_CON); |
| 299 | writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON); |
| 300 | } |
| 301 | |
| 302 | static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs, |
| 303 | enum tshut_mode mode) |
| 304 | { |
| 305 | u32 val; |
| 306 | |
| 307 | val = readl_relaxed(regs + TSADCV2_INT_EN); |
| 308 | if (mode == TSHUT_MODE_GPIO) { |
| 309 | val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn); |
| 310 | val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn); |
| 311 | } else { |
| 312 | val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn); |
| 313 | val |= TSADCV2_SHUT_2CRU_SRC_EN(chn); |
| 314 | } |
| 315 | |
| 316 | writel_relaxed(val, regs + TSADCV2_INT_EN); |
| 317 | } |
| 318 | |
| 319 | static const struct rockchip_tsadc_chip rk3288_tsadc_data = { |
| 320 | .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */ |
| 321 | .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */ |
| 322 | .tshut_temp = 95000, |
| 323 | |
| 324 | .initialize = rk_tsadcv2_initialize, |
| 325 | .irq_ack = rk_tsadcv2_irq_ack, |
| 326 | .control = rk_tsadcv2_control, |
| 327 | .get_temp = rk_tsadcv2_get_temp, |
| 328 | .set_tshut_temp = rk_tsadcv2_tshut_temp, |
| 329 | .set_tshut_mode = rk_tsadcv2_tshut_mode, |
| 330 | }; |
| 331 | |
| 332 | static const struct of_device_id of_rockchip_thermal_match[] = { |
| 333 | { |
| 334 | .compatible = "rockchip,rk3288-tsadc", |
| 335 | .data = (void *)&rk3288_tsadc_data, |
| 336 | }, |
| 337 | { /* end */ }, |
| 338 | }; |
| 339 | MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match); |
| 340 | |
| 341 | static void |
| 342 | rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on) |
| 343 | { |
| 344 | struct thermal_zone_device *tzd = sensor->tzd; |
| 345 | |
| 346 | tzd->ops->set_mode(tzd, |
| 347 | on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED); |
| 348 | } |
| 349 | |
| 350 | static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev) |
| 351 | { |
| 352 | struct rockchip_thermal_data *thermal = dev; |
| 353 | int i; |
| 354 | |
| 355 | dev_dbg(&thermal->pdev->dev, "thermal alarm\n"); |
| 356 | |
| 357 | thermal->chip->irq_ack(thermal->regs); |
| 358 | |
| 359 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) |
| 360 | thermal_zone_device_update(thermal->sensors[i].tzd); |
| 361 | |
| 362 | return IRQ_HANDLED; |
| 363 | } |
| 364 | |
Sascha Hauer | 17e8351 | 2015-07-24 08:12:54 +0200 | [diff] [blame] | 365 | static int rockchip_thermal_get_temp(void *_sensor, int *out_temp) |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 366 | { |
| 367 | struct rockchip_thermal_sensor *sensor = _sensor; |
| 368 | struct rockchip_thermal_data *thermal = sensor->thermal; |
| 369 | const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip; |
| 370 | int retval; |
| 371 | |
| 372 | retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp); |
Sascha Hauer | 17e8351 | 2015-07-24 08:12:54 +0200 | [diff] [blame] | 373 | dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n", |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 374 | sensor->id, *out_temp, retval); |
| 375 | |
| 376 | return retval; |
| 377 | } |
| 378 | |
| 379 | static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = { |
| 380 | .get_temp = rockchip_thermal_get_temp, |
| 381 | }; |
| 382 | |
| 383 | static int rockchip_configure_from_dt(struct device *dev, |
| 384 | struct device_node *np, |
| 385 | struct rockchip_thermal_data *thermal) |
| 386 | { |
| 387 | u32 shut_temp, tshut_mode, tshut_polarity; |
| 388 | |
| 389 | if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) { |
| 390 | dev_warn(dev, |
| 391 | "Missing tshut temp property, using default %ld\n", |
| 392 | thermal->chip->tshut_temp); |
| 393 | thermal->tshut_temp = thermal->chip->tshut_temp; |
| 394 | } else { |
| 395 | thermal->tshut_temp = shut_temp; |
| 396 | } |
| 397 | |
| 398 | if (thermal->tshut_temp > INT_MAX) { |
| 399 | dev_err(dev, "Invalid tshut temperature specified: %ld\n", |
| 400 | thermal->tshut_temp); |
| 401 | return -ERANGE; |
| 402 | } |
| 403 | |
| 404 | if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) { |
| 405 | dev_warn(dev, |
| 406 | "Missing tshut mode property, using default (%s)\n", |
| 407 | thermal->chip->tshut_mode == TSHUT_MODE_GPIO ? |
| 408 | "gpio" : "cru"); |
| 409 | thermal->tshut_mode = thermal->chip->tshut_mode; |
| 410 | } else { |
| 411 | thermal->tshut_mode = tshut_mode; |
| 412 | } |
| 413 | |
| 414 | if (thermal->tshut_mode > 1) { |
| 415 | dev_err(dev, "Invalid tshut mode specified: %d\n", |
| 416 | thermal->tshut_mode); |
| 417 | return -EINVAL; |
| 418 | } |
| 419 | |
| 420 | if (of_property_read_u32(np, "rockchip,hw-tshut-polarity", |
| 421 | &tshut_polarity)) { |
| 422 | dev_warn(dev, |
| 423 | "Missing tshut-polarity property, using default (%s)\n", |
| 424 | thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ? |
| 425 | "low" : "high"); |
| 426 | thermal->tshut_polarity = thermal->chip->tshut_polarity; |
| 427 | } else { |
| 428 | thermal->tshut_polarity = tshut_polarity; |
| 429 | } |
| 430 | |
| 431 | if (thermal->tshut_polarity > 1) { |
| 432 | dev_err(dev, "Invalid tshut-polarity specified: %d\n", |
| 433 | thermal->tshut_polarity); |
| 434 | return -EINVAL; |
| 435 | } |
| 436 | |
| 437 | return 0; |
| 438 | } |
| 439 | |
| 440 | static int |
| 441 | rockchip_thermal_register_sensor(struct platform_device *pdev, |
| 442 | struct rockchip_thermal_data *thermal, |
| 443 | struct rockchip_thermal_sensor *sensor, |
| 444 | enum sensor_id id) |
| 445 | { |
| 446 | const struct rockchip_tsadc_chip *tsadc = thermal->chip; |
| 447 | int error; |
| 448 | |
| 449 | tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode); |
| 450 | tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp); |
| 451 | |
| 452 | sensor->thermal = thermal; |
| 453 | sensor->id = id; |
| 454 | sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor, |
| 455 | &rockchip_of_thermal_ops); |
| 456 | if (IS_ERR(sensor->tzd)) { |
| 457 | error = PTR_ERR(sensor->tzd); |
| 458 | dev_err(&pdev->dev, "failed to register sensor %d: %d\n", |
| 459 | id, error); |
| 460 | return error; |
| 461 | } |
| 462 | |
| 463 | return 0; |
| 464 | } |
| 465 | |
| 466 | /* |
| 467 | * Reset TSADC Controller, reset all tsadc registers. |
| 468 | */ |
| 469 | static void rockchip_thermal_reset_controller(struct reset_control *reset) |
| 470 | { |
| 471 | reset_control_assert(reset); |
| 472 | usleep_range(10, 20); |
| 473 | reset_control_deassert(reset); |
| 474 | } |
| 475 | |
| 476 | static int rockchip_thermal_probe(struct platform_device *pdev) |
| 477 | { |
| 478 | struct device_node *np = pdev->dev.of_node; |
| 479 | struct rockchip_thermal_data *thermal; |
| 480 | const struct of_device_id *match; |
| 481 | struct resource *res; |
| 482 | int irq; |
| 483 | int i; |
| 484 | int error; |
| 485 | |
| 486 | match = of_match_node(of_rockchip_thermal_match, np); |
| 487 | if (!match) |
| 488 | return -ENXIO; |
| 489 | |
| 490 | irq = platform_get_irq(pdev, 0); |
| 491 | if (irq < 0) { |
| 492 | dev_err(&pdev->dev, "no irq resource?\n"); |
| 493 | return -EINVAL; |
| 494 | } |
| 495 | |
| 496 | thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data), |
| 497 | GFP_KERNEL); |
| 498 | if (!thermal) |
| 499 | return -ENOMEM; |
| 500 | |
| 501 | thermal->pdev = pdev; |
| 502 | |
| 503 | thermal->chip = (const struct rockchip_tsadc_chip *)match->data; |
| 504 | if (!thermal->chip) |
| 505 | return -EINVAL; |
| 506 | |
| 507 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 508 | thermal->regs = devm_ioremap_resource(&pdev->dev, res); |
| 509 | if (IS_ERR(thermal->regs)) |
| 510 | return PTR_ERR(thermal->regs); |
| 511 | |
| 512 | thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb"); |
| 513 | if (IS_ERR(thermal->reset)) { |
| 514 | error = PTR_ERR(thermal->reset); |
| 515 | dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error); |
| 516 | return error; |
| 517 | } |
| 518 | |
| 519 | thermal->clk = devm_clk_get(&pdev->dev, "tsadc"); |
| 520 | if (IS_ERR(thermal->clk)) { |
| 521 | error = PTR_ERR(thermal->clk); |
| 522 | dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error); |
| 523 | return error; |
| 524 | } |
| 525 | |
| 526 | thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); |
| 527 | if (IS_ERR(thermal->pclk)) { |
Dan Carpenter | 0d0a2bf | 2015-04-21 12:34:10 +0300 | [diff] [blame] | 528 | error = PTR_ERR(thermal->pclk); |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 529 | dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n", |
| 530 | error); |
| 531 | return error; |
| 532 | } |
| 533 | |
| 534 | error = clk_prepare_enable(thermal->clk); |
| 535 | if (error) { |
| 536 | dev_err(&pdev->dev, "failed to enable converter clock: %d\n", |
| 537 | error); |
| 538 | return error; |
| 539 | } |
| 540 | |
| 541 | error = clk_prepare_enable(thermal->pclk); |
| 542 | if (error) { |
| 543 | dev_err(&pdev->dev, "failed to enable pclk: %d\n", error); |
| 544 | goto err_disable_clk; |
| 545 | } |
| 546 | |
| 547 | rockchip_thermal_reset_controller(thermal->reset); |
| 548 | |
| 549 | error = rockchip_configure_from_dt(&pdev->dev, np, thermal); |
| 550 | if (error) { |
| 551 | dev_err(&pdev->dev, "failed to parse device tree data: %d\n", |
| 552 | error); |
| 553 | goto err_disable_pclk; |
| 554 | } |
| 555 | |
| 556 | thermal->chip->initialize(thermal->regs, thermal->tshut_polarity); |
| 557 | |
| 558 | error = rockchip_thermal_register_sensor(pdev, thermal, |
| 559 | &thermal->sensors[0], |
| 560 | SENSOR_CPU); |
| 561 | if (error) { |
| 562 | dev_err(&pdev->dev, |
| 563 | "failed to register CPU thermal sensor: %d\n", error); |
| 564 | goto err_disable_pclk; |
| 565 | } |
| 566 | |
| 567 | error = rockchip_thermal_register_sensor(pdev, thermal, |
| 568 | &thermal->sensors[1], |
| 569 | SENSOR_GPU); |
| 570 | if (error) { |
| 571 | dev_err(&pdev->dev, |
| 572 | "failed to register GPU thermal sensor: %d\n", error); |
| 573 | goto err_unregister_cpu_sensor; |
| 574 | } |
| 575 | |
| 576 | error = devm_request_threaded_irq(&pdev->dev, irq, NULL, |
| 577 | &rockchip_thermal_alarm_irq_thread, |
| 578 | IRQF_ONESHOT, |
| 579 | "rockchip_thermal", thermal); |
| 580 | if (error) { |
| 581 | dev_err(&pdev->dev, |
| 582 | "failed to request tsadc irq: %d\n", error); |
| 583 | goto err_unregister_gpu_sensor; |
| 584 | } |
| 585 | |
| 586 | thermal->chip->control(thermal->regs, true); |
| 587 | |
| 588 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) |
| 589 | rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); |
| 590 | |
| 591 | platform_set_drvdata(pdev, thermal); |
| 592 | |
| 593 | return 0; |
| 594 | |
| 595 | err_unregister_gpu_sensor: |
| 596 | thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd); |
| 597 | err_unregister_cpu_sensor: |
| 598 | thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd); |
| 599 | err_disable_pclk: |
| 600 | clk_disable_unprepare(thermal->pclk); |
| 601 | err_disable_clk: |
| 602 | clk_disable_unprepare(thermal->clk); |
| 603 | |
| 604 | return error; |
| 605 | } |
| 606 | |
| 607 | static int rockchip_thermal_remove(struct platform_device *pdev) |
| 608 | { |
| 609 | struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev); |
| 610 | int i; |
| 611 | |
| 612 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) { |
| 613 | struct rockchip_thermal_sensor *sensor = &thermal->sensors[i]; |
| 614 | |
| 615 | rockchip_thermal_toggle_sensor(sensor, false); |
| 616 | thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd); |
| 617 | } |
| 618 | |
| 619 | thermal->chip->control(thermal->regs, false); |
| 620 | |
| 621 | clk_disable_unprepare(thermal->pclk); |
| 622 | clk_disable_unprepare(thermal->clk); |
| 623 | |
| 624 | return 0; |
| 625 | } |
| 626 | |
| 627 | static int __maybe_unused rockchip_thermal_suspend(struct device *dev) |
| 628 | { |
| 629 | struct platform_device *pdev = to_platform_device(dev); |
| 630 | struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev); |
| 631 | int i; |
| 632 | |
| 633 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) |
| 634 | rockchip_thermal_toggle_sensor(&thermal->sensors[i], false); |
| 635 | |
| 636 | thermal->chip->control(thermal->regs, false); |
| 637 | |
| 638 | clk_disable(thermal->pclk); |
| 639 | clk_disable(thermal->clk); |
| 640 | |
Caesar Wang | 7e38a5b | 2015-10-23 19:25:27 +0800 | [diff] [blame^] | 641 | pinctrl_pm_select_sleep_state(dev); |
| 642 | |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 643 | return 0; |
| 644 | } |
| 645 | |
| 646 | static int __maybe_unused rockchip_thermal_resume(struct device *dev) |
| 647 | { |
| 648 | struct platform_device *pdev = to_platform_device(dev); |
| 649 | struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev); |
| 650 | int i; |
| 651 | int error; |
| 652 | |
| 653 | error = clk_enable(thermal->clk); |
| 654 | if (error) |
| 655 | return error; |
| 656 | |
| 657 | error = clk_enable(thermal->pclk); |
| 658 | if (error) |
| 659 | return error; |
| 660 | |
| 661 | rockchip_thermal_reset_controller(thermal->reset); |
| 662 | |
| 663 | thermal->chip->initialize(thermal->regs, thermal->tshut_polarity); |
| 664 | |
| 665 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) { |
| 666 | enum sensor_id id = thermal->sensors[i].id; |
| 667 | |
| 668 | thermal->chip->set_tshut_mode(id, thermal->regs, |
| 669 | thermal->tshut_mode); |
| 670 | thermal->chip->set_tshut_temp(id, thermal->regs, |
| 671 | thermal->tshut_temp); |
| 672 | } |
| 673 | |
| 674 | thermal->chip->control(thermal->regs, true); |
| 675 | |
| 676 | for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) |
| 677 | rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); |
| 678 | |
Caesar Wang | 7e38a5b | 2015-10-23 19:25:27 +0800 | [diff] [blame^] | 679 | pinctrl_pm_select_default_state(dev); |
| 680 | |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 681 | return 0; |
| 682 | } |
| 683 | |
| 684 | static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops, |
| 685 | rockchip_thermal_suspend, rockchip_thermal_resume); |
| 686 | |
| 687 | static struct platform_driver rockchip_thermal_driver = { |
| 688 | .driver = { |
| 689 | .name = "rockchip-thermal", |
Caesar Wang | cbac8f63 | 2014-11-24 12:58:59 +0800 | [diff] [blame] | 690 | .pm = &rockchip_thermal_pm_ops, |
| 691 | .of_match_table = of_rockchip_thermal_match, |
| 692 | }, |
| 693 | .probe = rockchip_thermal_probe, |
| 694 | .remove = rockchip_thermal_remove, |
| 695 | }; |
| 696 | |
| 697 | module_platform_driver(rockchip_thermal_driver); |
| 698 | |
| 699 | MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver"); |
| 700 | MODULE_AUTHOR("Rockchip, Inc."); |
| 701 | MODULE_LICENSE("GPL v2"); |
| 702 | MODULE_ALIAS("platform:rockchip-thermal"); |