Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 1 | /* |
| 2 | Legend Silicon LGS-8GL5 DMB-TH OFDM demodulator driver |
| 3 | |
| 4 | Copyright (C) 2008 Sirius International (Hong Kong) Limited |
| 5 | Timothy Lee <timothy.lee@siriushk.com> |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | |
| 21 | */ |
| 22 | |
| 23 | #include <linux/kernel.h> |
| 24 | #include <linux/init.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/string.h> |
| 27 | #include <linux/slab.h> |
| 28 | #include "dvb_frontend.h" |
| 29 | #include "lgs8gl5.h" |
| 30 | |
| 31 | |
| 32 | #define REG_RESET 0x02 |
| 33 | #define REG_RESET_OFF 0x01 |
| 34 | #define REG_03 0x03 |
| 35 | #define REG_04 0x04 |
| 36 | #define REG_07 0x07 |
| 37 | #define REG_09 0x09 |
| 38 | #define REG_0A 0x0a |
| 39 | #define REG_0B 0x0b |
| 40 | #define REG_0C 0x0c |
| 41 | #define REG_37 0x37 |
| 42 | #define REG_STRENGTH 0x4b |
| 43 | #define REG_STRENGTH_MASK 0x7f |
| 44 | #define REG_STRENGTH_CARRIER 0x80 |
| 45 | #define REG_INVERSION 0x7c |
| 46 | #define REG_INVERSION_ON 0x80 |
| 47 | #define REG_7D 0x7d |
| 48 | #define REG_7E 0x7e |
| 49 | #define REG_A2 0xa2 |
| 50 | #define REG_STATUS 0xa4 |
| 51 | #define REG_STATUS_SYNC 0x04 |
| 52 | #define REG_STATUS_LOCK 0x01 |
| 53 | |
| 54 | |
| 55 | struct lgs8gl5_state { |
| 56 | struct i2c_adapter *i2c; |
| 57 | const struct lgs8gl5_config *config; |
| 58 | struct dvb_frontend frontend; |
| 59 | }; |
| 60 | |
| 61 | |
| 62 | static int debug; |
| 63 | #define dprintk(args...) \ |
| 64 | do { \ |
| 65 | if (debug) \ |
| 66 | printk(KERN_DEBUG "lgs8gl5: " args); \ |
| 67 | } while (0) |
| 68 | |
| 69 | |
| 70 | /* Writes into demod's register */ |
| 71 | static int |
| 72 | lgs8gl5_write_reg(struct lgs8gl5_state *state, u8 reg, u8 data) |
| 73 | { |
| 74 | int ret; |
| 75 | u8 buf[] = {reg, data}; |
| 76 | struct i2c_msg msg = { |
| 77 | .addr = state->config->demod_address, |
| 78 | .flags = 0, |
| 79 | .buf = buf, |
| 80 | .len = 2 |
| 81 | }; |
| 82 | |
| 83 | ret = i2c_transfer(state->i2c, &msg, 1); |
| 84 | if (ret != 1) |
| 85 | dprintk("%s: error (reg=0x%02x, val=0x%02x, ret=%i)\n", |
| 86 | __func__, reg, data, ret); |
| 87 | return (ret != 1) ? -1 : 0; |
| 88 | } |
| 89 | |
| 90 | |
| 91 | /* Reads from demod's register */ |
| 92 | static int |
| 93 | lgs8gl5_read_reg(struct lgs8gl5_state *state, u8 reg) |
| 94 | { |
Michael Krufky | 3a6b974 | 2008-08-09 15:29:46 -0300 | [diff] [blame] | 95 | int ret; |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 96 | u8 b0[] = {reg}; |
| 97 | u8 b1[] = {0}; |
| 98 | struct i2c_msg msg[2] = { |
| 99 | { |
| 100 | .addr = state->config->demod_address, |
| 101 | .flags = 0, |
| 102 | .buf = b0, |
| 103 | .len = 1 |
| 104 | }, |
| 105 | { |
| 106 | .addr = state->config->demod_address, |
| 107 | .flags = I2C_M_RD, |
| 108 | .buf = b1, |
| 109 | .len = 1 |
| 110 | } |
| 111 | }; |
| 112 | |
| 113 | ret = i2c_transfer(state->i2c, msg, 2); |
| 114 | if (ret != 2) |
| 115 | return -EIO; |
| 116 | |
| 117 | return b1[0]; |
| 118 | } |
| 119 | |
| 120 | |
| 121 | static int |
| 122 | lgs8gl5_update_reg(struct lgs8gl5_state *state, u8 reg, u8 data) |
| 123 | { |
| 124 | lgs8gl5_read_reg(state, reg); |
| 125 | lgs8gl5_write_reg(state, reg, data); |
| 126 | return 0; |
| 127 | } |
| 128 | |
| 129 | |
| 130 | /* Writes into alternate device's register */ |
| 131 | /* TODO: Find out what that device is for! */ |
| 132 | static int |
| 133 | lgs8gl5_update_alt_reg(struct lgs8gl5_state *state, u8 reg, u8 data) |
| 134 | { |
Michael Krufky | 3a6b974 | 2008-08-09 15:29:46 -0300 | [diff] [blame] | 135 | int ret; |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 136 | u8 b0[] = {reg}; |
| 137 | u8 b1[] = {0}; |
| 138 | u8 b2[] = {reg, data}; |
| 139 | struct i2c_msg msg[3] = { |
| 140 | { |
| 141 | .addr = state->config->demod_address + 2, |
| 142 | .flags = 0, |
| 143 | .buf = b0, |
| 144 | .len = 1 |
| 145 | }, |
| 146 | { |
| 147 | .addr = state->config->demod_address + 2, |
| 148 | .flags = I2C_M_RD, |
| 149 | .buf = b1, |
| 150 | .len = 1 |
| 151 | }, |
| 152 | { |
| 153 | .addr = state->config->demod_address + 2, |
| 154 | .flags = 0, |
| 155 | .buf = b2, |
| 156 | .len = 2 |
| 157 | }, |
| 158 | }; |
| 159 | |
| 160 | ret = i2c_transfer(state->i2c, msg, 3); |
| 161 | return (ret != 3) ? -1 : 0; |
| 162 | } |
| 163 | |
| 164 | |
| 165 | static void |
| 166 | lgs8gl5_soft_reset(struct lgs8gl5_state *state) |
| 167 | { |
| 168 | u8 val; |
| 169 | |
| 170 | dprintk("%s\n", __func__); |
| 171 | |
| 172 | val = lgs8gl5_read_reg(state, REG_RESET); |
| 173 | lgs8gl5_write_reg(state, REG_RESET, val & ~REG_RESET_OFF); |
| 174 | lgs8gl5_write_reg(state, REG_RESET, val | REG_RESET_OFF); |
| 175 | msleep(5); |
| 176 | } |
| 177 | |
| 178 | |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 179 | /* Starts demodulation */ |
| 180 | static void |
| 181 | lgs8gl5_start_demod(struct lgs8gl5_state *state) |
| 182 | { |
| 183 | u8 val; |
| 184 | int n; |
| 185 | |
| 186 | dprintk("%s\n", __func__); |
| 187 | |
| 188 | lgs8gl5_update_alt_reg(state, 0xc2, 0x28); |
| 189 | lgs8gl5_soft_reset(state); |
| 190 | lgs8gl5_update_reg(state, REG_07, 0x10); |
| 191 | lgs8gl5_update_reg(state, REG_07, 0x10); |
| 192 | lgs8gl5_write_reg(state, REG_09, 0x0e); |
| 193 | lgs8gl5_write_reg(state, REG_0A, 0xe5); |
| 194 | lgs8gl5_write_reg(state, REG_0B, 0x35); |
| 195 | lgs8gl5_write_reg(state, REG_0C, 0x30); |
| 196 | |
| 197 | lgs8gl5_update_reg(state, REG_03, 0x00); |
| 198 | lgs8gl5_update_reg(state, REG_7E, 0x01); |
| 199 | lgs8gl5_update_alt_reg(state, 0xc5, 0x00); |
| 200 | lgs8gl5_update_reg(state, REG_04, 0x02); |
| 201 | lgs8gl5_update_reg(state, REG_37, 0x01); |
| 202 | lgs8gl5_soft_reset(state); |
| 203 | |
| 204 | /* Wait for carrier */ |
| 205 | for (n = 0; n < 10; n++) { |
| 206 | val = lgs8gl5_read_reg(state, REG_STRENGTH); |
| 207 | dprintk("Wait for carrier[%d] 0x%02X\n", n, val); |
| 208 | if (val & REG_STRENGTH_CARRIER) |
| 209 | break; |
| 210 | msleep(4); |
| 211 | } |
| 212 | if (!(val & REG_STRENGTH_CARRIER)) |
| 213 | return; |
| 214 | |
| 215 | /* Wait for lock */ |
| 216 | for (n = 0; n < 20; n++) { |
| 217 | val = lgs8gl5_read_reg(state, REG_STATUS); |
| 218 | dprintk("Wait for lock[%d] 0x%02X\n", n, val); |
| 219 | if (val & REG_STATUS_LOCK) |
| 220 | break; |
| 221 | msleep(12); |
| 222 | } |
| 223 | if (!(val & REG_STATUS_LOCK)) |
| 224 | return; |
| 225 | |
| 226 | lgs8gl5_write_reg(state, REG_7D, lgs8gl5_read_reg(state, REG_A2)); |
| 227 | lgs8gl5_soft_reset(state); |
| 228 | } |
| 229 | |
| 230 | |
| 231 | static int |
| 232 | lgs8gl5_init(struct dvb_frontend *fe) |
| 233 | { |
| 234 | struct lgs8gl5_state *state = fe->demodulator_priv; |
| 235 | |
| 236 | dprintk("%s\n", __func__); |
| 237 | |
| 238 | lgs8gl5_update_alt_reg(state, 0xc2, 0x28); |
| 239 | lgs8gl5_soft_reset(state); |
| 240 | lgs8gl5_update_reg(state, REG_07, 0x10); |
| 241 | lgs8gl5_update_reg(state, REG_07, 0x10); |
| 242 | lgs8gl5_write_reg(state, REG_09, 0x0e); |
| 243 | lgs8gl5_write_reg(state, REG_0A, 0xe5); |
| 244 | lgs8gl5_write_reg(state, REG_0B, 0x35); |
| 245 | lgs8gl5_write_reg(state, REG_0C, 0x30); |
| 246 | |
| 247 | return 0; |
| 248 | } |
| 249 | |
| 250 | |
| 251 | static int |
Mauro Carvalho Chehab | 0df289a | 2015-06-07 14:53:52 -0300 | [diff] [blame] | 252 | lgs8gl5_read_status(struct dvb_frontend *fe, enum fe_status *status) |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 253 | { |
| 254 | struct lgs8gl5_state *state = fe->demodulator_priv; |
| 255 | u8 level = lgs8gl5_read_reg(state, REG_STRENGTH); |
| 256 | u8 flags = lgs8gl5_read_reg(state, REG_STATUS); |
| 257 | |
| 258 | *status = 0; |
| 259 | |
| 260 | if ((level & REG_STRENGTH_MASK) > 0) |
| 261 | *status |= FE_HAS_SIGNAL; |
| 262 | if (level & REG_STRENGTH_CARRIER) |
| 263 | *status |= FE_HAS_CARRIER; |
| 264 | if (flags & REG_STATUS_SYNC) |
| 265 | *status |= FE_HAS_SYNC; |
| 266 | if (flags & REG_STATUS_LOCK) |
| 267 | *status |= FE_HAS_LOCK; |
| 268 | |
| 269 | return 0; |
| 270 | } |
| 271 | |
| 272 | |
| 273 | static int |
| 274 | lgs8gl5_read_ber(struct dvb_frontend *fe, u32 *ber) |
| 275 | { |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 276 | *ber = 0; |
| 277 | |
| 278 | return 0; |
| 279 | } |
| 280 | |
| 281 | |
| 282 | static int |
| 283 | lgs8gl5_read_signal_strength(struct dvb_frontend *fe, u16 *signal_strength) |
| 284 | { |
| 285 | struct lgs8gl5_state *state = fe->demodulator_priv; |
| 286 | u8 level = lgs8gl5_read_reg(state, REG_STRENGTH); |
| 287 | *signal_strength = (level & REG_STRENGTH_MASK) << 8; |
| 288 | |
| 289 | return 0; |
| 290 | } |
| 291 | |
| 292 | |
| 293 | static int |
| 294 | lgs8gl5_read_snr(struct dvb_frontend *fe, u16 *snr) |
| 295 | { |
| 296 | struct lgs8gl5_state *state = fe->demodulator_priv; |
| 297 | u8 level = lgs8gl5_read_reg(state, REG_STRENGTH); |
| 298 | *snr = (level & REG_STRENGTH_MASK) << 8; |
| 299 | |
| 300 | return 0; |
| 301 | } |
| 302 | |
| 303 | |
| 304 | static int |
| 305 | lgs8gl5_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) |
| 306 | { |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 307 | *ucblocks = 0; |
| 308 | |
| 309 | return 0; |
| 310 | } |
| 311 | |
| 312 | |
| 313 | static int |
Mauro Carvalho Chehab | 304577b | 2011-12-26 11:17:05 -0300 | [diff] [blame] | 314 | lgs8gl5_set_frontend(struct dvb_frontend *fe) |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 315 | { |
Mauro Carvalho Chehab | 304577b | 2011-12-26 11:17:05 -0300 | [diff] [blame] | 316 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 317 | struct lgs8gl5_state *state = fe->demodulator_priv; |
| 318 | |
| 319 | dprintk("%s\n", __func__); |
| 320 | |
Mauro Carvalho Chehab | 304577b | 2011-12-26 11:17:05 -0300 | [diff] [blame] | 321 | if (p->bandwidth_hz != 8000000) |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 322 | return -EINVAL; |
| 323 | |
| 324 | if (fe->ops.tuner_ops.set_params) { |
Mauro Carvalho Chehab | 14d24d1 | 2011-12-24 12:24:33 -0300 | [diff] [blame] | 325 | fe->ops.tuner_ops.set_params(fe); |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 326 | if (fe->ops.i2c_gate_ctrl) |
| 327 | fe->ops.i2c_gate_ctrl(fe, 0); |
| 328 | } |
| 329 | |
| 330 | /* lgs8gl5_set_inversion(state, p->inversion); */ |
| 331 | |
| 332 | lgs8gl5_start_demod(state); |
| 333 | |
| 334 | return 0; |
| 335 | } |
| 336 | |
| 337 | |
| 338 | static int |
Mauro Carvalho Chehab | 7c61d80 | 2011-12-30 11:30:21 -0300 | [diff] [blame] | 339 | lgs8gl5_get_frontend(struct dvb_frontend *fe) |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 340 | { |
Mauro Carvalho Chehab | 7c61d80 | 2011-12-30 11:30:21 -0300 | [diff] [blame] | 341 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 342 | struct lgs8gl5_state *state = fe->demodulator_priv; |
| 343 | u8 inv = lgs8gl5_read_reg(state, REG_INVERSION); |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 344 | |
| 345 | p->inversion = (inv & REG_INVERSION_ON) ? INVERSION_ON : INVERSION_OFF; |
| 346 | |
Mauro Carvalho Chehab | 304577b | 2011-12-26 11:17:05 -0300 | [diff] [blame] | 347 | p->code_rate_HP = FEC_1_2; |
| 348 | p->code_rate_LP = FEC_7_8; |
| 349 | p->guard_interval = GUARD_INTERVAL_1_32; |
| 350 | p->transmission_mode = TRANSMISSION_MODE_2K; |
| 351 | p->modulation = QAM_64; |
| 352 | p->hierarchy = HIERARCHY_NONE; |
| 353 | p->bandwidth_hz = 8000000; |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 354 | |
| 355 | return 0; |
| 356 | } |
| 357 | |
| 358 | |
| 359 | static int |
| 360 | lgs8gl5_get_tune_settings(struct dvb_frontend *fe, |
| 361 | struct dvb_frontend_tune_settings *fesettings) |
| 362 | { |
| 363 | fesettings->min_delay_ms = 240; |
| 364 | fesettings->step_size = 0; |
| 365 | fesettings->max_drift = 0; |
| 366 | return 0; |
| 367 | } |
| 368 | |
| 369 | |
| 370 | static void |
| 371 | lgs8gl5_release(struct dvb_frontend *fe) |
| 372 | { |
| 373 | struct lgs8gl5_state *state = fe->demodulator_priv; |
| 374 | kfree(state); |
| 375 | } |
| 376 | |
| 377 | |
| 378 | static struct dvb_frontend_ops lgs8gl5_ops; |
| 379 | |
| 380 | |
| 381 | struct dvb_frontend* |
| 382 | lgs8gl5_attach(const struct lgs8gl5_config *config, struct i2c_adapter *i2c) |
| 383 | { |
| 384 | struct lgs8gl5_state *state = NULL; |
| 385 | |
| 386 | dprintk("%s\n", __func__); |
| 387 | |
| 388 | /* Allocate memory for the internal state */ |
Matthias Schwarzott | 084e24a | 2009-08-10 22:51:01 -0300 | [diff] [blame] | 389 | state = kzalloc(sizeof(struct lgs8gl5_state), GFP_KERNEL); |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 390 | if (state == NULL) |
| 391 | goto error; |
| 392 | |
| 393 | /* Setup the state */ |
| 394 | state->config = config; |
| 395 | state->i2c = i2c; |
| 396 | |
| 397 | /* Check if the demod is there */ |
| 398 | if (lgs8gl5_read_reg(state, REG_RESET) < 0) |
| 399 | goto error; |
| 400 | |
| 401 | /* Create dvb_frontend */ |
| 402 | memcpy(&state->frontend.ops, &lgs8gl5_ops, |
| 403 | sizeof(struct dvb_frontend_ops)); |
| 404 | state->frontend.demodulator_priv = state; |
| 405 | return &state->frontend; |
| 406 | |
| 407 | error: |
| 408 | kfree(state); |
| 409 | return NULL; |
| 410 | } |
| 411 | EXPORT_SYMBOL(lgs8gl5_attach); |
| 412 | |
| 413 | |
| 414 | static struct dvb_frontend_ops lgs8gl5_ops = { |
Antti Palosaari | 224b664 | 2012-08-12 22:33:21 -0300 | [diff] [blame] | 415 | .delsys = { SYS_DTMB }, |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 416 | .info = { |
| 417 | .name = "Legend Silicon LGS-8GL5 DMB-TH", |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 418 | .frequency_min = 474000000, |
| 419 | .frequency_max = 858000000, |
| 420 | .frequency_stepsize = 10000, |
| 421 | .frequency_tolerance = 0, |
| 422 | .caps = FE_CAN_FEC_AUTO | |
| 423 | FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_32 | |
| 424 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO | |
| 425 | FE_CAN_TRANSMISSION_MODE_AUTO | |
| 426 | FE_CAN_BANDWIDTH_AUTO | |
| 427 | FE_CAN_GUARD_INTERVAL_AUTO | |
| 428 | FE_CAN_HIERARCHY_AUTO | |
| 429 | FE_CAN_RECOVER |
| 430 | }, |
| 431 | |
| 432 | .release = lgs8gl5_release, |
| 433 | |
| 434 | .init = lgs8gl5_init, |
| 435 | |
Mauro Carvalho Chehab | 304577b | 2011-12-26 11:17:05 -0300 | [diff] [blame] | 436 | .set_frontend = lgs8gl5_set_frontend, |
| 437 | .get_frontend = lgs8gl5_get_frontend, |
Timothy Lee | dfbdce0 | 2008-08-09 13:36:51 -0300 | [diff] [blame] | 438 | .get_tune_settings = lgs8gl5_get_tune_settings, |
| 439 | |
| 440 | .read_status = lgs8gl5_read_status, |
| 441 | .read_ber = lgs8gl5_read_ber, |
| 442 | .read_signal_strength = lgs8gl5_read_signal_strength, |
| 443 | .read_snr = lgs8gl5_read_snr, |
| 444 | .read_ucblocks = lgs8gl5_read_ucblocks, |
| 445 | }; |
| 446 | |
| 447 | |
| 448 | module_param(debug, int, 0644); |
| 449 | MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); |
| 450 | |
| 451 | MODULE_DESCRIPTION("Legend Silicon LGS-8GL5 DMB-TH Demodulator driver"); |
| 452 | MODULE_AUTHOR("Timothy Lee"); |
| 453 | MODULE_LICENSE("GPL"); |