blob: 3c02b977a613b001e12faba173dd6e525de71430 [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
Sujithcee075a2009-03-13 09:07:23 +05302 * Copyright (c) 2008-2009 Atheros Communications Inc.
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070017#include <linux/nl80211.h>
Sujith394cf0a2009-02-09 13:26:54 +053018#include "ath9k.h"
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -070019#include "btcoex.h"
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070020
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070021static char *dev_info = "ath9k";
22
23MODULE_AUTHOR("Atheros Communications");
24MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
25MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
26MODULE_LICENSE("Dual BSD/GPL");
27
Jouni Malinenb3bd89c2009-02-24 13:42:01 +020028static int modparam_nohwcrypt;
29module_param_named(nohwcrypt, modparam_nohwcrypt, int, 0444);
30MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
31
Luis R. Rodriguezfaa27fa2009-10-06 21:19:06 -040032static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
33module_param_named(debug, ath9k_debug, uint, 0);
Luis R. Rodriguezaf1fc672009-10-08 01:00:18 -040034MODULE_PARM_DESC(debug, "Debugging mask");
Luis R. Rodriguezfaa27fa2009-10-06 21:19:06 -040035
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -080036/* We use the hw_value as an index into our private channel structure */
37
38#define CHAN2G(_freq, _idx) { \
39 .center_freq = (_freq), \
40 .hw_value = (_idx), \
Luis R. Rodriguezeeddfd92009-05-19 17:49:46 -040041 .max_power = 20, \
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -080042}
43
44#define CHAN5G(_freq, _idx) { \
45 .band = IEEE80211_BAND_5GHZ, \
46 .center_freq = (_freq), \
47 .hw_value = (_idx), \
Luis R. Rodriguezeeddfd92009-05-19 17:49:46 -040048 .max_power = 20, \
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -080049}
50
51/* Some 2 GHz radios are actually tunable on 2312-2732
52 * on 5 MHz steps, we support the channels which we know
53 * we have calibration data for all cards though to make
54 * this static */
55static struct ieee80211_channel ath9k_2ghz_chantable[] = {
56 CHAN2G(2412, 0), /* Channel 1 */
57 CHAN2G(2417, 1), /* Channel 2 */
58 CHAN2G(2422, 2), /* Channel 3 */
59 CHAN2G(2427, 3), /* Channel 4 */
60 CHAN2G(2432, 4), /* Channel 5 */
61 CHAN2G(2437, 5), /* Channel 6 */
62 CHAN2G(2442, 6), /* Channel 7 */
63 CHAN2G(2447, 7), /* Channel 8 */
64 CHAN2G(2452, 8), /* Channel 9 */
65 CHAN2G(2457, 9), /* Channel 10 */
66 CHAN2G(2462, 10), /* Channel 11 */
67 CHAN2G(2467, 11), /* Channel 12 */
68 CHAN2G(2472, 12), /* Channel 13 */
69 CHAN2G(2484, 13), /* Channel 14 */
70};
71
72/* Some 5 GHz radios are actually tunable on XXXX-YYYY
73 * on 5 MHz steps, we support the channels which we know
74 * we have calibration data for all cards though to make
75 * this static */
76static struct ieee80211_channel ath9k_5ghz_chantable[] = {
77 /* _We_ call this UNII 1 */
78 CHAN5G(5180, 14), /* Channel 36 */
79 CHAN5G(5200, 15), /* Channel 40 */
80 CHAN5G(5220, 16), /* Channel 44 */
81 CHAN5G(5240, 17), /* Channel 48 */
82 /* _We_ call this UNII 2 */
83 CHAN5G(5260, 18), /* Channel 52 */
84 CHAN5G(5280, 19), /* Channel 56 */
85 CHAN5G(5300, 20), /* Channel 60 */
86 CHAN5G(5320, 21), /* Channel 64 */
87 /* _We_ call this "Middle band" */
88 CHAN5G(5500, 22), /* Channel 100 */
89 CHAN5G(5520, 23), /* Channel 104 */
90 CHAN5G(5540, 24), /* Channel 108 */
91 CHAN5G(5560, 25), /* Channel 112 */
92 CHAN5G(5580, 26), /* Channel 116 */
93 CHAN5G(5600, 27), /* Channel 120 */
94 CHAN5G(5620, 28), /* Channel 124 */
95 CHAN5G(5640, 29), /* Channel 128 */
96 CHAN5G(5660, 30), /* Channel 132 */
97 CHAN5G(5680, 31), /* Channel 136 */
98 CHAN5G(5700, 32), /* Channel 140 */
99 /* _We_ call this UNII 3 */
100 CHAN5G(5745, 33), /* Channel 149 */
101 CHAN5G(5765, 34), /* Channel 153 */
102 CHAN5G(5785, 35), /* Channel 157 */
103 CHAN5G(5805, 36), /* Channel 161 */
104 CHAN5G(5825, 37), /* Channel 165 */
105};
106
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -0800107static void ath_cache_conf_rate(struct ath_softc *sc,
108 struct ieee80211_conf *conf)
Sujithff37e332008-11-24 12:07:55 +0530109{
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800110 switch (conf->channel->band) {
111 case IEEE80211_BAND_2GHZ:
112 if (conf_is_ht20(conf))
113 sc->cur_rate_table =
114 sc->hw_rate_table[ATH9K_MODE_11NG_HT20];
115 else if (conf_is_ht40_minus(conf))
116 sc->cur_rate_table =
117 sc->hw_rate_table[ATH9K_MODE_11NG_HT40MINUS];
118 else if (conf_is_ht40_plus(conf))
119 sc->cur_rate_table =
120 sc->hw_rate_table[ATH9K_MODE_11NG_HT40PLUS];
Luis R. Rodriguez96742252008-12-23 15:58:38 -0800121 else
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800122 sc->cur_rate_table =
123 sc->hw_rate_table[ATH9K_MODE_11G];
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800124 break;
125 case IEEE80211_BAND_5GHZ:
126 if (conf_is_ht20(conf))
127 sc->cur_rate_table =
128 sc->hw_rate_table[ATH9K_MODE_11NA_HT20];
129 else if (conf_is_ht40_minus(conf))
130 sc->cur_rate_table =
131 sc->hw_rate_table[ATH9K_MODE_11NA_HT40MINUS];
132 else if (conf_is_ht40_plus(conf))
133 sc->cur_rate_table =
134 sc->hw_rate_table[ATH9K_MODE_11NA_HT40PLUS];
135 else
Luis R. Rodriguez96742252008-12-23 15:58:38 -0800136 sc->cur_rate_table =
137 sc->hw_rate_table[ATH9K_MODE_11A];
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800138 break;
139 default:
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -0800140 BUG_ON(1);
Luis R. Rodriguez030bb492008-12-23 15:58:37 -0800141 break;
142 }
Sujithff37e332008-11-24 12:07:55 +0530143}
144
145static void ath_update_txpow(struct ath_softc *sc)
146{
Sujithcbe61d82009-02-09 13:27:12 +0530147 struct ath_hw *ah = sc->sc_ah;
Sujithff37e332008-11-24 12:07:55 +0530148 u32 txpow;
149
Sujith17d79042009-02-09 13:27:03 +0530150 if (sc->curtxpow != sc->config.txpowlimit) {
151 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
Sujithff37e332008-11-24 12:07:55 +0530152 /* read back in case value is clamped */
153 ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
Sujith17d79042009-02-09 13:27:03 +0530154 sc->curtxpow = txpow;
Sujithff37e332008-11-24 12:07:55 +0530155 }
156}
157
158static u8 parse_mpdudensity(u8 mpdudensity)
159{
160 /*
161 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
162 * 0 for no restriction
163 * 1 for 1/4 us
164 * 2 for 1/2 us
165 * 3 for 1 us
166 * 4 for 2 us
167 * 5 for 4 us
168 * 6 for 8 us
169 * 7 for 16 us
170 */
171 switch (mpdudensity) {
172 case 0:
173 return 0;
174 case 1:
175 case 2:
176 case 3:
177 /* Our lower layer calculations limit our precision to
178 1 microsecond */
179 return 1;
180 case 4:
181 return 2;
182 case 5:
183 return 4;
184 case 6:
185 return 8;
186 case 7:
187 return 16;
188 default:
189 return 0;
190 }
191}
192
193static void ath_setup_rates(struct ath_softc *sc, enum ieee80211_band band)
194{
Luis R. Rodriguez4f0fc7c2009-05-06 02:20:00 -0400195 const struct ath_rate_table *rate_table = NULL;
Sujithff37e332008-11-24 12:07:55 +0530196 struct ieee80211_supported_band *sband;
197 struct ieee80211_rate *rate;
198 int i, maxrates;
199
200 switch (band) {
201 case IEEE80211_BAND_2GHZ:
202 rate_table = sc->hw_rate_table[ATH9K_MODE_11G];
203 break;
204 case IEEE80211_BAND_5GHZ:
205 rate_table = sc->hw_rate_table[ATH9K_MODE_11A];
206 break;
207 default:
208 break;
209 }
210
211 if (rate_table == NULL)
212 return;
213
214 sband = &sc->sbands[band];
215 rate = sc->rates[band];
216
217 if (rate_table->rate_cnt > ATH_RATE_MAX)
218 maxrates = ATH_RATE_MAX;
219 else
220 maxrates = rate_table->rate_cnt;
221
222 for (i = 0; i < maxrates; i++) {
223 rate[i].bitrate = rate_table->info[i].ratekbps / 100;
224 rate[i].hw_value = rate_table->info[i].ratecode;
Sujithf46730d2009-01-27 13:51:03 +0530225 if (rate_table->info[i].short_preamble) {
226 rate[i].hw_value_short = rate_table->info[i].ratecode |
227 rate_table->info[i].short_preamble;
228 rate[i].flags = IEEE80211_RATE_SHORT_PREAMBLE;
229 }
Sujithff37e332008-11-24 12:07:55 +0530230 sband->n_bitrates++;
Sujithf46730d2009-01-27 13:51:03 +0530231
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700232 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
233 "Rate: %2dMbps, ratecode: %2d\n",
234 rate[i].bitrate / 10, rate[i].hw_value);
Sujithff37e332008-11-24 12:07:55 +0530235 }
236}
237
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +0530238static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
239 struct ieee80211_hw *hw)
240{
241 struct ieee80211_channel *curchan = hw->conf.channel;
242 struct ath9k_channel *channel;
243 u8 chan_idx;
244
245 chan_idx = curchan->hw_value;
246 channel = &sc->sc_ah->channels[chan_idx];
247 ath9k_update_ichannel(sc, hw, channel);
248 return channel;
249}
250
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700251static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
Luis R. Rodriguez8c77a562009-09-09 21:02:34 -0700252{
253 unsigned long flags;
254 bool ret;
255
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700256 spin_lock_irqsave(&sc->sc_pm_lock, flags);
257 ret = ath9k_hw_setpower(sc->sc_ah, mode);
258 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
Luis R. Rodriguez8c77a562009-09-09 21:02:34 -0700259
260 return ret;
261}
262
Luis R. Rodrigueza91d75a2009-09-09 20:29:18 -0700263void ath9k_ps_wakeup(struct ath_softc *sc)
264{
265 unsigned long flags;
266
267 spin_lock_irqsave(&sc->sc_pm_lock, flags);
268 if (++sc->ps_usecount != 1)
269 goto unlock;
270
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700271 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
Luis R. Rodrigueza91d75a2009-09-09 20:29:18 -0700272
273 unlock:
274 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
275}
276
277void ath9k_ps_restore(struct ath_softc *sc)
278{
279 unsigned long flags;
280
281 spin_lock_irqsave(&sc->sc_pm_lock, flags);
282 if (--sc->ps_usecount != 0)
283 goto unlock;
284
285 if (sc->ps_enabled &&
286 !(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
287 SC_OP_WAIT_FOR_CAB |
288 SC_OP_WAIT_FOR_PSPOLL_DATA |
289 SC_OP_WAIT_FOR_TX_ACK)))
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700290 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
Luis R. Rodrigueza91d75a2009-09-09 20:29:18 -0700291
292 unlock:
293 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
294}
295
Sujithff37e332008-11-24 12:07:55 +0530296/*
297 * Set/change channels. If the channel is really being changed, it's done
298 * by reseting the chip. To accomplish this we must first cleanup any pending
299 * DMA, then restart stuff.
300*/
Jouni Malinen0e2dedf2009-03-03 19:23:32 +0200301int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
302 struct ath9k_channel *hchan)
Sujithff37e332008-11-24 12:07:55 +0530303{
Sujithcbe61d82009-02-09 13:27:12 +0530304 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700305 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguez25c56ee2009-09-13 23:04:44 -0700306 struct ieee80211_conf *conf = &common->hw->conf;
Sujithff37e332008-11-24 12:07:55 +0530307 bool fastcc = true, stopped;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -0800308 struct ieee80211_channel *channel = hw->conf.channel;
309 int r;
Sujithff37e332008-11-24 12:07:55 +0530310
311 if (sc->sc_flags & SC_OP_INVALID)
312 return -EIO;
313
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +0530314 ath9k_ps_wakeup(sc);
315
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800316 /*
317 * This is only performed if the channel settings have
318 * actually changed.
319 *
320 * To switch channels clear any pending DMA operations;
321 * wait long enough for the RX fifo to drain, reset the
322 * hardware at the new frequency, and then re-enable
323 * the relevant bits of the h/w.
324 */
325 ath9k_hw_set_interrupts(ah, 0);
Sujith043a0402009-01-16 21:38:47 +0530326 ath_drain_all_txq(sc, false);
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800327 stopped = ath_stoprecv(sc);
Sujithff37e332008-11-24 12:07:55 +0530328
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800329 /* XXX: do not flush receive queue here. We don't want
330 * to flush data frames already in queue because of
331 * changing channel. */
Sujithff37e332008-11-24 12:07:55 +0530332
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800333 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
334 fastcc = false;
Sujithff37e332008-11-24 12:07:55 +0530335
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700336 ath_print(common, ATH_DBG_CONFIG,
Luis R. Rodriguez25c56ee2009-09-13 23:04:44 -0700337 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700338 sc->sc_ah->curchan->channel,
Luis R. Rodriguez25c56ee2009-09-13 23:04:44 -0700339 channel->center_freq, conf_is_ht40(conf));
Sujith99405f92008-11-24 12:08:35 +0530340
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800341 spin_lock_bh(&sc->sc_resetlock);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -0800342
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800343 r = ath9k_hw_reset(ah, hchan, fastcc);
344 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700345 ath_print(common, ATH_DBG_FATAL,
346 "Unable to reset channel (%u Mhz) "
347 "reset status %d\n",
348 channel->center_freq, r);
Sujithff37e332008-11-24 12:07:55 +0530349 spin_unlock_bh(&sc->sc_resetlock);
Gabor Juhos39892792009-06-15 17:49:09 +0200350 goto ps_restore;
Sujithff37e332008-11-24 12:07:55 +0530351 }
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800352 spin_unlock_bh(&sc->sc_resetlock);
353
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800354 sc->sc_flags &= ~SC_OP_FULL_RESET;
355
356 if (ath_startrecv(sc) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700357 ath_print(common, ATH_DBG_FATAL,
358 "Unable to restart recv logic\n");
Gabor Juhos39892792009-06-15 17:49:09 +0200359 r = -EIO;
360 goto ps_restore;
Luis R. Rodriguezc0d7c7a2008-12-23 15:58:50 -0800361 }
362
363 ath_cache_conf_rate(sc, &hw->conf);
364 ath_update_txpow(sc);
Sujith17d79042009-02-09 13:27:03 +0530365 ath9k_hw_set_interrupts(ah, sc->imask);
Gabor Juhos39892792009-06-15 17:49:09 +0200366
367 ps_restore:
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +0530368 ath9k_ps_restore(sc);
Gabor Juhos39892792009-06-15 17:49:09 +0200369 return r;
Sujithff37e332008-11-24 12:07:55 +0530370}
371
372/*
373 * This routine performs the periodic noise floor calibration function
374 * that is used to adjust and optimize the chip performance. This
375 * takes environmental changes (location, temperature) into account.
376 * When the task is complete, it reschedules itself depending on the
377 * appropriate interval that was calculated.
378 */
379static void ath_ani_calibrate(unsigned long data)
380{
Sujith20977d32009-02-20 15:13:28 +0530381 struct ath_softc *sc = (struct ath_softc *)data;
382 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700383 struct ath_common *common = ath9k_hw_common(ah);
Sujithff37e332008-11-24 12:07:55 +0530384 bool longcal = false;
385 bool shortcal = false;
386 bool aniflag = false;
387 unsigned int timestamp = jiffies_to_msecs(jiffies);
Sujith20977d32009-02-20 15:13:28 +0530388 u32 cal_interval, short_cal_interval;
Sujithff37e332008-11-24 12:07:55 +0530389
Sujith20977d32009-02-20 15:13:28 +0530390 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
391 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
Sujithff37e332008-11-24 12:07:55 +0530392
393 /*
394 * don't calibrate when we're scanning.
395 * we are most likely not on our home channel.
396 */
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +0530397 spin_lock(&sc->ani_lock);
Sujith0c98de62009-03-03 10:16:45 +0530398 if (sc->sc_flags & SC_OP_SCANNING)
Sujith20977d32009-02-20 15:13:28 +0530399 goto set_timer;
Sujithff37e332008-11-24 12:07:55 +0530400
Jouni Malinen1ffc1c62009-05-19 17:01:39 +0300401 /* Only calibrate if awake */
402 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
403 goto set_timer;
404
405 ath9k_ps_wakeup(sc);
406
Sujithff37e332008-11-24 12:07:55 +0530407 /* Long calibration runs independently of short calibration. */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800408 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
Sujithff37e332008-11-24 12:07:55 +0530409 longcal = true;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700410 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800411 common->ani.longcal_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530412 }
413
Sujith17d79042009-02-09 13:27:03 +0530414 /* Short calibration applies only while caldone is false */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800415 if (!common->ani.caldone) {
416 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
Sujithff37e332008-11-24 12:07:55 +0530417 shortcal = true;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700418 ath_print(common, ATH_DBG_ANI,
419 "shortcal @%lu\n", jiffies);
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800420 common->ani.shortcal_timer = timestamp;
421 common->ani.resetcal_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530422 }
423 } else {
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800424 if ((timestamp - common->ani.resetcal_timer) >=
Sujithff37e332008-11-24 12:07:55 +0530425 ATH_RESTART_CALINTERVAL) {
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800426 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
427 if (common->ani.caldone)
428 common->ani.resetcal_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530429 }
430 }
431
432 /* Verify whether we must check ANI */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800433 if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
Sujithff37e332008-11-24 12:07:55 +0530434 aniflag = true;
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800435 common->ani.checkani_timer = timestamp;
Sujithff37e332008-11-24 12:07:55 +0530436 }
437
438 /* Skip all processing if there's nothing to do. */
439 if (longcal || shortcal || aniflag) {
440 /* Call ANI routine if necessary */
441 if (aniflag)
Vasanthakumar Thiagarajan22e66a42009-08-19 16:23:40 +0530442 ath9k_hw_ani_monitor(ah, ah->curchan);
Sujithff37e332008-11-24 12:07:55 +0530443
444 /* Perform calibration if necessary */
445 if (longcal || shortcal) {
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800446 common->ani.caldone =
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700447 ath9k_hw_calibrate(ah,
448 ah->curchan,
449 common->rx_chainmask,
450 longcal);
Sujithff37e332008-11-24 12:07:55 +0530451
Sujith379f0442009-04-13 21:56:48 +0530452 if (longcal)
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800453 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
Sujith379f0442009-04-13 21:56:48 +0530454 ah->curchan);
Sujithff37e332008-11-24 12:07:55 +0530455
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700456 ath_print(common, ATH_DBG_ANI,
457 " calibrate chan %u/%x nf: %d\n",
458 ah->curchan->channel,
459 ah->curchan->channelFlags,
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800460 common->ani.noise_floor);
Sujithff37e332008-11-24 12:07:55 +0530461 }
462 }
463
Jouni Malinen1ffc1c62009-05-19 17:01:39 +0300464 ath9k_ps_restore(sc);
465
Sujith20977d32009-02-20 15:13:28 +0530466set_timer:
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +0530467 spin_unlock(&sc->ani_lock);
Sujithff37e332008-11-24 12:07:55 +0530468 /*
469 * Set timer interval based on previous results.
470 * The interval must be the shortest necessary to satisfy ANI,
471 * short calibration and long calibration.
472 */
Sujithaac92072008-12-02 18:37:54 +0530473 cal_interval = ATH_LONG_CALINTERVAL;
Sujith2660b812009-02-09 13:27:26 +0530474 if (sc->sc_ah->config.enable_ani)
Sujithaac92072008-12-02 18:37:54 +0530475 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800476 if (!common->ani.caldone)
Sujith20977d32009-02-20 15:13:28 +0530477 cal_interval = min(cal_interval, (u32)short_cal_interval);
Sujithff37e332008-11-24 12:07:55 +0530478
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800479 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
Sujithff37e332008-11-24 12:07:55 +0530480}
481
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800482static void ath_start_ani(struct ath_common *common)
Sujith415f7382009-04-13 21:56:46 +0530483{
484 unsigned long timestamp = jiffies_to_msecs(jiffies);
485
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800486 common->ani.longcal_timer = timestamp;
487 common->ani.shortcal_timer = timestamp;
488 common->ani.checkani_timer = timestamp;
Sujith415f7382009-04-13 21:56:46 +0530489
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -0800490 mod_timer(&common->ani.timer,
Sujith415f7382009-04-13 21:56:46 +0530491 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
492}
493
Sujithff37e332008-11-24 12:07:55 +0530494/*
495 * Update tx/rx chainmask. For legacy association,
496 * hard code chainmask to 1x1, for 11n association, use
Vasanthakumar Thiagarajanc97c92d2009-01-02 15:35:46 +0530497 * the chainmask configuration, for bt coexistence, use
498 * the chainmask configuration even in legacy mode.
Sujithff37e332008-11-24 12:07:55 +0530499 */
Jouni Malinen0e2dedf2009-03-03 19:23:32 +0200500void ath_update_chainmask(struct ath_softc *sc, int is_ht)
Sujithff37e332008-11-24 12:07:55 +0530501{
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700502 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700503 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700504
Sujith3d832612009-08-21 12:00:28 +0530505 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -0700506 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700507 common->tx_chainmask = ah->caps.tx_chainmask;
508 common->rx_chainmask = ah->caps.rx_chainmask;
Sujithff37e332008-11-24 12:07:55 +0530509 } else {
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700510 common->tx_chainmask = 1;
511 common->rx_chainmask = 1;
Sujithff37e332008-11-24 12:07:55 +0530512 }
513
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700514 ath_print(common, ATH_DBG_CONFIG,
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700515 "tx chmask: %d, rx chmask: %d\n",
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700516 common->tx_chainmask,
517 common->rx_chainmask);
Sujithff37e332008-11-24 12:07:55 +0530518}
519
520static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
521{
522 struct ath_node *an;
523
524 an = (struct ath_node *)sta->drv_priv;
525
Sujith87792ef2009-03-30 15:28:48 +0530526 if (sc->sc_flags & SC_OP_TXAGGR) {
Sujithff37e332008-11-24 12:07:55 +0530527 ath_tx_node_init(sc, an);
Sujith9e98ac62009-07-23 15:32:34 +0530528 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
Sujith87792ef2009-03-30 15:28:48 +0530529 sta->ht_cap.ampdu_factor);
530 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
Senthil Balasubramaniana59b5a52009-07-14 20:17:07 -0400531 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
Sujith87792ef2009-03-30 15:28:48 +0530532 }
Sujithff37e332008-11-24 12:07:55 +0530533}
534
535static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
536{
537 struct ath_node *an = (struct ath_node *)sta->drv_priv;
538
539 if (sc->sc_flags & SC_OP_TXAGGR)
540 ath_tx_node_cleanup(sc, an);
541}
542
543static void ath9k_tasklet(unsigned long data)
544{
545 struct ath_softc *sc = (struct ath_softc *)data;
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700546 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700547 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700548
Sujith17d79042009-02-09 13:27:03 +0530549 u32 status = sc->intrstatus;
Sujithff37e332008-11-24 12:07:55 +0530550
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400551 ath9k_ps_wakeup(sc);
552
Sujithff37e332008-11-24 12:07:55 +0530553 if (status & ATH9K_INT_FATAL) {
Sujithff37e332008-11-24 12:07:55 +0530554 ath_reset(sc, false);
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400555 ath9k_ps_restore(sc);
Sujithff37e332008-11-24 12:07:55 +0530556 return;
Sujithff37e332008-11-24 12:07:55 +0530557 }
558
Sujith063d8be2009-03-30 15:28:49 +0530559 if (status & (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN)) {
560 spin_lock_bh(&sc->rx.rxflushlock);
561 ath_rx_tasklet(sc, 0);
562 spin_unlock_bh(&sc->rx.rxflushlock);
563 }
564
565 if (status & ATH9K_INT_TX)
566 ath_tx_tasklet(sc);
567
Gabor Juhos96148322009-07-24 17:27:21 +0200568 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
Jouni Malinen54ce8462009-05-19 17:01:40 +0300569 /*
570 * TSF sync does not look correct; remain awake to sync with
571 * the next Beacon.
572 */
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700573 ath_print(common, ATH_DBG_PS,
574 "TSFOOR - Sync with next Beacon\n");
Jouni Malinenccdfeab2009-05-20 21:59:08 +0300575 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON | SC_OP_BEACON_SYNC;
Jouni Malinen54ce8462009-05-19 17:01:40 +0300576 }
577
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -0700578 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
Vasanthakumar Thiagarajanebb8e1d2009-09-01 17:46:32 +0530579 if (status & ATH9K_INT_GENTIMER)
580 ath_gen_timer_isr(sc->sc_ah);
581
Sujithff37e332008-11-24 12:07:55 +0530582 /* re-enable hardware interrupt */
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -0700583 ath9k_hw_set_interrupts(ah, sc->imask);
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400584 ath9k_ps_restore(sc);
Sujithff37e332008-11-24 12:07:55 +0530585}
586
Gabor Juhos6baff7f2009-01-14 20:17:06 +0100587irqreturn_t ath_isr(int irq, void *dev)
Sujithff37e332008-11-24 12:07:55 +0530588{
Sujith063d8be2009-03-30 15:28:49 +0530589#define SCHED_INTR ( \
590 ATH9K_INT_FATAL | \
591 ATH9K_INT_RXORN | \
592 ATH9K_INT_RXEOL | \
593 ATH9K_INT_RX | \
594 ATH9K_INT_TX | \
595 ATH9K_INT_BMISS | \
596 ATH9K_INT_CST | \
Vasanthakumar Thiagarajanebb8e1d2009-09-01 17:46:32 +0530597 ATH9K_INT_TSFOOR | \
598 ATH9K_INT_GENTIMER)
Sujith063d8be2009-03-30 15:28:49 +0530599
Sujithff37e332008-11-24 12:07:55 +0530600 struct ath_softc *sc = dev;
Sujithcbe61d82009-02-09 13:27:12 +0530601 struct ath_hw *ah = sc->sc_ah;
Sujithff37e332008-11-24 12:07:55 +0530602 enum ath9k_int status;
603 bool sched = false;
604
Sujith063d8be2009-03-30 15:28:49 +0530605 /*
606 * The hardware is not ready/present, don't
607 * touch anything. Note this can happen early
608 * on if the IRQ is shared.
609 */
610 if (sc->sc_flags & SC_OP_INVALID)
611 return IRQ_NONE;
Sujithff37e332008-11-24 12:07:55 +0530612
Sujithff37e332008-11-24 12:07:55 +0530613
Sujith063d8be2009-03-30 15:28:49 +0530614 /* shared irq, not for us */
Sujithff37e332008-11-24 12:07:55 +0530615
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400616 if (!ath9k_hw_intrpend(ah))
Sujith063d8be2009-03-30 15:28:49 +0530617 return IRQ_NONE;
Sujithff37e332008-11-24 12:07:55 +0530618
Sujith063d8be2009-03-30 15:28:49 +0530619 /*
620 * Figure out the reason(s) for the interrupt. Note
621 * that the hal returns a pseudo-ISR that may include
622 * bits we haven't explicitly enabled so we mask the
623 * value to insure we only process bits we requested.
624 */
625 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
626 status &= sc->imask; /* discard unasked-for bits */
627
628 /*
629 * If there are no status bits set, then this interrupt was not
630 * for me (should have been caught above).
631 */
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400632 if (!status)
Sujith063d8be2009-03-30 15:28:49 +0530633 return IRQ_NONE;
Sujith063d8be2009-03-30 15:28:49 +0530634
635 /* Cache the status */
636 sc->intrstatus = status;
637
638 if (status & SCHED_INTR)
639 sched = true;
640
641 /*
642 * If a FATAL or RXORN interrupt is received, we have to reset the
643 * chip immediately.
644 */
645 if (status & (ATH9K_INT_FATAL | ATH9K_INT_RXORN))
646 goto chip_reset;
647
648 if (status & ATH9K_INT_SWBA)
649 tasklet_schedule(&sc->bcon_tasklet);
650
651 if (status & ATH9K_INT_TXURN)
652 ath9k_hw_updatetxtriglevel(ah, true);
653
654 if (status & ATH9K_INT_MIB) {
655 /*
656 * Disable interrupts until we service the MIB
657 * interrupt; otherwise it will continue to
658 * fire.
659 */
660 ath9k_hw_set_interrupts(ah, 0);
661 /*
662 * Let the hal handle the event. We assume
663 * it will clear whatever condition caused
664 * the interrupt.
665 */
Vasanthakumar Thiagarajan22e66a42009-08-19 16:23:40 +0530666 ath9k_hw_procmibevent(ah);
Sujith063d8be2009-03-30 15:28:49 +0530667 ath9k_hw_set_interrupts(ah, sc->imask);
668 }
669
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400670 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
671 if (status & ATH9K_INT_TIM_TIMER) {
Sujith063d8be2009-03-30 15:28:49 +0530672 /* Clear RxAbort bit so that we can
673 * receive frames */
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -0700674 ath9k_setpower(sc, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan153e0802009-05-15 02:47:16 -0400675 ath9k_hw_setrxabort(sc->sc_ah, 0);
Sujith063d8be2009-03-30 15:28:49 +0530676 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON;
677 }
Sujith063d8be2009-03-30 15:28:49 +0530678
679chip_reset:
680
Sujith817e11d2008-12-07 21:42:44 +0530681 ath_debug_stat_interrupt(sc, status);
682
Sujithff37e332008-11-24 12:07:55 +0530683 if (sched) {
684 /* turn off every interrupt except SWBA */
Sujith17d79042009-02-09 13:27:03 +0530685 ath9k_hw_set_interrupts(ah, (sc->imask & ATH9K_INT_SWBA));
Sujithff37e332008-11-24 12:07:55 +0530686 tasklet_schedule(&sc->intr_tq);
687 }
688
689 return IRQ_HANDLED;
Sujith063d8be2009-03-30 15:28:49 +0530690
691#undef SCHED_INTR
Sujithff37e332008-11-24 12:07:55 +0530692}
693
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700694static u32 ath_get_extchanmode(struct ath_softc *sc,
Sujith99405f92008-11-24 12:08:35 +0530695 struct ieee80211_channel *chan,
Sujith094d05d2008-12-12 11:57:43 +0530696 enum nl80211_channel_type channel_type)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700697{
698 u32 chanmode = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700699
700 switch (chan->band) {
701 case IEEE80211_BAND_2GHZ:
Sujith094d05d2008-12-12 11:57:43 +0530702 switch(channel_type) {
703 case NL80211_CHAN_NO_HT:
704 case NL80211_CHAN_HT20:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700705 chanmode = CHANNEL_G_HT20;
Sujith094d05d2008-12-12 11:57:43 +0530706 break;
707 case NL80211_CHAN_HT40PLUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700708 chanmode = CHANNEL_G_HT40PLUS;
Sujith094d05d2008-12-12 11:57:43 +0530709 break;
710 case NL80211_CHAN_HT40MINUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700711 chanmode = CHANNEL_G_HT40MINUS;
Sujith094d05d2008-12-12 11:57:43 +0530712 break;
713 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700714 break;
715 case IEEE80211_BAND_5GHZ:
Sujith094d05d2008-12-12 11:57:43 +0530716 switch(channel_type) {
717 case NL80211_CHAN_NO_HT:
718 case NL80211_CHAN_HT20:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700719 chanmode = CHANNEL_A_HT20;
Sujith094d05d2008-12-12 11:57:43 +0530720 break;
721 case NL80211_CHAN_HT40PLUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700722 chanmode = CHANNEL_A_HT40PLUS;
Sujith094d05d2008-12-12 11:57:43 +0530723 break;
724 case NL80211_CHAN_HT40MINUS:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700725 chanmode = CHANNEL_A_HT40MINUS;
Sujith094d05d2008-12-12 11:57:43 +0530726 break;
727 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700728 break;
729 default:
730 break;
731 }
732
733 return chanmode;
734}
735
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800736static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200737 struct ath9k_keyval *hk, const u8 *addr,
738 bool authenticator)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700739{
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800740 struct ath_hw *ah = common->ah;
Jouni Malinen6ace2892008-12-17 13:32:17 +0200741 const u8 *key_rxmic;
742 const u8 *key_txmic;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700743
Jouni Malinen6ace2892008-12-17 13:32:17 +0200744 key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
745 key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700746
747 if (addr == NULL) {
Jouni Malinend216aaa2009-03-03 13:11:53 +0200748 /*
749 * Group key installation - only two key cache entries are used
750 * regardless of splitmic capability since group key is only
751 * used either for TX or RX.
752 */
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200753 if (authenticator) {
754 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
755 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
756 } else {
757 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
758 memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
759 }
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800760 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700761 }
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800762 if (!common->splitmic) {
Jouni Malinend216aaa2009-03-03 13:11:53 +0200763 /* TX and RX keys share the same key cache entry. */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700764 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
765 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800766 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700767 }
Jouni Malinend216aaa2009-03-03 13:11:53 +0200768
769 /* Separate key cache entries for TX and RX */
770
771 /* TX key goes at first index, RX key at +32. */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700772 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800773 if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
Jouni Malinend216aaa2009-03-03 13:11:53 +0200774 /* TX MIC entry failed. No need to proceed further */
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800775 ath_print(common, ATH_DBG_FATAL,
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700776 "Setting TX MIC Key Failed\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700777 return 0;
778 }
779
780 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
781 /* XXX delete tx key on failure? */
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800782 return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200783}
784
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800785static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
Jouni Malinen6ace2892008-12-17 13:32:17 +0200786{
787 int i;
788
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800789 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
790 if (test_bit(i, common->keymap) ||
791 test_bit(i + 64, common->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200792 continue; /* At least one part of TKIP key allocated */
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800793 if (common->splitmic &&
794 (test_bit(i + 32, common->keymap) ||
795 test_bit(i + 64 + 32, common->keymap)))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200796 continue; /* At least one part of TKIP key allocated */
797
798 /* Found a free slot for a TKIP key */
799 return i;
800 }
801 return -1;
802}
803
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800804static int ath_reserve_key_cache_slot(struct ath_common *common)
Jouni Malinen6ace2892008-12-17 13:32:17 +0200805{
806 int i;
807
808 /* First, try to find slots that would not be available for TKIP. */
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800809 if (common->splitmic) {
810 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
811 if (!test_bit(i, common->keymap) &&
812 (test_bit(i + 32, common->keymap) ||
813 test_bit(i + 64, common->keymap) ||
814 test_bit(i + 64 + 32, common->keymap)))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200815 return i;
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800816 if (!test_bit(i + 32, common->keymap) &&
817 (test_bit(i, common->keymap) ||
818 test_bit(i + 64, common->keymap) ||
819 test_bit(i + 64 + 32, common->keymap)))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200820 return i + 32;
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800821 if (!test_bit(i + 64, common->keymap) &&
822 (test_bit(i , common->keymap) ||
823 test_bit(i + 32, common->keymap) ||
824 test_bit(i + 64 + 32, common->keymap)))
Jouni Malinenea612132008-12-18 14:31:10 +0200825 return i + 64;
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800826 if (!test_bit(i + 64 + 32, common->keymap) &&
827 (test_bit(i, common->keymap) ||
828 test_bit(i + 32, common->keymap) ||
829 test_bit(i + 64, common->keymap)))
Jouni Malinenea612132008-12-18 14:31:10 +0200830 return i + 64 + 32;
Jouni Malinen6ace2892008-12-17 13:32:17 +0200831 }
832 } else {
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800833 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
834 if (!test_bit(i, common->keymap) &&
835 test_bit(i + 64, common->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200836 return i;
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800837 if (test_bit(i, common->keymap) &&
838 !test_bit(i + 64, common->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200839 return i + 64;
840 }
841 }
842
843 /* No partially used TKIP slots, pick any available slot */
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800844 for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
Jouni Malinenbe2864c2008-12-18 14:33:00 +0200845 /* Do not allow slots that could be needed for TKIP group keys
846 * to be used. This limitation could be removed if we know that
847 * TKIP will not be used. */
848 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
849 continue;
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800850 if (common->splitmic) {
Jouni Malinenbe2864c2008-12-18 14:33:00 +0200851 if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
852 continue;
853 if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
854 continue;
855 }
856
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800857 if (!test_bit(i, common->keymap))
Jouni Malinen6ace2892008-12-17 13:32:17 +0200858 return i; /* Found a free slot for a key */
859 }
860
861 /* No free slot found */
862 return -1;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700863}
864
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800865static int ath_key_config(struct ath_common *common,
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200866 struct ieee80211_vif *vif,
Johannes Bergdc822b52008-12-29 12:55:09 +0100867 struct ieee80211_sta *sta,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700868 struct ieee80211_key_conf *key)
869{
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800870 struct ath_hw *ah = common->ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700871 struct ath9k_keyval hk;
872 const u8 *mac = NULL;
873 int ret = 0;
Jouni Malinen6ace2892008-12-17 13:32:17 +0200874 int idx;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700875
876 memset(&hk, 0, sizeof(hk));
877
878 switch (key->alg) {
879 case ALG_WEP:
880 hk.kv_type = ATH9K_CIPHER_WEP;
881 break;
882 case ALG_TKIP:
883 hk.kv_type = ATH9K_CIPHER_TKIP;
884 break;
885 case ALG_CCMP:
886 hk.kv_type = ATH9K_CIPHER_AES_CCM;
887 break;
888 default:
Jouni Malinenca470b22009-01-08 13:32:12 +0200889 return -EOPNOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700890 }
891
Jouni Malinen6ace2892008-12-17 13:32:17 +0200892 hk.kv_len = key->keylen;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700893 memcpy(hk.kv_val, key->key, key->keylen);
894
Jouni Malinen6ace2892008-12-17 13:32:17 +0200895 if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
896 /* For now, use the default keys for broadcast keys. This may
897 * need to change with virtual interfaces. */
898 idx = key->keyidx;
899 } else if (key->keyidx) {
Johannes Bergdc822b52008-12-29 12:55:09 +0100900 if (WARN_ON(!sta))
901 return -EOPNOTSUPP;
902 mac = sta->addr;
903
Jouni Malinen6ace2892008-12-17 13:32:17 +0200904 if (vif->type != NL80211_IFTYPE_AP) {
905 /* Only keyidx 0 should be used with unicast key, but
906 * allow this for client mode for now. */
907 idx = key->keyidx;
908 } else
909 return -EIO;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700910 } else {
Johannes Bergdc822b52008-12-29 12:55:09 +0100911 if (WARN_ON(!sta))
912 return -EOPNOTSUPP;
913 mac = sta->addr;
914
Jouni Malinen6ace2892008-12-17 13:32:17 +0200915 if (key->alg == ALG_TKIP)
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800916 idx = ath_reserve_key_cache_slot_tkip(common);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200917 else
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800918 idx = ath_reserve_key_cache_slot(common);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200919 if (idx < 0)
Jouni Malinenca470b22009-01-08 13:32:12 +0200920 return -ENOSPC; /* no free key cache entries */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700921 }
922
923 if (key->alg == ALG_TKIP)
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800924 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
Jouni Malinen3f53dd62009-02-26 11:18:46 +0200925 vif->type == NL80211_IFTYPE_AP);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700926 else
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800927 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700928
929 if (!ret)
930 return -EIO;
931
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800932 set_bit(idx, common->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200933 if (key->alg == ALG_TKIP) {
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800934 set_bit(idx + 64, common->keymap);
935 if (common->splitmic) {
936 set_bit(idx + 32, common->keymap);
937 set_bit(idx + 64 + 32, common->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200938 }
939 }
940
941 return idx;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700942}
943
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800944static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700945{
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800946 struct ath_hw *ah = common->ah;
947
948 ath9k_hw_keyreset(ah, key->hw_key_idx);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200949 if (key->hw_key_idx < IEEE80211_WEP_NKID)
950 return;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700951
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800952 clear_bit(key->hw_key_idx, common->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200953 if (key->alg != ALG_TKIP)
954 return;
955
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -0800956 clear_bit(key->hw_key_idx + 64, common->keymap);
957 if (common->splitmic) {
958 clear_bit(key->hw_key_idx + 32, common->keymap);
959 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
Jouni Malinen6ace2892008-12-17 13:32:17 +0200960 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700961}
962
Sujitheb2599c2009-01-23 11:20:44 +0530963static void setup_ht_cap(struct ath_softc *sc,
964 struct ieee80211_sta_ht_cap *ht_info)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700965{
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700966 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530967 u8 tx_streams, rx_streams;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700968
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200969 ht_info->ht_supported = true;
970 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
971 IEEE80211_HT_CAP_SM_PS |
972 IEEE80211_HT_CAP_SGI_40 |
973 IEEE80211_HT_CAP_DSSSCCK40;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700974
Sujith9e98ac62009-07-23 15:32:34 +0530975 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
976 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
Sujitheb2599c2009-01-23 11:20:44 +0530977
Johannes Bergd9fe60d2008-10-09 12:13:49 +0200978 /* set up supported mcs set */
979 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700980 tx_streams = !(common->tx_chainmask & (common->tx_chainmask - 1)) ?
981 1 : 2;
982 rx_streams = !(common->rx_chainmask & (common->rx_chainmask - 1)) ?
983 1 : 2;
Sujitheb2599c2009-01-23 11:20:44 +0530984
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530985 if (tx_streams != rx_streams) {
Luis R. Rodriguez43c27612009-09-13 21:07:07 -0700986 ath_print(common, ATH_DBG_CONFIG,
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -0700987 "TX streams %d, RX streams: %d\n",
988 tx_streams, rx_streams);
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530989 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
990 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
991 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
Sujitheb2599c2009-01-23 11:20:44 +0530992 }
993
Senthil Balasubramanian140add22009-06-24 18:56:42 +0530994 ht_info->mcs.rx_mask[0] = 0xff;
995 if (rx_streams >= 2)
996 ht_info->mcs.rx_mask[1] = 0xff;
997
998 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700999}
1000
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301001static void ath9k_bss_assoc_info(struct ath_softc *sc,
Sujith5640b082008-10-29 10:16:06 +05301002 struct ieee80211_vif *vif,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301003 struct ieee80211_bss_conf *bss_conf)
1004{
Luis R. Rodriguezf2b21432009-09-10 08:50:20 -07001005 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001006 struct ath_common *common = ath9k_hw_common(ah);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301007
1008 if (bss_conf->assoc) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001009 ath_print(common, ATH_DBG_CONFIG,
1010 "Bss Info ASSOC %d, bssid: %pM\n",
1011 bss_conf->aid, common->curbssid);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301012
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301013 /* New association, store aid */
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001014 common->curaid = bss_conf->aid;
Luis R. Rodriguezf2b21432009-09-10 08:50:20 -07001015 ath9k_hw_write_associd(ah);
Jouni Malinenccdfeab2009-05-20 21:59:08 +03001016
Senthil Balasubramanian2664f202009-06-24 18:56:39 +05301017 /*
1018 * Request a re-configuration of Beacon related timers
1019 * on the receipt of the first Beacon frame (i.e.,
1020 * after time sync with the AP).
1021 */
1022 sc->sc_flags |= SC_OP_BEACON_SYNC;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301023
1024 /* Configure the beacon */
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02001025 ath_beacon_config(sc, vif);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301026
1027 /* Reset rssi stats */
Vasanthakumar Thiagarajan22e66a42009-08-19 16:23:40 +05301028 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301029
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08001030 ath_start_ani(common);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301031 } else {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001032 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001033 common->curaid = 0;
Senthil Balasubramanianf38faa32009-06-24 18:56:40 +05301034 /* Stop ANI */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08001035 del_timer_sync(&common->ani.timer);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301036 }
1037}
1038
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301039/********************************/
1040/* LED functions */
1041/********************************/
1042
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301043static void ath_led_blink_work(struct work_struct *work)
1044{
1045 struct ath_softc *sc = container_of(work, struct ath_softc,
1046 ath_led_blink_work.work);
1047
1048 if (!(sc->sc_flags & SC_OP_LED_ASSOCIATED))
1049 return;
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +05301050
1051 if ((sc->led_on_duration == ATH_LED_ON_DURATION_IDLE) ||
1052 (sc->led_off_duration == ATH_LED_OFF_DURATION_IDLE))
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301053 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +05301054 else
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301055 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin,
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +05301056 (sc->sc_flags & SC_OP_LED_ON) ? 1 : 0);
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301057
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04001058 ieee80211_queue_delayed_work(sc->hw,
1059 &sc->ath_led_blink_work,
1060 (sc->sc_flags & SC_OP_LED_ON) ?
1061 msecs_to_jiffies(sc->led_off_duration) :
1062 msecs_to_jiffies(sc->led_on_duration));
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301063
Vasanthakumar Thiagarajan85067c02009-03-14 19:59:41 +05301064 sc->led_on_duration = sc->led_on_cnt ?
1065 max((ATH_LED_ON_DURATION_IDLE - sc->led_on_cnt), 25) :
1066 ATH_LED_ON_DURATION_IDLE;
1067 sc->led_off_duration = sc->led_off_cnt ?
1068 max((ATH_LED_OFF_DURATION_IDLE - sc->led_off_cnt), 10) :
1069 ATH_LED_OFF_DURATION_IDLE;
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301070 sc->led_on_cnt = sc->led_off_cnt = 0;
1071 if (sc->sc_flags & SC_OP_LED_ON)
1072 sc->sc_flags &= ~SC_OP_LED_ON;
1073 else
1074 sc->sc_flags |= SC_OP_LED_ON;
1075}
1076
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301077static void ath_led_brightness(struct led_classdev *led_cdev,
1078 enum led_brightness brightness)
1079{
1080 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
1081 struct ath_softc *sc = led->sc;
1082
1083 switch (brightness) {
1084 case LED_OFF:
1085 if (led->led_type == ATH_LED_ASSOC ||
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301086 led->led_type == ATH_LED_RADIO) {
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301087 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin,
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301088 (led->led_type == ATH_LED_RADIO));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301089 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301090 if (led->led_type == ATH_LED_RADIO)
1091 sc->sc_flags &= ~SC_OP_LED_ON;
1092 } else {
1093 sc->led_off_cnt++;
1094 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301095 break;
1096 case LED_FULL:
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301097 if (led->led_type == ATH_LED_ASSOC) {
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301098 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04001099 ieee80211_queue_delayed_work(sc->hw,
1100 &sc->ath_led_blink_work, 0);
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301101 } else if (led->led_type == ATH_LED_RADIO) {
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301102 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301103 sc->sc_flags |= SC_OP_LED_ON;
1104 } else {
1105 sc->led_on_cnt++;
1106 }
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301107 break;
1108 default:
1109 break;
1110 }
1111}
1112
1113static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
1114 char *trigger)
1115{
1116 int ret;
1117
1118 led->sc = sc;
1119 led->led_cdev.name = led->name;
1120 led->led_cdev.default_trigger = trigger;
1121 led->led_cdev.brightness_set = ath_led_brightness;
1122
1123 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
1124 if (ret)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001125 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1126 "Failed to register led:%s", led->name);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301127 else
1128 led->registered = 1;
1129 return ret;
1130}
1131
1132static void ath_unregister_led(struct ath_led *led)
1133{
1134 if (led->registered) {
1135 led_classdev_unregister(&led->led_cdev);
1136 led->registered = 0;
1137 }
1138}
1139
1140static void ath_deinit_leds(struct ath_softc *sc)
1141{
1142 ath_unregister_led(&sc->assoc_led);
1143 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
1144 ath_unregister_led(&sc->tx_led);
1145 ath_unregister_led(&sc->rx_led);
1146 ath_unregister_led(&sc->radio_led);
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301147 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301148}
1149
1150static void ath_init_leds(struct ath_softc *sc)
1151{
1152 char *trigger;
1153 int ret;
1154
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301155 if (AR_SREV_9287(sc->sc_ah))
1156 sc->sc_ah->led_pin = ATH_LED_PIN_9287;
1157 else
1158 sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
1159
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301160 /* Configure gpio 1 for output */
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301161 ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301162 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1163 /* LED off, active low */
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301164 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301165
Vasanthakumar Thiagarajanf2bffa72009-01-29 17:52:19 +05301166 INIT_DELAYED_WORK(&sc->ath_led_blink_work, ath_led_blink_work);
1167
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301168 trigger = ieee80211_get_radio_led_name(sc->hw);
1169 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001170 "ath9k-%s::radio", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301171 ret = ath_register_led(sc, &sc->radio_led, trigger);
1172 sc->radio_led.led_type = ATH_LED_RADIO;
1173 if (ret)
1174 goto fail;
1175
1176 trigger = ieee80211_get_assoc_led_name(sc->hw);
1177 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001178 "ath9k-%s::assoc", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301179 ret = ath_register_led(sc, &sc->assoc_led, trigger);
1180 sc->assoc_led.led_type = ATH_LED_ASSOC;
1181 if (ret)
1182 goto fail;
1183
1184 trigger = ieee80211_get_tx_led_name(sc->hw);
1185 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001186 "ath9k-%s::tx", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301187 ret = ath_register_led(sc, &sc->tx_led, trigger);
1188 sc->tx_led.led_type = ATH_LED_TX;
1189 if (ret)
1190 goto fail;
1191
1192 trigger = ieee80211_get_rx_led_name(sc->hw);
1193 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
Danny Kukawka0818cb82009-01-31 15:52:09 +01001194 "ath9k-%s::rx", wiphy_name(sc->hw->wiphy));
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301195 ret = ath_register_led(sc, &sc->rx_led, trigger);
1196 sc->rx_led.led_type = ATH_LED_RX;
1197 if (ret)
1198 goto fail;
1199
1200 return;
1201
1202fail:
Luis R. Rodriguez35c95ab2009-07-27 11:53:03 -07001203 cancel_delayed_work_sync(&sc->ath_led_blink_work);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301204 ath_deinit_leds(sc);
1205}
1206
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001207void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301208{
Sujithcbe61d82009-02-09 13:27:12 +05301209 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001210 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001211 struct ieee80211_channel *channel = hw->conf.channel;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001212 int r;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301213
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301214 ath9k_ps_wakeup(sc);
Vivek Natarajan93b1b372009-09-17 09:24:58 +05301215 ath9k_hw_configpcipowersave(ah, 0, 0);
Sujithd2f5b3a2009-04-13 21:56:25 +05301216
Vasanthakumar Thiagarajan159cd462009-06-13 14:50:25 +05301217 if (!ah->curchan)
1218 ah->curchan = ath_get_curchannel(sc, sc->hw);
1219
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301220 spin_lock_bh(&sc->sc_resetlock);
Sujith2660b812009-02-09 13:27:26 +05301221 r = ath9k_hw_reset(ah, ah->curchan, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001222 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001223 ath_print(common, ATH_DBG_FATAL,
1224 "Unable to reset channel %u (%uMhz) ",
1225 "reset status %d\n",
1226 channel->center_freq, r);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301227 }
1228 spin_unlock_bh(&sc->sc_resetlock);
1229
1230 ath_update_txpow(sc);
1231 if (ath_startrecv(sc) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001232 ath_print(common, ATH_DBG_FATAL,
1233 "Unable to restart recv logic\n");
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301234 return;
1235 }
1236
1237 if (sc->sc_flags & SC_OP_BEACONS)
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02001238 ath_beacon_config(sc, NULL); /* restart beacons */
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301239
1240 /* Re-Enable interrupts */
Sujith17d79042009-02-09 13:27:03 +05301241 ath9k_hw_set_interrupts(ah, sc->imask);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301242
1243 /* Enable LED */
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301244 ath9k_hw_cfg_output(ah, ah->led_pin,
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301245 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301246 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301247
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001248 ieee80211_wake_queues(hw);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301249 ath9k_ps_restore(sc);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301250}
1251
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001252void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301253{
Sujithcbe61d82009-02-09 13:27:12 +05301254 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001255 struct ieee80211_channel *channel = hw->conf.channel;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001256 int r;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301257
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301258 ath9k_ps_wakeup(sc);
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001259 ieee80211_stop_queues(hw);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301260
1261 /* Disable LED */
Vivek Natarajan08fc5c12009-08-14 11:30:52 +05301262 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
1263 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301264
1265 /* Disable interrupts */
1266 ath9k_hw_set_interrupts(ah, 0);
1267
Sujith043a0402009-01-16 21:38:47 +05301268 ath_drain_all_txq(sc, false); /* clear pending tx frames */
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301269 ath_stoprecv(sc); /* turn off frame recv */
1270 ath_flushrecv(sc); /* flush recv queue */
1271
Vasanthakumar Thiagarajan159cd462009-06-13 14:50:25 +05301272 if (!ah->curchan)
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08001273 ah->curchan = ath_get_curchannel(sc, hw);
Vasanthakumar Thiagarajan159cd462009-06-13 14:50:25 +05301274
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301275 spin_lock_bh(&sc->sc_resetlock);
Sujith2660b812009-02-09 13:27:26 +05301276 r = ath9k_hw_reset(ah, ah->curchan, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001277 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001278 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1279 "Unable to reset channel %u (%uMhz) "
1280 "reset status %d\n",
1281 channel->center_freq, r);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301282 }
1283 spin_unlock_bh(&sc->sc_resetlock);
1284
1285 ath9k_hw_phy_disable(ah);
Vivek Natarajan93b1b372009-09-17 09:24:58 +05301286 ath9k_hw_configpcipowersave(ah, 1, 1);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301287 ath9k_ps_restore(sc);
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -07001288 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301289}
1290
Gabor Juhos5077fd32009-03-06 11:17:55 +01001291/*******************/
1292/* Rfkill */
1293/*******************/
1294
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301295static bool ath_is_rfkill_set(struct ath_softc *sc)
1296{
Sujithcbe61d82009-02-09 13:27:12 +05301297 struct ath_hw *ah = sc->sc_ah;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301298
Sujith2660b812009-02-09 13:27:26 +05301299 return ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
1300 ah->rfkill_polarity;
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301301}
1302
Johannes Berg3b319aa2009-06-13 14:50:26 +05301303static void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301304{
Johannes Berg3b319aa2009-06-13 14:50:26 +05301305 struct ath_wiphy *aphy = hw->priv;
1306 struct ath_softc *sc = aphy->sc;
1307 bool blocked = !!ath_is_rfkill_set(sc);
1308
1309 wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
Johannes Berg19d337d2009-06-02 13:01:37 +02001310}
1311
Johannes Berg3b319aa2009-06-13 14:50:26 +05301312static void ath_start_rfkill_poll(struct ath_softc *sc)
Johannes Berg19d337d2009-06-02 13:01:37 +02001313{
Johannes Berg3b319aa2009-06-13 14:50:26 +05301314 struct ath_hw *ah = sc->sc_ah;
Johannes Berg19d337d2009-06-02 13:01:37 +02001315
Johannes Berg3b319aa2009-06-13 14:50:26 +05301316 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1317 wiphy_rfkill_start_polling(sc->hw->wiphy);
Vasanthakumar Thiagarajan500c0642008-09-10 18:50:17 +05301318}
1319
Luis R. Rodriguez7fda1662009-10-06 21:19:08 -04001320static void ath9k_uninit_hw(struct ath_softc *sc)
1321{
1322 struct ath_hw *ah = sc->sc_ah;
1323
1324 BUG_ON(!ah);
1325
1326 ath9k_exit_debug(ah);
1327 ath9k_hw_detach(ah);
1328 sc->sc_ah = NULL;
1329}
1330
Luis R. Rodriguez25688352009-10-06 21:19:09 -04001331static void ath_clean_core(struct ath_softc *sc)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301332{
1333 struct ieee80211_hw *hw = sc->hw;
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001334 struct ath_hw *ah = sc->sc_ah;
Sujith9c84b792008-10-29 10:17:13 +05301335 int i = 0;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301336
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301337 ath9k_ps_wakeup(sc);
1338
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001339 dev_dbg(sc->dev, "Detach ATH hw\n");
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301340
Luis R. Rodriguez35c95ab2009-07-27 11:53:03 -07001341 ath_deinit_leds(sc);
Sujithe31f7b92009-09-23 13:49:12 +05301342 wiphy_rfkill_stop_polling(sc->hw->wiphy);
Luis R. Rodriguez35c95ab2009-07-27 11:53:03 -07001343
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001344 for (i = 0; i < sc->num_sec_wiphy; i++) {
1345 struct ath_wiphy *aphy = sc->sec_wiphy[i];
1346 if (aphy == NULL)
1347 continue;
1348 sc->sec_wiphy[i] = NULL;
1349 ieee80211_unregister_hw(aphy->hw);
1350 ieee80211_free_hw(aphy->hw);
1351 }
Vasanthakumar Thiagarajan3fcdfb42008-11-18 01:19:56 +05301352 ieee80211_unregister_hw(hw);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301353 ath_rx_cleanup(sc);
1354 ath_tx_cleanup(sc);
1355
Sujith9c84b792008-10-29 10:17:13 +05301356 tasklet_kill(&sc->intr_tq);
1357 tasklet_kill(&sc->bcon_tasklet);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301358
Sujith9c84b792008-10-29 10:17:13 +05301359 if (!(sc->sc_flags & SC_OP_INVALID))
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -07001360 ath9k_setpower(sc, ATH9K_PM_AWAKE);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301361
Sujith9c84b792008-10-29 10:17:13 +05301362 /* cleanup tx queues */
1363 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1364 if (ATH_TXQ_SETUP(sc, i))
Sujithb77f4832008-12-07 21:44:03 +05301365 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
Sujith9c84b792008-10-29 10:17:13 +05301366
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001367 if ((sc->btcoex.no_stomp_timer) &&
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07001368 ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001369 ath_gen_timer_free(ah, sc->btcoex.no_stomp_timer);
Luis R. Rodriguez25688352009-10-06 21:19:09 -04001370}
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05301371
Luis R. Rodriguez25688352009-10-06 21:19:09 -04001372void ath_detach(struct ath_softc *sc)
1373{
1374 ath_clean_core(sc);
Luis R. Rodriguez7fda1662009-10-06 21:19:08 -04001375 ath9k_uninit_hw(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301376}
1377
Luis R. Rodriguezbd96d392009-10-06 21:19:10 -04001378void ath_cleanup(struct ath_softc *sc)
1379{
1380 struct ath_hw *ah = sc->sc_ah;
1381 struct ath_common *common = ath9k_hw_common(ah);
1382
1383 ath_clean_core(sc);
1384 free_irq(sc->irq, sc);
1385 ath_bus_cleanup(common);
1386 kfree(sc->sec_wiphy);
1387 ieee80211_free_hw(sc->hw);
1388
1389 ath9k_uninit_hw(sc);
1390}
1391
Bob Copelande3bb2492009-03-30 22:30:30 -04001392static int ath9k_reg_notifier(struct wiphy *wiphy,
1393 struct regulatory_request *request)
1394{
1395 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
1396 struct ath_wiphy *aphy = hw->priv;
1397 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001398 struct ath_regulatory *reg = ath9k_hw_regulatory(sc->sc_ah);
Bob Copelande3bb2492009-03-30 22:30:30 -04001399
1400 return ath_reg_notifier_apply(wiphy, request, reg);
1401}
1402
Luis R. Rodriguez1e40bcf2009-08-03 12:24:47 -07001403/*
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001404 * Detects if there is any priority bt traffic
1405 */
1406static void ath_detect_bt_priority(struct ath_softc *sc)
1407{
1408 struct ath_btcoex *btcoex = &sc->btcoex;
1409 struct ath_hw *ah = sc->sc_ah;
1410
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07001411 if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio))
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001412 btcoex->bt_priority_cnt++;
1413
1414 if (time_after(jiffies, btcoex->bt_priority_time +
1415 msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
1416 if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001417 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX,
1418 "BT priority traffic detected");
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001419 sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED;
1420 } else {
1421 sc->sc_flags &= ~SC_OP_BT_PRIORITY_DETECTED;
1422 }
1423
1424 btcoex->bt_priority_cnt = 0;
1425 btcoex->bt_priority_time = jiffies;
1426 }
1427}
1428
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001429/*
1430 * Configures appropriate weight based on stomp type.
1431 */
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001432static void ath9k_btcoex_bt_stomp(struct ath_softc *sc,
1433 enum ath_stomp_type stomp_type)
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001434{
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001435 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001436
1437 switch (stomp_type) {
1438 case ATH_BTCOEX_STOMP_ALL:
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001439 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1440 AR_STOMP_ALL_WLAN_WGHT);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001441 break;
1442 case ATH_BTCOEX_STOMP_LOW:
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001443 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1444 AR_STOMP_LOW_WLAN_WGHT);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001445 break;
1446 case ATH_BTCOEX_STOMP_NONE:
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001447 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1448 AR_STOMP_NONE_WLAN_WGHT);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001449 break;
1450 default:
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001451 ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
1452 "Invalid Stomptype\n");
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001453 break;
1454 }
1455
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001456 ath9k_hw_btcoex_enable(ah);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001457}
1458
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001459static void ath9k_gen_timer_start(struct ath_hw *ah,
1460 struct ath_gen_timer *timer,
1461 u32 timer_next,
1462 u32 timer_period)
1463{
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001464 struct ath_common *common = ath9k_hw_common(ah);
1465 struct ath_softc *sc = (struct ath_softc *) common->priv;
1466
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001467 ath9k_hw_gen_timer_start(ah, timer, timer_next, timer_period);
1468
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001469 if ((sc->imask & ATH9K_INT_GENTIMER) == 0) {
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001470 ath9k_hw_set_interrupts(ah, 0);
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001471 sc->imask |= ATH9K_INT_GENTIMER;
1472 ath9k_hw_set_interrupts(ah, sc->imask);
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001473 }
1474}
1475
1476static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
1477{
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001478 struct ath_common *common = ath9k_hw_common(ah);
1479 struct ath_softc *sc = (struct ath_softc *) common->priv;
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001480 struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
1481
1482 ath9k_hw_gen_timer_stop(ah, timer);
1483
1484 /* if no timer is enabled, turn off interrupt mask */
1485 if (timer_table->timer_mask.val == 0) {
1486 ath9k_hw_set_interrupts(ah, 0);
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001487 sc->imask &= ~ATH9K_INT_GENTIMER;
1488 ath9k_hw_set_interrupts(ah, sc->imask);
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001489 }
1490}
1491
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001492/*
1493 * This is the master bt coex timer which runs for every
1494 * 45ms, bt traffic will be given priority during 55% of this
1495 * period while wlan gets remaining 45%
1496 */
1497static void ath_btcoex_period_timer(unsigned long data)
1498{
1499 struct ath_softc *sc = (struct ath_softc *) data;
1500 struct ath_hw *ah = sc->sc_ah;
1501 struct ath_btcoex *btcoex = &sc->btcoex;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001502
1503 ath_detect_bt_priority(sc);
1504
1505 spin_lock_bh(&btcoex->btcoex_lock);
1506
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001507 ath9k_btcoex_bt_stomp(sc, btcoex->bt_stomp_type);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001508
1509 spin_unlock_bh(&btcoex->btcoex_lock);
1510
1511 if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) {
1512 if (btcoex->hw_timer_enabled)
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001513 ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001514
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07001515 ath9k_gen_timer_start(ah,
1516 btcoex->no_stomp_timer,
1517 (ath9k_hw_gettsf32(ah) +
1518 btcoex->btcoex_no_stomp),
1519 btcoex->btcoex_no_stomp * 10);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001520 btcoex->hw_timer_enabled = true;
1521 }
1522
1523 mod_timer(&btcoex->period_timer, jiffies +
1524 msecs_to_jiffies(ATH_BTCOEX_DEF_BT_PERIOD));
1525}
1526
1527/*
1528 * Generic tsf based hw timer which configures weight
1529 * registers to time slice between wlan and bt traffic
1530 */
1531static void ath_btcoex_no_stomp_timer(void *arg)
1532{
1533 struct ath_softc *sc = (struct ath_softc *)arg;
1534 struct ath_hw *ah = sc->sc_ah;
1535 struct ath_btcoex *btcoex = &sc->btcoex;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001536
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001537 ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
1538 "no stomp timer running \n");
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001539
1540 spin_lock_bh(&btcoex->btcoex_lock);
1541
Luis R. Rodrigueze08a6ac2009-09-09 14:26:15 -07001542 if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW)
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001543 ath9k_btcoex_bt_stomp(sc, ATH_BTCOEX_STOMP_NONE);
Luis R. Rodrigueze08a6ac2009-09-09 14:26:15 -07001544 else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
Luis R. Rodriguez269ad812009-09-09 15:05:00 -07001545 ath9k_btcoex_bt_stomp(sc, ATH_BTCOEX_STOMP_LOW);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001546
1547 spin_unlock_bh(&btcoex->btcoex_lock);
1548}
1549
1550static int ath_init_btcoex_timer(struct ath_softc *sc)
1551{
1552 struct ath_btcoex *btcoex = &sc->btcoex;
1553
1554 btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD * 1000;
1555 btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) *
1556 btcoex->btcoex_period / 100;
1557
1558 setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
1559 (unsigned long) sc);
1560
1561 spin_lock_init(&btcoex->btcoex_lock);
1562
1563 btcoex->no_stomp_timer = ath_gen_timer_alloc(sc->sc_ah,
1564 ath_btcoex_no_stomp_timer,
1565 ath_btcoex_no_stomp_timer,
1566 (void *) sc, AR_FIRST_NDP_TIMER);
1567
1568 if (!btcoex->no_stomp_timer)
1569 return -ENOMEM;
1570
1571 return 0;
1572}
1573
1574/*
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001575 * Read and write, they both share the same lock. We do this to serialize
1576 * reads and writes on Atheros 802.11n PCI devices only. This is required
1577 * as the FIFO on these devices can only accept sanely 2 requests. After
1578 * that the device goes bananas. Serializing the reads/writes prevents this
1579 * from happening.
1580 */
1581
1582static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
1583{
1584 struct ath_hw *ah = (struct ath_hw *) hw_priv;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001585 struct ath_common *common = ath9k_hw_common(ah);
1586 struct ath_softc *sc = (struct ath_softc *) common->priv;
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001587
1588 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
1589 unsigned long flags;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001590 spin_lock_irqsave(&sc->sc_serial_rw, flags);
1591 iowrite32(val, sc->mem + reg_offset);
1592 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001593 } else
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001594 iowrite32(val, sc->mem + reg_offset);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001595}
1596
1597static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset)
1598{
1599 struct ath_hw *ah = (struct ath_hw *) hw_priv;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001600 struct ath_common *common = ath9k_hw_common(ah);
1601 struct ath_softc *sc = (struct ath_softc *) common->priv;
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001602 u32 val;
1603
1604 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
1605 unsigned long flags;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001606 spin_lock_irqsave(&sc->sc_serial_rw, flags);
1607 val = ioread32(sc->mem + reg_offset);
1608 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001609 } else
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001610 val = ioread32(sc->mem + reg_offset);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001611 return val;
1612}
1613
Luis R. Rodriguez2ddb5c82009-09-14 02:09:38 -07001614static const struct ath_ops ath9k_common_ops = {
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001615 .read = ath9k_ioread32,
1616 .write = ath9k_iowrite32,
1617};
1618
1619/*
Luis R. Rodriguez1e40bcf2009-08-03 12:24:47 -07001620 * Initialize and fill ath_softc, ath_sofct is the
1621 * "Software Carrier" struct. Historically it has existed
1622 * to allow the separation between hardware specific
1623 * variables (now in ath_hw) and driver specific variables.
1624 */
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001625static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
1626 const struct ath_bus_ops *bus_ops)
Sujithff37e332008-11-24 12:07:55 +05301627{
Sujithcbe61d82009-02-09 13:27:12 +05301628 struct ath_hw *ah = NULL;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001629 struct ath_common *common;
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001630 int r = 0, i;
Sujithff37e332008-11-24 12:07:55 +05301631 int csz = 0;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001632 int qnum;
Sujithff37e332008-11-24 12:07:55 +05301633
1634 /* XXX: hardware will not be ready until ath_open() being called */
1635 sc->sc_flags |= SC_OP_INVALID;
Sujith88b126a2008-11-28 22:19:02 +05301636
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001637 spin_lock_init(&sc->wiphy_lock);
Sujithff37e332008-11-24 12:07:55 +05301638 spin_lock_init(&sc->sc_resetlock);
Luis R. Rodriguez61584252009-03-12 18:18:49 -04001639 spin_lock_init(&sc->sc_serial_rw);
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05301640 spin_lock_init(&sc->ani_lock);
Gabor Juhos04717cc2009-07-14 20:17:13 -04001641 spin_lock_init(&sc->sc_pm_lock);
Sujithaa33de02008-12-18 11:40:16 +05301642 mutex_init(&sc->mutex);
Sujithff37e332008-11-24 12:07:55 +05301643 tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
Sujith9fc9ab02009-03-03 10:16:51 +05301644 tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
Sujithff37e332008-11-24 12:07:55 +05301645 (unsigned long)sc);
1646
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001647 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
Luis R. Rodriguez211f5852009-10-06 21:19:07 -04001648 if (!ah)
1649 return -ENOMEM;
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001650
Luis R. Rodriguez8df5d1b2009-08-03 12:24:37 -07001651 ah->hw_version.devid = devid;
Vasanthakumar Thiagarajanaeac3552009-09-09 15:25:49 +05301652 ah->hw_version.subsysid = subsysid;
Luis R. Rodrigueze1e2f932009-08-03 12:24:38 -07001653 sc->sc_ah = ah;
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001654
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001655 common = ath9k_hw_common(ah);
Luis R. Rodriguez9e4bffd2009-09-10 16:11:21 -07001656 common->ops = &ath9k_common_ops;
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001657 common->bus_ops = bus_ops;
Luis R. Rodriguez13b81552009-09-10 17:52:45 -07001658 common->ah = ah;
Luis R. Rodriguezb002a4a2009-09-13 00:03:27 -07001659 common->hw = sc->hw;
Luis R. Rodriguezbc974f42009-09-28 02:54:40 -04001660 common->priv = sc;
Luis R. Rodriguezfaa27fa2009-10-06 21:19:06 -04001661 common->debug_mask = ath9k_debug;
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001662
1663 /*
1664 * Cache line size is used to size and align various
1665 * structures used to communicate with the hardware.
1666 */
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001667 ath_read_cachesize(common, &csz);
Luis R. Rodriguez27c51f12009-09-10 11:08:14 -07001668 /* XXX assert csz is non-zero */
1669 common->cachelsz = csz << 2; /* convert to bytes */
1670
Luis R. Rodriguezf637cfd2009-08-03 12:24:46 -07001671 r = ath9k_hw_init(ah);
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001672 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001673 ath_print(common, ATH_DBG_FATAL,
1674 "Unable to initialize hardware; "
1675 "initialization status: %d\n", r);
Luis R. Rodriguez211f5852009-10-06 21:19:07 -04001676 goto bad_free_hw;
1677 }
1678
1679 if (ath9k_init_debug(ah) < 0) {
1680 ath_print(common, ATH_DBG_FATAL,
1681 "Unable to create debugfs files\n");
1682 goto bad_free_hw;
Sujithff37e332008-11-24 12:07:55 +05301683 }
Sujithff37e332008-11-24 12:07:55 +05301684
1685 /* Get the hardware key cache size. */
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -08001686 common->keymax = ah->caps.keycache_size;
1687 if (common->keymax > ATH_KEYMAX) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001688 ath_print(common, ATH_DBG_ANY,
1689 "Warning, using only %u entries in %u key cache\n",
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -08001690 ATH_KEYMAX, common->keymax);
1691 common->keymax = ATH_KEYMAX;
Sujithff37e332008-11-24 12:07:55 +05301692 }
1693
1694 /*
1695 * Reset the key cache since some parts do not
1696 * reset the contents on initial power up.
1697 */
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -08001698 for (i = 0; i < common->keymax; i++)
Sujithff37e332008-11-24 12:07:55 +05301699 ath9k_hw_keyreset(ah, (u16) i);
Sujithff37e332008-11-24 12:07:55 +05301700
Sujithff37e332008-11-24 12:07:55 +05301701 /* default to MONITOR mode */
Sujith2660b812009-02-09 13:27:26 +05301702 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
Colin McCabed97809d2008-12-01 13:38:55 -08001703
Sujithff37e332008-11-24 12:07:55 +05301704 /* Setup rate tables */
1705
1706 ath_rate_attach(sc);
1707 ath_setup_rates(sc, IEEE80211_BAND_2GHZ);
1708 ath_setup_rates(sc, IEEE80211_BAND_5GHZ);
1709
1710 /*
1711 * Allocate hardware transmit queues: one queue for
1712 * beacon frames and one data queue for each QoS
1713 * priority. Note that the hal handles reseting
1714 * these queues at the needed time.
1715 */
Luis R. Rodriguez536b3a72009-10-06 21:19:11 -04001716 sc->beacon.beaconq = ath9k_hw_beaconq_setup(ah);
Sujithb77f4832008-12-07 21:44:03 +05301717 if (sc->beacon.beaconq == -1) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001718 ath_print(common, ATH_DBG_FATAL,
1719 "Unable to setup a beacon xmit queue\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001720 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301721 goto bad2;
1722 }
Sujithb77f4832008-12-07 21:44:03 +05301723 sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
1724 if (sc->beacon.cabq == NULL) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001725 ath_print(common, ATH_DBG_FATAL,
1726 "Unable to setup CAB xmit queue\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001727 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301728 goto bad2;
1729 }
1730
Sujith17d79042009-02-09 13:27:03 +05301731 sc->config.cabqReadytime = ATH_CABQ_READY_TIME;
Sujithff37e332008-11-24 12:07:55 +05301732 ath_cabq_update(sc);
1733
Sujithb77f4832008-12-07 21:44:03 +05301734 for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++)
1735 sc->tx.hwq_map[i] = -1;
Sujithff37e332008-11-24 12:07:55 +05301736
1737 /* Setup data queues */
1738 /* NB: ensure BK queue is the lowest priority h/w queue */
1739 if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001740 ath_print(common, ATH_DBG_FATAL,
1741 "Unable to setup xmit queue for BK traffic\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001742 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301743 goto bad2;
1744 }
1745
1746 if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001747 ath_print(common, ATH_DBG_FATAL,
1748 "Unable to setup xmit queue for BE traffic\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001749 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301750 goto bad2;
1751 }
1752 if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001753 ath_print(common, ATH_DBG_FATAL,
1754 "Unable to setup xmit queue for VI traffic\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001755 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301756 goto bad2;
1757 }
1758 if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001759 ath_print(common, ATH_DBG_FATAL,
1760 "Unable to setup xmit queue for VO traffic\n");
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001761 r = -EIO;
Sujithff37e332008-11-24 12:07:55 +05301762 goto bad2;
1763 }
1764
1765 /* Initializes the noise floor to a reasonable default value.
1766 * Later on this will be updated during ANI processing. */
1767
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08001768 common->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR;
1769 setup_timer(&common->ani.timer, ath_ani_calibrate, (unsigned long)sc);
Sujithff37e332008-11-24 12:07:55 +05301770
1771 if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1772 ATH9K_CIPHER_TKIP, NULL)) {
1773 /*
1774 * Whether we should enable h/w TKIP MIC.
1775 * XXX: if we don't support WME TKIP MIC, then we wouldn't
1776 * report WMM capable, so it's always safe to turn on
1777 * TKIP MIC in this case.
1778 */
1779 ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_TKIP_MIC,
1780 0, 1, NULL);
1781 }
1782
1783 /*
1784 * Check whether the separate key cache entries
1785 * are required to handle both tx+rx MIC keys.
1786 * With split mic keys the number of stations is limited
1787 * to 27 otherwise 59.
1788 */
1789 if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1790 ATH9K_CIPHER_TKIP, NULL)
1791 && ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1792 ATH9K_CIPHER_MIC, NULL)
1793 && ath9k_hw_getcapability(ah, ATH9K_CAP_TKIP_SPLIT,
1794 0, NULL))
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -08001795 common->splitmic = 1;
Sujithff37e332008-11-24 12:07:55 +05301796
1797 /* turn on mcast key search if possible */
1798 if (!ath9k_hw_getcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
1799 (void)ath9k_hw_setcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 1,
1800 1, NULL);
1801
Sujith17d79042009-02-09 13:27:03 +05301802 sc->config.txpowlimit = ATH_TXPOWER_MAX;
Sujithff37e332008-11-24 12:07:55 +05301803
1804 /* 11n Capabilities */
Sujith2660b812009-02-09 13:27:26 +05301805 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
Sujithff37e332008-11-24 12:07:55 +05301806 sc->sc_flags |= SC_OP_TXAGGR;
1807 sc->sc_flags |= SC_OP_RXAGGR;
1808 }
1809
Luis R. Rodriguez43c27612009-09-13 21:07:07 -07001810 common->tx_chainmask = ah->caps.tx_chainmask;
1811 common->rx_chainmask = ah->caps.rx_chainmask;
Sujithff37e332008-11-24 12:07:55 +05301812
1813 ath9k_hw_setcapability(ah, ATH9K_CAP_DIVERSITY, 1, true, NULL);
Sujithb77f4832008-12-07 21:44:03 +05301814 sc->rx.defant = ath9k_hw_getdefantenna(ah);
Sujithff37e332008-11-24 12:07:55 +05301815
Jouni Malinen8ca21f02009-03-03 19:23:27 +02001816 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001817 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
Sujithff37e332008-11-24 12:07:55 +05301818
Sujithb77f4832008-12-07 21:44:03 +05301819 sc->beacon.slottime = ATH9K_SLOT_TIME_9; /* default to short slot time */
Sujithff37e332008-11-24 12:07:55 +05301820
1821 /* initialize beacon slots */
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001822 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02001823 sc->beacon.bslot[i] = NULL;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001824 sc->beacon.bslot_aphy[i] = NULL;
1825 }
Sujithff37e332008-11-24 12:07:55 +05301826
Sujithff37e332008-11-24 12:07:55 +05301827 /* setup channels and rates */
1828
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001829 sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable;
Sujithff37e332008-11-24 12:07:55 +05301830 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1831 sc->rates[IEEE80211_BAND_2GHZ];
1832 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001833 sc->sbands[IEEE80211_BAND_2GHZ].n_channels =
1834 ARRAY_SIZE(ath9k_2ghz_chantable);
Sujithff37e332008-11-24 12:07:55 +05301835
Sujith2660b812009-02-09 13:27:26 +05301836 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) {
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001837 sc->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_chantable;
Sujithff37e332008-11-24 12:07:55 +05301838 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1839 sc->rates[IEEE80211_BAND_5GHZ];
1840 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001841 sc->sbands[IEEE80211_BAND_5GHZ].n_channels =
1842 ARRAY_SIZE(ath9k_5ghz_chantable);
Sujithff37e332008-11-24 12:07:55 +05301843 }
1844
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07001845 switch (ah->btcoex_hw.scheme) {
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001846 case ATH_BTCOEX_CFG_NONE:
1847 break;
1848 case ATH_BTCOEX_CFG_2WIRE:
1849 ath9k_hw_btcoex_init_2wire(ah);
1850 break;
1851 case ATH_BTCOEX_CFG_3WIRE:
1852 ath9k_hw_btcoex_init_3wire(ah);
1853 r = ath_init_btcoex_timer(sc);
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05301854 if (r)
1855 goto bad2;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001856 qnum = ath_tx_get_qnum(sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07001857 ath9k_hw_init_btcoex_hw(ah, qnum);
Luis R. Rodrigueze08a6ac2009-09-09 14:26:15 -07001858 sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07001859 break;
1860 default:
1861 WARN_ON(1);
1862 break;
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05301863 }
Vasanthakumar Thiagarajanc97c92d2009-01-02 15:35:46 +05301864
Sujithff37e332008-11-24 12:07:55 +05301865 return 0;
1866bad2:
1867 /* cleanup tx queues */
1868 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1869 if (ATH_TXQ_SETUP(sc, i))
Sujithb77f4832008-12-07 21:44:03 +05301870 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
Sujithff37e332008-11-24 12:07:55 +05301871
Luis R. Rodriguez211f5852009-10-06 21:19:07 -04001872bad_free_hw:
Luis R. Rodriguez7fda1662009-10-06 21:19:08 -04001873 ath9k_uninit_hw(sc);
Luis R. Rodriguez4f3acf82009-08-03 12:24:36 -07001874 return r;
Sujithff37e332008-11-24 12:07:55 +05301875}
1876
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001877void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301878{
Sujith9c84b792008-10-29 10:17:13 +05301879 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1880 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1881 IEEE80211_HW_SIGNAL_DBM |
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05301882 IEEE80211_HW_AMPDU_AGGREGATION |
1883 IEEE80211_HW_SUPPORTS_PS |
Sujitheeee1322009-03-10 10:39:53 +05301884 IEEE80211_HW_PS_NULLFUNC_STACK |
1885 IEEE80211_HW_SPECTRUM_MGMT;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301886
Jouni Malinenb3bd89c2009-02-24 13:42:01 +02001887 if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || modparam_nohwcrypt)
Jouni Malinen0ced0e12009-01-08 13:32:13 +02001888 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
1889
Sujith9c84b792008-10-29 10:17:13 +05301890 hw->wiphy->interface_modes =
1891 BIT(NL80211_IFTYPE_AP) |
1892 BIT(NL80211_IFTYPE_STATION) |
Pat Erley9cb54122009-03-20 22:59:59 -04001893 BIT(NL80211_IFTYPE_ADHOC) |
1894 BIT(NL80211_IFTYPE_MESH_POINT);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301895
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301896 hw->queues = 4;
Sujithe63835b2008-11-18 09:07:53 +05301897 hw->max_rates = 4;
Sujith171387e2009-02-17 15:36:25 +05301898 hw->channel_change_time = 5000;
Jouni Malinen465ca842009-03-03 19:23:34 +02001899 hw->max_listen_interval = 10;
Luis R. Rodriguezdd190182009-07-14 20:13:56 -04001900 /* Hardware supports 10 but we use 4 */
1901 hw->max_rate_tries = 4;
Sujith528f0c62008-10-29 10:14:26 +05301902 hw->sta_data_size = sizeof(struct ath_node);
Sujith17d79042009-02-09 13:27:03 +05301903 hw->vif_data_size = sizeof(struct ath_vif);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301904
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301905 hw->rate_control_algorithm = "ath9k_rate_control";
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301906
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001907 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1908 &sc->sbands[IEEE80211_BAND_2GHZ];
1909 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
1910 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1911 &sc->sbands[IEEE80211_BAND_5GHZ];
1912}
1913
Luis R. Rodriguez1e40bcf2009-08-03 12:24:47 -07001914/* Device driver core initialization */
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001915int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
1916 const struct ath_bus_ops *bus_ops)
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001917{
1918 struct ieee80211_hw *hw = sc->hw;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001919 struct ath_common *common;
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001920 struct ath_hw *ah;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001921 int error = 0, i;
Bob Copeland3a702e42009-03-30 22:30:29 -04001922 struct ath_regulatory *reg;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001923
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001924 dev_dbg(sc->dev, "Attach ATH hw\n");
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001925
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07001926 error = ath_init_softc(devid, sc, subsysid, bus_ops);
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001927 if (error != 0)
1928 return error;
1929
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001930 ah = sc->sc_ah;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001931 common = ath9k_hw_common(ah);
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001932
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001933 /* get mac address from hardware and set in mac80211 */
1934
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001935 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
Jouni Malinenc52f33d2009-03-03 19:23:29 +02001936
1937 ath_set_hw_capab(sc, hw);
1938
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001939 error = ath_regd_init(&common->regulatory, sc->hw->wiphy,
Luis R. Rodriguezc26c2e52009-05-19 18:27:11 -04001940 ath9k_reg_notifier);
1941 if (error)
1942 return error;
1943
Luis R. Rodriguez15107182009-09-10 09:22:37 -07001944 reg = &common->regulatory;
Luis R. Rodriguezc26c2e52009-05-19 18:27:11 -04001945
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001946 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
Sujitheb2599c2009-01-23 11:20:44 +05301947 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
Luis R. Rodriguez4d6b2282009-09-07 04:52:26 -07001948 if (test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes))
Sujitheb2599c2009-01-23 11:20:44 +05301949 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
Sujith9c84b792008-10-29 10:17:13 +05301950 }
1951
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301952 /* initialize tx/rx engine */
1953 error = ath_tx_init(sc, ATH_TXBUF);
1954 if (error != 0)
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301955 goto error_attach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301956
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301957 error = ath_rx_init(sc, ATH_RXBUF);
1958 if (error != 0)
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301959 goto error_attach;
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301960
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02001961 INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work);
Jouni Malinenf98c3bd2009-03-03 19:23:39 +02001962 INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work);
1963 sc->wiphy_scheduler_int = msecs_to_jiffies(500);
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02001964
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301965 error = ieee80211_register_hw(hw);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301966
Bob Copeland3a702e42009-03-30 22:30:29 -04001967 if (!ath_is_world_regd(reg)) {
Bob Copelandc02cf372009-03-30 22:30:28 -04001968 error = regulatory_hint(hw->wiphy, reg->alpha2);
Luis R. Rodriguezfe33eb32009-02-21 00:04:30 -05001969 if (error)
1970 goto error_attach;
1971 }
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001972
Senthil Balasubramaniandb93e7b2008-11-13 18:01:08 +05301973 /* Initialize LED control */
1974 ath_init_leds(sc);
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301975
Johannes Berg3b319aa2009-06-13 14:50:26 +05301976 ath_start_rfkill_poll(sc);
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08001977
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301978 return 0;
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301979
1980error_attach:
1981 /* cleanup tx queues */
1982 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1983 if (ATH_TXQ_SETUP(sc, i))
1984 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
1985
Luis R. Rodriguez7fda1662009-10-06 21:19:08 -04001986 ath9k_uninit_hw(sc);
Vasanthakumar Thiagarajan40b130a2009-02-16 13:55:07 +05301987
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +05301988 return error;
1989}
1990
Sujithff37e332008-11-24 12:07:55 +05301991int ath_reset(struct ath_softc *sc, bool retry_tx)
1992{
Sujithcbe61d82009-02-09 13:27:12 +05301993 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07001994 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguez030bb492008-12-23 15:58:37 -08001995 struct ieee80211_hw *hw = sc->hw;
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08001996 int r;
Sujithff37e332008-11-24 12:07:55 +05301997
1998 ath9k_hw_set_interrupts(ah, 0);
Sujith043a0402009-01-16 21:38:47 +05301999 ath_drain_all_txq(sc, retry_tx);
Sujithff37e332008-11-24 12:07:55 +05302000 ath_stoprecv(sc);
2001 ath_flushrecv(sc);
2002
2003 spin_lock_bh(&sc->sc_resetlock);
Sujith2660b812009-02-09 13:27:26 +05302004 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08002005 if (r)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002006 ath_print(common, ATH_DBG_FATAL,
2007 "Unable to reset hardware; reset status %d\n", r);
Sujithff37e332008-11-24 12:07:55 +05302008 spin_unlock_bh(&sc->sc_resetlock);
2009
2010 if (ath_startrecv(sc) != 0)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002011 ath_print(common, ATH_DBG_FATAL,
2012 "Unable to start recv logic\n");
Sujithff37e332008-11-24 12:07:55 +05302013
2014 /*
2015 * We may be doing a reset in response to a request
2016 * that changes the channel so update any state that
2017 * might change as a result.
2018 */
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -08002019 ath_cache_conf_rate(sc, &hw->conf);
Sujithff37e332008-11-24 12:07:55 +05302020
2021 ath_update_txpow(sc);
2022
2023 if (sc->sc_flags & SC_OP_BEACONS)
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002024 ath_beacon_config(sc, NULL); /* restart beacons */
Sujithff37e332008-11-24 12:07:55 +05302025
Sujith17d79042009-02-09 13:27:03 +05302026 ath9k_hw_set_interrupts(ah, sc->imask);
Sujithff37e332008-11-24 12:07:55 +05302027
2028 if (retry_tx) {
2029 int i;
2030 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2031 if (ATH_TXQ_SETUP(sc, i)) {
Sujithb77f4832008-12-07 21:44:03 +05302032 spin_lock_bh(&sc->tx.txq[i].axq_lock);
2033 ath_txq_schedule(sc, &sc->tx.txq[i]);
2034 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
Sujithff37e332008-11-24 12:07:55 +05302035 }
2036 }
2037 }
2038
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08002039 return r;
Sujithff37e332008-11-24 12:07:55 +05302040}
2041
2042/*
2043 * This function will allocate both the DMA descriptor structure, and the
2044 * buffers it contains. These are used to contain the descriptors used
2045 * by the system.
2046*/
2047int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
2048 struct list_head *head, const char *name,
2049 int nbuf, int ndesc)
2050{
2051#define DS2PHYS(_dd, _ds) \
2052 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
2053#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
2054#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002055 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujithff37e332008-11-24 12:07:55 +05302056 struct ath_desc *ds;
2057 struct ath_buf *bf;
2058 int i, bsize, error;
2059
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002060 ath_print(common, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n",
2061 name, nbuf, ndesc);
Sujithff37e332008-11-24 12:07:55 +05302062
Senthil Balasubramanianb03a9db2009-03-06 11:24:09 +05302063 INIT_LIST_HEAD(head);
Sujithff37e332008-11-24 12:07:55 +05302064 /* ath_desc must be a multiple of DWORDs */
2065 if ((sizeof(struct ath_desc) % 4) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002066 ath_print(common, ATH_DBG_FATAL,
2067 "ath_desc not DWORD aligned\n");
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -07002068 BUG_ON((sizeof(struct ath_desc) % 4) != 0);
Sujithff37e332008-11-24 12:07:55 +05302069 error = -ENOMEM;
2070 goto fail;
2071 }
2072
Sujithff37e332008-11-24 12:07:55 +05302073 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc;
2074
2075 /*
2076 * Need additional DMA memory because we can't use
2077 * descriptors that cross the 4K page boundary. Assume
2078 * one skipped descriptor per 4K page.
2079 */
Sujith2660b812009-02-09 13:27:26 +05302080 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) {
Sujithff37e332008-11-24 12:07:55 +05302081 u32 ndesc_skipped =
2082 ATH_DESC_4KB_BOUND_NUM_SKIPPED(dd->dd_desc_len);
2083 u32 dma_len;
2084
2085 while (ndesc_skipped) {
2086 dma_len = ndesc_skipped * sizeof(struct ath_desc);
2087 dd->dd_desc_len += dma_len;
2088
2089 ndesc_skipped = ATH_DESC_4KB_BOUND_NUM_SKIPPED(dma_len);
2090 };
2091 }
2092
2093 /* allocate descriptors */
Gabor Juhos7da3c552009-01-14 20:17:03 +01002094 dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len,
Senthil Balasubramanianf0e6ce12009-03-06 11:24:08 +05302095 &dd->dd_desc_paddr, GFP_KERNEL);
Sujithff37e332008-11-24 12:07:55 +05302096 if (dd->dd_desc == NULL) {
2097 error = -ENOMEM;
2098 goto fail;
2099 }
2100 ds = dd->dd_desc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002101 ath_print(common, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
2102 name, ds, (u32) dd->dd_desc_len,
2103 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
Sujithff37e332008-11-24 12:07:55 +05302104
2105 /* allocate buffers */
2106 bsize = sizeof(struct ath_buf) * nbuf;
Senthil Balasubramanianf0e6ce12009-03-06 11:24:08 +05302107 bf = kzalloc(bsize, GFP_KERNEL);
Sujithff37e332008-11-24 12:07:55 +05302108 if (bf == NULL) {
2109 error = -ENOMEM;
2110 goto fail2;
2111 }
Sujithff37e332008-11-24 12:07:55 +05302112 dd->dd_bufptr = bf;
2113
Sujithff37e332008-11-24 12:07:55 +05302114 for (i = 0; i < nbuf; i++, bf++, ds += ndesc) {
2115 bf->bf_desc = ds;
2116 bf->bf_daddr = DS2PHYS(dd, ds);
2117
Sujith2660b812009-02-09 13:27:26 +05302118 if (!(sc->sc_ah->caps.hw_caps &
Sujithff37e332008-11-24 12:07:55 +05302119 ATH9K_HW_CAP_4KB_SPLITTRANS)) {
2120 /*
2121 * Skip descriptor addresses which can cause 4KB
2122 * boundary crossing (addr + length) with a 32 dword
2123 * descriptor fetch.
2124 */
2125 while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) {
Luis R. Rodriguez9680e8a2009-09-13 23:28:00 -07002126 BUG_ON((caddr_t) bf->bf_desc >=
Sujithff37e332008-11-24 12:07:55 +05302127 ((caddr_t) dd->dd_desc +
2128 dd->dd_desc_len));
2129
2130 ds += ndesc;
2131 bf->bf_desc = ds;
2132 bf->bf_daddr = DS2PHYS(dd, ds);
2133 }
2134 }
2135 list_add_tail(&bf->list, head);
2136 }
2137 return 0;
2138fail2:
Gabor Juhos7da3c552009-01-14 20:17:03 +01002139 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
2140 dd->dd_desc_paddr);
Sujithff37e332008-11-24 12:07:55 +05302141fail:
2142 memset(dd, 0, sizeof(*dd));
2143 return error;
2144#undef ATH_DESC_4KB_BOUND_CHECK
2145#undef ATH_DESC_4KB_BOUND_NUM_SKIPPED
2146#undef DS2PHYS
2147}
2148
2149void ath_descdma_cleanup(struct ath_softc *sc,
2150 struct ath_descdma *dd,
2151 struct list_head *head)
2152{
Gabor Juhos7da3c552009-01-14 20:17:03 +01002153 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
2154 dd->dd_desc_paddr);
Sujithff37e332008-11-24 12:07:55 +05302155
2156 INIT_LIST_HEAD(head);
2157 kfree(dd->dd_bufptr);
2158 memset(dd, 0, sizeof(*dd));
2159}
2160
2161int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
2162{
2163 int qnum;
2164
2165 switch (queue) {
2166 case 0:
Sujithb77f4832008-12-07 21:44:03 +05302167 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
Sujithff37e332008-11-24 12:07:55 +05302168 break;
2169 case 1:
Sujithb77f4832008-12-07 21:44:03 +05302170 qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
Sujithff37e332008-11-24 12:07:55 +05302171 break;
2172 case 2:
Sujithb77f4832008-12-07 21:44:03 +05302173 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
Sujithff37e332008-11-24 12:07:55 +05302174 break;
2175 case 3:
Sujithb77f4832008-12-07 21:44:03 +05302176 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
Sujithff37e332008-11-24 12:07:55 +05302177 break;
2178 default:
Sujithb77f4832008-12-07 21:44:03 +05302179 qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
Sujithff37e332008-11-24 12:07:55 +05302180 break;
2181 }
2182
2183 return qnum;
2184}
2185
2186int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
2187{
2188 int qnum;
2189
2190 switch (queue) {
2191 case ATH9K_WME_AC_VO:
2192 qnum = 0;
2193 break;
2194 case ATH9K_WME_AC_VI:
2195 qnum = 1;
2196 break;
2197 case ATH9K_WME_AC_BE:
2198 qnum = 2;
2199 break;
2200 case ATH9K_WME_AC_BK:
2201 qnum = 3;
2202 break;
2203 default:
2204 qnum = -1;
2205 break;
2206 }
2207
2208 return qnum;
2209}
2210
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002211/* XXX: Remove me once we don't depend on ath9k_channel for all
2212 * this redundant data */
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002213void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
2214 struct ath9k_channel *ichan)
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002215{
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002216 struct ieee80211_channel *chan = hw->conf.channel;
2217 struct ieee80211_conf *conf = &hw->conf;
2218
2219 ichan->channel = chan->center_freq;
2220 ichan->chan = chan;
2221
2222 if (chan->band == IEEE80211_BAND_2GHZ) {
2223 ichan->chanmode = CHANNEL_G;
Sujith88132622009-09-03 12:08:53 +05302224 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002225 } else {
2226 ichan->chanmode = CHANNEL_A;
2227 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
2228 }
2229
Luis R. Rodriguez25c56ee2009-09-13 23:04:44 -07002230 if (conf_is_ht(conf))
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002231 ichan->chanmode = ath_get_extchanmode(sc, chan,
2232 conf->channel_type);
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002233}
2234
Sujithff37e332008-11-24 12:07:55 +05302235/**********************/
2236/* mac80211 callbacks */
2237/**********************/
2238
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002239/*
2240 * (Re)start btcoex timers
2241 */
2242static void ath9k_btcoex_timer_resume(struct ath_softc *sc)
2243{
2244 struct ath_btcoex *btcoex = &sc->btcoex;
2245 struct ath_hw *ah = sc->sc_ah;
2246
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002247 ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
2248 "Starting btcoex timers");
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002249
2250 /* make sure duty cycle timer is also stopped when resuming */
2251 if (btcoex->hw_timer_enabled)
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07002252 ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002253
2254 btcoex->bt_priority_cnt = 0;
2255 btcoex->bt_priority_time = jiffies;
2256 sc->sc_flags &= ~SC_OP_BT_PRIORITY_DETECTED;
2257
2258 mod_timer(&btcoex->period_timer, jiffies);
2259}
2260
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002261static int ath9k_start(struct ieee80211_hw *hw)
2262{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002263 struct ath_wiphy *aphy = hw->priv;
2264 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002265 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002266 struct ath_common *common = ath9k_hw_common(ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002267 struct ieee80211_channel *curchan = hw->conf.channel;
Sujithff37e332008-11-24 12:07:55 +05302268 struct ath9k_channel *init_channel;
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +05302269 int r;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002270
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002271 ath_print(common, ATH_DBG_CONFIG,
2272 "Starting driver with initial channel: %d MHz\n",
2273 curchan->center_freq);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002274
Sujith141b38b2009-02-04 08:10:07 +05302275 mutex_lock(&sc->mutex);
2276
Jouni Malinen9580a222009-03-03 19:23:33 +02002277 if (ath9k_wiphy_started(sc)) {
2278 if (sc->chan_idx == curchan->hw_value) {
2279 /*
2280 * Already on the operational channel, the new wiphy
2281 * can be marked active.
2282 */
2283 aphy->state = ATH_WIPHY_ACTIVE;
2284 ieee80211_wake_queues(hw);
2285 } else {
2286 /*
2287 * Another wiphy is on another channel, start the new
2288 * wiphy in paused state.
2289 */
2290 aphy->state = ATH_WIPHY_PAUSED;
2291 ieee80211_stop_queues(hw);
2292 }
2293 mutex_unlock(&sc->mutex);
2294 return 0;
2295 }
2296 aphy->state = ATH_WIPHY_ACTIVE;
2297
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002298 /* setup initial channel */
2299
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +05302300 sc->chan_idx = curchan->hw_value;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002301
Vasanthakumar Thiagarajan82880a72009-06-13 14:50:24 +05302302 init_channel = ath_get_curchannel(sc, hw);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002303
Sujithff37e332008-11-24 12:07:55 +05302304 /* Reset SERDES registers */
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002305 ath9k_hw_configpcipowersave(ah, 0, 0);
Sujithff37e332008-11-24 12:07:55 +05302306
2307 /*
2308 * The basic interface to setting the hardware in a good
2309 * state is ``reset''. On return the hardware is known to
2310 * be powered up and with interrupts disabled. This must
2311 * be followed by initialization of the appropriate bits
2312 * and then setup of the interrupt mask.
2313 */
2314 spin_lock_bh(&sc->sc_resetlock);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002315 r = ath9k_hw_reset(ah, init_channel, false);
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08002316 if (r) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002317 ath_print(common, ATH_DBG_FATAL,
2318 "Unable to reset hardware; reset status %d "
2319 "(freq %u MHz)\n", r,
2320 curchan->center_freq);
Sujithff37e332008-11-24 12:07:55 +05302321 spin_unlock_bh(&sc->sc_resetlock);
Sujith141b38b2009-02-04 08:10:07 +05302322 goto mutex_unlock;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002323 }
Sujithff37e332008-11-24 12:07:55 +05302324 spin_unlock_bh(&sc->sc_resetlock);
2325
2326 /*
2327 * This is needed only to setup initial state
2328 * but it's best done after a reset.
2329 */
2330 ath_update_txpow(sc);
2331
2332 /*
2333 * Setup the hardware after reset:
2334 * The receive engine is set going.
2335 * Frame transmit is handled entirely
2336 * in the frame output path; there's nothing to do
2337 * here except setup the interrupt mask.
2338 */
2339 if (ath_startrecv(sc) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002340 ath_print(common, ATH_DBG_FATAL,
2341 "Unable to start recv logic\n");
Sujith141b38b2009-02-04 08:10:07 +05302342 r = -EIO;
2343 goto mutex_unlock;
Sujithff37e332008-11-24 12:07:55 +05302344 }
2345
2346 /* Setup our intr mask. */
Sujith17d79042009-02-09 13:27:03 +05302347 sc->imask = ATH9K_INT_RX | ATH9K_INT_TX
Sujithff37e332008-11-24 12:07:55 +05302348 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
2349 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
2350
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002351 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
Sujith17d79042009-02-09 13:27:03 +05302352 sc->imask |= ATH9K_INT_GTT;
Sujithff37e332008-11-24 12:07:55 +05302353
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002354 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
Sujith17d79042009-02-09 13:27:03 +05302355 sc->imask |= ATH9K_INT_CST;
Sujithff37e332008-11-24 12:07:55 +05302356
Luis R. Rodriguezce111ba2008-12-23 15:58:39 -08002357 ath_cache_conf_rate(sc, &hw->conf);
Sujithff37e332008-11-24 12:07:55 +05302358
2359 sc->sc_flags &= ~SC_OP_INVALID;
2360
2361 /* Disable BMISS interrupt when we're not associated */
Sujith17d79042009-02-09 13:27:03 +05302362 sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002363 ath9k_hw_set_interrupts(ah, sc->imask);
Sujithff37e332008-11-24 12:07:55 +05302364
Jouni Malinenbce048d2009-03-03 19:23:28 +02002365 ieee80211_wake_queues(hw);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002366
Luis R. Rodriguez42935ec2009-07-29 20:08:07 -04002367 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
Senthil Balasubramanian164ace32009-07-14 20:17:09 -04002368
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07002369 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
2370 !ah->btcoex_hw.enabled) {
Luis R. Rodriguez5e197292009-09-09 15:15:55 -07002371 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
2372 AR_STOMP_LOW_WLAN_WGHT);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002373 ath9k_hw_btcoex_enable(ah);
Vasanthakumar Thiagarajanf985ad12009-08-26 21:08:43 +05302374
Luis R. Rodriguez5bb12792009-09-14 00:55:09 -07002375 if (common->bus_ops->bt_coex_prep)
2376 common->bus_ops->bt_coex_prep(common);
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07002377 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002378 ath9k_btcoex_timer_resume(sc);
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05302379 }
2380
Sujith141b38b2009-02-04 08:10:07 +05302381mutex_unlock:
2382 mutex_unlock(&sc->mutex);
2383
Luis R. Rodriguezae8d2852008-12-23 15:58:40 -08002384 return r;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002385}
2386
2387static int ath9k_tx(struct ieee80211_hw *hw,
2388 struct sk_buff *skb)
2389{
Jouni Malinen147583c2008-08-11 14:01:50 +03002390 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Jouni Malinenbce048d2009-03-03 19:23:28 +02002391 struct ath_wiphy *aphy = hw->priv;
2392 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002393 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujith528f0c62008-10-29 10:14:26 +05302394 struct ath_tx_control txctl;
2395 int hdrlen, padsize;
2396
Jouni Malinen8089cc42009-03-03 19:23:38 +02002397 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002398 ath_print(common, ATH_DBG_XMIT,
2399 "ath9k: %s: TX in unexpected wiphy state "
2400 "%d\n", wiphy_name(hw->wiphy), aphy->state);
Jouni Malinenee166a02009-03-03 19:23:36 +02002401 goto exit;
2402 }
2403
Gabor Juhos96148322009-07-24 17:27:21 +02002404 if (sc->ps_enabled) {
Jouni Malinendc8c4582009-05-19 17:01:42 +03002405 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2406 /*
2407 * mac80211 does not set PM field for normal data frames, so we
2408 * need to update that based on the current PS mode.
2409 */
2410 if (ieee80211_is_data(hdr->frame_control) &&
2411 !ieee80211_is_nullfunc(hdr->frame_control) &&
2412 !ieee80211_has_pm(hdr->frame_control)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002413 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
2414 "while in PS mode\n");
Jouni Malinendc8c4582009-05-19 17:01:42 +03002415 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
2416 }
2417 }
2418
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002419 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
2420 /*
2421 * We are using PS-Poll and mac80211 can request TX while in
2422 * power save mode. Need to wake up hardware for the TX to be
2423 * completed and if needed, also for RX of buffered frames.
2424 */
2425 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2426 ath9k_ps_wakeup(sc);
2427 ath9k_hw_setrxabort(sc->sc_ah, 0);
2428 if (ieee80211_is_pspoll(hdr->frame_control)) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002429 ath_print(common, ATH_DBG_PS,
2430 "Sending PS-Poll to pick a buffered frame\n");
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002431 sc->sc_flags |= SC_OP_WAIT_FOR_PSPOLL_DATA;
2432 } else {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002433 ath_print(common, ATH_DBG_PS,
2434 "Wake up to complete TX\n");
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002435 sc->sc_flags |= SC_OP_WAIT_FOR_TX_ACK;
2436 }
2437 /*
2438 * The actual restore operation will happen only after
2439 * the sc_flags bit is cleared. We are just dropping
2440 * the ps_usecount here.
2441 */
2442 ath9k_ps_restore(sc);
2443 }
2444
Sujith528f0c62008-10-29 10:14:26 +05302445 memset(&txctl, 0, sizeof(struct ath_tx_control));
Jouni Malinen147583c2008-08-11 14:01:50 +03002446
2447 /*
2448 * As a temporary workaround, assign seq# here; this will likely need
2449 * to be cleaned up to work better with Beacon transmission and virtual
2450 * BSSes.
2451 */
2452 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
2453 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2454 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
Sujithb77f4832008-12-07 21:44:03 +05302455 sc->tx.seq_no += 0x10;
Jouni Malinen147583c2008-08-11 14:01:50 +03002456 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
Sujithb77f4832008-12-07 21:44:03 +05302457 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
Jouni Malinen147583c2008-08-11 14:01:50 +03002458 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002459
2460 /* Add the padding after the header if this is not already done */
2461 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
2462 if (hdrlen & 3) {
2463 padsize = hdrlen % 4;
2464 if (skb_headroom(skb) < padsize)
2465 return -1;
2466 skb_push(skb, padsize);
2467 memmove(skb->data, skb->data + padsize, hdrlen);
2468 }
2469
Sujith528f0c62008-10-29 10:14:26 +05302470 /* Check if a tx queue is available */
2471
2472 txctl.txq = ath_test_get_txq(sc, skb);
2473 if (!txctl.txq)
2474 goto exit;
2475
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002476 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002477
Jouni Malinenc52f33d2009-03-03 19:23:29 +02002478 if (ath_tx_start(hw, skb, &txctl) != 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002479 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
Sujith528f0c62008-10-29 10:14:26 +05302480 goto exit;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002481 }
2482
2483 return 0;
Sujith528f0c62008-10-29 10:14:26 +05302484exit:
2485 dev_kfree_skb_any(skb);
2486 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002487}
2488
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002489/*
2490 * Pause btcoex timer and bt duty cycle timer
2491 */
2492static void ath9k_btcoex_timer_pause(struct ath_softc *sc)
2493{
2494 struct ath_btcoex *btcoex = &sc->btcoex;
2495 struct ath_hw *ah = sc->sc_ah;
2496
2497 del_timer_sync(&btcoex->period_timer);
2498
2499 if (btcoex->hw_timer_enabled)
Luis R. Rodriguezcd9bf682009-09-13 02:08:34 -07002500 ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002501
2502 btcoex->hw_timer_enabled = false;
2503}
2504
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002505static void ath9k_stop(struct ieee80211_hw *hw)
2506{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002507 struct ath_wiphy *aphy = hw->priv;
2508 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002509 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002510 struct ath_common *common = ath9k_hw_common(ah);
Sujith9c84b792008-10-29 10:17:13 +05302511
Sujith4c483812009-08-18 10:51:52 +05302512 mutex_lock(&sc->mutex);
2513
Jouni Malinen9580a222009-03-03 19:23:33 +02002514 aphy->state = ATH_WIPHY_INACTIVE;
2515
Luis R. Rodriguezc94dbff2009-07-27 11:53:04 -07002516 cancel_delayed_work_sync(&sc->ath_led_blink_work);
2517 cancel_delayed_work_sync(&sc->tx_complete_work);
2518
2519 if (!sc->num_sec_wiphy) {
2520 cancel_delayed_work_sync(&sc->wiphy_work);
2521 cancel_work_sync(&sc->chan_work);
2522 }
2523
Sujith9c84b792008-10-29 10:17:13 +05302524 if (sc->sc_flags & SC_OP_INVALID) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002525 ath_print(common, ATH_DBG_ANY, "Device not present\n");
Sujith4c483812009-08-18 10:51:52 +05302526 mutex_unlock(&sc->mutex);
Sujith9c84b792008-10-29 10:17:13 +05302527 return;
2528 }
2529
Jouni Malinen9580a222009-03-03 19:23:33 +02002530 if (ath9k_wiphy_started(sc)) {
2531 mutex_unlock(&sc->mutex);
2532 return; /* another wiphy still in use */
2533 }
2534
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07002535 if (ah->btcoex_hw.enabled) {
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002536 ath9k_hw_btcoex_disable(ah);
Luis R. Rodriguez766ec4a2009-09-09 14:52:02 -07002537 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
Luis R. Rodriguez75d78392009-09-09 04:00:10 -07002538 ath9k_btcoex_timer_pause(sc);
Vasanthakumar Thiagarajan17739122009-08-26 21:08:50 +05302539 }
2540
Sujithff37e332008-11-24 12:07:55 +05302541 /* make sure h/w will not generate any interrupt
2542 * before setting the invalid flag. */
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002543 ath9k_hw_set_interrupts(ah, 0);
Sujithff37e332008-11-24 12:07:55 +05302544
2545 if (!(sc->sc_flags & SC_OP_INVALID)) {
Sujith043a0402009-01-16 21:38:47 +05302546 ath_drain_all_txq(sc, false);
Sujithff37e332008-11-24 12:07:55 +05302547 ath_stoprecv(sc);
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002548 ath9k_hw_phy_disable(ah);
Sujithff37e332008-11-24 12:07:55 +05302549 } else
Sujithb77f4832008-12-07 21:44:03 +05302550 sc->rx.rxlink = NULL;
Sujithff37e332008-11-24 12:07:55 +05302551
Sujithff37e332008-11-24 12:07:55 +05302552 /* disable HAL and put h/w to sleep */
Luis R. Rodriguezaf03abe2009-09-09 02:33:11 -07002553 ath9k_hw_disable(ah);
2554 ath9k_hw_configpcipowersave(ah, 1, 1);
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -07002555 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
Sujithff37e332008-11-24 12:07:55 +05302556
2557 sc->sc_flags |= SC_OP_INVALID;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002558
Sujith141b38b2009-02-04 08:10:07 +05302559 mutex_unlock(&sc->mutex);
2560
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002561 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002562}
2563
2564static int ath9k_add_interface(struct ieee80211_hw *hw,
2565 struct ieee80211_if_init_conf *conf)
2566{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002567 struct ath_wiphy *aphy = hw->priv;
2568 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002569 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujith17d79042009-02-09 13:27:03 +05302570 struct ath_vif *avp = (void *)conf->vif->drv_priv;
Colin McCabed97809d2008-12-01 13:38:55 -08002571 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002572 int ret = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002573
Sujith141b38b2009-02-04 08:10:07 +05302574 mutex_lock(&sc->mutex);
2575
Jouni Malinen8ca21f02009-03-03 19:23:27 +02002576 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
2577 sc->nvifs > 0) {
2578 ret = -ENOBUFS;
2579 goto out;
2580 }
2581
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002582 switch (conf->type) {
Johannes Berg05c914f2008-09-11 00:01:58 +02002583 case NL80211_IFTYPE_STATION:
Colin McCabed97809d2008-12-01 13:38:55 -08002584 ic_opmode = NL80211_IFTYPE_STATION;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002585 break;
Johannes Berg05c914f2008-09-11 00:01:58 +02002586 case NL80211_IFTYPE_ADHOC:
Johannes Berg05c914f2008-09-11 00:01:58 +02002587 case NL80211_IFTYPE_AP:
Pat Erley9cb54122009-03-20 22:59:59 -04002588 case NL80211_IFTYPE_MESH_POINT:
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002589 if (sc->nbcnvifs >= ATH_BCBUF) {
2590 ret = -ENOBUFS;
2591 goto out;
2592 }
Pat Erley9cb54122009-03-20 22:59:59 -04002593 ic_opmode = conf->type;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03002594 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002595 default:
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002596 ath_print(common, ATH_DBG_FATAL,
Sujith04bd4632008-11-28 22:18:05 +05302597 "Interface type %d not yet supported\n", conf->type);
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002598 ret = -EOPNOTSUPP;
2599 goto out;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002600 }
2601
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002602 ath_print(common, ATH_DBG_CONFIG,
2603 "Attach a VIF of type: %d\n", ic_opmode);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002604
Sujith17d79042009-02-09 13:27:03 +05302605 /* Set the VIF opmode */
Sujith5640b082008-10-29 10:16:06 +05302606 avp->av_opmode = ic_opmode;
2607 avp->av_bslot = -1;
2608
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002609 sc->nvifs++;
Jouni Malinen8ca21f02009-03-03 19:23:27 +02002610
2611 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
2612 ath9k_set_bssid_mask(hw);
2613
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002614 if (sc->nvifs > 1)
2615 goto out; /* skip global settings for secondary vif */
2616
Sujithb238e902009-03-03 10:16:56 +05302617 if (ic_opmode == NL80211_IFTYPE_AP) {
Sujith5640b082008-10-29 10:16:06 +05302618 ath9k_hw_set_tsfadjust(sc->sc_ah, 1);
Sujithb238e902009-03-03 10:16:56 +05302619 sc->sc_flags |= SC_OP_TSF_RESET;
2620 }
Sujith5640b082008-10-29 10:16:06 +05302621
Sujith5640b082008-10-29 10:16:06 +05302622 /* Set the device opmode */
Sujith2660b812009-02-09 13:27:26 +05302623 sc->sc_ah->opmode = ic_opmode;
Sujith5640b082008-10-29 10:16:06 +05302624
Vivek Natarajan4e30ffa2009-01-28 20:53:27 +05302625 /*
2626 * Enable MIB interrupts when there are hardware phy counters.
2627 * Note we only do this (at the moment) for station mode.
2628 */
Sujith4af9cf42009-02-12 10:06:47 +05302629 if ((conf->type == NL80211_IFTYPE_STATION) ||
Pat Erley9cb54122009-03-20 22:59:59 -04002630 (conf->type == NL80211_IFTYPE_ADHOC) ||
2631 (conf->type == NL80211_IFTYPE_MESH_POINT)) {
Sujith1aa8e842009-08-13 09:34:25 +05302632 sc->imask |= ATH9K_INT_MIB;
Sujith4af9cf42009-02-12 10:06:47 +05302633 sc->imask |= ATH9K_INT_TSFOOR;
2634 }
2635
Sujith17d79042009-02-09 13:27:03 +05302636 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
Vivek Natarajan4e30ffa2009-01-28 20:53:27 +05302637
Senthil Balasubramanianf38faa32009-06-24 18:56:40 +05302638 if (conf->type == NL80211_IFTYPE_AP ||
2639 conf->type == NL80211_IFTYPE_ADHOC ||
2640 conf->type == NL80211_IFTYPE_MONITOR)
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08002641 ath_start_ani(common);
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07002642
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002643out:
Sujith141b38b2009-02-04 08:10:07 +05302644 mutex_unlock(&sc->mutex);
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002645 return ret;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002646}
2647
2648static void ath9k_remove_interface(struct ieee80211_hw *hw,
2649 struct ieee80211_if_init_conf *conf)
2650{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002651 struct ath_wiphy *aphy = hw->priv;
2652 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002653 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujith17d79042009-02-09 13:27:03 +05302654 struct ath_vif *avp = (void *)conf->vif->drv_priv;
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002655 int i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002656
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002657 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002658
Sujith141b38b2009-02-04 08:10:07 +05302659 mutex_lock(&sc->mutex);
2660
Luis R. Rodriguez6f255422008-10-03 15:45:27 -07002661 /* Stop ANI */
Luis R. Rodriguez3d536ac2009-11-03 17:07:04 -08002662 del_timer_sync(&common->ani.timer);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002663
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002664 /* Reclaim beacon resources */
Pat Erley9cb54122009-03-20 22:59:59 -04002665 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
2666 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
2667 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
Sujithb77f4832008-12-07 21:44:03 +05302668 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002669 ath_beacon_return(sc, avp);
2670 }
2671
Sujith672840a2008-08-11 14:05:08 +05302672 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002673
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002674 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
2675 if (sc->beacon.bslot[i] == conf->vif) {
2676 printk(KERN_DEBUG "%s: vif had allocated beacon "
2677 "slot\n", __func__);
2678 sc->beacon.bslot[i] = NULL;
Jouni Malinenc52f33d2009-03-03 19:23:29 +02002679 sc->beacon.bslot_aphy[i] = NULL;
Jouni Malinen2c3db3d2009-03-03 19:23:26 +02002680 }
2681 }
2682
Sujith17d79042009-02-09 13:27:03 +05302683 sc->nvifs--;
Sujith141b38b2009-02-04 08:10:07 +05302684
2685 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002686}
2687
Johannes Berge8975582008-10-09 12:18:51 +02002688static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002689{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002690 struct ath_wiphy *aphy = hw->priv;
2691 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002692 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Johannes Berge8975582008-10-09 12:18:51 +02002693 struct ieee80211_conf *conf = &hw->conf;
Vivek Natarajan8782b412009-03-30 14:17:00 +05302694 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002695 bool disable_radio;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002696
Sujithaa33de02008-12-18 11:40:16 +05302697 mutex_lock(&sc->mutex);
Sujith141b38b2009-02-04 08:10:07 +05302698
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002699 /*
2700 * Leave this as the first check because we need to turn on the
2701 * radio if it was disabled before prior to processing the rest
2702 * of the changes. Likewise we must only disable the radio towards
2703 * the end.
2704 */
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002705 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002706 bool enable_radio;
2707 bool all_wiphys_idle;
2708 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002709
2710 spin_lock_bh(&sc->wiphy_lock);
2711 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002712 ath9k_set_wiphy_idle(aphy, idle);
2713
2714 if (!idle && all_wiphys_idle)
2715 enable_radio = true;
2716
2717 /*
2718 * After we unlock here its possible another wiphy
2719 * can be re-renabled so to account for that we will
2720 * only disable the radio toward the end of this routine
2721 * if by then all wiphys are still idle.
2722 */
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002723 spin_unlock_bh(&sc->wiphy_lock);
2724
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002725 if (enable_radio) {
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08002726 ath_radio_enable(sc, hw);
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002727 ath_print(common, ATH_DBG_CONFIG,
2728 "not-idle: enabling radio\n");
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002729 }
2730 }
2731
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302732 if (changed & IEEE80211_CONF_CHANGE_PS) {
2733 if (conf->flags & IEEE80211_CONF_PS) {
Vivek Natarajan8782b412009-03-30 14:17:00 +05302734 if (!(ah->caps.hw_caps &
2735 ATH9K_HW_CAP_AUTOSLEEP)) {
2736 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
2737 sc->imask |= ATH9K_INT_TIM_TIMER;
2738 ath9k_hw_set_interrupts(sc->sc_ah,
2739 sc->imask);
2740 }
2741 ath9k_hw_setrxabort(sc->sc_ah, 1);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302742 }
Gabor Juhos96148322009-07-24 17:27:21 +02002743 sc->ps_enabled = true;
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302744 } else {
Gabor Juhos96148322009-07-24 17:27:21 +02002745 sc->ps_enabled = false;
Luis R. Rodriguez9ecdef42009-09-09 21:10:09 -07002746 ath9k_setpower(sc, ATH9K_PM_AWAKE);
Vivek Natarajan8782b412009-03-30 14:17:00 +05302747 if (!(ah->caps.hw_caps &
2748 ATH9K_HW_CAP_AUTOSLEEP)) {
2749 ath9k_hw_setrxabort(sc->sc_ah, 0);
Jouni Malinen9a23f9c2009-05-19 17:01:38 +03002750 sc->sc_flags &= ~(SC_OP_WAIT_FOR_BEACON |
2751 SC_OP_WAIT_FOR_CAB |
2752 SC_OP_WAIT_FOR_PSPOLL_DATA |
2753 SC_OP_WAIT_FOR_TX_ACK);
Vivek Natarajan8782b412009-03-30 14:17:00 +05302754 if (sc->imask & ATH9K_INT_TIM_TIMER) {
2755 sc->imask &= ~ATH9K_INT_TIM_TIMER;
2756 ath9k_hw_set_interrupts(sc->sc_ah,
2757 sc->imask);
2758 }
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302759 }
2760 }
2761 }
2762
Johannes Berg47979382009-01-07 10:13:27 +01002763 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
Sujith99405f92008-11-24 12:08:35 +05302764 struct ieee80211_channel *curchan = hw->conf.channel;
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002765 int pos = curchan->hw_value;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002766
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002767 aphy->chan_idx = pos;
2768 aphy->chan_is_ht = conf_is_ht(conf);
2769
Jouni Malinen8089cc42009-03-03 19:23:38 +02002770 if (aphy->state == ATH_WIPHY_SCAN ||
2771 aphy->state == ATH_WIPHY_ACTIVE)
2772 ath9k_wiphy_pause_all_forced(sc, aphy);
2773 else {
2774 /*
2775 * Do not change operational channel based on a paused
2776 * wiphy changes.
2777 */
2778 goto skip_chan_change;
2779 }
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002780
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002781 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
2782 curchan->center_freq);
Johannes Bergae5eb022008-10-14 16:58:37 +02002783
Luis R. Rodriguez5f8e0772009-01-22 15:16:48 -08002784 /* XXX: remove me eventualy */
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002785 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
Sujithe11602b2008-11-27 09:46:27 +05302786
Luis R. Rodriguezecf70442008-12-23 15:58:43 -08002787 ath_update_chainmask(sc, conf_is_ht(conf));
Sujith86060f02009-01-07 14:25:29 +05302788
Jouni Malinen0e2dedf2009-03-03 19:23:32 +02002789 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002790 ath_print(common, ATH_DBG_FATAL,
2791 "Unable to set channel\n");
Sujithaa33de02008-12-18 11:40:16 +05302792 mutex_unlock(&sc->mutex);
Sujithe11602b2008-11-27 09:46:27 +05302793 return -EINVAL;
2794 }
Sujith094d05d2008-12-12 11:57:43 +05302795 }
Sujith86b89ee2008-08-07 10:54:57 +05302796
Jouni Malinen8089cc42009-03-03 19:23:38 +02002797skip_chan_change:
Luis R. Rodriguez5c020dc2008-10-22 13:28:45 -07002798 if (changed & IEEE80211_CONF_CHANGE_POWER)
Sujith17d79042009-02-09 13:27:03 +05302799 sc->config.txpowlimit = 2 * conf->power_level;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002800
Luis R. Rodriguez194b7c12009-10-29 10:41:15 -07002801 spin_lock_bh(&sc->wiphy_lock);
2802 disable_radio = ath9k_all_wiphys_idle(sc);
2803 spin_unlock_bh(&sc->wiphy_lock);
2804
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002805 if (disable_radio) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002806 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
Luis R. Rodriguez68a89112009-11-02 14:35:42 -08002807 ath_radio_disable(sc, hw);
Luis R. Rodriguez64839172009-07-14 20:22:53 -04002808 }
2809
Sujithaa33de02008-12-18 11:40:16 +05302810 mutex_unlock(&sc->mutex);
Sujith141b38b2009-02-04 08:10:07 +05302811
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002812 return 0;
2813}
2814
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002815#define SUPPORTED_FILTERS \
2816 (FIF_PROMISC_IN_BSS | \
2817 FIF_ALLMULTI | \
2818 FIF_CONTROL | \
Luis R. Rodriguezaf6a3fc2009-08-08 21:55:16 -04002819 FIF_PSPOLL | \
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002820 FIF_OTHER_BSS | \
2821 FIF_BCN_PRBRESP_PROMISC | \
2822 FIF_FCSFAIL)
2823
Sujith7dcfdcd2008-08-11 14:03:13 +05302824/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002825static void ath9k_configure_filter(struct ieee80211_hw *hw,
2826 unsigned int changed_flags,
2827 unsigned int *total_flags,
Johannes Berg3ac64be2009-08-17 16:16:53 +02002828 u64 multicast)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002829{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002830 struct ath_wiphy *aphy = hw->priv;
2831 struct ath_softc *sc = aphy->sc;
Sujith7dcfdcd2008-08-11 14:03:13 +05302832 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002833
2834 changed_flags &= SUPPORTED_FILTERS;
2835 *total_flags &= SUPPORTED_FILTERS;
2836
Sujithb77f4832008-12-07 21:44:03 +05302837 sc->rx.rxfilter = *total_flags;
Jouni Malinenaa68aea2009-05-19 17:01:41 +03002838 ath9k_ps_wakeup(sc);
Sujith7dcfdcd2008-08-11 14:03:13 +05302839 rfilt = ath_calcrxfilter(sc);
2840 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
Jouni Malinenaa68aea2009-05-19 17:01:41 +03002841 ath9k_ps_restore(sc);
Sujith7dcfdcd2008-08-11 14:03:13 +05302842
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002843 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
2844 "Set HW RX filter: 0x%x\n", rfilt);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002845}
2846
2847static void ath9k_sta_notify(struct ieee80211_hw *hw,
2848 struct ieee80211_vif *vif,
2849 enum sta_notify_cmd cmd,
Johannes Berg17741cd2008-09-11 00:02:02 +02002850 struct ieee80211_sta *sta)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002851{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002852 struct ath_wiphy *aphy = hw->priv;
2853 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002854
2855 switch (cmd) {
2856 case STA_NOTIFY_ADD:
Sujith5640b082008-10-29 10:16:06 +05302857 ath_node_attach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002858 break;
2859 case STA_NOTIFY_REMOVE:
Sujithb5aa9bf2008-10-29 10:13:31 +05302860 ath_node_detach(sc, sta);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002861 break;
2862 default:
2863 break;
2864 }
2865}
2866
Sujith141b38b2009-02-04 08:10:07 +05302867static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002868 const struct ieee80211_tx_queue_params *params)
2869{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002870 struct ath_wiphy *aphy = hw->priv;
2871 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002872 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Sujithea9880f2008-08-07 10:53:10 +05302873 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002874 int ret = 0, qnum;
2875
2876 if (queue >= WME_NUM_AC)
2877 return 0;
2878
Sujith141b38b2009-02-04 08:10:07 +05302879 mutex_lock(&sc->mutex);
2880
Sujith1ffb0612009-03-30 15:28:46 +05302881 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
2882
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002883 qi.tqi_aifs = params->aifs;
2884 qi.tqi_cwmin = params->cw_min;
2885 qi.tqi_cwmax = params->cw_max;
2886 qi.tqi_burstTime = params->txop;
2887 qnum = ath_get_hal_qnum(queue, sc);
2888
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002889 ath_print(common, ATH_DBG_CONFIG,
2890 "Configure tx [queue/halq] [%d/%d], "
2891 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
2892 queue, qnum, params->aifs, params->cw_min,
2893 params->cw_max, params->txop);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002894
2895 ret = ath_txq_update(sc, qnum, &qi);
2896 if (ret)
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002897 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002898
Sujith141b38b2009-02-04 08:10:07 +05302899 mutex_unlock(&sc->mutex);
2900
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002901 return ret;
2902}
2903
2904static int ath9k_set_key(struct ieee80211_hw *hw,
2905 enum set_key_cmd cmd,
Johannes Bergdc822b52008-12-29 12:55:09 +01002906 struct ieee80211_vif *vif,
2907 struct ieee80211_sta *sta,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002908 struct ieee80211_key_conf *key)
2909{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002910 struct ath_wiphy *aphy = hw->priv;
2911 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002912 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002913 int ret = 0;
2914
Jouni Malinenb3bd89c2009-02-24 13:42:01 +02002915 if (modparam_nohwcrypt)
2916 return -ENOSPC;
2917
Sujith141b38b2009-02-04 08:10:07 +05302918 mutex_lock(&sc->mutex);
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302919 ath9k_ps_wakeup(sc);
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002920 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002921
2922 switch (cmd) {
2923 case SET_KEY:
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -08002924 ret = ath_key_config(common, vif, sta, key);
Jouni Malinen6ace2892008-12-17 13:32:17 +02002925 if (ret >= 0) {
2926 key->hw_key_idx = ret;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002927 /* push IV and Michael MIC generation to stack */
2928 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05302929 if (key->alg == ALG_TKIP)
2930 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Jouni Malinen0ced0e12009-01-08 13:32:13 +02002931 if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
2932 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
Jouni Malinen6ace2892008-12-17 13:32:17 +02002933 ret = 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002934 }
2935 break;
2936 case DISABLE_KEY:
Luis R. Rodriguez7e86c102009-11-04 17:21:01 -08002937 ath_key_delete(common, key);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002938 break;
2939 default:
2940 ret = -EINVAL;
2941 }
2942
Vivek Natarajan3cbb5dd2009-01-20 11:17:08 +05302943 ath9k_ps_restore(sc);
Sujith141b38b2009-02-04 08:10:07 +05302944 mutex_unlock(&sc->mutex);
2945
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002946 return ret;
2947}
2948
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002949static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2950 struct ieee80211_vif *vif,
2951 struct ieee80211_bss_conf *bss_conf,
2952 u32 changed)
2953{
Jouni Malinenbce048d2009-03-03 19:23:28 +02002954 struct ath_wiphy *aphy = hw->priv;
2955 struct ath_softc *sc = aphy->sc;
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002956 struct ath_hw *ah = sc->sc_ah;
Luis R. Rodriguez15107182009-09-10 09:22:37 -07002957 struct ath_common *common = ath9k_hw_common(ah);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002958 struct ath_vif *avp = (void *)vif->drv_priv;
2959 u32 rfilt = 0;
2960 int error, i;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07002961
Sujith141b38b2009-02-04 08:10:07 +05302962 mutex_lock(&sc->mutex);
2963
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002964 /*
2965 * TODO: Need to decide which hw opmode to use for
2966 * multi-interface cases
2967 * XXX: This belongs into add_interface!
2968 */
2969 if (vif->type == NL80211_IFTYPE_AP &&
2970 ah->opmode != NL80211_IFTYPE_AP) {
2971 ah->opmode = NL80211_IFTYPE_STATION;
2972 ath9k_hw_setopmode(ah);
Luis R. Rodriguez15107182009-09-10 09:22:37 -07002973 memcpy(common->curbssid, common->macaddr, ETH_ALEN);
2974 common->curaid = 0;
Luis R. Rodriguezf2b21432009-09-10 08:50:20 -07002975 ath9k_hw_write_associd(ah);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002976 /* Request full reset to get hw opmode changed properly */
2977 sc->sc_flags |= SC_OP_FULL_RESET;
2978 }
2979
2980 if ((changed & BSS_CHANGED_BSSID) &&
2981 !is_zero_ether_addr(bss_conf->bssid)) {
2982 switch (vif->type) {
2983 case NL80211_IFTYPE_STATION:
2984 case NL80211_IFTYPE_ADHOC:
2985 case NL80211_IFTYPE_MESH_POINT:
2986 /* Set BSSID */
Luis R. Rodriguez15107182009-09-10 09:22:37 -07002987 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002988 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
Luis R. Rodriguez15107182009-09-10 09:22:37 -07002989 common->curaid = 0;
Luis R. Rodriguezf2b21432009-09-10 08:50:20 -07002990 ath9k_hw_write_associd(ah);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002991
2992 /* Set aggregation protection mode parameters */
2993 sc->config.ath_aggr_prot = 0;
2994
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07002995 ath_print(common, ATH_DBG_CONFIG,
2996 "RX filter 0x%x bssid %pM aid 0x%x\n",
2997 rfilt, common->curbssid, common->curaid);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02002998
2999 /* need to reconfigure the beacon */
3000 sc->sc_flags &= ~SC_OP_BEACONS ;
3001
3002 break;
3003 default:
3004 break;
3005 }
3006 }
3007
3008 if ((vif->type == NL80211_IFTYPE_ADHOC) ||
3009 (vif->type == NL80211_IFTYPE_AP) ||
3010 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
3011 if ((changed & BSS_CHANGED_BEACON) ||
3012 (changed & BSS_CHANGED_BEACON_ENABLED &&
3013 bss_conf->enable_beacon)) {
3014 /*
3015 * Allocate and setup the beacon frame.
3016 *
3017 * Stop any previous beacon DMA. This may be
3018 * necessary, for example, when an ibss merge
3019 * causes reconfiguration; we may be called
3020 * with beacon transmission active.
3021 */
3022 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
3023
3024 error = ath_beacon_alloc(aphy, vif);
3025 if (!error)
3026 ath_beacon_config(sc, vif);
3027 }
3028 }
3029
3030 /* Check for WLAN_CAPABILITY_PRIVACY ? */
3031 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
3032 for (i = 0; i < IEEE80211_WEP_NKID; i++)
3033 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
3034 ath9k_hw_keysetmac(sc->sc_ah,
3035 (u16)i,
Luis R. Rodriguez15107182009-09-10 09:22:37 -07003036 common->curbssid);
Johannes Berg2d0ddec2009-04-23 16:13:26 +02003037 }
3038
3039 /* Only legacy IBSS for now */
3040 if (vif->type == NL80211_IFTYPE_ADHOC)
3041 ath_update_chainmask(sc, 0);
3042
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003043 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07003044 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
3045 bss_conf->use_short_preamble);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003046 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05303047 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003048 else
Sujith672840a2008-08-11 14:05:08 +05303049 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003050 }
3051
3052 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07003053 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
3054 bss_conf->use_cts_prot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003055 if (bss_conf->use_cts_prot &&
3056 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05303057 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003058 else
Sujith672840a2008-08-11 14:05:08 +05303059 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003060 }
3061
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003062 if (changed & BSS_CHANGED_ASSOC) {
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07003063 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003064 bss_conf->assoc);
Sujith5640b082008-10-29 10:16:06 +05303065 ath9k_bss_assoc_info(sc, vif, bss_conf);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003066 }
Sujith141b38b2009-02-04 08:10:07 +05303067
Johannes Berg57c4d7b2009-04-23 16:10:04 +02003068 /*
3069 * The HW TSF has to be reset when the beacon interval changes.
3070 * We set the flag here, and ath_beacon_config_ap() would take this
3071 * into account when it gets called through the subsequent
3072 * config_interface() call - with IFCC_BEACON in the changed field.
3073 */
3074
3075 if (changed & BSS_CHANGED_BEACON_INT) {
3076 sc->sc_flags |= SC_OP_TSF_RESET;
3077 sc->beacon_interval = bss_conf->beacon_int;
3078 }
3079
Sujith141b38b2009-02-04 08:10:07 +05303080 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003081}
3082
3083static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
3084{
3085 u64 tsf;
Jouni Malinenbce048d2009-03-03 19:23:28 +02003086 struct ath_wiphy *aphy = hw->priv;
3087 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003088
Sujith141b38b2009-02-04 08:10:07 +05303089 mutex_lock(&sc->mutex);
3090 tsf = ath9k_hw_gettsf64(sc->sc_ah);
3091 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003092
3093 return tsf;
3094}
3095
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01003096static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
3097{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003098 struct ath_wiphy *aphy = hw->priv;
3099 struct ath_softc *sc = aphy->sc;
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01003100
Sujith141b38b2009-02-04 08:10:07 +05303101 mutex_lock(&sc->mutex);
3102 ath9k_hw_settsf64(sc->sc_ah, tsf);
3103 mutex_unlock(&sc->mutex);
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01003104}
3105
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003106static void ath9k_reset_tsf(struct ieee80211_hw *hw)
3107{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003108 struct ath_wiphy *aphy = hw->priv;
3109 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003110
Sujith141b38b2009-02-04 08:10:07 +05303111 mutex_lock(&sc->mutex);
Luis R. Rodriguez21526d52009-09-09 20:05:39 -07003112
3113 ath9k_ps_wakeup(sc);
Sujith141b38b2009-02-04 08:10:07 +05303114 ath9k_hw_reset_tsf(sc->sc_ah);
Luis R. Rodriguez21526d52009-09-09 20:05:39 -07003115 ath9k_ps_restore(sc);
3116
Sujith141b38b2009-02-04 08:10:07 +05303117 mutex_unlock(&sc->mutex);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003118}
3119
3120static int ath9k_ampdu_action(struct ieee80211_hw *hw,
Sujith141b38b2009-02-04 08:10:07 +05303121 enum ieee80211_ampdu_mlme_action action,
3122 struct ieee80211_sta *sta,
3123 u16 tid, u16 *ssn)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003124{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003125 struct ath_wiphy *aphy = hw->priv;
3126 struct ath_softc *sc = aphy->sc;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003127 int ret = 0;
3128
3129 switch (action) {
3130 case IEEE80211_AMPDU_RX_START:
Sujithdca3edb2008-10-29 10:19:01 +05303131 if (!(sc->sc_flags & SC_OP_RXAGGR))
3132 ret = -ENOTSUPP;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003133 break;
3134 case IEEE80211_AMPDU_RX_STOP:
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003135 break;
3136 case IEEE80211_AMPDU_TX_START:
Sujithf83da962009-07-23 15:32:37 +05303137 ath_tx_aggr_start(sc, sta, tid, ssn);
3138 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003139 break;
3140 case IEEE80211_AMPDU_TX_STOP:
Sujithf83da962009-07-23 15:32:37 +05303141 ath_tx_aggr_stop(sc, sta, tid);
Johannes Berg17741cd2008-09-11 00:02:02 +02003142 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003143 break;
Johannes Bergb1720232009-03-23 17:28:39 +01003144 case IEEE80211_AMPDU_TX_OPERATIONAL:
Sujith8469cde2008-10-29 10:19:28 +05303145 ath_tx_aggr_resume(sc, sta, tid);
3146 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003147 default:
Luis R. Rodriguezc46917b2009-09-13 02:42:02 -07003148 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
3149 "Unknown AMPDU action\n");
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003150 }
3151
3152 return ret;
3153}
3154
Sujith0c98de62009-03-03 10:16:45 +05303155static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
3156{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003157 struct ath_wiphy *aphy = hw->priv;
3158 struct ath_softc *sc = aphy->sc;
Sujith0c98de62009-03-03 10:16:45 +05303159
Sujith3d832612009-08-21 12:00:28 +05303160 mutex_lock(&sc->mutex);
Jouni Malinen8089cc42009-03-03 19:23:38 +02003161 if (ath9k_wiphy_scanning(sc)) {
3162 printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
3163 "same time\n");
3164 /*
3165 * Do not allow the concurrent scanning state for now. This
3166 * could be improved with scanning control moved into ath9k.
3167 */
Sujith3d832612009-08-21 12:00:28 +05303168 mutex_unlock(&sc->mutex);
Jouni Malinen8089cc42009-03-03 19:23:38 +02003169 return;
3170 }
3171
3172 aphy->state = ATH_WIPHY_SCAN;
3173 ath9k_wiphy_pause_all_forced(sc, aphy);
3174
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05303175 spin_lock_bh(&sc->ani_lock);
Sujith0c98de62009-03-03 10:16:45 +05303176 sc->sc_flags |= SC_OP_SCANNING;
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05303177 spin_unlock_bh(&sc->ani_lock);
Sujith3d832612009-08-21 12:00:28 +05303178 mutex_unlock(&sc->mutex);
Sujith0c98de62009-03-03 10:16:45 +05303179}
3180
3181static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
3182{
Jouni Malinenbce048d2009-03-03 19:23:28 +02003183 struct ath_wiphy *aphy = hw->priv;
3184 struct ath_softc *sc = aphy->sc;
Sujith0c98de62009-03-03 10:16:45 +05303185
Sujith3d832612009-08-21 12:00:28 +05303186 mutex_lock(&sc->mutex);
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05303187 spin_lock_bh(&sc->ani_lock);
Jouni Malinen8089cc42009-03-03 19:23:38 +02003188 aphy->state = ATH_WIPHY_ACTIVE;
Sujith0c98de62009-03-03 10:16:45 +05303189 sc->sc_flags &= ~SC_OP_SCANNING;
Sujith9c07a772009-04-13 21:56:36 +05303190 sc->sc_flags |= SC_OP_FULL_RESET;
Senthil Balasubramaniane5f09212009-06-24 18:56:41 +05303191 spin_unlock_bh(&sc->ani_lock);
Vivek Natarajand0bec342009-09-02 15:50:55 +05303192 ath_beacon_config(sc, NULL);
Sujith3d832612009-08-21 12:00:28 +05303193 mutex_unlock(&sc->mutex);
Sujith0c98de62009-03-03 10:16:45 +05303194}
3195
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003196struct ieee80211_ops ath9k_ops = {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003197 .tx = ath9k_tx,
3198 .start = ath9k_start,
3199 .stop = ath9k_stop,
3200 .add_interface = ath9k_add_interface,
3201 .remove_interface = ath9k_remove_interface,
3202 .config = ath9k_config,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003203 .configure_filter = ath9k_configure_filter,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003204 .sta_notify = ath9k_sta_notify,
3205 .conf_tx = ath9k_conf_tx,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003206 .bss_info_changed = ath9k_bss_info_changed,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003207 .set_key = ath9k_set_key,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003208 .get_tsf = ath9k_get_tsf,
Alina Friedrichsen3b5d6652009-01-24 07:09:59 +01003209 .set_tsf = ath9k_set_tsf,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003210 .reset_tsf = ath9k_reset_tsf,
Johannes Berg4233df62008-10-13 13:35:05 +02003211 .ampdu_action = ath9k_ampdu_action,
Sujith0c98de62009-03-03 10:16:45 +05303212 .sw_scan_start = ath9k_sw_scan_start,
3213 .sw_scan_complete = ath9k_sw_scan_complete,
Johannes Berg3b319aa2009-06-13 14:50:26 +05303214 .rfkill_poll = ath9k_rfkill_poll_state,
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003215};
3216
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003217static int __init ath9k_init(void)
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003218{
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303219 int error;
3220
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303221 /* Register rate control algorithm */
3222 error = ath_rate_control_register();
3223 if (error != 0) {
3224 printk(KERN_ERR
Luis R. Rodriguezb51bb3c2009-01-26 07:30:03 -08003225 "ath9k: Unable to register rate control "
3226 "algorithm: %d\n",
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303227 error);
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003228 goto err_out;
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303229 }
3230
Gabor Juhos19d8bc22009-03-05 16:55:18 +01003231 error = ath9k_debug_create_root();
3232 if (error) {
3233 printk(KERN_ERR
3234 "ath9k: Unable to create debugfs root: %d\n",
3235 error);
3236 goto err_rate_unregister;
3237 }
3238
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003239 error = ath_pci_init();
3240 if (error < 0) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003241 printk(KERN_ERR
Luis R. Rodriguezb51bb3c2009-01-26 07:30:03 -08003242 "ath9k: No PCI devices found, driver not installed.\n");
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003243 error = -ENODEV;
Gabor Juhos19d8bc22009-03-05 16:55:18 +01003244 goto err_remove_root;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003245 }
3246
Gabor Juhos09329d32009-01-14 20:17:07 +01003247 error = ath_ahb_init();
3248 if (error < 0) {
3249 error = -ENODEV;
3250 goto err_pci_exit;
3251 }
3252
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003253 return 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003254
Gabor Juhos09329d32009-01-14 20:17:07 +01003255 err_pci_exit:
3256 ath_pci_exit();
3257
Gabor Juhos19d8bc22009-03-05 16:55:18 +01003258 err_remove_root:
3259 ath9k_debug_remove_root();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003260 err_rate_unregister:
Vasanthakumar Thiagarajanca8a8562008-12-16 12:37:38 +05303261 ath_rate_control_unregister();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003262 err_out:
3263 return error;
3264}
3265module_init(ath9k_init);
3266
3267static void __exit ath9k_exit(void)
3268{
Gabor Juhos09329d32009-01-14 20:17:07 +01003269 ath_ahb_exit();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003270 ath_pci_exit();
Gabor Juhos19d8bc22009-03-05 16:55:18 +01003271 ath9k_debug_remove_root();
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003272 ath_rate_control_unregister();
Sujith04bd4632008-11-28 22:18:05 +05303273 printk(KERN_INFO "%s: Driver unloaded\n", dev_info);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07003274}
Gabor Juhos6baff7f2009-01-14 20:17:06 +01003275module_exit(ath9k_exit);