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gerrit-public.fairphone.software / kernel / msm-4.9 / 7f217794ffa72f208a250b79ab0b7ea3de19677f / . / arch / arm / boot / dts / tegra-seaboard.dts
blob: 8decf722997339f7c9ed80e967bb02c4c26c02f0 [file] [log] [blame]
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]1/dts-v1/;
2
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]3/include/ "tegra20.dtsi"
4
5/ {
6 model = "NVIDIA Seaboard";
7 compatible = "nvidia,seaboard", "nvidia,tegra20";
8
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]9 memory {
10 device_type = "memory";
11 reg = < 0x00000000 0x40000000 >;
12 };
13
Stephen Warren88950f3b2011-11-21 14:44:09 -0700[diff] [blame]14 i2c@7000c000 {
15 clock-frequency = <400000>;
Stephen Warren797acf72012-01-11 16:09:57 -0700[diff] [blame]16
17 wm8903: wm8903@1a {
18 compatible = "wlf,wm8903";
19 reg = <0x1a>;
20 interrupt-parent = <&gpio>;
21 interrupts = < 187 0x04 >;
22
23 gpio-controller;
24 #gpio-cells = <2>;
25
26 micdet-cfg = <0>;
27 micdet-delay = <100>;
28 gpio-cfg = < 0xffffffff 0xffffffff 0 0xffffffff 0xffffffff >;
29 };
Stephen Warren88950f3b2011-11-21 14:44:09 -0700[diff] [blame]30 };
31
32 i2c@7000c400 {
33 clock-frequency = <400000>;
34 };
35
36 i2c@7000c500 {
37 clock-frequency = <400000>;
38 };
39
40 i2c@7000d000 {
41 clock-frequency = <400000>;
Stephen Warren401c9a52011-12-17 23:29:32 -0700[diff] [blame]42
43 adt7461@4c {
44 compatible = "adt7461";
45 reg = <0x4c>;
46 };
Stephen Warren88950f3b2011-11-21 14:44:09 -0700[diff] [blame]47 };
48
Stephen Warren797acf72012-01-11 16:09:57 -0700[diff] [blame]49 i2s@70002a00 {
50 status = "disable";
51 };
52
53 sound {
54 compatible = "nvidia,tegra-audio-wm8903-seaboard",
55 "nvidia,tegra-audio-wm8903";
56 nvidia,model = "NVIDIA Tegra Seaboard";
57
58 nvidia,audio-routing =
59 "Headphone Jack", "HPOUTR",
60 "Headphone Jack", "HPOUTL",
61 "Int Spk", "ROP",
62 "Int Spk", "RON",
63 "Int Spk", "LOP",
64 "Int Spk", "LON",
65 "Mic Jack", "MICBIAS",
66 "IN1R", "Mic Jack";
67
68 nvidia,i2s-controller = <&tegra_i2s1>;
69 nvidia,audio-codec = <&wm8903>;
70
71 nvidia,spkr-en-gpios = <&wm8903 2 0>;
72 nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
73 };
74
Stephen Warren31c1ec92011-11-21 14:44:10 -0700[diff] [blame]75 serial@70006000 {
76 status = "disable";
77 };
78
79 serial@70006040 {
80 status = "disable";
81 };
82
83 serial@70006200 {
84 status = "disable";
85 };
86
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]87 serial@70006300 {
88 clock-frequency = < 216000000 >;
89 };
90
Stephen Warren31c1ec92011-11-21 14:44:10 -0700[diff] [blame]91 serial@70006400 {
92 status = "disable";
93 };
94
Stephen Warren1292c122011-11-21 14:44:11 -0700[diff] [blame]95 sdhci@c8000000 {
96 status = "disable";
97 };
98
99 sdhci@c8000200 {
100 status = "disable";
101 };
102
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]103 sdhci@c8000400 {
Stephen Warrena0638eb2011-09-20 10:46:25 -0600[diff] [blame]104 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
105 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
106 power-gpios = <&gpio 70 0>; /* gpio PI6 */
Arnd Bergmann7f217792012-05-13 00:14:24 -0400[diff] [blame^]107 bus-width = <4>;
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]108 };
Stephen Warren6111d502011-09-20 10:46:26 -0600[diff] [blame]109
110 sdhci@c8000600 {
111 support-8bit;
Arnd Bergmann7f217792012-05-13 00:14:24 -0400[diff] [blame^]112 bus-width = <8>;
Stephen Warren6111d502011-09-20 10:46:26 -0600[diff] [blame]113 };
Olof Johanssonc27317c2011-11-04 09:12:39 +0000[diff] [blame]114
115 usb@c5000000 {
116 nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
Simon Glass0a428032012-03-06 21:04:34 -0800[diff] [blame]117 dr_mode = "otg";
Olof Johanssonc27317c2011-11-04 09:12:39 +0000[diff] [blame]118 };
Stephen Warrenf0d14302011-12-17 22:18:23 -0700[diff] [blame]119
120 gpio-keys {
121 compatible = "gpio-keys";
122
123 power {
124 label = "Power";
125 gpios = <&gpio 170 1>; /* gpio PV2, active low */
126 linux,code = <116>; /* KEY_POWER */
127 gpio-key,wakeup;
128 };
129
130 lid {
131 label = "Lid";
132 gpios = <&gpio 23 0>; /* gpio PC7 */
133 linux,input-type = <5>; /* EV_SW */
134 linux,code = <0>; /* SW_LID */
135 debounce-interval = <1>;
136 gpio-key,wakeup;
137 };
138 };
Olof Johanssond8017a92011-10-18 11:06:06 -0700[diff] [blame]139
140 emc@7000f400 {
141 emc-table@190000 {
142 reg = < 190000 >;
143 compatible = "nvidia,tegra20-emc-table";
144 clock-frequency = < 190000 >;
145 nvidia,emc-registers = < 0x0000000c 0x00000026
146 0x00000009 0x00000003 0x00000004 0x00000004
147 0x00000002 0x0000000c 0x00000003 0x00000003
148 0x00000002 0x00000001 0x00000004 0x00000005
149 0x00000004 0x00000009 0x0000000d 0x0000059f
150 0x00000000 0x00000003 0x00000003 0x00000003
151 0x00000003 0x00000001 0x0000000b 0x000000c8
152 0x00000003 0x00000007 0x00000004 0x0000000f
153 0x00000002 0x00000000 0x00000000 0x00000002
154 0x00000000 0x00000000 0x00000083 0xa06204ae
155 0x007dc010 0x00000000 0x00000000 0x00000000
156 0x00000000 0x00000000 0x00000000 0x00000000 >;
157 };
158
159 emc-table@380000 {
160 reg = < 380000 >;
161 compatible = "nvidia,tegra20-emc-table";
162 clock-frequency = < 380000 >;
163 nvidia,emc-registers = < 0x00000017 0x0000004b
164 0x00000012 0x00000006 0x00000004 0x00000005
165 0x00000003 0x0000000c 0x00000006 0x00000006
166 0x00000003 0x00000001 0x00000004 0x00000005
167 0x00000004 0x00000009 0x0000000d 0x00000b5f
168 0x00000000 0x00000003 0x00000003 0x00000006
169 0x00000006 0x00000001 0x00000011 0x000000c8
170 0x00000003 0x0000000e 0x00000007 0x0000000f
171 0x00000002 0x00000000 0x00000000 0x00000002
172 0x00000000 0x00000000 0x00000083 0xe044048b
173 0x007d8010 0x00000000 0x00000000 0x00000000
174 0x00000000 0x00000000 0x00000000 0x00000000 >;
175 };
176 };
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]177};