blob: 9af9e68c303ba76372d6fe7206d1d86f254f89c0 [file] [log] [blame]
Greg Ungerer0e152d82011-06-20 15:49:09 +10001comment "Processor Type"
2
3config M68000
4 bool
5 select CPU_HAS_NO_BITFIELDS
6 help
7 The Freescale (was Motorola) 68000 CPU is the first generation of
8 the well known M68K family of processors. The CPU core as well as
9 being available as a stand alone CPU was also used in many
10 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
11 a paging MMU.
12
13config MCPU32
14 bool
15 select CPU_HAS_NO_BITFIELDS
16 help
17 The Freescale (was then Motorola) CPU32 is a CPU core that is
18 based on the 68020 processor. For the most part it is used in
19 System-On-Chip parts, and does not contain a paging MMU.
20
21config COLDFIRE
22 bool
23 select GENERIC_GPIO
24 select ARCH_REQUIRE_GPIOLIB
25 select CPU_HAS_NO_BITFIELDS
26 help
27 The Freescale ColdFire family of processors is a modern derivitive
28 of the 68000 processor family. They are mainly targeted at embedded
29 applications, and are all System-On-Chip (SOC) devices, as opposed
30 to stand alone CPUs. They implement a subset of the original 68000
31 processor instruction set.
32
33config M68020
34 bool "68020 support"
35 depends on MMU
Greg Ungerer5717a022011-10-19 16:27:30 +100036 select GENERIC_ATOMIC64
Greg Ungerer0e152d82011-06-20 15:49:09 +100037 help
38 If you anticipate running this kernel on a computer with a MC68020
39 processor, say Y. Otherwise, say N. Note that the 68020 requires a
40 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
41 Sun 3, which provides its own version.
42
43config M68030
44 bool "68030 support"
45 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100046 select GENERIC_ATOMIC64
Greg Ungerer0e152d82011-06-20 15:49:09 +100047 help
48 If you anticipate running this kernel on a computer with a MC68030
49 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
50 work, as it does not include an MMU (Memory Management Unit).
51
52config M68040
53 bool "68040 support"
54 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100055 select GENERIC_ATOMIC64
Greg Ungerer0e152d82011-06-20 15:49:09 +100056 help
57 If you anticipate running this kernel on a computer with a MC68LC040
58 or MC68040 processor, say Y. Otherwise, say N. Note that an
59 MC68EC040 will not work, as it does not include an MMU (Memory
60 Management Unit).
61
62config M68060
63 bool "68060 support"
64 depends on MMU && !MMU_SUN3
Greg Ungerer5717a022011-10-19 16:27:30 +100065 select GENERIC_ATOMIC64
Greg Ungerer0e152d82011-06-20 15:49:09 +100066 help
67 If you anticipate running this kernel on a computer with a MC68060
68 processor, say Y. Otherwise, say N.
69
70config M68328
71 bool "MC68328"
72 depends on !MMU
73 select M68000
74 help
75 Motorola 68328 processor support.
76
77config M68EZ328
78 bool "MC68EZ328"
79 depends on !MMU
80 select M68000
81 help
82 Motorola 68EX328 processor support.
83
84config M68VZ328
85 bool "MC68VZ328"
86 depends on !MMU
87 select M68000
88 help
89 Motorola 68VZ328 processor support.
90
91config M68360
92 bool "MC68360"
93 depends on !MMU
94 select MCPU32
95 help
96 Motorola 68360 processor support.
97
98config M5206
99 bool "MCF5206"
100 depends on !MMU
101 select COLDFIRE
102 select COLDFIRE_SW_A7
103 select HAVE_MBAR
104 help
105 Motorola ColdFire 5206 processor support.
106
107config M5206e
108 bool "MCF5206e"
109 depends on !MMU
110 select COLDFIRE
111 select COLDFIRE_SW_A7
112 select HAVE_MBAR
113 help
114 Motorola ColdFire 5206e processor support.
115
116config M520x
117 bool "MCF520x"
118 depends on !MMU
119 select COLDFIRE
120 select GENERIC_CLOCKEVENTS
121 select HAVE_CACHE_SPLIT
122 help
123 Freescale Coldfire 5207/5208 processor support.
124
125config M523x
126 bool "MCF523x"
127 depends on !MMU
128 select COLDFIRE
129 select GENERIC_CLOCKEVENTS
130 select HAVE_CACHE_SPLIT
131 select HAVE_IPSBAR
132 help
133 Freescale Coldfire 5230/1/2/4/5 processor support
134
135config M5249
136 bool "MCF5249"
137 depends on !MMU
138 select COLDFIRE
139 select COLDFIRE_SW_A7
140 select HAVE_MBAR
141 help
142 Motorola ColdFire 5249 processor support.
143
144config M527x
145 bool
146
147config M5271
148 bool "MCF5271"
149 depends on !MMU
150 select COLDFIRE
151 select M527x
152 select HAVE_CACHE_SPLIT
153 select HAVE_IPSBAR
154 select GENERIC_CLOCKEVENTS
155 help
156 Freescale (Motorola) ColdFire 5270/5271 processor support.
157
158config M5272
159 bool "MCF5272"
160 depends on !MMU
161 select COLDFIRE
162 select COLDFIRE_SW_A7
163 select HAVE_MBAR
164 help
165 Motorola ColdFire 5272 processor support.
166
167config M5275
168 bool "MCF5275"
169 depends on !MMU
170 select COLDFIRE
171 select M527x
172 select HAVE_CACHE_SPLIT
173 select HAVE_IPSBAR
174 select GENERIC_CLOCKEVENTS
175 help
176 Freescale (Motorola) ColdFire 5274/5275 processor support.
177
178config M528x
179 bool "MCF528x"
180 depends on !MMU
181 select COLDFIRE
182 select GENERIC_CLOCKEVENTS
183 select HAVE_CACHE_SPLIT
184 select HAVE_IPSBAR
185 help
186 Motorola ColdFire 5280/5282 processor support.
187
188config M5307
189 bool "MCF5307"
190 depends on !MMU
191 select COLDFIRE
192 select COLDFIRE_SW_A7
193 select HAVE_CACHE_CB
194 select HAVE_MBAR
195 help
196 Motorola ColdFire 5307 processor support.
197
198config M532x
199 bool "MCF532x"
200 depends on !MMU
201 select COLDFIRE
202 select HAVE_CACHE_CB
203 help
204 Freescale (Motorola) ColdFire 532x processor support.
205
206config M5407
207 bool "MCF5407"
208 depends on !MMU
209 select COLDFIRE
210 select COLDFIRE_SW_A7
211 select HAVE_CACHE_CB
212 select HAVE_MBAR
213 help
214 Motorola ColdFire 5407 processor support.
215
216config M54xx
217 bool
218
219config M547x
220 bool "MCF547x"
221 depends on !MMU
222 select COLDFIRE
223 select M54xx
224 select HAVE_CACHE_CB
225 select HAVE_MBAR
226 help
227 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
228
229config M548x
230 bool "MCF548x"
231 depends on !MMU
232 select COLDFIRE
233 select M54xx
234 select HAVE_CACHE_CB
235 select HAVE_MBAR
236 help
237 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
238
239
240comment "Processor Specific Options"
241
242config M68KFPU_EMU
243 bool "Math emulation support (EXPERIMENTAL)"
244 depends on MMU
245 depends on EXPERIMENTAL
246 help
247 At some point in the future, this will cause floating-point math
248 instructions to be emulated by the kernel on machines that lack a
249 floating-point math coprocessor. Thrill-seekers and chronically
250 sleep-deprived psychotic hacker types can say Y now, everyone else
251 should probably wait a while.
252
253config M68KFPU_EMU_EXTRAPREC
254 bool "Math emulation extra precision"
255 depends on M68KFPU_EMU
256 help
257 The fpu uses normally a few bit more during calculations for
258 correct rounding, the emulator can (often) do the same but this
259 extra calculation can cost quite some time, so you can disable
260 it here. The emulator will then "only" calculate with a 64 bit
261 mantissa and round slightly incorrect, what is more than enough
262 for normal usage.
263
264config M68KFPU_EMU_ONLY
265 bool "Math emulation only kernel"
266 depends on M68KFPU_EMU
267 help
268 This option prevents any floating-point instructions from being
269 compiled into the kernel, thereby the kernel doesn't save any
270 floating point context anymore during task switches, so this
271 kernel will only be usable on machines without a floating-point
272 math coprocessor. This makes the kernel a bit faster as no tests
273 needs to be executed whether a floating-point instruction in the
274 kernel should be executed or not.
275
276config ADVANCED
277 bool "Advanced configuration options"
278 depends on MMU
279 ---help---
280 This gives you access to some advanced options for the CPU. The
281 defaults should be fine for most users, but these options may make
282 it possible for you to improve performance somewhat if you know what
283 you are doing.
284
285 Note that the answer to this question won't directly affect the
286 kernel: saying N will just cause the configurator to skip all
287 the questions about these options.
288
289 Most users should say N to this question.
290
291config RMW_INSNS
292 bool "Use read-modify-write instructions"
293 depends on ADVANCED
294 ---help---
295 This allows to use certain instructions that work with indivisible
296 read-modify-write bus cycles. While this is faster than the
297 workaround of disabling interrupts, it can conflict with DMA
298 ( = direct memory access) on many Amiga systems, and it is also said
299 to destabilize other machines. It is very likely that this will
300 cause serious problems on any Amiga or Atari Medusa if set. The only
301 configuration where it should work are 68030-based Ataris, where it
302 apparently improves performance. But you've been warned! Unless you
303 really know what you are doing, say N. Try Y only if you're quite
304 adventurous.
305
306config SINGLE_MEMORY_CHUNK
307 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
308 depends on MMU
309 default y if SUN3
310 select NEED_MULTIPLE_NODES
311 help
312 Ignore all but the first contiguous chunk of physical memory for VM
313 purposes. This will save a few bytes kernel size and may speed up
314 some operations. Say N if not sure.
315
316config ARCH_DISCONTIGMEM_ENABLE
317 def_bool MMU && !SINGLE_MEMORY_CHUNK
318
319config 060_WRITETHROUGH
320 bool "Use write-through caching for 68060 supervisor accesses"
321 depends on ADVANCED && M68060
322 ---help---
323 The 68060 generally uses copyback caching of recently accessed data.
324 Copyback caching means that memory writes will be held in an on-chip
325 cache and only written back to memory some time later. Saying Y
326 here will force supervisor (kernel) accesses to use writethrough
327 caching. Writethrough caching means that data is written to memory
328 straight away, so that cache and memory data always agree.
329 Writethrough caching is less efficient, but is needed for some
330 drivers on 68060 based systems where the 68060 bus snooping signal
331 is hardwired on. The 53c710 SCSI driver is known to suffer from
332 this problem.
333
334config M68K_L2_CACHE
335 bool
336 depends on MAC
337 default y
338
339config NODES_SHIFT
340 int
341 default "3"
342 depends on !SINGLE_MEMORY_CHUNK
343
344config FPU
345 bool
346
347config COLDFIRE_SW_A7
348 bool
349
350config HAVE_CACHE_SPLIT
351 bool
352
353config HAVE_CACHE_CB
354 bool
355
356config HAVE_MBAR
357 bool
358
359config HAVE_IPSBAR
360 bool
361
362config CLOCK_SET
363 bool "Enable setting the CPU clock frequency"
364 depends on COLDFIRE
365 default n
366 help
367 On some CPU's you do not need to know what the core CPU clock
368 frequency is. On these you can disable clock setting. On some
369 traditional 68K parts, and on all ColdFire parts you need to set
370 the appropriate CPU clock frequency. On these devices many of the
371 onboard peripherals derive their timing from the master CPU clock
372 frequency.
373
374config CLOCK_FREQ
375 int "Set the core clock frequency"
376 default "66666666"
377 depends on CLOCK_SET
378 help
379 Define the CPU clock frequency in use. This is the core clock
380 frequency, it may or may not be the same as the external clock
381 crystal fitted to your board. Some processors have an internal
382 PLL and can have their frequency programmed at run time, others
383 use internal dividers. In general the kernel won't setup a PLL
384 if it is fitted (there are some exceptions). This value will be
385 specific to the exact CPU that you are using.
386
387config OLDMASK
388 bool "Old mask 5307 (1H55J) silicon"
389 depends on M5307
390 help
391 Build support for the older revision ColdFire 5307 silicon.
392 Specifically this is the 1H55J mask revision.
393
394if HAVE_CACHE_SPLIT
395choice
396 prompt "Split Cache Configuration"
397 default CACHE_I
398
399config CACHE_I
400 bool "Instruction"
401 help
402 Use all of the ColdFire CPU cache memory as an instruction cache.
403
404config CACHE_D
405 bool "Data"
406 help
407 Use all of the ColdFire CPU cache memory as a data cache.
408
409config CACHE_BOTH
410 bool "Both"
411 help
412 Split the ColdFire CPU cache, and use half as an instruction cache
413 and half as a data cache.
414endchoice
415endif
416
417if HAVE_CACHE_CB
418choice
419 prompt "Data cache mode"
420 default CACHE_WRITETHRU
421
422config CACHE_WRITETHRU
423 bool "Write-through"
424 help
425 The ColdFire CPU cache is set into Write-through mode.
426
427config CACHE_COPYBACK
428 bool "Copy-back"
429 help
430 The ColdFire CPU cache is set into Copy-back mode.
431endchoice
432endif
433