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gerrit-public.fairphone.software / kernel / msm-4.9 / 7fb149ffe357d6ad672cf9325181530b4c478a81 / . / arch / arm / mach-omap2 / pm.h
blob: 9fac67d6c985a3ca36489f8a536e385f0b60eb86 [file] [log] [blame]
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]1/*
2 * OMAP2/3 Power Management Routines
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 * Jouni Hogander
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
12#define __ARCH_ARM_MACH_OMAP2_PM_H
13
Thara Gopinath0c0a5d62010-05-29 22:02:23 +0530[diff] [blame]14#include <linux/err.h>
15
Paul Walmsley72e06d02010-12-21 21:05:16 -0700[diff] [blame]16#include "powerdomain.h"
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300[diff] [blame]17
Tero Kristo27d59a42008-10-13 13:15:00 +0300[diff] [blame]18extern void *omap3_secure_ram_storage;
Kevin Hilmanc40552b2009-10-06 14:25:09 -0700[diff] [blame]19extern void omap3_pm_off_mode_enable(int);
Rajendra Nayak99e6a4d2008-10-08 17:30:58 +0530[diff] [blame]20extern void omap_sram_idle(void);
Santosh Shilimkareb6a2c72010-09-15 01:04:01 +0530[diff] [blame]21extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
Kalle Jokiniemi03433712008-09-26 11:04:20 +0300[diff] [blame]22extern int omap3_idle_init(void);
Santosh Shilimkar98272662011-08-16 17:31:40 +0530[diff] [blame]23extern int omap4_idle_init(void);
Paul Walmsley92206fd2012-02-02 02:38:50 -0700[diff] [blame]24extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
Paul Walmsley14164082012-02-02 02:30:50 -0700[diff] [blame]25extern int (*omap_pm_suspend)(void);
Tero Kristo27d59a42008-10-13 13:15:00 +0300[diff] [blame]26
Nishanth Menonfd1478c2010-12-09 09:13:46 -0600[diff] [blame]27#if defined(CONFIG_PM_OPP)
28extern int omap3_opp_init(void);
Nishanth Menonf5a64222010-12-09 09:13:47 -0600[diff] [blame]29extern int omap4_opp_init(void);
Nishanth Menonfd1478c2010-12-09 09:13:46 -0600[diff] [blame]30#else
31static inline int omap3_opp_init(void)
32{
33 return -EINVAL;
34}
Nishanth Menonf5a64222010-12-09 09:13:47 -0600[diff] [blame]35static inline int omap4_opp_init(void)
36{
37 return -EINVAL;
38}
Nishanth Menonfd1478c2010-12-09 09:13:46 -0600[diff] [blame]39#endif
40
Tero Kristo68d47782008-11-26 12:26:24 +0200[diff] [blame]41extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
42extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
43
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]44#ifdef CONFIG_PM_DEBUG
Loïc Minierebfa88c2010-09-27 23:04:20 +0200[diff] [blame]45extern u32 enable_off_mode;
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]46#else
Loïc Minierebfa88c2010-09-27 23:04:20 +0200[diff] [blame]47#define enable_off_mode 0
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]48#endif
49
50#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300[diff] [blame]51extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]52#else
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300[diff] [blame]53#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]54#endif /* CONFIG_PM_DEBUG */
55
Jean Pihet46e130d2011-06-29 18:40:23 +0200[diff] [blame]56/* 24xx */
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]57extern void omap24xx_idle_loop_suspend(void);
Jean Pihet46e130d2011-06-29 18:40:23 +0200[diff] [blame]58extern unsigned int omap24xx_idle_loop_suspend_sz;
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]59
60extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
61 void __iomem *sdrc_power);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]62extern unsigned int omap24xx_cpu_suspend_sz;
Jean Pihet46e130d2011-06-29 18:40:23 +0200[diff] [blame]63
64/* 3xxx */
Russell Kingcbe26342011-06-30 08:45:49 +0100[diff] [blame]65extern void omap34xx_cpu_suspend(int save_state);
Jean Pihet46e130d2011-06-29 18:40:23 +0200[diff] [blame]66
67/* omap3_do_wfi function pointer and size, for copy to SRAM */
68extern void omap3_do_wfi(void);
69extern unsigned int omap3_do_wfi_sz;
70/* ... and its pointer from SRAM after copy */
71extern void (*omap3_do_wfi_sram)(void);
72
73/* save_secure_ram_context function pointer and size, for copy to SRAM */
74extern int save_secure_ram_context(u32 *addr);
75extern unsigned int save_secure_ram_context_sz;
76
77extern void omap3_save_scratchpad_contents(void);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]78
Nishanth Menon458e9992010-12-20 14:05:06 -0600[diff] [blame]79#define PM_RTA_ERRATUM_i608 (1 << 0)
Eduardo Valentincc1b6022010-12-20 14:05:09 -0600[diff] [blame]80#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
Nishanth Menon458e9992010-12-20 14:05:06 -0600[diff] [blame]81
Nishanth Menon8cdfd832010-12-20 14:05:05 -0600[diff] [blame]82#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
83extern u16 pm34xx_errata;
84#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
Peter 'p2' De Schrijverc4236d22010-12-20 14:05:07 -0600[diff] [blame]85extern void enable_omap3630_toggle_l2_on_restore(void);
Nishanth Menon8cdfd832010-12-20 14:05:05 -0600[diff] [blame]86#else
87#define IS_PM34XX_ERRATUM(id) 0
Peter 'p2' De Schrijverc4236d22010-12-20 14:05:07 -0600[diff] [blame]88static inline void enable_omap3630_toggle_l2_on_restore(void) { }
Nishanth Menon8cdfd832010-12-20 14:05:05 -0600[diff] [blame]89#endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
90
Jean Pihet7fb149f2012-04-24 11:38:50 +0530[diff] [blame^]91#ifdef CONFIG_POWER_AVS_OMAP
Thara Gopinath0c0a5d62010-05-29 22:02:23 +0530[diff] [blame]92extern int omap_devinit_smartreflex(void);
93extern void omap_enable_smartreflex_on_init(void);
94#else
95static inline int omap_devinit_smartreflex(void)
96{
97 return -EINVAL;
98}
99
100static inline void omap_enable_smartreflex_on_init(void) {}
101#endif
102
Thara Gopinathfbc319f2010-12-10 22:51:05 +0530[diff] [blame]103#ifdef CONFIG_TWL4030_CORE
104extern int omap3_twl_init(void);
Thara Gopinath7bc3ed92010-12-10 23:15:16 +0530[diff] [blame]105extern int omap4_twl_init(void);
Thara Gopinath40713182011-02-15 13:28:58 +0530[diff] [blame]106extern int omap3_twl_set_sr_bit(bool enable);
Thara Gopinathfbc319f2010-12-10 22:51:05 +0530[diff] [blame]107#else
108static inline int omap3_twl_init(void)
109{
110 return -EINVAL;
111}
Thara Gopinath7bc3ed92010-12-10 23:15:16 +0530[diff] [blame]112static inline int omap4_twl_init(void)
113{
114 return -EINVAL;
115}
Thara Gopinathfbc319f2010-12-10 22:51:05 +0530[diff] [blame]116#endif
117
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]118#endif