blob: 2e30c8288740b2a24752cdfe565a7e2bef5e77ca [file] [log] [blame]
Anton Vorontsove94cdef2010-03-26 21:19:02 +03001/*
2 * Cavium Networks CNS3420 Validation Board
3 *
4 * Copyright 2000 Deep Blue Solutions Ltd
5 * Copyright 2008 ARM Limited
6 * Copyright 2008 Cavium Networks
7 * Scott Shu
8 * Copyright 2010 MontaVista Software, LLC.
9 * Anton Vorontsov <avorontsov@mvista.com>
10 *
11 * This file is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License, Version 2, as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/compiler.h>
19#include <linux/io.h>
20#include <linux/serial_core.h>
21#include <linux/serial_8250.h>
22#include <linux/platform_device.h>
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/physmap.h>
25#include <linux/mtd/partitions.h>
26#include <asm/setup.h>
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30#include <asm/mach/time.h>
31#include <mach/hardware.h>
32#include <mach/cns3xxx.h>
33#include <mach/irqs.h>
34#include "core.h"
35
36/*
37 * NOR Flash
38 */
39static struct mtd_partition cns3420_nor_partitions[] = {
40 {
41 .name = "uboot",
42 .size = 0x00040000,
43 .offset = 0,
44 .mask_flags = MTD_WRITEABLE,
45 }, {
46 .name = "kernel",
47 .size = 0x004C0000,
48 .offset = MTDPART_OFS_APPEND,
49 }, {
50 .name = "filesystem",
51 .size = 0x7000000,
52 .offset = MTDPART_OFS_APPEND,
53 }, {
54 .name = "filesystem2",
55 .size = 0x0AE0000,
56 .offset = MTDPART_OFS_APPEND,
57 }, {
58 .name = "ubootenv",
59 .size = MTDPART_SIZ_FULL,
60 .offset = MTDPART_OFS_APPEND,
61 },
62};
63
64static struct physmap_flash_data cns3420_nor_pdata = {
65 .width = 2,
66 .parts = cns3420_nor_partitions,
67 .nr_parts = ARRAY_SIZE(cns3420_nor_partitions),
68};
69
70static struct resource cns3420_nor_res = {
71 .start = CNS3XXX_FLASH_BASE,
72 .end = CNS3XXX_FLASH_BASE + SZ_128M - 1,
73 .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
74};
75
76static struct platform_device cns3420_nor_pdev = {
77 .name = "physmap-flash",
78 .id = 0,
79 .resource = &cns3420_nor_res,
80 .num_resources = 1,
81 .dev = {
82 .platform_data = &cns3420_nor_pdata,
83 },
84};
85
86/*
87 * UART
88 */
89static void __init cns3420_early_serial_setup(void)
90{
91#ifdef CONFIG_SERIAL_8250_CONSOLE
92 static struct uart_port cns3420_serial_port = {
93 .membase = (void __iomem *)CNS3XXX_UART0_BASE_VIRT,
94 .mapbase = CNS3XXX_UART0_BASE,
95 .irq = IRQ_CNS3XXX_UART0,
96 .iotype = UPIO_MEM,
97 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
98 .regshift = 2,
99 .uartclk = 24000000,
100 .line = 0,
101 .type = PORT_16550A,
102 .fifosize = 16,
103 };
104
105 early_serial_setup(&cns3420_serial_port);
106#endif
107}
108
109/*
110 * Initialization
111 */
112static struct platform_device *cns3420_pdevs[] __initdata = {
113 &cns3420_nor_pdev,
114};
115
116static void __init cns3420_init(void)
117{
118 platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs));
119
120 pm_power_off = cns3xxx_power_off;
121}
122
123static struct map_desc cns3420_io_desc[] __initdata = {
124 {
125 .virtual = CNS3XXX_UART0_BASE_VIRT,
126 .pfn = __phys_to_pfn(CNS3XXX_UART0_BASE),
127 .length = SZ_4K,
128 .type = MT_DEVICE,
129 },
130};
131
132static void __init cns3420_map_io(void)
133{
134 cns3xxx_map_io();
135 iotable_init(cns3420_io_desc, ARRAY_SIZE(cns3420_io_desc));
136
137 cns3420_early_serial_setup();
138}
139
140MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
141 .phys_io = CNS3XXX_UART0_BASE,
142 .io_pg_offst = (CNS3XXX_UART0_BASE_VIRT >> 18) & 0xfffc,
143 .boot_params = 0x00000100,
144 .map_io = cns3420_map_io,
145 .init_irq = cns3xxx_init_irq,
146 .timer = &cns3xxx_timer,
147 .init_machine = cns3420_init,
148MACHINE_END