Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 1 | /* |
| 2 | * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T] |
| 3 | * |
| 4 | * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org> |
| 5 | * |
| 6 | * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/ |
| 7 | * by Dany Salman <salmandany@yahoo.fr> |
| 8 | * Copyright (c) 2004 TDF |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 23 | * |
| 24 | */ |
| 25 | |
| 26 | #include <linux/i2c.h> |
| 27 | #include <linux/i2c-algo-bit.h> |
| 28 | #include <linux/init.h> |
| 29 | #include <linux/kernel.h> |
| 30 | #include <linux/module.h> |
| 31 | #include <linux/pci.h> |
| 32 | #include <linux/dma-mapping.h> |
| 33 | |
| 34 | #include "demux.h" |
| 35 | #include "dmxdev.h" |
| 36 | #include "dvb_demux.h" |
| 37 | #include "dvb_frontend.h" |
| 38 | #include "dvb_net.h" |
| 39 | #include "dvbdev.h" |
| 40 | #include "tda1004x.h" |
| 41 | |
| 42 | #define DRIVER_NAME "pluto2" |
| 43 | |
| 44 | #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */ |
| 45 | #define REG_PCAR 0x0020 /* PC address register */ |
| 46 | #define REG_TSCR 0x0024 /* TS ctrl & status */ |
| 47 | #define REG_MISC 0x0028 /* miscellaneous */ |
| 48 | #define REG_MMAC 0x002c /* MSB MAC address */ |
| 49 | #define REG_IMAC 0x0030 /* ISB MAC address */ |
| 50 | #define REG_LMAC 0x0034 /* LSB MAC address */ |
| 51 | #define REG_SPID 0x0038 /* SPI data */ |
| 52 | #define REG_SLCS 0x003c /* serial links ctrl/status */ |
| 53 | |
| 54 | #define PID0_NOFIL (0x0001 << 16) |
| 55 | #define PIDn_ENP (0x0001 << 15) |
| 56 | #define PID0_END (0x0001 << 14) |
| 57 | #define PID0_AFIL (0x0001 << 13) |
| 58 | #define PIDn_PID (0x1fff << 0) |
| 59 | |
| 60 | #define TSCR_NBPACKETS (0x00ff << 24) |
| 61 | #define TSCR_DEM (0x0001 << 17) |
| 62 | #define TSCR_DE (0x0001 << 16) |
| 63 | #define TSCR_RSTN (0x0001 << 15) |
| 64 | #define TSCR_MSKO (0x0001 << 14) |
| 65 | #define TSCR_MSKA (0x0001 << 13) |
| 66 | #define TSCR_MSKL (0x0001 << 12) |
| 67 | #define TSCR_OVR (0x0001 << 11) |
| 68 | #define TSCR_AFUL (0x0001 << 10) |
| 69 | #define TSCR_LOCK (0x0001 << 9) |
| 70 | #define TSCR_IACK (0x0001 << 8) |
| 71 | #define TSCR_ADEF (0x007f << 0) |
| 72 | |
| 73 | #define MISC_DVR (0x0fff << 4) |
| 74 | #define MISC_ALED (0x0001 << 3) |
| 75 | #define MISC_FRST (0x0001 << 2) |
| 76 | #define MISC_LED1 (0x0001 << 1) |
| 77 | #define MISC_LED0 (0x0001 << 0) |
| 78 | |
| 79 | #define SPID_SPIDR (0x00ff << 0) |
| 80 | |
| 81 | #define SLCS_SCL (0x0001 << 7) |
| 82 | #define SLCS_SDA (0x0001 << 6) |
| 83 | #define SLCS_CSN (0x0001 << 2) |
| 84 | #define SLCS_OVR (0x0001 << 1) |
| 85 | #define SLCS_SWC (0x0001 << 0) |
| 86 | |
| 87 | #define TS_DMA_PACKETS (8) |
| 88 | #define TS_DMA_BYTES (188 * TS_DMA_PACKETS) |
| 89 | |
| 90 | #define I2C_ADDR_TDA10046 0x10 |
| 91 | #define I2C_ADDR_TUA6034 0xc2 |
| 92 | #define NHWFILTERS 8 |
| 93 | |
| 94 | struct pluto { |
| 95 | /* pci */ |
| 96 | struct pci_dev *pdev; |
| 97 | u8 __iomem *io_mem; |
| 98 | |
| 99 | /* dvb */ |
| 100 | struct dmx_frontend hw_frontend; |
| 101 | struct dmx_frontend mem_frontend; |
| 102 | struct dmxdev dmxdev; |
| 103 | struct dvb_adapter dvb_adapter; |
| 104 | struct dvb_demux demux; |
| 105 | struct dvb_frontend *fe; |
| 106 | struct dvb_net dvbnet; |
| 107 | unsigned int full_ts_users; |
| 108 | unsigned int users; |
| 109 | |
| 110 | /* i2c */ |
| 111 | struct i2c_algo_bit_data i2c_bit; |
| 112 | struct i2c_adapter i2c_adap; |
| 113 | unsigned int i2cbug; |
| 114 | |
| 115 | /* irq */ |
| 116 | unsigned int overflow; |
| 117 | |
| 118 | /* dma */ |
| 119 | dma_addr_t dma_addr; |
| 120 | u8 dma_buf[TS_DMA_BYTES]; |
| 121 | u8 dummy[4096]; |
| 122 | }; |
| 123 | |
| 124 | static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed) |
| 125 | { |
| 126 | return container_of(feed->demux, struct pluto, demux); |
| 127 | } |
| 128 | |
| 129 | static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe) |
| 130 | { |
| 131 | return container_of(fe->dvb, struct pluto, dvb_adapter); |
| 132 | } |
| 133 | |
| 134 | static inline u32 pluto_readreg(struct pluto *pluto, u32 reg) |
| 135 | { |
| 136 | return readl(&pluto->io_mem[reg]); |
| 137 | } |
| 138 | |
| 139 | static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val) |
| 140 | { |
| 141 | writel(val, &pluto->io_mem[reg]); |
| 142 | } |
| 143 | |
| 144 | static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits) |
| 145 | { |
| 146 | u32 val = readl(&pluto->io_mem[reg]); |
| 147 | val &= ~mask; |
| 148 | val |= bits; |
| 149 | writel(val, &pluto->io_mem[reg]); |
| 150 | } |
| 151 | |
| 152 | static void pluto_setsda(void *data, int state) |
| 153 | { |
| 154 | struct pluto *pluto = data; |
| 155 | |
| 156 | if (state) |
| 157 | pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA); |
| 158 | else |
| 159 | pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0); |
| 160 | } |
| 161 | |
| 162 | static void pluto_setscl(void *data, int state) |
| 163 | { |
| 164 | struct pluto *pluto = data; |
| 165 | |
| 166 | if (state) |
| 167 | pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL); |
| 168 | else |
| 169 | pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0); |
| 170 | |
| 171 | /* try to detect i2c_inb() to workaround hardware bug: |
| 172 | * reset SDA to high after SCL has been set to low */ |
| 173 | if ((state) && (pluto->i2cbug == 0)) { |
| 174 | pluto->i2cbug = 1; |
| 175 | } else { |
| 176 | if ((!state) && (pluto->i2cbug == 1)) |
| 177 | pluto_setsda(pluto, 1); |
| 178 | pluto->i2cbug = 0; |
| 179 | } |
| 180 | } |
| 181 | |
| 182 | static int pluto_getsda(void *data) |
| 183 | { |
| 184 | struct pluto *pluto = data; |
| 185 | |
| 186 | return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA; |
| 187 | } |
| 188 | |
| 189 | static int pluto_getscl(void *data) |
| 190 | { |
| 191 | struct pluto *pluto = data; |
| 192 | |
| 193 | return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL; |
| 194 | } |
| 195 | |
| 196 | static void pluto_reset_frontend(struct pluto *pluto, int reenable) |
| 197 | { |
| 198 | u32 val = pluto_readreg(pluto, REG_MISC); |
| 199 | |
| 200 | if (val & MISC_FRST) { |
| 201 | val &= ~MISC_FRST; |
| 202 | pluto_writereg(pluto, REG_MISC, val); |
| 203 | } |
| 204 | if (reenable) { |
| 205 | val |= MISC_FRST; |
| 206 | pluto_writereg(pluto, REG_MISC, val); |
| 207 | } |
| 208 | } |
| 209 | |
| 210 | static void pluto_reset_ts(struct pluto *pluto, int reenable) |
| 211 | { |
| 212 | u32 val = pluto_readreg(pluto, REG_TSCR); |
| 213 | |
| 214 | if (val & TSCR_RSTN) { |
| 215 | val &= ~TSCR_RSTN; |
| 216 | pluto_writereg(pluto, REG_TSCR, val); |
| 217 | } |
| 218 | if (reenable) { |
| 219 | val |= TSCR_RSTN; |
| 220 | pluto_writereg(pluto, REG_TSCR, val); |
| 221 | } |
| 222 | } |
| 223 | |
| 224 | static void pluto_set_dma_addr(struct pluto *pluto) |
| 225 | { |
| 226 | pluto_writereg(pluto, REG_PCAR, cpu_to_le32(pluto->dma_addr)); |
| 227 | } |
| 228 | |
| 229 | static int __devinit pluto_dma_map(struct pluto *pluto) |
| 230 | { |
| 231 | pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf, |
| 232 | TS_DMA_BYTES, PCI_DMA_FROMDEVICE); |
| 233 | |
| 234 | return pci_dma_mapping_error(pluto->dma_addr); |
| 235 | } |
| 236 | |
| 237 | static void pluto_dma_unmap(struct pluto *pluto) |
| 238 | { |
| 239 | pci_unmap_single(pluto->pdev, pluto->dma_addr, |
| 240 | TS_DMA_BYTES, PCI_DMA_FROMDEVICE); |
| 241 | } |
| 242 | |
| 243 | static int pluto_start_feed(struct dvb_demux_feed *f) |
| 244 | { |
| 245 | struct pluto *pluto = feed_to_pluto(f); |
| 246 | |
| 247 | /* enable PID filtering */ |
| 248 | if (pluto->users++ == 0) |
| 249 | pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0); |
| 250 | |
| 251 | if ((f->pid < 0x2000) && (f->index < NHWFILTERS)) |
| 252 | pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid); |
| 253 | else if (pluto->full_ts_users++ == 0) |
| 254 | pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL); |
| 255 | |
| 256 | return 0; |
| 257 | } |
| 258 | |
| 259 | static int pluto_stop_feed(struct dvb_demux_feed *f) |
| 260 | { |
| 261 | struct pluto *pluto = feed_to_pluto(f); |
| 262 | |
| 263 | /* disable PID filtering */ |
| 264 | if (--pluto->users == 0) |
| 265 | pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL); |
| 266 | |
| 267 | if ((f->pid < 0x2000) && (f->index < NHWFILTERS)) |
| 268 | pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff); |
| 269 | else if (--pluto->full_ts_users == 0) |
| 270 | pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0); |
| 271 | |
| 272 | return 0; |
| 273 | } |
| 274 | |
| 275 | static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets) |
| 276 | { |
| 277 | /* synchronize the DMA transfer with the CPU |
| 278 | * first so that we see updated contents. */ |
| 279 | pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr, |
| 280 | TS_DMA_BYTES, PCI_DMA_FROMDEVICE); |
| 281 | |
| 282 | /* Workaround for broken hardware: |
| 283 | * [1] On startup NBPACKETS seems to contain an uninitialized value, |
| 284 | * but no packets have been transfered. |
| 285 | * [2] Sometimes (actually very often) NBPACKETS stays at zero |
| 286 | * although one packet has been transfered. |
| 287 | */ |
| 288 | if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) { |
Andreas Oberritter | 6573dd7 | 2005-11-08 21:35:14 -0800 | [diff] [blame] | 289 | unsigned int i = 0; |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 290 | while (pluto->dma_buf[i] == 0x47) |
| 291 | i += 188; |
Andreas Oberritter | 6573dd7 | 2005-11-08 21:35:14 -0800 | [diff] [blame] | 292 | nbpackets = i / 188; |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets); |
| 296 | |
| 297 | /* clear the dma buffer. this is needed to be able to identify |
| 298 | * new valid ts packets above */ |
| 299 | memset(pluto->dma_buf, 0, nbpackets * 188); |
| 300 | |
| 301 | /* reset the dma address */ |
| 302 | pluto_set_dma_addr(pluto); |
| 303 | |
| 304 | /* sync the buffer and give it back to the card */ |
| 305 | pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr, |
| 306 | TS_DMA_BYTES, PCI_DMA_FROMDEVICE); |
| 307 | } |
| 308 | |
| 309 | static irqreturn_t pluto_irq(int irq, void *dev_id, struct pt_regs *regs) |
| 310 | { |
| 311 | struct pluto *pluto = dev_id; |
| 312 | u32 tscr; |
| 313 | |
| 314 | /* check whether an interrupt occured on this device */ |
| 315 | tscr = pluto_readreg(pluto, REG_TSCR); |
| 316 | if (!(tscr & (TSCR_DE | TSCR_OVR))) |
| 317 | return IRQ_NONE; |
| 318 | |
| 319 | if (tscr == 0xffffffff) { |
| 320 | // FIXME: maybe recover somehow |
| 321 | dev_err(&pluto->pdev->dev, "card hung up :(\n"); |
| 322 | return IRQ_HANDLED; |
| 323 | } |
| 324 | |
| 325 | /* dma end interrupt */ |
| 326 | if (tscr & TSCR_DE) { |
| 327 | pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24); |
| 328 | /* overflow interrupt */ |
| 329 | if (tscr & TSCR_OVR) |
| 330 | pluto->overflow++; |
| 331 | if (pluto->overflow) { |
| 332 | dev_err(&pluto->pdev->dev, "overflow irq (%d)\n", |
| 333 | pluto->overflow); |
| 334 | pluto_reset_ts(pluto, 1); |
| 335 | pluto->overflow = 0; |
| 336 | } |
| 337 | } else if (tscr & TSCR_OVR) { |
| 338 | pluto->overflow++; |
| 339 | } |
| 340 | |
| 341 | /* ACK the interrupt */ |
| 342 | pluto_writereg(pluto, REG_TSCR, tscr | TSCR_IACK); |
| 343 | |
| 344 | return IRQ_HANDLED; |
| 345 | } |
| 346 | |
| 347 | static void __devinit pluto_enable_irqs(struct pluto *pluto) |
| 348 | { |
| 349 | u32 val = pluto_readreg(pluto, REG_TSCR); |
| 350 | |
| 351 | /* set the number of packets */ |
| 352 | val &= ~TSCR_ADEF; |
| 353 | val |= TS_DMA_PACKETS / 2; |
| 354 | /* disable AFUL and LOCK interrupts */ |
| 355 | val |= (TSCR_MSKA | TSCR_MSKL); |
| 356 | /* enable DMA and OVERFLOW interrupts */ |
| 357 | val &= ~(TSCR_DEM | TSCR_MSKO); |
| 358 | /* clear pending interrupts */ |
| 359 | val |= TSCR_IACK; |
| 360 | |
| 361 | pluto_writereg(pluto, REG_TSCR, val); |
| 362 | } |
| 363 | |
| 364 | static void pluto_disable_irqs(struct pluto *pluto) |
| 365 | { |
| 366 | u32 val = pluto_readreg(pluto, REG_TSCR); |
| 367 | |
| 368 | /* disable all interrupts */ |
| 369 | val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL); |
| 370 | /* clear pending interrupts */ |
| 371 | val |= TSCR_IACK; |
| 372 | |
| 373 | pluto_writereg(pluto, REG_TSCR, val); |
| 374 | } |
| 375 | |
| 376 | static int __devinit pluto_hw_init(struct pluto *pluto) |
| 377 | { |
| 378 | pluto_reset_frontend(pluto, 1); |
| 379 | |
| 380 | /* set automatic LED control by FPGA */ |
| 381 | pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED); |
| 382 | |
| 383 | /* set data endianess */ |
| 384 | #ifdef __LITTLE_ENDIAN |
| 385 | pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END); |
| 386 | #else |
| 387 | pluto_rw(pluto, REG_PIDn(0), PID0_END, 0); |
| 388 | #endif |
| 389 | /* map DMA and set address */ |
| 390 | pluto_dma_map(pluto); |
| 391 | pluto_set_dma_addr(pluto); |
| 392 | |
| 393 | /* enable interrupts */ |
| 394 | pluto_enable_irqs(pluto); |
| 395 | |
| 396 | /* reset TS logic */ |
| 397 | pluto_reset_ts(pluto, 1); |
| 398 | |
| 399 | return 0; |
| 400 | } |
| 401 | |
| 402 | static void pluto_hw_exit(struct pluto *pluto) |
| 403 | { |
| 404 | /* disable interrupts */ |
| 405 | pluto_disable_irqs(pluto); |
| 406 | |
| 407 | pluto_reset_ts(pluto, 0); |
| 408 | |
| 409 | /* LED: disable automatic control, enable yellow, disable green */ |
| 410 | pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1); |
| 411 | |
| 412 | /* unmap DMA */ |
| 413 | pluto_dma_unmap(pluto); |
| 414 | |
| 415 | pluto_reset_frontend(pluto, 0); |
| 416 | } |
| 417 | |
| 418 | static inline u32 divide(u32 numerator, u32 denominator) |
| 419 | { |
| 420 | if (denominator == 0) |
| 421 | return ~0; |
| 422 | |
| 423 | return (numerator + denominator / 2) / denominator; |
| 424 | } |
| 425 | |
| 426 | /* LG Innotek TDTE-E001P (Infineon TUA6034) */ |
Andrew de Quincey | 4b4c915 | 2006-04-18 17:47:11 -0300 | [diff] [blame] | 427 | static int lg_tdtpe001p_tuner_set_params(struct dvb_frontend *fe, |
| 428 | struct dvb_frontend_parameters *p) |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 429 | { |
| 430 | struct pluto *pluto = frontend_to_pluto(fe); |
| 431 | struct i2c_msg msg; |
| 432 | int ret; |
| 433 | u8 buf[4]; |
| 434 | u32 div; |
| 435 | |
| 436 | // Fref = 166.667 Hz |
| 437 | // Fref * 3 = 500.000 Hz |
| 438 | // IF = 36166667 |
| 439 | // IF / Fref = 217 |
| 440 | //div = divide(p->frequency + 36166667, 166667); |
| 441 | div = divide(p->frequency * 3, 500000) + 217; |
| 442 | buf[0] = (div >> 8) & 0x7f; |
| 443 | buf[1] = (div >> 0) & 0xff; |
| 444 | |
| 445 | if (p->frequency < 611000000) |
| 446 | buf[2] = 0xb4; |
| 447 | else if (p->frequency < 811000000) |
| 448 | buf[2] = 0xbc; |
| 449 | else |
| 450 | buf[2] = 0xf4; |
| 451 | |
| 452 | // VHF: 174-230 MHz |
| 453 | // center: 350 MHz |
| 454 | // UHF: 470-862 MHz |
| 455 | if (p->frequency < 350000000) |
| 456 | buf[3] = 0x02; |
| 457 | else |
| 458 | buf[3] = 0x04; |
| 459 | |
| 460 | if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) |
| 461 | buf[3] |= 0x08; |
| 462 | |
| 463 | if (sizeof(buf) == 6) { |
| 464 | buf[4] = buf[2]; |
| 465 | buf[4] &= ~0x1c; |
| 466 | buf[4] |= 0x18; |
| 467 | |
| 468 | buf[5] = (0 << 7) | (2 << 4); |
| 469 | } |
| 470 | |
| 471 | msg.addr = I2C_ADDR_TUA6034 >> 1; |
| 472 | msg.flags = 0; |
| 473 | msg.buf = buf; |
| 474 | msg.len = sizeof(buf); |
| 475 | |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 476 | if (fe->ops.i2c_gate_ctrl) |
| 477 | fe->ops.i2c_gate_ctrl(fe, 1); |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 478 | ret = i2c_transfer(&pluto->i2c_adap, &msg, 1); |
| 479 | if (ret < 0) |
| 480 | return ret; |
| 481 | else if (ret == 0) |
| 482 | return -EREMOTEIO; |
| 483 | |
| 484 | return 0; |
| 485 | } |
| 486 | |
| 487 | static int pluto2_request_firmware(struct dvb_frontend *fe, |
| 488 | const struct firmware **fw, char *name) |
| 489 | { |
| 490 | struct pluto *pluto = frontend_to_pluto(fe); |
| 491 | |
| 492 | return request_firmware(fw, name, &pluto->pdev->dev); |
| 493 | } |
| 494 | |
| 495 | static struct tda1004x_config pluto2_fe_config __devinitdata = { |
| 496 | .demod_address = I2C_ADDR_TDA10046 >> 1, |
| 497 | .invert = 1, |
| 498 | .invert_oclk = 0, |
| 499 | .xtal_freq = TDA10046_XTAL_16M, |
| 500 | .agc_config = TDA10046_AGC_DEFAULT, |
| 501 | .if_freq = TDA10046_FREQ_3617, |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 502 | .request_firmware = pluto2_request_firmware, |
| 503 | }; |
| 504 | |
| 505 | static int __devinit frontend_init(struct pluto *pluto) |
| 506 | { |
| 507 | int ret; |
| 508 | |
| 509 | pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap); |
| 510 | if (!pluto->fe) { |
| 511 | dev_err(&pluto->pdev->dev, "could not attach frontend\n"); |
| 512 | return -ENODEV; |
| 513 | } |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 514 | pluto->fe->ops.tuner_ops.set_params = lg_tdtpe001p_tuner_set_params; |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 515 | |
| 516 | ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe); |
| 517 | if (ret < 0) { |
Patrick Boettcher | dea7486 | 2006-05-14 05:01:31 -0300 | [diff] [blame] | 518 | if (pluto->fe->ops.release) |
| 519 | pluto->fe->ops.release(pluto->fe); |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 520 | return ret; |
| 521 | } |
| 522 | |
| 523 | return 0; |
| 524 | } |
| 525 | |
| 526 | static void __devinit pluto_read_rev(struct pluto *pluto) |
| 527 | { |
| 528 | u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR; |
| 529 | dev_info(&pluto->pdev->dev, "board revision %d.%d\n", |
| 530 | (val >> 12) & 0x0f, (val >> 4) & 0xff); |
| 531 | } |
| 532 | |
| 533 | static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac) |
| 534 | { |
| 535 | u32 val = pluto_readreg(pluto, REG_MMAC); |
| 536 | mac[0] = (val >> 8) & 0xff; |
| 537 | mac[1] = (val >> 0) & 0xff; |
| 538 | |
| 539 | val = pluto_readreg(pluto, REG_IMAC); |
| 540 | mac[2] = (val >> 8) & 0xff; |
| 541 | mac[3] = (val >> 0) & 0xff; |
| 542 | |
| 543 | val = pluto_readreg(pluto, REG_LMAC); |
| 544 | mac[4] = (val >> 8) & 0xff; |
| 545 | mac[5] = (val >> 0) & 0xff; |
| 546 | |
| 547 | dev_info(&pluto->pdev->dev, "MAC %02x:%02x:%02x:%02x:%02x:%02x\n", |
| 548 | mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); |
| 549 | } |
| 550 | |
| 551 | static int __devinit pluto_read_serial(struct pluto *pluto) |
| 552 | { |
| 553 | struct pci_dev *pdev = pluto->pdev; |
| 554 | unsigned int i, j; |
| 555 | u8 __iomem *cis; |
| 556 | |
| 557 | cis = pci_iomap(pdev, 1, 0); |
| 558 | if (!cis) |
| 559 | return -EIO; |
| 560 | |
| 561 | dev_info(&pdev->dev, "S/N "); |
| 562 | |
| 563 | for (i = 0xe0; i < 0x100; i += 4) { |
| 564 | u32 val = readl(&cis[i]); |
| 565 | for (j = 0; j < 32; j += 8) { |
| 566 | if ((val & 0xff) == 0xff) |
| 567 | goto out; |
| 568 | printk("%c", val & 0xff); |
| 569 | val >>= 8; |
| 570 | } |
| 571 | } |
| 572 | out: |
| 573 | printk("\n"); |
| 574 | pci_iounmap(pdev, cis); |
| 575 | |
| 576 | return 0; |
| 577 | } |
| 578 | |
| 579 | static int __devinit pluto2_probe(struct pci_dev *pdev, |
| 580 | const struct pci_device_id *ent) |
| 581 | { |
| 582 | struct pluto *pluto; |
| 583 | struct dvb_adapter *dvb_adapter; |
| 584 | struct dvb_demux *dvbdemux; |
| 585 | struct dmx_demux *dmx; |
| 586 | int ret = -ENOMEM; |
| 587 | |
Panagiotis Issaris | 7408187 | 2006-01-11 19:40:56 -0200 | [diff] [blame] | 588 | pluto = kzalloc(sizeof(struct pluto), GFP_KERNEL); |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 589 | if (!pluto) |
| 590 | goto out; |
| 591 | |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 592 | pluto->pdev = pdev; |
| 593 | |
| 594 | ret = pci_enable_device(pdev); |
| 595 | if (ret < 0) |
| 596 | goto err_kfree; |
| 597 | |
| 598 | /* enable interrupts */ |
| 599 | pci_write_config_dword(pdev, 0x6c, 0x8000); |
| 600 | |
| 601 | ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
| 602 | if (ret < 0) |
| 603 | goto err_pci_disable_device; |
| 604 | |
| 605 | pci_set_master(pdev); |
| 606 | |
| 607 | ret = pci_request_regions(pdev, DRIVER_NAME); |
| 608 | if (ret < 0) |
| 609 | goto err_pci_disable_device; |
| 610 | |
| 611 | pluto->io_mem = pci_iomap(pdev, 0, 0x40); |
| 612 | if (!pluto->io_mem) { |
| 613 | ret = -EIO; |
| 614 | goto err_pci_release_regions; |
| 615 | } |
| 616 | |
| 617 | pci_set_drvdata(pdev, pluto); |
| 618 | |
Thomas Gleixner | 8076fe3 | 2006-07-01 19:29:37 -0700 | [diff] [blame^] | 619 | ret = request_irq(pdev->irq, pluto_irq, IRQF_SHARED, DRIVER_NAME, pluto); |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 620 | if (ret < 0) |
| 621 | goto err_pci_iounmap; |
| 622 | |
| 623 | ret = pluto_hw_init(pluto); |
| 624 | if (ret < 0) |
| 625 | goto err_free_irq; |
| 626 | |
| 627 | /* i2c */ |
| 628 | i2c_set_adapdata(&pluto->i2c_adap, pluto); |
| 629 | strcpy(pluto->i2c_adap.name, DRIVER_NAME); |
| 630 | pluto->i2c_adap.owner = THIS_MODULE; |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 631 | pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL; |
| 632 | pluto->i2c_adap.dev.parent = &pdev->dev; |
| 633 | pluto->i2c_adap.algo_data = &pluto->i2c_bit; |
| 634 | pluto->i2c_bit.data = pluto; |
| 635 | pluto->i2c_bit.setsda = pluto_setsda; |
| 636 | pluto->i2c_bit.setscl = pluto_setscl; |
| 637 | pluto->i2c_bit.getsda = pluto_getsda; |
| 638 | pluto->i2c_bit.getscl = pluto_getscl; |
| 639 | pluto->i2c_bit.udelay = 10; |
| 640 | pluto->i2c_bit.timeout = 10; |
| 641 | |
| 642 | /* Raise SCL and SDA */ |
| 643 | pluto_setsda(pluto, 1); |
| 644 | pluto_setscl(pluto, 1); |
| 645 | |
| 646 | ret = i2c_bit_add_bus(&pluto->i2c_adap); |
| 647 | if (ret < 0) |
| 648 | goto err_pluto_hw_exit; |
| 649 | |
| 650 | /* dvb */ |
Andrew de Quincey | d09dbf9 | 2006-04-10 09:27:37 -0300 | [diff] [blame] | 651 | ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME, THIS_MODULE, &pdev->dev); |
Andreas Oberritter | c7cadb3 | 2005-07-07 17:57:46 -0700 | [diff] [blame] | 652 | if (ret < 0) |
| 653 | goto err_i2c_bit_del_bus; |
| 654 | |
| 655 | dvb_adapter = &pluto->dvb_adapter; |
| 656 | |
| 657 | pluto_read_rev(pluto); |
| 658 | pluto_read_serial(pluto); |
| 659 | pluto_read_mac(pluto, dvb_adapter->proposed_mac); |
| 660 | |
| 661 | dvbdemux = &pluto->demux; |
| 662 | dvbdemux->filternum = 256; |
| 663 | dvbdemux->feednum = 256; |
| 664 | dvbdemux->start_feed = pluto_start_feed; |
| 665 | dvbdemux->stop_feed = pluto_stop_feed; |
| 666 | dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | |
| 667 | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); |
| 668 | ret = dvb_dmx_init(dvbdemux); |
| 669 | if (ret < 0) |
| 670 | goto err_dvb_unregister_adapter; |
| 671 | |
| 672 | dmx = &dvbdemux->dmx; |
| 673 | |
| 674 | pluto->hw_frontend.source = DMX_FRONTEND_0; |
| 675 | pluto->mem_frontend.source = DMX_MEMORY_FE; |
| 676 | pluto->dmxdev.filternum = NHWFILTERS; |
| 677 | pluto->dmxdev.demux = dmx; |
| 678 | |
| 679 | ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter); |
| 680 | if (ret < 0) |
| 681 | goto err_dvb_dmx_release; |
| 682 | |
| 683 | ret = dmx->add_frontend(dmx, &pluto->hw_frontend); |
| 684 | if (ret < 0) |
| 685 | goto err_dvb_dmxdev_release; |
| 686 | |
| 687 | ret = dmx->add_frontend(dmx, &pluto->mem_frontend); |
| 688 | if (ret < 0) |
| 689 | goto err_remove_hw_frontend; |
| 690 | |
| 691 | ret = dmx->connect_frontend(dmx, &pluto->hw_frontend); |
| 692 | if (ret < 0) |
| 693 | goto err_remove_mem_frontend; |
| 694 | |
| 695 | ret = frontend_init(pluto); |
| 696 | if (ret < 0) |
| 697 | goto err_disconnect_frontend; |
| 698 | |
| 699 | dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx); |
| 700 | out: |
| 701 | return ret; |
| 702 | |
| 703 | err_disconnect_frontend: |
| 704 | dmx->disconnect_frontend(dmx); |
| 705 | err_remove_mem_frontend: |
| 706 | dmx->remove_frontend(dmx, &pluto->mem_frontend); |
| 707 | err_remove_hw_frontend: |
| 708 | dmx->remove_frontend(dmx, &pluto->hw_frontend); |
| 709 | err_dvb_dmxdev_release: |
| 710 | dvb_dmxdev_release(&pluto->dmxdev); |
| 711 | err_dvb_dmx_release: |
| 712 | dvb_dmx_release(dvbdemux); |
| 713 | err_dvb_unregister_adapter: |
| 714 | dvb_unregister_adapter(dvb_adapter); |
| 715 | err_i2c_bit_del_bus: |
| 716 | i2c_bit_del_bus(&pluto->i2c_adap); |
| 717 | err_pluto_hw_exit: |
| 718 | pluto_hw_exit(pluto); |
| 719 | err_free_irq: |
| 720 | free_irq(pdev->irq, pluto); |
| 721 | err_pci_iounmap: |
| 722 | pci_iounmap(pdev, pluto->io_mem); |
| 723 | err_pci_release_regions: |
| 724 | pci_release_regions(pdev); |
| 725 | err_pci_disable_device: |
| 726 | pci_disable_device(pdev); |
| 727 | err_kfree: |
| 728 | pci_set_drvdata(pdev, NULL); |
| 729 | kfree(pluto); |
| 730 | goto out; |
| 731 | } |
| 732 | |
| 733 | static void __devexit pluto2_remove(struct pci_dev *pdev) |
| 734 | { |
| 735 | struct pluto *pluto = pci_get_drvdata(pdev); |
| 736 | struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter; |
| 737 | struct dvb_demux *dvbdemux = &pluto->demux; |
| 738 | struct dmx_demux *dmx = &dvbdemux->dmx; |
| 739 | |
| 740 | dmx->close(dmx); |
| 741 | dvb_net_release(&pluto->dvbnet); |
| 742 | if (pluto->fe) |
| 743 | dvb_unregister_frontend(pluto->fe); |
| 744 | |
| 745 | dmx->disconnect_frontend(dmx); |
| 746 | dmx->remove_frontend(dmx, &pluto->mem_frontend); |
| 747 | dmx->remove_frontend(dmx, &pluto->hw_frontend); |
| 748 | dvb_dmxdev_release(&pluto->dmxdev); |
| 749 | dvb_dmx_release(dvbdemux); |
| 750 | dvb_unregister_adapter(dvb_adapter); |
| 751 | i2c_bit_del_bus(&pluto->i2c_adap); |
| 752 | pluto_hw_exit(pluto); |
| 753 | free_irq(pdev->irq, pluto); |
| 754 | pci_iounmap(pdev, pluto->io_mem); |
| 755 | pci_release_regions(pdev); |
| 756 | pci_disable_device(pdev); |
| 757 | pci_set_drvdata(pdev, NULL); |
| 758 | kfree(pluto); |
| 759 | } |
| 760 | |
| 761 | #ifndef PCI_VENDOR_ID_SCM |
| 762 | #define PCI_VENDOR_ID_SCM 0x0432 |
| 763 | #endif |
| 764 | #ifndef PCI_DEVICE_ID_PLUTO2 |
| 765 | #define PCI_DEVICE_ID_PLUTO2 0x0001 |
| 766 | #endif |
| 767 | |
| 768 | static struct pci_device_id pluto2_id_table[] __devinitdata = { |
| 769 | { |
| 770 | .vendor = PCI_VENDOR_ID_SCM, |
| 771 | .device = PCI_DEVICE_ID_PLUTO2, |
| 772 | .subvendor = PCI_ANY_ID, |
| 773 | .subdevice = PCI_ANY_ID, |
| 774 | }, { |
| 775 | /* empty */ |
| 776 | }, |
| 777 | }; |
| 778 | |
| 779 | MODULE_DEVICE_TABLE(pci, pluto2_id_table); |
| 780 | |
| 781 | static struct pci_driver pluto2_driver = { |
| 782 | .name = DRIVER_NAME, |
| 783 | .id_table = pluto2_id_table, |
| 784 | .probe = pluto2_probe, |
| 785 | .remove = __devexit_p(pluto2_remove), |
| 786 | }; |
| 787 | |
| 788 | static int __init pluto2_init(void) |
| 789 | { |
| 790 | return pci_register_driver(&pluto2_driver); |
| 791 | } |
| 792 | |
| 793 | static void __exit pluto2_exit(void) |
| 794 | { |
| 795 | pci_unregister_driver(&pluto2_driver); |
| 796 | } |
| 797 | |
| 798 | module_init(pluto2_init); |
| 799 | module_exit(pluto2_exit); |
| 800 | |
| 801 | MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>"); |
| 802 | MODULE_DESCRIPTION("Pluto2 driver"); |
| 803 | MODULE_LICENSE("GPL"); |