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Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001/*
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01002 * Support functions for OMAP GPIO
3 *
Tony Lindgren92105bb2005-09-07 17:20:26 +01004 * Copyright (C) 2003-2005 Nokia Corporation
Jan Engelhardt96de0e22007-10-19 23:21:04 +02005 * Written by Juha Yrjölä <juha.yrjola@nokia.com>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01006 *
Santosh Shilimkar44169072009-05-28 14:16:04 -07007 * Copyright (C) 2009 Texas Instruments
8 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
9 *
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010010 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010015#include <linux/init.h>
16#include <linux/module.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010017#include <linux/interrupt.h>
Rafael J. Wysocki3c437ff2011-04-22 22:02:46 +020018#include <linux/syscore_ops.h>
Tony Lindgren92105bb2005-09-07 17:20:26 +010019#include <linux/err.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000020#include <linux/clk.h>
Russell Kingfced80c2008-09-06 12:10:45 +010021#include <linux/io.h>
Benoit Cousson96751fc2012-02-01 16:01:39 +010022#include <linux/device.h>
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -080023#include <linux/pm_runtime.h>
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +053024#include <linux/pm.h>
Benoit Cousson384ebe12011-08-16 11:53:02 +020025#include <linux/of.h>
26#include <linux/of_device.h>
27#include <linux/irqdomain.h>
Catalin Marinasde88cbb2013-01-18 15:31:37 +000028#include <linux/irqchip/chained_irq.h>
Tony Lindgren4b254082012-08-30 15:37:24 -070029#include <linux/gpio.h>
30#include <linux/platform_data/gpio-omap.h>
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010031
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +053032#define OFF_MODE 1
33
Charulatha V03e128c2011-05-05 19:58:01 +053034static LIST_HEAD(omap_gpio_list);
35
Charulatha V6d62e212011-04-18 15:06:51 +000036struct gpio_regs {
37 u32 irqenable1;
38 u32 irqenable2;
39 u32 wake_en;
40 u32 ctrl;
41 u32 oe;
42 u32 leveldetect0;
43 u32 leveldetect1;
44 u32 risingdetect;
45 u32 fallingdetect;
46 u32 dataout;
Nishanth Menonae547352011-09-09 19:08:58 +053047 u32 debounce;
48 u32 debounce_en;
Charulatha V6d62e212011-04-18 15:06:51 +000049};
50
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010051struct gpio_bank {
Charulatha V03e128c2011-05-05 19:58:01 +053052 struct list_head node;
Tony Lindgren92105bb2005-09-07 17:20:26 +010053 void __iomem *base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010054 u16 irq;
Benoit Cousson384ebe12011-08-16 11:53:02 +020055 struct irq_domain *domain;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -080056 u32 non_wakeup_gpios;
57 u32 enabled_non_wakeup_gpios;
Charulatha V6d62e212011-04-18 15:06:51 +000058 struct gpio_regs context;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -080059 u32 saved_datain;
Kevin Hilmanb144ff62008-01-16 21:56:15 -080060 u32 level_mask;
Cory Maccarrone4318f362010-01-08 10:29:04 -080061 u32 toggle_mask;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010062 spinlock_t lock;
David Brownell52e31342008-03-03 12:43:23 -080063 struct gpio_chip chip;
Jouni Hogander89db9482008-12-10 17:35:24 -080064 struct clk *dbck;
Charulatha V058af1e2009-11-22 10:11:25 -080065 u32 mod_usage;
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +020066 u32 irq_usage;
Kevin Hilman8865b9b2009-01-27 11:15:34 -080067 u32 dbck_enable_mask;
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +053068 bool dbck_enabled;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -080069 struct device *dev;
Charulatha Vd0d665a2011-08-31 00:02:21 +053070 bool is_mpuio;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -080071 bool dbck_flag;
Charulatha V0cde8d02011-05-05 20:15:16 +053072 bool loses_context;
Jon Hunter352a2d52013-04-15 13:06:54 -050073 bool context_valid;
Tony Lindgren5de62b82010-12-07 16:26:58 -080074 int stride;
Kevin Hilmand5f46242011-04-21 09:23:00 -070075 u32 width;
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +053076 int context_loss_count;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +053077 int power_mode;
78 bool workaround_enabled;
Kevin Hilmanfa87931a2011-04-20 16:31:23 -070079
80 void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +053081 int (*get_context_loss_count)(struct device *dev);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -070082
83 struct omap_gpio_reg_offs *regs;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010084};
85
Kevin Hilman129fd222011-04-22 07:59:07 -070086#define GPIO_INDEX(bank, gpio) (gpio % bank->width)
87#define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio))
Charulatha Vc8eef652011-05-02 15:21:42 +053088#define GPIO_MOD_CTRL_BIT BIT(0)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +010089
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +020090#define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)
91#define LINE_USED(line, offset) (line & (1 << offset))
92
Benoit Cousson25db7112012-02-23 21:50:10 +010093static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq)
94{
Jon Hunterede4d7a2013-03-01 11:22:47 -060095 return bank->chip.base + gpio_irq;
96}
97
98static int omap_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
99{
100 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
101
102 return irq_find_mapping(bank->domain, offset);
Benoit Cousson25db7112012-02-23 21:50:10 +0100103}
104
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100105static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
106{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100107 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100108 u32 l;
109
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700110 reg += bank->regs->direction;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100111 l = __raw_readl(reg);
112 if (is_input)
113 l |= 1 << gpio;
114 else
115 l &= ~(1 << gpio);
116 __raw_writel(l, reg);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530117 bank->context.oe = l;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100118}
119
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700120
121/* set data out value using dedicate set/clear register */
122static void _set_gpio_dataout_reg(struct gpio_bank *bank, int gpio, int enable)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100123{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100124 void __iomem *reg = bank->base;
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700125 u32 l = GPIO_BIT(bank, gpio);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100126
Tarun Kanti DebBarma2c836f72012-03-02 12:52:52 +0530127 if (enable) {
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700128 reg += bank->regs->set_dataout;
Tarun Kanti DebBarma2c836f72012-03-02 12:52:52 +0530129 bank->context.dataout |= l;
130 } else {
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700131 reg += bank->regs->clr_dataout;
Tarun Kanti DebBarma2c836f72012-03-02 12:52:52 +0530132 bank->context.dataout &= ~l;
133 }
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700134
135 __raw_writel(l, reg);
136}
137
138/* set data out value using mask register */
139static void _set_gpio_dataout_mask(struct gpio_bank *bank, int gpio, int enable)
140{
141 void __iomem *reg = bank->base + bank->regs->dataout;
142 u32 gpio_bit = GPIO_BIT(bank, gpio);
143 u32 l;
144
145 l = __raw_readl(reg);
146 if (enable)
147 l |= gpio_bit;
148 else
149 l &= ~gpio_bit;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100150 __raw_writel(l, reg);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530151 bank->context.dataout = l;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100152}
153
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530154static int _get_gpio_datain(struct gpio_bank *bank, int offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100155{
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700156 void __iomem *reg = bank->base + bank->regs->datain;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100157
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530158 return (__raw_readl(reg) & (1 << offset)) != 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100159}
160
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530161static int _get_gpio_dataout(struct gpio_bank *bank, int offset)
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300162{
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700163 void __iomem *reg = bank->base + bank->regs->dataout;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300164
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530165 return (__raw_readl(reg) & (1 << offset)) != 0;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300166}
167
Kevin Hilmanece95282011-07-12 08:18:15 -0700168static inline void _gpio_rmw(void __iomem *base, u32 reg, u32 mask, bool set)
169{
170 int l = __raw_readl(base + reg);
171
Benoit Cousson862ff642012-02-01 15:58:56 +0100172 if (set)
Kevin Hilmanece95282011-07-12 08:18:15 -0700173 l |= mask;
174 else
175 l &= ~mask;
176
177 __raw_writel(l, base + reg);
178}
Tony Lindgren92105bb2005-09-07 17:20:26 +0100179
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +0530180static inline void _gpio_dbck_enable(struct gpio_bank *bank)
181{
182 if (bank->dbck_enable_mask && !bank->dbck_enabled) {
183 clk_enable(bank->dbck);
184 bank->dbck_enabled = true;
Grazvydas Ignotas9e303f22012-06-16 22:01:25 +0300185
186 __raw_writel(bank->dbck_enable_mask,
187 bank->base + bank->regs->debounce_en);
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +0530188 }
189}
190
191static inline void _gpio_dbck_disable(struct gpio_bank *bank)
192{
193 if (bank->dbck_enable_mask && bank->dbck_enabled) {
Grazvydas Ignotas9e303f22012-06-16 22:01:25 +0300194 /*
195 * Disable debounce before cutting it's clock. If debounce is
196 * enabled but the clock is not, GPIO module seems to be unable
197 * to detect events and generate interrupts at least on OMAP3.
198 */
199 __raw_writel(0, bank->base + bank->regs->debounce_en);
200
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +0530201 clk_disable(bank->dbck);
202 bank->dbck_enabled = false;
203 }
204}
205
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700206/**
207 * _set_gpio_debounce - low level gpio debounce time
208 * @bank: the gpio bank we're acting upon
209 * @gpio: the gpio number on this @gpio
210 * @debounce: debounce time to use
211 *
212 * OMAP's debounce time is in 31us steps so we need
213 * to convert and round up to the closest unit.
214 */
215static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio,
216 unsigned debounce)
217{
Kevin Hilman9942da02011-04-22 12:02:05 -0700218 void __iomem *reg;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700219 u32 val;
220 u32 l;
221
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800222 if (!bank->dbck_flag)
223 return;
224
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700225 if (debounce < 32)
226 debounce = 0x01;
227 else if (debounce > 7936)
228 debounce = 0xff;
229 else
230 debounce = (debounce / 0x1f) - 1;
231
Kevin Hilman129fd222011-04-22 07:59:07 -0700232 l = GPIO_BIT(bank, gpio);
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700233
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530234 clk_enable(bank->dbck);
Kevin Hilman9942da02011-04-22 12:02:05 -0700235 reg = bank->base + bank->regs->debounce;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700236 __raw_writel(debounce, reg);
237
Kevin Hilman9942da02011-04-22 12:02:05 -0700238 reg = bank->base + bank->regs->debounce_en;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700239 val = __raw_readl(reg);
240
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530241 if (debounce)
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700242 val |= l;
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530243 else
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700244 val &= ~l;
Kevin Hilmanf7ec0b02010-06-09 13:53:07 +0300245 bank->dbck_enable_mask = val;
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700246
247 __raw_writel(val, reg);
Tarun Kanti DebBarma6fd9c422011-11-24 03:58:54 +0530248 clk_disable(bank->dbck);
249 /*
250 * Enable debounce clock per module.
251 * This call is mandatory because in omap_gpio_request() when
252 * *_runtime_get_sync() is called, _gpio_dbck_enable() within
253 * runtime callbck fails to turn on dbck because dbck_enable_mask
254 * used within _gpio_dbck_enable() is still not initialized at
255 * that point. Therefore we have to enable dbck here.
256 */
257 _gpio_dbck_enable(bank);
Nishanth Menonae547352011-09-09 19:08:58 +0530258 if (bank->dbck_enable_mask) {
259 bank->context.debounce = debounce;
260 bank->context.debounce_en = val;
261 }
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700262}
263
Jon Hunterc9c55d92012-10-26 14:26:04 -0500264/**
265 * _clear_gpio_debounce - clear debounce settings for a gpio
266 * @bank: the gpio bank we're acting upon
267 * @gpio: the gpio number on this @gpio
268 *
269 * If a gpio is using debounce, then clear the debounce enable bit and if
270 * this is the only gpio in this bank using debounce, then clear the debounce
271 * time too. The debounce clock will also be disabled when calling this function
272 * if this is the only gpio in the bank using debounce.
273 */
274static void _clear_gpio_debounce(struct gpio_bank *bank, unsigned gpio)
275{
276 u32 gpio_bit = GPIO_BIT(bank, gpio);
277
278 if (!bank->dbck_flag)
279 return;
280
281 if (!(bank->dbck_enable_mask & gpio_bit))
282 return;
283
284 bank->dbck_enable_mask &= ~gpio_bit;
285 bank->context.debounce_en &= ~gpio_bit;
286 __raw_writel(bank->context.debounce_en,
287 bank->base + bank->regs->debounce_en);
288
289 if (!bank->dbck_enable_mask) {
290 bank->context.debounce = 0;
291 __raw_writel(bank->context.debounce, bank->base +
292 bank->regs->debounce);
293 clk_disable(bank->dbck);
294 bank->dbck_enabled = false;
295 }
296}
297
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530298static inline void set_gpio_trigger(struct gpio_bank *bank, int gpio,
Tarun Kanti DebBarma00ece7e2011-11-25 15:41:06 +0530299 unsigned trigger)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100300{
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800301 void __iomem *base = bank->base;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100302 u32 gpio_bit = 1 << gpio;
303
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530304 _gpio_rmw(base, bank->regs->leveldetect0, gpio_bit,
305 trigger & IRQ_TYPE_LEVEL_LOW);
306 _gpio_rmw(base, bank->regs->leveldetect1, gpio_bit,
307 trigger & IRQ_TYPE_LEVEL_HIGH);
308 _gpio_rmw(base, bank->regs->risingdetect, gpio_bit,
309 trigger & IRQ_TYPE_EDGE_RISING);
310 _gpio_rmw(base, bank->regs->fallingdetect, gpio_bit,
311 trigger & IRQ_TYPE_EDGE_FALLING);
312
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530313 bank->context.leveldetect0 =
314 __raw_readl(bank->base + bank->regs->leveldetect0);
315 bank->context.leveldetect1 =
316 __raw_readl(bank->base + bank->regs->leveldetect1);
317 bank->context.risingdetect =
318 __raw_readl(bank->base + bank->regs->risingdetect);
319 bank->context.fallingdetect =
320 __raw_readl(bank->base + bank->regs->fallingdetect);
321
322 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530323 _gpio_rmw(base, bank->regs->wkup_en, gpio_bit, trigger != 0);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530324 bank->context.wake_en =
325 __raw_readl(bank->base + bank->regs->wkup_en);
326 }
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530327
Ambresh K55b220c2011-06-15 13:40:45 -0700328 /* This part needs to be executed always for OMAP{34xx, 44xx} */
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530329 if (!bank->regs->irqctrl) {
330 /* On omap24xx proceed only when valid GPIO bit is set */
331 if (bank->non_wakeup_gpios) {
332 if (!(bank->non_wakeup_gpios & gpio_bit))
333 goto exit;
334 }
335
Chunqiu Wang699117a62009-06-24 17:13:39 +0000336 /*
337 * Log the edge gpio and manually trigger the IRQ
338 * after resume if the input level changes
339 * to avoid irq lost during PER RET/OFF mode
340 * Applies for omap2 non-wakeup gpio and all omap3 gpios
341 */
342 if (trigger & IRQ_TYPE_EDGE_BOTH)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -0800343 bank->enabled_non_wakeup_gpios |= gpio_bit;
344 else
345 bank->enabled_non_wakeup_gpios &= ~gpio_bit;
346 }
Kevin Hilman5eb3bb92007-05-05 11:40:29 -0700347
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530348exit:
Tarun Kanti DebBarma9ea14d82011-08-30 15:05:44 +0530349 bank->level_mask =
350 __raw_readl(bank->base + bank->regs->leveldetect0) |
351 __raw_readl(bank->base + bank->regs->leveldetect1);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100352}
353
Uwe Kleine-König9198bcd2010-01-29 14:20:05 -0800354#ifdef CONFIG_ARCH_OMAP1
Cory Maccarrone4318f362010-01-08 10:29:04 -0800355/*
356 * This only applies to chips that can't do both rising and falling edge
357 * detection at once. For all other chips, this function is a noop.
358 */
359static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
360{
361 void __iomem *reg = bank->base;
362 u32 l = 0;
363
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530364 if (!bank->regs->irqctrl)
Cory Maccarrone4318f362010-01-08 10:29:04 -0800365 return;
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530366
367 reg += bank->regs->irqctrl;
Cory Maccarrone4318f362010-01-08 10:29:04 -0800368
369 l = __raw_readl(reg);
370 if ((l >> gpio) & 1)
371 l &= ~(1 << gpio);
372 else
373 l |= 1 << gpio;
374
375 __raw_writel(l, reg);
376}
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530377#else
378static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) {}
Uwe Kleine-König9198bcd2010-01-29 14:20:05 -0800379#endif
Cory Maccarrone4318f362010-01-08 10:29:04 -0800380
Tarun Kanti DebBarma00ece7e2011-11-25 15:41:06 +0530381static int _set_gpio_triggering(struct gpio_bank *bank, int gpio,
382 unsigned trigger)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100383{
384 void __iomem *reg = bank->base;
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530385 void __iomem *base = bank->base;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100386 u32 l = 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100387
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530388 if (bank->regs->leveldetect0 && bank->regs->wkup_en) {
389 set_gpio_trigger(bank, gpio, trigger);
390 } else if (bank->regs->irqctrl) {
391 reg += bank->regs->irqctrl;
392
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100393 l = __raw_readl(reg);
Janusz Krzysztofik29501572010-04-05 11:38:06 +0000394 if ((trigger & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH)
Cory Maccarrone4318f362010-01-08 10:29:04 -0800395 bank->toggle_mask |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100396 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100397 l |= 1 << gpio;
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100398 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100399 l &= ~(1 << gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100400 else
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530401 return -EINVAL;
402
403 __raw_writel(l, reg);
404 } else if (bank->regs->edgectrl1) {
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100405 if (gpio & 0x08)
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530406 reg += bank->regs->edgectrl2;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100407 else
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530408 reg += bank->regs->edgectrl1;
409
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100410 gpio &= 0x07;
411 l = __raw_readl(reg);
412 l &= ~(3 << (gpio << 1));
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100413 if (trigger & IRQ_TYPE_EDGE_RISING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100414 l |= 2 << (gpio << 1);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100415 if (trigger & IRQ_TYPE_EDGE_FALLING)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100416 l |= 1 << (gpio << 1);
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530417
418 /* Enable wake-up during idle for dynamic tick */
419 _gpio_rmw(base, bank->regs->wkup_en, 1 << gpio, trigger);
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +0530420 bank->context.wake_en =
421 __raw_readl(bank->base + bank->regs->wkup_en);
Tarun Kanti DebBarma5e571f32011-09-13 15:02:14 +0530422 __raw_writel(l, reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100423 }
Tony Lindgren92105bb2005-09-07 17:20:26 +0100424 return 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100425}
426
Javier Martinez Canillasfac7fa12013-09-25 02:36:54 +0200427static void _enable_gpio_module(struct gpio_bank *bank, unsigned offset)
428{
429 if (bank->regs->pinctrl) {
430 void __iomem *reg = bank->base + bank->regs->pinctrl;
431
432 /* Claim the pin for MPU */
433 __raw_writel(__raw_readl(reg) | (1 << offset), reg);
434 }
435
436 if (bank->regs->ctrl && !BANK_USED(bank)) {
437 void __iomem *reg = bank->base + bank->regs->ctrl;
438 u32 ctrl;
439
440 ctrl = __raw_readl(reg);
441 /* Module is enabled, clocks are not gated */
442 ctrl &= ~GPIO_MOD_CTRL_BIT;
443 __raw_writel(ctrl, reg);
444 bank->context.ctrl = ctrl;
445 }
446}
447
448static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset)
449{
450 void __iomem *base = bank->base;
451
452 if (bank->regs->wkup_en &&
453 !LINE_USED(bank->mod_usage, offset) &&
454 !LINE_USED(bank->irq_usage, offset)) {
455 /* Disable wake-up during idle for dynamic tick */
456 _gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0);
457 bank->context.wake_en =
458 __raw_readl(bank->base + bank->regs->wkup_en);
459 }
460
461 if (bank->regs->ctrl && !BANK_USED(bank)) {
462 void __iomem *reg = bank->base + bank->regs->ctrl;
463 u32 ctrl;
464
465 ctrl = __raw_readl(reg);
466 /* Module is disabled, clocks are gated */
467 ctrl |= GPIO_MOD_CTRL_BIT;
468 __raw_writel(ctrl, reg);
469 bank->context.ctrl = ctrl;
470 }
471}
472
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +0200473static int gpio_is_input(struct gpio_bank *bank, int mask)
474{
475 void __iomem *reg = bank->base + bank->regs->direction;
476
477 return __raw_readl(reg) & mask;
478}
479
Lennert Buytenheke9191022010-11-29 11:17:17 +0100480static int gpio_irq_type(struct irq_data *d, unsigned type)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100481{
Benoit Cousson25db7112012-02-23 21:50:10 +0100482 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Tony Lindgren4b254082012-08-30 15:37:24 -0700483 unsigned gpio = 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100484 int retval;
David Brownella6472532008-03-03 04:33:30 -0800485 unsigned long flags;
Javier Martinez Canillasfac7fa12013-09-25 02:36:54 +0200486 unsigned offset;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100487
Javier Martinez Canillasfac7fa12013-09-25 02:36:54 +0200488 if (!BANK_USED(bank))
489 pm_runtime_get_sync(bank->dev);
Jon Hunter8d4c2772013-03-01 11:22:48 -0600490
Tony Lindgren4b254082012-08-30 15:37:24 -0700491#ifdef CONFIG_ARCH_OMAP1
492 if (d->irq > IH_MPUIO_BASE)
Lennert Buytenheke9191022010-11-29 11:17:17 +0100493 gpio = OMAP_MPUIO(d->irq - IH_MPUIO_BASE);
Tony Lindgren4b254082012-08-30 15:37:24 -0700494#endif
495
496 if (!gpio)
Jon Hunterede4d7a2013-03-01 11:22:47 -0600497 gpio = irq_to_gpio(bank, d->hwirq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100498
David Brownelle5c56ed2006-12-06 17:13:59 -0800499 if (type & ~IRQ_TYPE_SENSE_MASK)
Tony Lindgren6e60e792006-04-02 17:46:23 +0100500 return -EINVAL;
David Brownelle5c56ed2006-12-06 17:13:59 -0800501
Tarun Kanti DebBarma9ea14d82011-08-30 15:05:44 +0530502 if (!bank->regs->leveldetect0 &&
503 (type & (IRQ_TYPE_LEVEL_LOW|IRQ_TYPE_LEVEL_HIGH)))
Tony Lindgren92105bb2005-09-07 17:20:26 +0100504 return -EINVAL;
505
David Brownella6472532008-03-03 04:33:30 -0800506 spin_lock_irqsave(&bank->lock, flags);
Javier Martinez Canillasfac7fa12013-09-25 02:36:54 +0200507 offset = GPIO_INDEX(bank, gpio);
508 retval = _set_gpio_triggering(bank, offset, type);
509 if (!LINE_USED(bank->mod_usage, offset)) {
510 _enable_gpio_module(bank, offset);
511 _set_gpio_direction(bank, offset, 1);
512 } else if (!gpio_is_input(bank, 1 << offset)) {
513 spin_unlock_irqrestore(&bank->lock, flags);
514 return -EINVAL;
515 }
516
Javier Martinez Canillas2f56e0a2013-10-16 02:47:30 +0200517 retval = gpio_lock_as_irq(&bank->chip, offset);
518 if (retval) {
519 dev_err(bank->dev, "unable to lock offset %d for IRQ\n",
520 offset);
521 spin_unlock_irqrestore(&bank->lock, flags);
522 return retval;
523 }
524
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +0200525 bank->irq_usage |= 1 << GPIO_INDEX(bank, gpio);
David Brownella6472532008-03-03 04:33:30 -0800526 spin_unlock_irqrestore(&bank->lock, flags);
Kevin Hilman672e3022008-01-16 21:56:16 -0800527
528 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100529 __irq_set_handler_locked(d->irq, handle_level_irq);
Kevin Hilman672e3022008-01-16 21:56:16 -0800530 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100531 __irq_set_handler_locked(d->irq, handle_edge_irq);
Kevin Hilman672e3022008-01-16 21:56:16 -0800532
Tony Lindgren92105bb2005-09-07 17:20:26 +0100533 return retval;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100534}
535
536static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
537{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100538 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100539
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700540 reg += bank->regs->irqstatus;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100541 __raw_writel(gpio_mask, reg);
Hiroshi DOYUbee79302006-09-25 12:41:46 +0300542
543 /* Workaround for clearing DSP GPIO interrupts to allow retention */
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700544 if (bank->regs->irqstatus2) {
545 reg = bank->base + bank->regs->irqstatus2;
Roger Quadrosbedfd152009-04-23 11:10:50 -0700546 __raw_writel(gpio_mask, reg);
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700547 }
Roger Quadrosbedfd152009-04-23 11:10:50 -0700548
549 /* Flush posted write for the irq status to avoid spurious interrupts */
550 __raw_readl(reg);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100551}
552
553static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
554{
Kevin Hilman129fd222011-04-22 07:59:07 -0700555 _clear_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100556}
557
Imre Deakea6dedd2006-06-26 16:16:00 -0700558static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
559{
560 void __iomem *reg = bank->base;
Imre Deak99c47702006-06-26 16:16:07 -0700561 u32 l;
Kevin Hilmanc390aad02011-04-21 09:33:36 -0700562 u32 mask = (1 << bank->width) - 1;
Imre Deakea6dedd2006-06-26 16:16:00 -0700563
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700564 reg += bank->regs->irqenable;
Imre Deak99c47702006-06-26 16:16:07 -0700565 l = __raw_readl(reg);
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700566 if (bank->regs->irqenable_inv)
Imre Deak99c47702006-06-26 16:16:07 -0700567 l = ~l;
568 l &= mask;
569 return l;
Imre Deakea6dedd2006-06-26 16:16:00 -0700570}
571
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700572static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100573{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100574 void __iomem *reg = bank->base;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100575 u32 l;
576
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700577 if (bank->regs->set_irqenable) {
578 reg += bank->regs->set_irqenable;
579 l = gpio_mask;
Tarun Kanti DebBarma2a900eb2012-03-06 12:08:16 +0530580 bank->context.irqenable1 |= gpio_mask;
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700581 } else {
582 reg += bank->regs->irqenable;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100583 l = __raw_readl(reg);
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700584 if (bank->regs->irqenable_inv)
585 l &= ~gpio_mask;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100586 else
587 l |= gpio_mask;
Tarun Kanti DebBarma2a900eb2012-03-06 12:08:16 +0530588 bank->context.irqenable1 = l;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100589 }
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700590
591 __raw_writel(l, reg);
592}
593
594static void _disable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
595{
596 void __iomem *reg = bank->base;
597 u32 l;
598
599 if (bank->regs->clr_irqenable) {
600 reg += bank->regs->clr_irqenable;
601 l = gpio_mask;
Tarun Kanti DebBarma2a900eb2012-03-06 12:08:16 +0530602 bank->context.irqenable1 &= ~gpio_mask;
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700603 } else {
604 reg += bank->regs->irqenable;
605 l = __raw_readl(reg);
606 if (bank->regs->irqenable_inv)
607 l |= gpio_mask;
608 else
609 l &= ~gpio_mask;
Tarun Kanti DebBarma2a900eb2012-03-06 12:08:16 +0530610 bank->context.irqenable1 = l;
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700611 }
612
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100613 __raw_writel(l, reg);
614}
615
616static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int enable)
617{
Tarun Kanti DebBarma8276536c2011-11-25 15:27:37 +0530618 if (enable)
619 _enable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
620 else
621 _disable_gpio_irqbank(bank, GPIO_BIT(bank, gpio));
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100622}
623
Tony Lindgren92105bb2005-09-07 17:20:26 +0100624/*
625 * Note that ENAWAKEUP needs to be enabled in GPIO_SYSCONFIG register.
626 * 1510 does not seem to have a wake-up register. If JTAG is connected
627 * to the target, system will wake up always on GPIO events. While
628 * system is running all registered GPIO interrupts need to have wake-up
629 * enabled. When system is suspended, only selected GPIO interrupts need
630 * to have wake-up enabled.
631 */
632static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
633{
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700634 u32 gpio_bit = GPIO_BIT(bank, gpio);
635 unsigned long flags;
David Brownella6472532008-03-03 04:33:30 -0800636
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700637 if (bank->non_wakeup_gpios & gpio_bit) {
Benoit Cousson862ff642012-02-01 15:58:56 +0100638 dev_err(bank->dev,
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700639 "Unable to modify wakeup on non-wakeup GPIO%d\n", gpio);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100640 return -EINVAL;
641 }
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700642
643 spin_lock_irqsave(&bank->lock, flags);
644 if (enable)
Tarun Kanti DebBarma0aa27272012-04-27 19:43:33 +0530645 bank->context.wake_en |= gpio_bit;
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700646 else
Tarun Kanti DebBarma0aa27272012-04-27 19:43:33 +0530647 bank->context.wake_en &= ~gpio_bit;
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700648
Tarun Kanti DebBarma0aa27272012-04-27 19:43:33 +0530649 __raw_writel(bank->context.wake_en, bank->base + bank->regs->wkup_en);
Kevin Hilmanf64ad1a2011-04-22 09:45:27 -0700650 spin_unlock_irqrestore(&bank->lock, flags);
651
652 return 0;
Tony Lindgren92105bb2005-09-07 17:20:26 +0100653}
654
Tony Lindgren4196dd62006-09-25 12:41:38 +0300655static void _reset_gpio(struct gpio_bank *bank, int gpio)
656{
Kevin Hilman129fd222011-04-22 07:59:07 -0700657 _set_gpio_direction(bank, GPIO_INDEX(bank, gpio), 1);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300658 _set_gpio_irqenable(bank, gpio, 0);
659 _clear_gpio_irqstatus(bank, gpio);
Kevin Hilman129fd222011-04-22 07:59:07 -0700660 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
Jon Hunterc9c55d92012-10-26 14:26:04 -0500661 _clear_gpio_debounce(bank, gpio);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300662}
663
Tony Lindgren92105bb2005-09-07 17:20:26 +0100664/* Use disable_irq_wake() and enable_irq_wake() functions from drivers */
Lennert Buytenheke9191022010-11-29 11:17:17 +0100665static int gpio_wake_enable(struct irq_data *d, unsigned int enable)
Tony Lindgren92105bb2005-09-07 17:20:26 +0100666{
Benoit Cousson25db7112012-02-23 21:50:10 +0100667 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Jon Hunterede4d7a2013-03-01 11:22:47 -0600668 unsigned int gpio = irq_to_gpio(bank, d->hwirq);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100669
Benoit Cousson25db7112012-02-23 21:50:10 +0100670 return _set_gpio_wakeup(bank, gpio, enable);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100671}
672
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800673static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100674{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800675 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
David Brownella6472532008-03-03 04:33:30 -0800676 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100677
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530678 /*
679 * If this is the first gpio_request for the bank,
680 * enable the bank module.
681 */
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +0200682 if (!BANK_USED(bank))
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530683 pm_runtime_get_sync(bank->dev);
Tony Lindgren92105bb2005-09-07 17:20:26 +0100684
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530685 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300686 /* Set trigger to none. You need to enable the desired trigger with
Javier Martinez Canillasfac7fa12013-09-25 02:36:54 +0200687 * request_irq() or set_irq_type(). Only do this if the IRQ line has
688 * not already been requested.
Tony Lindgren4196dd62006-09-25 12:41:38 +0300689 */
Javier Martinez Canillasfac7fa12013-09-25 02:36:54 +0200690 if (!LINE_USED(bank->irq_usage, offset)) {
691 _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
692 _enable_gpio_module(bank, offset);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100693 }
Charulatha Vc8eef652011-05-02 15:21:42 +0530694 bank->mod_usage |= 1 << offset;
David Brownella6472532008-03-03 04:33:30 -0800695 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100696
697 return 0;
698}
699
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800700static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100701{
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800702 struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip);
David Brownella6472532008-03-03 04:33:30 -0800703 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100704
David Brownella6472532008-03-03 04:33:30 -0800705 spin_lock_irqsave(&bank->lock, flags);
Charulatha Vc8eef652011-05-02 15:21:42 +0530706 bank->mod_usage &= ~(1 << offset);
Javier Martinez Canillasfac7fa12013-09-25 02:36:54 +0200707 _disable_gpio_module(bank, offset);
Jarkko Nikula3ff164e2008-12-10 17:35:27 -0800708 _reset_gpio(bank, bank->chip.base + offset);
David Brownella6472532008-03-03 04:33:30 -0800709 spin_unlock_irqrestore(&bank->lock, flags);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530710
711 /*
712 * If this is the last gpio to be freed in the bank,
713 * disable the bank module.
714 */
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +0200715 if (!BANK_USED(bank))
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530716 pm_runtime_put(bank->dev);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100717}
718
719/*
720 * We need to unmask the GPIO bank interrupt as soon as possible to
721 * avoid missing GPIO interrupts for other lines in the bank.
722 * Then we need to mask-read-clear-unmask the triggered GPIO lines
723 * in the bank to avoid missing nested interrupts for a GPIO line.
724 * If we wait to unmask individual GPIO lines in the bank after the
725 * line's interrupt handler has been run, we may miss some nested
726 * interrupts.
727 */
Russell King10dd5ce2006-11-23 11:41:32 +0000728static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100729{
Tony Lindgren92105bb2005-09-07 17:20:26 +0100730 void __iomem *isr_reg = NULL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100731 u32 isr;
Jon Hunter3513cde2013-04-04 15:16:14 -0500732 unsigned int bit;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100733 struct gpio_bank *bank;
Imre Deakea6dedd2006-06-26 16:16:00 -0700734 int unmasked = 0;
Will Deaconee144182011-02-21 13:46:08 +0000735 struct irq_chip *chip = irq_desc_get_chip(desc);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100736
Will Deaconee144182011-02-21 13:46:08 +0000737 chained_irq_enter(chip, desc);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100738
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100739 bank = irq_get_handler_data(irq);
Kevin Hilmaneef4bec2011-04-21 09:17:35 -0700740 isr_reg = bank->base + bank->regs->irqstatus;
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530741 pm_runtime_get_sync(bank->dev);
Evgeny Kuznetsovb1cc4c52010-12-07 16:25:40 -0800742
743 if (WARN_ON(!isr_reg))
744 goto exit;
745
Laurent Navete83507b2013-03-20 13:15:57 +0100746 while (1) {
Tony Lindgren6e60e792006-04-02 17:46:23 +0100747 u32 isr_saved, level_mask = 0;
Imre Deakea6dedd2006-06-26 16:16:00 -0700748 u32 enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100749
Imre Deakea6dedd2006-06-26 16:16:00 -0700750 enabled = _get_gpio_irqbank_mask(bank);
751 isr_saved = isr = __raw_readl(isr_reg) & enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100752
Tarun Kanti DebBarma9ea14d82011-08-30 15:05:44 +0530753 if (bank->level_mask)
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800754 level_mask = bank->level_mask & enabled;
Tony Lindgren6e60e792006-04-02 17:46:23 +0100755
756 /* clear edge sensitive interrupts before handler(s) are
757 called so that we don't miss any interrupt occurred while
758 executing them */
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700759 _disable_gpio_irqbank(bank, isr_saved & ~level_mask);
Tony Lindgren6e60e792006-04-02 17:46:23 +0100760 _clear_gpio_irqbank(bank, isr_saved & ~level_mask);
Kevin Hilman28f3b5a2011-04-21 09:53:06 -0700761 _enable_gpio_irqbank(bank, isr_saved & ~level_mask);
Tony Lindgren6e60e792006-04-02 17:46:23 +0100762
763 /* if there is only edge sensitive GPIO pin interrupts
764 configured, we could unmask GPIO bank interrupt immediately */
Imre Deakea6dedd2006-06-26 16:16:00 -0700765 if (!level_mask && !unmasked) {
766 unmasked = 1;
Will Deaconee144182011-02-21 13:46:08 +0000767 chained_irq_exit(chip, desc);
Imre Deakea6dedd2006-06-26 16:16:00 -0700768 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100769
Tony Lindgren92105bb2005-09-07 17:20:26 +0100770 if (!isr)
771 break;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100772
Jon Hunter3513cde2013-04-04 15:16:14 -0500773 while (isr) {
774 bit = __ffs(isr);
775 isr &= ~(1 << bit);
Benoit Cousson25db7112012-02-23 21:50:10 +0100776
Cory Maccarrone4318f362010-01-08 10:29:04 -0800777 /*
778 * Some chips can't respond to both rising and falling
779 * at the same time. If this irq was requested with
780 * both flags, we need to flip the ICR data for the IRQ
781 * to respond to the IRQ for the opposite direction.
782 * This will be indicated in the bank toggle_mask.
783 */
Jon Hunter3513cde2013-04-04 15:16:14 -0500784 if (bank->toggle_mask & (1 << bit))
785 _toggle_gpio_edge_triggering(bank, bit);
Cory Maccarrone4318f362010-01-08 10:29:04 -0800786
Jon Hunter3513cde2013-04-04 15:16:14 -0500787 generic_handle_irq(irq_find_mapping(bank->domain, bit));
Tony Lindgren92105bb2005-09-07 17:20:26 +0100788 }
Tony Lindgren1a8bfa12005-11-10 14:26:50 +0000789 }
Imre Deakea6dedd2006-06-26 16:16:00 -0700790 /* if bank has any level sensitive GPIO pin interrupt
791 configured, we must unmask the bank interrupt only after
792 handler(s) are executed in order to avoid spurious bank
793 interrupt */
Evgeny Kuznetsovb1cc4c52010-12-07 16:25:40 -0800794exit:
Imre Deakea6dedd2006-06-26 16:16:00 -0700795 if (!unmasked)
Will Deaconee144182011-02-21 13:46:08 +0000796 chained_irq_exit(chip, desc);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +0530797 pm_runtime_put(bank->dev);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100798}
799
Lennert Buytenheke9191022010-11-29 11:17:17 +0100800static void gpio_irq_shutdown(struct irq_data *d)
Tony Lindgren4196dd62006-09-25 12:41:38 +0300801{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100802 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Jon Hunterede4d7a2013-03-01 11:22:47 -0600803 unsigned int gpio = irq_to_gpio(bank, d->hwirq);
Colin Cross85ec7b92011-06-06 13:38:18 -0700804 unsigned long flags;
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +0200805 unsigned offset = GPIO_INDEX(bank, gpio);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300806
Colin Cross85ec7b92011-06-06 13:38:18 -0700807 spin_lock_irqsave(&bank->lock, flags);
Javier Martinez Canillas2f56e0a2013-10-16 02:47:30 +0200808 gpio_unlock_as_irq(&bank->chip, offset);
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +0200809 bank->irq_usage &= ~(1 << offset);
Javier Martinez Canillasfac7fa12013-09-25 02:36:54 +0200810 _disable_gpio_module(bank, offset);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300811 _reset_gpio(bank, gpio);
Colin Cross85ec7b92011-06-06 13:38:18 -0700812 spin_unlock_irqrestore(&bank->lock, flags);
Javier Martinez Canillasfac7fa12013-09-25 02:36:54 +0200813
814 /*
815 * If this is the last IRQ to be freed in the bank,
816 * disable the bank module.
817 */
818 if (!BANK_USED(bank))
819 pm_runtime_put(bank->dev);
Tony Lindgren4196dd62006-09-25 12:41:38 +0300820}
821
Lennert Buytenheke9191022010-11-29 11:17:17 +0100822static void gpio_ack_irq(struct irq_data *d)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100823{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100824 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Jon Hunterede4d7a2013-03-01 11:22:47 -0600825 unsigned int gpio = irq_to_gpio(bank, d->hwirq);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100826
827 _clear_gpio_irqstatus(bank, gpio);
828}
829
Lennert Buytenheke9191022010-11-29 11:17:17 +0100830static void gpio_mask_irq(struct irq_data *d)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100831{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100832 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Jon Hunterede4d7a2013-03-01 11:22:47 -0600833 unsigned int gpio = irq_to_gpio(bank, d->hwirq);
Colin Cross85ec7b92011-06-06 13:38:18 -0700834 unsigned long flags;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100835
Colin Cross85ec7b92011-06-06 13:38:18 -0700836 spin_lock_irqsave(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100837 _set_gpio_irqenable(bank, gpio, 0);
Kevin Hilman129fd222011-04-22 07:59:07 -0700838 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), IRQ_TYPE_NONE);
Colin Cross85ec7b92011-06-06 13:38:18 -0700839 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100840}
841
Lennert Buytenheke9191022010-11-29 11:17:17 +0100842static void gpio_unmask_irq(struct irq_data *d)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100843{
Lennert Buytenheke9191022010-11-29 11:17:17 +0100844 struct gpio_bank *bank = irq_data_get_irq_chip_data(d);
Jon Hunterede4d7a2013-03-01 11:22:47 -0600845 unsigned int gpio = irq_to_gpio(bank, d->hwirq);
Kevin Hilman129fd222011-04-22 07:59:07 -0700846 unsigned int irq_mask = GPIO_BIT(bank, gpio);
Thomas Gleixner8c04a172011-03-24 12:40:15 +0100847 u32 trigger = irqd_get_trigger_type(d);
Colin Cross85ec7b92011-06-06 13:38:18 -0700848 unsigned long flags;
Kevin Hilman55b60192009-06-04 15:57:10 -0700849
Colin Cross85ec7b92011-06-06 13:38:18 -0700850 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilman55b60192009-06-04 15:57:10 -0700851 if (trigger)
Kevin Hilman129fd222011-04-22 07:59:07 -0700852 _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger);
Kevin Hilmanb144ff62008-01-16 21:56:15 -0800853
854 /* For level-triggered GPIOs, the clearing must be done after
855 * the HW source is cleared, thus after the handler has run */
856 if (bank->level_mask & irq_mask) {
857 _set_gpio_irqenable(bank, gpio, 0);
858 _clear_gpio_irqstatus(bank, gpio);
859 }
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100860
Kevin Hilman4de8c752008-01-16 21:56:14 -0800861 _set_gpio_irqenable(bank, gpio, 1);
Colin Cross85ec7b92011-06-06 13:38:18 -0700862 spin_unlock_irqrestore(&bank->lock, flags);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100863}
864
David Brownelle5c56ed2006-12-06 17:13:59 -0800865static struct irq_chip gpio_irq_chip = {
866 .name = "GPIO",
Lennert Buytenheke9191022010-11-29 11:17:17 +0100867 .irq_shutdown = gpio_irq_shutdown,
868 .irq_ack = gpio_ack_irq,
869 .irq_mask = gpio_mask_irq,
870 .irq_unmask = gpio_unmask_irq,
871 .irq_set_type = gpio_irq_type,
872 .irq_set_wake = gpio_wake_enable,
David Brownelle5c56ed2006-12-06 17:13:59 -0800873};
874
875/*---------------------------------------------------------------------*/
876
Magnus Damm79ee0312009-07-08 13:22:04 +0200877static int omap_mpuio_suspend_noirq(struct device *dev)
David Brownell11a78b72006-12-06 17:14:11 -0800878{
Magnus Damm79ee0312009-07-08 13:22:04 +0200879 struct platform_device *pdev = to_platform_device(dev);
David Brownell11a78b72006-12-06 17:14:11 -0800880 struct gpio_bank *bank = platform_get_drvdata(pdev);
Tony Lindgren5de62b82010-12-07 16:26:58 -0800881 void __iomem *mask_reg = bank->base +
882 OMAP_MPUIO_GPIO_MASKIT / bank->stride;
David Brownella6472532008-03-03 04:33:30 -0800883 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -0800884
David Brownella6472532008-03-03 04:33:30 -0800885 spin_lock_irqsave(&bank->lock, flags);
Tarun Kanti DebBarma0aa27272012-04-27 19:43:33 +0530886 __raw_writel(0xffff & ~bank->context.wake_en, mask_reg);
David Brownella6472532008-03-03 04:33:30 -0800887 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -0800888
889 return 0;
890}
891
Magnus Damm79ee0312009-07-08 13:22:04 +0200892static int omap_mpuio_resume_noirq(struct device *dev)
David Brownell11a78b72006-12-06 17:14:11 -0800893{
Magnus Damm79ee0312009-07-08 13:22:04 +0200894 struct platform_device *pdev = to_platform_device(dev);
David Brownell11a78b72006-12-06 17:14:11 -0800895 struct gpio_bank *bank = platform_get_drvdata(pdev);
Tony Lindgren5de62b82010-12-07 16:26:58 -0800896 void __iomem *mask_reg = bank->base +
897 OMAP_MPUIO_GPIO_MASKIT / bank->stride;
David Brownella6472532008-03-03 04:33:30 -0800898 unsigned long flags;
David Brownell11a78b72006-12-06 17:14:11 -0800899
David Brownella6472532008-03-03 04:33:30 -0800900 spin_lock_irqsave(&bank->lock, flags);
Tarun Kanti DebBarma499fa282012-04-27 19:43:34 +0530901 __raw_writel(bank->context.wake_en, mask_reg);
David Brownella6472532008-03-03 04:33:30 -0800902 spin_unlock_irqrestore(&bank->lock, flags);
David Brownell11a78b72006-12-06 17:14:11 -0800903
904 return 0;
905}
906
Alexey Dobriyan47145212009-12-14 18:00:08 -0800907static const struct dev_pm_ops omap_mpuio_dev_pm_ops = {
Magnus Damm79ee0312009-07-08 13:22:04 +0200908 .suspend_noirq = omap_mpuio_suspend_noirq,
909 .resume_noirq = omap_mpuio_resume_noirq,
910};
911
Rafael J. Wysocki3c437ff2011-04-22 22:02:46 +0200912/* use platform_driver for this. */
David Brownell11a78b72006-12-06 17:14:11 -0800913static struct platform_driver omap_mpuio_driver = {
David Brownell11a78b72006-12-06 17:14:11 -0800914 .driver = {
915 .name = "mpuio",
Magnus Damm79ee0312009-07-08 13:22:04 +0200916 .pm = &omap_mpuio_dev_pm_ops,
David Brownell11a78b72006-12-06 17:14:11 -0800917 },
918};
919
920static struct platform_device omap_mpuio_device = {
921 .name = "mpuio",
922 .id = -1,
923 .dev = {
924 .driver = &omap_mpuio_driver.driver,
925 }
926 /* could list the /proc/iomem resources */
927};
928
Charulatha V03e128c2011-05-05 19:58:01 +0530929static inline void mpuio_init(struct gpio_bank *bank)
David Brownell11a78b72006-12-06 17:14:11 -0800930{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800931 platform_set_drvdata(&omap_mpuio_device, bank);
David Brownellfcf126d2007-04-02 12:46:47 -0700932
David Brownell11a78b72006-12-06 17:14:11 -0800933 if (platform_driver_register(&omap_mpuio_driver) == 0)
934 (void) platform_device_register(&omap_mpuio_device);
935}
936
David Brownelle5c56ed2006-12-06 17:13:59 -0800937/*---------------------------------------------------------------------*/
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +0100938
David Brownell52e31342008-03-03 12:43:23 -0800939static int gpio_input(struct gpio_chip *chip, unsigned offset)
940{
941 struct gpio_bank *bank;
942 unsigned long flags;
943
944 bank = container_of(chip, struct gpio_bank, chip);
945 spin_lock_irqsave(&bank->lock, flags);
946 _set_gpio_direction(bank, offset, 1);
947 spin_unlock_irqrestore(&bank->lock, flags);
948 return 0;
949}
950
951static int gpio_get(struct gpio_chip *chip, unsigned offset)
952{
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300953 struct gpio_bank *bank;
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300954 u32 mask;
955
Charulatha Va8be8da2011-04-22 16:38:16 +0530956 bank = container_of(chip, struct gpio_bank, chip);
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530957 mask = (1 << offset);
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300958
959 if (gpio_is_input(bank, mask))
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530960 return _get_gpio_datain(bank, offset);
Roger Quadrosb37c45b2009-08-05 16:53:24 +0300961 else
Tarun Kanti DebBarma7fcca712012-02-27 11:46:09 +0530962 return _get_gpio_dataout(bank, offset);
David Brownell52e31342008-03-03 12:43:23 -0800963}
964
965static int gpio_output(struct gpio_chip *chip, unsigned offset, int value)
966{
967 struct gpio_bank *bank;
968 unsigned long flags;
969
970 bank = container_of(chip, struct gpio_bank, chip);
971 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -0700972 bank->set_dataout(bank, offset, value);
David Brownell52e31342008-03-03 12:43:23 -0800973 _set_gpio_direction(bank, offset, 0);
974 spin_unlock_irqrestore(&bank->lock, flags);
Javier Martinez Canillas2f56e0a2013-10-16 02:47:30 +0200975 return 0;
David Brownell52e31342008-03-03 12:43:23 -0800976}
977
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700978static int gpio_debounce(struct gpio_chip *chip, unsigned offset,
979 unsigned debounce)
980{
981 struct gpio_bank *bank;
982 unsigned long flags;
983
984 bank = container_of(chip, struct gpio_bank, chip);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -0800985
Felipe Balbi168ef3d2010-05-26 14:42:23 -0700986 spin_lock_irqsave(&bank->lock, flags);
987 _set_gpio_debounce(bank, offset, debounce);
988 spin_unlock_irqrestore(&bank->lock, flags);
989
990 return 0;
991}
992
David Brownell52e31342008-03-03 12:43:23 -0800993static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
994{
995 struct gpio_bank *bank;
996 unsigned long flags;
997
998 bank = container_of(chip, struct gpio_bank, chip);
999 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilmanfa87931a2011-04-20 16:31:23 -07001000 bank->set_dataout(bank, offset, value);
David Brownell52e31342008-03-03 12:43:23 -08001001 spin_unlock_irqrestore(&bank->lock, flags);
1002}
1003
1004/*---------------------------------------------------------------------*/
1005
Tony Lindgren9a748052010-12-07 16:26:56 -08001006static void __init omap_gpio_show_rev(struct gpio_bank *bank)
Tony Lindgren9f7065d2009-10-19 15:25:20 -07001007{
Kevin Hilmane5ff4442011-04-22 14:37:16 -07001008 static bool called;
Tony Lindgren9f7065d2009-10-19 15:25:20 -07001009 u32 rev;
1010
Kevin Hilmane5ff4442011-04-22 14:37:16 -07001011 if (called || bank->regs->revision == USHRT_MAX)
Tony Lindgren9f7065d2009-10-19 15:25:20 -07001012 return;
1013
Kevin Hilmane5ff4442011-04-22 14:37:16 -07001014 rev = __raw_readw(bank->base + bank->regs->revision);
1015 pr_info("OMAP GPIO hardware version %d.%d\n",
Tony Lindgren9f7065d2009-10-19 15:25:20 -07001016 (rev >> 4) & 0x0f, rev & 0x0f);
Kevin Hilmane5ff4442011-04-22 14:37:16 -07001017
1018 called = true;
Tony Lindgren9f7065d2009-10-19 15:25:20 -07001019}
1020
David Brownell8ba55c52008-02-26 11:10:50 -08001021/* This lock class tells lockdep that GPIO irqs are in a different
1022 * category than their parents, so it won't report false recursion.
1023 */
1024static struct lock_class_key gpio_lock_class;
1025
Charulatha V03e128c2011-05-05 19:58:01 +05301026static void omap_gpio_mod_init(struct gpio_bank *bank)
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001027{
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301028 void __iomem *base = bank->base;
1029 u32 l = 0xffffffff;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001030
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301031 if (bank->width == 16)
1032 l = 0xffff;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001033
Charulatha Vd0d665a2011-08-31 00:02:21 +05301034 if (bank->is_mpuio) {
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301035 __raw_writel(l, bank->base + bank->regs->irqenable);
1036 return;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001037 }
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301038
1039 _gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv);
Tarun Kanti DebBarma6edd94d2012-04-30 12:50:12 +05301040 _gpio_rmw(base, bank->regs->irqstatus, l, !bank->regs->irqenable_inv);
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301041 if (bank->regs->debounce_en)
Tarun Kanti DebBarma6edd94d2012-04-30 12:50:12 +05301042 __raw_writel(0, base + bank->regs->debounce_en);
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301043
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301044 /* Save OE default value (0xffffffff) in the context */
1045 bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301046 /* Initialize interface clk ungated, module enabled */
1047 if (bank->regs->ctrl)
Tarun Kanti DebBarma6edd94d2012-04-30 12:50:12 +05301048 __raw_writel(0, base + bank->regs->ctrl);
Tarun Kanti DebBarma34672012012-07-11 14:43:14 +05301049
1050 bank->dbck = clk_get(bank->dev, "dbclk");
1051 if (IS_ERR(bank->dbck))
1052 dev_err(bank->dev, "Could not get gpio dbck\n");
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001053}
1054
Bill Pemberton38363092012-11-19 13:22:34 -05001055static void
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001056omap_mpuio_alloc_gc(struct gpio_bank *bank, unsigned int irq_start,
1057 unsigned int num)
1058{
1059 struct irq_chip_generic *gc;
1060 struct irq_chip_type *ct;
1061
1062 gc = irq_alloc_generic_chip("MPUIO", 1, irq_start, bank->base,
1063 handle_simple_irq);
Todd Poynor83233742011-07-18 07:43:14 -07001064 if (!gc) {
1065 dev_err(bank->dev, "Memory alloc failed for gc\n");
1066 return;
1067 }
1068
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001069 ct = gc->chip_types;
1070
1071 /* NOTE: No ack required, reading IRQ status clears it. */
1072 ct->chip.irq_mask = irq_gc_mask_set_bit;
1073 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
1074 ct->chip.irq_set_type = gpio_irq_type;
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +05301075
1076 if (bank->regs->wkup_en)
Julia Lawall388f4302013-08-13 09:16:56 +02001077 ct->chip.irq_set_wake = gpio_wake_enable;
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001078
1079 ct->regs.mask = OMAP_MPUIO_GPIO_INT / bank->stride;
1080 irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
1081 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
1082}
1083
Bill Pemberton38363092012-11-19 13:22:34 -05001084static void omap_gpio_chip_init(struct gpio_bank *bank)
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001085{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001086 int j;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001087 static int gpio;
1088
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001089 /*
1090 * REVISIT eventually switch from OMAP-specific gpio structs
1091 * over to the generic ones
1092 */
1093 bank->chip.request = omap_gpio_request;
1094 bank->chip.free = omap_gpio_free;
1095 bank->chip.direction_input = gpio_input;
1096 bank->chip.get = gpio_get;
1097 bank->chip.direction_output = gpio_output;
1098 bank->chip.set_debounce = gpio_debounce;
1099 bank->chip.set = gpio_set;
Jon Hunterede4d7a2013-03-01 11:22:47 -06001100 bank->chip.to_irq = omap_gpio_to_irq;
Charulatha Vd0d665a2011-08-31 00:02:21 +05301101 if (bank->is_mpuio) {
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001102 bank->chip.label = "mpuio";
Tarun Kanti DebBarma6ed87c52011-09-13 14:41:44 +05301103 if (bank->regs->wkup_en)
1104 bank->chip.dev = &omap_mpuio_device.dev;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001105 bank->chip.base = OMAP_MPUIO(0);
1106 } else {
1107 bank->chip.label = "gpio";
1108 bank->chip.base = gpio;
Kevin Hilmand5f46242011-04-21 09:23:00 -07001109 gpio += bank->width;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001110 }
Kevin Hilmand5f46242011-04-21 09:23:00 -07001111 bank->chip.ngpio = bank->width;
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001112
1113 gpiochip_add(&bank->chip);
1114
Jon Hunterede4d7a2013-03-01 11:22:47 -06001115 for (j = 0; j < bank->width; j++) {
1116 int irq = irq_create_mapping(bank->domain, j);
1117 irq_set_lockdep_class(irq, &gpio_lock_class);
1118 irq_set_chip_data(irq, bank);
Charulatha Vd0d665a2011-08-31 00:02:21 +05301119 if (bank->is_mpuio) {
Jon Hunterede4d7a2013-03-01 11:22:47 -06001120 omap_mpuio_alloc_gc(bank, irq, bank->width);
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001121 } else {
Jon Hunterede4d7a2013-03-01 11:22:47 -06001122 irq_set_chip_and_handler(irq, &gpio_irq_chip,
1123 handle_simple_irq);
1124 set_irq_flags(irq, IRQF_VALID);
Kevin Hilmanf8b46b52011-04-21 13:23:34 -07001125 }
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001126 }
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001127 irq_set_chained_handler(bank->irq, gpio_irq_handler);
1128 irq_set_handler_data(bank->irq, bank);
Varadarajan, Charulatha2fae7fb2010-12-07 16:26:55 -08001129}
1130
Benoit Cousson384ebe12011-08-16 11:53:02 +02001131static const struct of_device_id omap_gpio_match[];
1132
Bill Pemberton38363092012-11-19 13:22:34 -05001133static int omap_gpio_probe(struct platform_device *pdev)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001134{
Benoit Cousson862ff642012-02-01 15:58:56 +01001135 struct device *dev = &pdev->dev;
Benoit Cousson384ebe12011-08-16 11:53:02 +02001136 struct device_node *node = dev->of_node;
1137 const struct of_device_id *match;
Uwe Kleine-Königf6817a22012-05-21 21:57:39 +02001138 const struct omap_gpio_platform_data *pdata;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001139 struct resource *res;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001140 struct gpio_bank *bank;
Javier Martinez Canillas397eada2013-06-24 17:13:23 +02001141#ifdef CONFIG_ARCH_OMAP1
1142 int irq_base;
1143#endif
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001144
Benoit Cousson384ebe12011-08-16 11:53:02 +02001145 match = of_match_device(of_match_ptr(omap_gpio_match), dev);
1146
Jingoo Hane56aee12013-07-30 17:08:05 +09001147 pdata = match ? match->data : dev_get_platdata(dev);
Benoit Cousson384ebe12011-08-16 11:53:02 +02001148 if (!pdata)
Benoit Cousson96751fc2012-02-01 16:01:39 +01001149 return -EINVAL;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001150
Tobias Klauser086d5852012-10-05 11:37:38 +02001151 bank = devm_kzalloc(dev, sizeof(struct gpio_bank), GFP_KERNEL);
Charulatha V03e128c2011-05-05 19:58:01 +05301152 if (!bank) {
Benoit Cousson862ff642012-02-01 15:58:56 +01001153 dev_err(dev, "Memory alloc failed\n");
Benoit Cousson96751fc2012-02-01 16:01:39 +01001154 return -ENOMEM;
Charulatha V03e128c2011-05-05 19:58:01 +05301155 }
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001156
1157 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1158 if (unlikely(!res)) {
Benoit Cousson862ff642012-02-01 15:58:56 +01001159 dev_err(dev, "Invalid IRQ resource\n");
Benoit Cousson96751fc2012-02-01 16:01:39 +01001160 return -ENODEV;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001161 }
1162
1163 bank->irq = res->start;
Benoit Cousson862ff642012-02-01 15:58:56 +01001164 bank->dev = dev;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001165 bank->dbck_flag = pdata->dbck_flag;
Tony Lindgren5de62b82010-12-07 16:26:58 -08001166 bank->stride = pdata->bank_stride;
Kevin Hilmand5f46242011-04-21 09:23:00 -07001167 bank->width = pdata->bank_width;
Charulatha Vd0d665a2011-08-31 00:02:21 +05301168 bank->is_mpuio = pdata->is_mpuio;
Charulatha V803a2432011-05-05 17:04:12 +05301169 bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
Kevin Hilmanfa87931a2011-04-20 16:31:23 -07001170 bank->regs = pdata->regs;
Benoit Cousson384ebe12011-08-16 11:53:02 +02001171#ifdef CONFIG_OF_GPIO
1172 bank->chip.of_node = of_node_get(node);
1173#endif
Jon Huntera2797be2013-04-04 15:16:15 -05001174 if (node) {
1175 if (!of_property_read_bool(node, "ti,gpio-always-on"))
1176 bank->loses_context = true;
1177 } else {
1178 bank->loses_context = pdata->loses_context;
Jon Hunter352a2d52013-04-15 13:06:54 -05001179
1180 if (bank->loses_context)
1181 bank->get_context_loss_count =
1182 pdata->get_context_loss_count;
Benoit Cousson384ebe12011-08-16 11:53:02 +02001183 }
1184
Javier Martinez Canillas397eada2013-06-24 17:13:23 +02001185#ifdef CONFIG_ARCH_OMAP1
1186 /*
1187 * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop
1188 * irq_alloc_descs() and irq_domain_add_legacy() and just use a
1189 * linear IRQ domain mapping for all OMAP platforms.
1190 */
1191 irq_base = irq_alloc_descs(-1, 0, bank->width, 0);
1192 if (irq_base < 0) {
1193 dev_err(dev, "Couldn't allocate IRQ numbers\n");
1194 return -ENODEV;
1195 }
Benoit Cousson384ebe12011-08-16 11:53:02 +02001196
Javier Martinez Canillas397eada2013-06-24 17:13:23 +02001197 bank->domain = irq_domain_add_legacy(node, bank->width, irq_base,
1198 0, &irq_domain_simple_ops, NULL);
1199#else
Jon Hunterede4d7a2013-03-01 11:22:47 -06001200 bank->domain = irq_domain_add_linear(node, bank->width,
1201 &irq_domain_simple_ops, NULL);
Javier Martinez Canillas397eada2013-06-24 17:13:23 +02001202#endif
1203 if (!bank->domain) {
1204 dev_err(dev, "Couldn't register an IRQ domain\n");
Benoit Cousson384ebe12011-08-16 11:53:02 +02001205 return -ENODEV;
Javier Martinez Canillas397eada2013-06-24 17:13:23 +02001206 }
Kevin Hilmanfa87931a2011-04-20 16:31:23 -07001207
1208 if (bank->regs->set_dataout && bank->regs->clr_dataout)
1209 bank->set_dataout = _set_gpio_dataout_reg;
1210 else
1211 bank->set_dataout = _set_gpio_dataout_mask;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001212
1213 spin_lock_init(&bank->lock);
1214
1215 /* Static mapping, never released */
1216 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1217 if (unlikely(!res)) {
Benoit Cousson862ff642012-02-01 15:58:56 +01001218 dev_err(dev, "Invalid mem resource\n");
Jon Hunter879fe322013-04-04 15:16:12 -05001219 irq_domain_remove(bank->domain);
Benoit Cousson96751fc2012-02-01 16:01:39 +01001220 return -ENODEV;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001221 }
1222
Benoit Cousson96751fc2012-02-01 16:01:39 +01001223 if (!devm_request_mem_region(dev, res->start, resource_size(res),
1224 pdev->name)) {
1225 dev_err(dev, "Region already claimed\n");
Jon Hunter879fe322013-04-04 15:16:12 -05001226 irq_domain_remove(bank->domain);
Benoit Cousson96751fc2012-02-01 16:01:39 +01001227 return -EBUSY;
1228 }
1229
1230 bank->base = devm_ioremap(dev, res->start, resource_size(res));
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001231 if (!bank->base) {
Benoit Cousson862ff642012-02-01 15:58:56 +01001232 dev_err(dev, "Could not ioremap\n");
Jon Hunter879fe322013-04-04 15:16:12 -05001233 irq_domain_remove(bank->domain);
Benoit Cousson96751fc2012-02-01 16:01:39 +01001234 return -ENOMEM;
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001235 }
1236
Tarun Kanti DebBarma065cd792011-11-24 01:48:52 +05301237 platform_set_drvdata(pdev, bank);
1238
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001239 pm_runtime_enable(bank->dev);
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301240 pm_runtime_irq_safe(bank->dev);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001241 pm_runtime_get_sync(bank->dev);
1242
Charulatha Vd0d665a2011-08-31 00:02:21 +05301243 if (bank->is_mpuio)
Tarun Kanti DebBarmaab985f02011-09-13 15:12:05 +05301244 mpuio_init(bank);
1245
Charulatha V03e128c2011-05-05 19:58:01 +05301246 omap_gpio_mod_init(bank);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001247 omap_gpio_chip_init(bank);
Tony Lindgren9a748052010-12-07 16:26:56 -08001248 omap_gpio_show_rev(bank);
Tony Lindgren9f7065d2009-10-19 15:25:20 -07001249
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301250 pm_runtime_put(bank->dev);
1251
Charulatha V03e128c2011-05-05 19:58:01 +05301252 list_add_tail(&bank->node, &omap_gpio_list);
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001253
Jon Hunter879fe322013-04-04 15:16:12 -05001254 return 0;
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001255}
1256
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301257#ifdef CONFIG_ARCH_OMAP2PLUS
1258
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301259#if defined(CONFIG_PM_RUNTIME)
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301260static void omap_gpio_restore_context(struct gpio_bank *bank);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001261
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301262static int omap_gpio_runtime_suspend(struct device *dev)
1263{
1264 struct platform_device *pdev = to_platform_device(dev);
1265 struct gpio_bank *bank = platform_get_drvdata(pdev);
1266 u32 l1 = 0, l2 = 0;
1267 unsigned long flags;
Kevin Hilman68942ed2012-03-05 15:10:04 -08001268 u32 wake_low, wake_hi;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301269
1270 spin_lock_irqsave(&bank->lock, flags);
Kevin Hilman68942ed2012-03-05 15:10:04 -08001271
1272 /*
1273 * Only edges can generate a wakeup event to the PRCM.
1274 *
1275 * Therefore, ensure any wake-up capable GPIOs have
1276 * edge-detection enabled before going idle to ensure a wakeup
1277 * to the PRCM is generated on a GPIO transition. (c.f. 34xx
1278 * NDA TRM 25.5.3.1)
1279 *
1280 * The normal values will be restored upon ->runtime_resume()
1281 * by writing back the values saved in bank->context.
1282 */
1283 wake_low = bank->context.leveldetect0 & bank->context.wake_en;
1284 if (wake_low)
1285 __raw_writel(wake_low | bank->context.fallingdetect,
1286 bank->base + bank->regs->fallingdetect);
1287 wake_hi = bank->context.leveldetect1 & bank->context.wake_en;
1288 if (wake_hi)
1289 __raw_writel(wake_hi | bank->context.risingdetect,
1290 bank->base + bank->regs->risingdetect);
1291
Kevin Hilmanb3c64bc2012-05-17 16:42:16 -07001292 if (!bank->enabled_non_wakeup_gpios)
1293 goto update_gpio_context_count;
1294
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301295 if (bank->power_mode != OFF_MODE) {
1296 bank->power_mode = 0;
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +05301297 goto update_gpio_context_count;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301298 }
1299 /*
1300 * If going to OFF, remove triggering for all
1301 * non-wakeup GPIOs. Otherwise spurious IRQs will be
1302 * generated. See OMAP2420 Errata item 1.101.
1303 */
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301304 bank->saved_datain = __raw_readl(bank->base +
1305 bank->regs->datain);
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301306 l1 = bank->context.fallingdetect;
1307 l2 = bank->context.risingdetect;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301308
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301309 l1 &= ~bank->enabled_non_wakeup_gpios;
1310 l2 &= ~bank->enabled_non_wakeup_gpios;
1311
1312 __raw_writel(l1, bank->base + bank->regs->fallingdetect);
1313 __raw_writel(l2, bank->base + bank->regs->risingdetect);
1314
1315 bank->workaround_enabled = true;
1316
Tarun Kanti DebBarma41d87cb2011-11-15 12:52:38 +05301317update_gpio_context_count:
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301318 if (bank->get_context_loss_count)
1319 bank->context_loss_count =
1320 bank->get_context_loss_count(bank->dev);
1321
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +05301322 _gpio_dbck_disable(bank);
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301323 spin_unlock_irqrestore(&bank->lock, flags);
1324
1325 return 0;
1326}
1327
Jon Hunter352a2d52013-04-15 13:06:54 -05001328static void omap_gpio_init_context(struct gpio_bank *p);
1329
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301330static int omap_gpio_runtime_resume(struct device *dev)
1331{
1332 struct platform_device *pdev = to_platform_device(dev);
1333 struct gpio_bank *bank = platform_get_drvdata(pdev);
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301334 u32 l = 0, gen, gen0, gen1;
1335 unsigned long flags;
Jon Huntera2797be2013-04-04 15:16:15 -05001336 int c;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301337
1338 spin_lock_irqsave(&bank->lock, flags);
Jon Hunter352a2d52013-04-15 13:06:54 -05001339
1340 /*
1341 * On the first resume during the probe, the context has not
1342 * been initialised and so initialise it now. Also initialise
1343 * the context loss count.
1344 */
1345 if (bank->loses_context && !bank->context_valid) {
1346 omap_gpio_init_context(bank);
1347
1348 if (bank->get_context_loss_count)
1349 bank->context_loss_count =
1350 bank->get_context_loss_count(bank->dev);
1351 }
1352
Tarun Kanti DebBarma72f83af92011-11-24 03:03:28 +05301353 _gpio_dbck_enable(bank);
Kevin Hilman68942ed2012-03-05 15:10:04 -08001354
1355 /*
1356 * In ->runtime_suspend(), level-triggered, wakeup-enabled
1357 * GPIOs were set to edge trigger also in order to be able to
1358 * generate a PRCM wakeup. Here we restore the
1359 * pre-runtime_suspend() values for edge triggering.
1360 */
1361 __raw_writel(bank->context.fallingdetect,
1362 bank->base + bank->regs->fallingdetect);
1363 __raw_writel(bank->context.risingdetect,
1364 bank->base + bank->regs->risingdetect);
1365
Jon Huntera2797be2013-04-04 15:16:15 -05001366 if (bank->loses_context) {
1367 if (!bank->get_context_loss_count) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301368 omap_gpio_restore_context(bank);
1369 } else {
Jon Huntera2797be2013-04-04 15:16:15 -05001370 c = bank->get_context_loss_count(bank->dev);
1371 if (c != bank->context_loss_count) {
1372 omap_gpio_restore_context(bank);
1373 } else {
1374 spin_unlock_irqrestore(&bank->lock, flags);
1375 return 0;
1376 }
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301377 }
1378 }
1379
Tarun Kanti DebBarma1b1287032012-04-27 19:43:38 +05301380 if (!bank->workaround_enabled) {
1381 spin_unlock_irqrestore(&bank->lock, flags);
1382 return 0;
1383 }
1384
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301385 l = __raw_readl(bank->base + bank->regs->datain);
1386
1387 /*
1388 * Check if any of the non-wakeup interrupt GPIOs have changed
1389 * state. If so, generate an IRQ by software. This is
1390 * horribly racy, but it's the best we can do to work around
1391 * this silicon bug.
1392 */
1393 l ^= bank->saved_datain;
1394 l &= bank->enabled_non_wakeup_gpios;
1395
1396 /*
1397 * No need to generate IRQs for the rising edge for gpio IRQs
1398 * configured with falling edge only; and vice versa.
1399 */
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301400 gen0 = l & bank->context.fallingdetect;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301401 gen0 &= bank->saved_datain;
1402
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301403 gen1 = l & bank->context.risingdetect;
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301404 gen1 &= ~(bank->saved_datain);
1405
1406 /* FIXME: Consider GPIO IRQs with level detections properly! */
Tarun Kanti DebBarmac6f31c92012-04-27 19:43:32 +05301407 gen = l & (~(bank->context.fallingdetect) &
1408 ~(bank->context.risingdetect));
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301409 /* Consider all GPIO IRQs needed to be updated */
1410 gen |= gen0 | gen1;
1411
1412 if (gen) {
1413 u32 old0, old1;
1414
1415 old0 = __raw_readl(bank->base + bank->regs->leveldetect0);
1416 old1 = __raw_readl(bank->base + bank->regs->leveldetect1);
1417
Tarun Kanti DebBarma4e962e82012-04-27 19:43:37 +05301418 if (!bank->regs->irqstatus_raw0) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301419 __raw_writel(old0 | gen, bank->base +
1420 bank->regs->leveldetect0);
1421 __raw_writel(old1 | gen, bank->base +
1422 bank->regs->leveldetect1);
1423 }
1424
Tarun Kanti DebBarma4e962e82012-04-27 19:43:37 +05301425 if (bank->regs->irqstatus_raw0) {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301426 __raw_writel(old0 | l, bank->base +
1427 bank->regs->leveldetect0);
1428 __raw_writel(old1 | l, bank->base +
1429 bank->regs->leveldetect1);
1430 }
1431 __raw_writel(old0, bank->base + bank->regs->leveldetect0);
1432 __raw_writel(old1, bank->base + bank->regs->leveldetect1);
1433 }
1434
1435 bank->workaround_enabled = false;
1436 spin_unlock_irqrestore(&bank->lock, flags);
1437
1438 return 0;
1439}
1440#endif /* CONFIG_PM_RUNTIME */
1441
1442void omap2_gpio_prepare_for_idle(int pwr_mode)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001443{
Charulatha V03e128c2011-05-05 19:58:01 +05301444 struct gpio_bank *bank;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001445
Charulatha V03e128c2011-05-05 19:58:01 +05301446 list_for_each_entry(bank, &omap_gpio_list, node) {
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +02001447 if (!BANK_USED(bank) || !bank->loses_context)
Charulatha V03e128c2011-05-05 19:58:01 +05301448 continue;
1449
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301450 bank->power_mode = pwr_mode;
1451
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301452 pm_runtime_put_sync_suspend(bank->dev);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001453 }
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001454}
1455
Kevin Hilman43ffcd92009-01-27 11:09:24 -08001456void omap2_gpio_resume_after_idle(void)
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001457{
Charulatha V03e128c2011-05-05 19:58:01 +05301458 struct gpio_bank *bank;
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001459
Charulatha V03e128c2011-05-05 19:58:01 +05301460 list_for_each_entry(bank, &omap_gpio_list, node) {
Javier Martinez Canillasfa365e42013-09-25 02:36:52 +02001461 if (!BANK_USED(bank) || !bank->loses_context)
Charulatha V03e128c2011-05-05 19:58:01 +05301462 continue;
1463
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301464 pm_runtime_get_sync(bank->dev);
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001465 }
Juha Yrjola3ac4fa92006-12-06 17:13:52 -08001466}
1467
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301468#if defined(CONFIG_PM_RUNTIME)
Jon Hunter352a2d52013-04-15 13:06:54 -05001469static void omap_gpio_init_context(struct gpio_bank *p)
1470{
1471 struct omap_gpio_reg_offs *regs = p->regs;
1472 void __iomem *base = p->base;
1473
1474 p->context.ctrl = __raw_readl(base + regs->ctrl);
1475 p->context.oe = __raw_readl(base + regs->direction);
1476 p->context.wake_en = __raw_readl(base + regs->wkup_en);
1477 p->context.leveldetect0 = __raw_readl(base + regs->leveldetect0);
1478 p->context.leveldetect1 = __raw_readl(base + regs->leveldetect1);
1479 p->context.risingdetect = __raw_readl(base + regs->risingdetect);
1480 p->context.fallingdetect = __raw_readl(base + regs->fallingdetect);
1481 p->context.irqenable1 = __raw_readl(base + regs->irqenable);
1482 p->context.irqenable2 = __raw_readl(base + regs->irqenable2);
1483
1484 if (regs->set_dataout && p->regs->clr_dataout)
1485 p->context.dataout = __raw_readl(base + regs->set_dataout);
1486 else
1487 p->context.dataout = __raw_readl(base + regs->dataout);
1488
1489 p->context_valid = true;
1490}
1491
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301492static void omap_gpio_restore_context(struct gpio_bank *bank)
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301493{
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301494 __raw_writel(bank->context.wake_en,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301495 bank->base + bank->regs->wkup_en);
1496 __raw_writel(bank->context.ctrl, bank->base + bank->regs->ctrl);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301497 __raw_writel(bank->context.leveldetect0,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301498 bank->base + bank->regs->leveldetect0);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301499 __raw_writel(bank->context.leveldetect1,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301500 bank->base + bank->regs->leveldetect1);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301501 __raw_writel(bank->context.risingdetect,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301502 bank->base + bank->regs->risingdetect);
Tarun Kanti DebBarma60a34372011-09-29 04:47:25 +05301503 __raw_writel(bank->context.fallingdetect,
Tarun Kanti DebBarmaae10f232011-08-30 15:24:27 +05301504 bank->base + bank->regs->fallingdetect);
Nishanth Menonf86bcc32011-09-09 19:14:08 +05301505 if (bank->regs->set_dataout && bank->regs->clr_dataout)
1506 __raw_writel(bank->context.dataout,
1507 bank->base + bank->regs->set_dataout);
1508 else
1509 __raw_writel(bank->context.dataout,
1510 bank->base + bank->regs->dataout);
Nishanth Menon6d13eaa2011-08-29 18:54:50 +05301511 __raw_writel(bank->context.oe, bank->base + bank->regs->direction);
1512
Nishanth Menonae547352011-09-09 19:08:58 +05301513 if (bank->dbck_enable_mask) {
1514 __raw_writel(bank->context.debounce, bank->base +
1515 bank->regs->debounce);
1516 __raw_writel(bank->context.debounce_en,
1517 bank->base + bank->regs->debounce_en);
1518 }
Nishanth Menonba805be2011-08-29 18:41:08 +05301519
1520 __raw_writel(bank->context.irqenable1,
1521 bank->base + bank->regs->irqenable);
1522 __raw_writel(bank->context.irqenable2,
1523 bank->base + bank->regs->irqenable2);
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301524}
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301525#endif /* CONFIG_PM_RUNTIME */
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301526#else
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301527#define omap_gpio_runtime_suspend NULL
1528#define omap_gpio_runtime_resume NULL
Arnd Bergmannea4a21a2013-05-31 17:59:46 +02001529static inline void omap_gpio_init_context(struct gpio_bank *p) {}
Rajendra Nayak40c670f2008-09-26 17:47:48 +05301530#endif
1531
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301532static const struct dev_pm_ops gpio_pm_ops = {
Tarun Kanti DebBarma2dc983c2011-11-24 02:44:29 +05301533 SET_RUNTIME_PM_OPS(omap_gpio_runtime_suspend, omap_gpio_runtime_resume,
1534 NULL)
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301535};
1536
Benoit Cousson384ebe12011-08-16 11:53:02 +02001537#if defined(CONFIG_OF)
1538static struct omap_gpio_reg_offs omap2_gpio_regs = {
1539 .revision = OMAP24XX_GPIO_REVISION,
1540 .direction = OMAP24XX_GPIO_OE,
1541 .datain = OMAP24XX_GPIO_DATAIN,
1542 .dataout = OMAP24XX_GPIO_DATAOUT,
1543 .set_dataout = OMAP24XX_GPIO_SETDATAOUT,
1544 .clr_dataout = OMAP24XX_GPIO_CLEARDATAOUT,
1545 .irqstatus = OMAP24XX_GPIO_IRQSTATUS1,
1546 .irqstatus2 = OMAP24XX_GPIO_IRQSTATUS2,
1547 .irqenable = OMAP24XX_GPIO_IRQENABLE1,
1548 .irqenable2 = OMAP24XX_GPIO_IRQENABLE2,
1549 .set_irqenable = OMAP24XX_GPIO_SETIRQENABLE1,
1550 .clr_irqenable = OMAP24XX_GPIO_CLEARIRQENABLE1,
1551 .debounce = OMAP24XX_GPIO_DEBOUNCE_VAL,
1552 .debounce_en = OMAP24XX_GPIO_DEBOUNCE_EN,
1553 .ctrl = OMAP24XX_GPIO_CTRL,
1554 .wkup_en = OMAP24XX_GPIO_WAKE_EN,
1555 .leveldetect0 = OMAP24XX_GPIO_LEVELDETECT0,
1556 .leveldetect1 = OMAP24XX_GPIO_LEVELDETECT1,
1557 .risingdetect = OMAP24XX_GPIO_RISINGDETECT,
1558 .fallingdetect = OMAP24XX_GPIO_FALLINGDETECT,
1559};
1560
1561static struct omap_gpio_reg_offs omap4_gpio_regs = {
1562 .revision = OMAP4_GPIO_REVISION,
1563 .direction = OMAP4_GPIO_OE,
1564 .datain = OMAP4_GPIO_DATAIN,
1565 .dataout = OMAP4_GPIO_DATAOUT,
1566 .set_dataout = OMAP4_GPIO_SETDATAOUT,
1567 .clr_dataout = OMAP4_GPIO_CLEARDATAOUT,
1568 .irqstatus = OMAP4_GPIO_IRQSTATUS0,
1569 .irqstatus2 = OMAP4_GPIO_IRQSTATUS1,
1570 .irqenable = OMAP4_GPIO_IRQSTATUSSET0,
1571 .irqenable2 = OMAP4_GPIO_IRQSTATUSSET1,
1572 .set_irqenable = OMAP4_GPIO_IRQSTATUSSET0,
1573 .clr_irqenable = OMAP4_GPIO_IRQSTATUSCLR0,
1574 .debounce = OMAP4_GPIO_DEBOUNCINGTIME,
1575 .debounce_en = OMAP4_GPIO_DEBOUNCENABLE,
1576 .ctrl = OMAP4_GPIO_CTRL,
1577 .wkup_en = OMAP4_GPIO_IRQWAKEN0,
1578 .leveldetect0 = OMAP4_GPIO_LEVELDETECT0,
1579 .leveldetect1 = OMAP4_GPIO_LEVELDETECT1,
1580 .risingdetect = OMAP4_GPIO_RISINGDETECT,
1581 .fallingdetect = OMAP4_GPIO_FALLINGDETECT,
1582};
1583
Chen Gange9a65bb2013-02-06 18:44:32 +08001584static const struct omap_gpio_platform_data omap2_pdata = {
Benoit Cousson384ebe12011-08-16 11:53:02 +02001585 .regs = &omap2_gpio_regs,
1586 .bank_width = 32,
1587 .dbck_flag = false,
1588};
1589
Chen Gange9a65bb2013-02-06 18:44:32 +08001590static const struct omap_gpio_platform_data omap3_pdata = {
Benoit Cousson384ebe12011-08-16 11:53:02 +02001591 .regs = &omap2_gpio_regs,
1592 .bank_width = 32,
1593 .dbck_flag = true,
1594};
1595
Chen Gange9a65bb2013-02-06 18:44:32 +08001596static const struct omap_gpio_platform_data omap4_pdata = {
Benoit Cousson384ebe12011-08-16 11:53:02 +02001597 .regs = &omap4_gpio_regs,
1598 .bank_width = 32,
1599 .dbck_flag = true,
1600};
1601
1602static const struct of_device_id omap_gpio_match[] = {
1603 {
1604 .compatible = "ti,omap4-gpio",
1605 .data = &omap4_pdata,
1606 },
1607 {
1608 .compatible = "ti,omap3-gpio",
1609 .data = &omap3_pdata,
1610 },
1611 {
1612 .compatible = "ti,omap2-gpio",
1613 .data = &omap2_pdata,
1614 },
1615 { },
1616};
1617MODULE_DEVICE_TABLE(of, omap_gpio_match);
1618#endif
1619
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001620static struct platform_driver omap_gpio_driver = {
1621 .probe = omap_gpio_probe,
1622 .driver = {
1623 .name = "omap_gpio",
Tarun Kanti DebBarma55b93c32011-09-29 07:23:22 +05301624 .pm = &gpio_pm_ops,
Benoit Cousson384ebe12011-08-16 11:53:02 +02001625 .of_match_table = of_match_ptr(omap_gpio_match),
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001626 },
1627};
1628
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001629/*
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001630 * gpio driver register needs to be done before
1631 * machine_init functions access gpio APIs.
1632 * Hence omap_gpio_drv_reg() is a postcore_initcall.
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001633 */
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001634static int __init omap_gpio_drv_reg(void)
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001635{
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001636 return platform_driver_register(&omap_gpio_driver);
Tony Lindgren5e1c5ff2005-07-10 19:58:15 +01001637}
Varadarajan, Charulatha77640aa2010-12-07 16:26:57 -08001638postcore_initcall(omap_gpio_drv_reg);