blob: d4ebd07c306dd0a9abb9bdf69da927aa69d55bca [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
Alexey Starikovskiy15a58ed2007-02-02 19:48:22 +03003 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * This is an 64bit optimized version that always keeps the full mmconfig
5 * space mapped. This allows lockless config space operation.
6 */
7
8#include <linux/pci.h>
9#include <linux/init.h>
Greg Kroah-Hartman54549392005-06-23 17:35:56 -070010#include <linux/acpi.h>
Andi Kleend6ece542005-12-12 22:17:11 -080011#include <linux/bitmap.h>
Jiang Liu376f70a2012-06-22 14:55:12 +080012#include <linux/rcupdate.h>
Arjan van de Ven946f2ee2006-04-07 19:49:30 +020013#include <asm/e820.h>
Jaswinder Singh Rajput82487712008-12-27 18:32:28 +053014#include <asm/pci_x86.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015
Bjorn Helgaas8c577862009-11-13 17:34:59 -070016#define PREFIX "PCI: "
17
Al Viro8b8a4e32005-12-15 09:17:44 +000018static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
Greg Kroah-Hartman1cde8a12005-06-23 17:35:56 -070019{
Bjorn Helgaasf6e1d8c2009-11-13 17:35:04 -070020 struct pci_mmcfg_region *cfg = pci_mmconfig_lookup(seg, bus);
Ivan Kokshayskya0ca9902008-01-14 17:31:09 -050021
Bjorn Helgaasf6e1d8c2009-11-13 17:35:04 -070022 if (cfg && cfg->virt)
23 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12));
24 return NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -070025}
26
27static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
28 unsigned int devfn, int reg, int len, u32 *value)
29{
Al Viro8b8a4e32005-12-15 09:17:44 +000030 char __iomem *addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
Andi Kleen928cf8c2005-12-12 22:17:10 -080032 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
Andi Kleenecc16ba2006-04-11 12:54:48 +020033 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) {
Ivan Kokshayskya0ca9902008-01-14 17:31:09 -050034err: *value = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070035 return -EINVAL;
Andi Kleen49c93e82006-04-07 19:50:15 +020036 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070037
Jiang Liu376f70a2012-06-22 14:55:12 +080038 rcu_read_lock();
Andi Kleen928cf8c2005-12-12 22:17:10 -080039 addr = pci_dev_base(seg, bus, devfn);
Jiang Liu376f70a2012-06-22 14:55:12 +080040 if (!addr) {
41 rcu_read_unlock();
Ivan Kokshayskya0ca9902008-01-14 17:31:09 -050042 goto err;
Jiang Liu376f70a2012-06-22 14:55:12 +080043 }
Andi Kleen928cf8c2005-12-12 22:17:10 -080044
Linus Torvalds1da177e2005-04-16 15:20:36 -070045 switch (len) {
46 case 1:
dean gaudet3320ad92007-08-10 22:30:59 +020047 *value = mmio_config_readb(addr + reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -070048 break;
49 case 2:
dean gaudet3320ad92007-08-10 22:30:59 +020050 *value = mmio_config_readw(addr + reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -070051 break;
52 case 4:
dean gaudet3320ad92007-08-10 22:30:59 +020053 *value = mmio_config_readl(addr + reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -070054 break;
55 }
Jiang Liu376f70a2012-06-22 14:55:12 +080056 rcu_read_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -070057
58 return 0;
59}
60
61static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
62 unsigned int devfn, int reg, int len, u32 value)
63{
Al Viro8b8a4e32005-12-15 09:17:44 +000064 char __iomem *addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
Andi Kleen928cf8c2005-12-12 22:17:10 -080066 /* Why do we have this when nobody checks it. How about a BUG()!? -AK */
Linus Torvalds1da177e2005-04-16 15:20:36 -070067 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095)))
68 return -EINVAL;
69
Jiang Liu376f70a2012-06-22 14:55:12 +080070 rcu_read_lock();
Andi Kleen928cf8c2005-12-12 22:17:10 -080071 addr = pci_dev_base(seg, bus, devfn);
Jiang Liu376f70a2012-06-22 14:55:12 +080072 if (!addr) {
73 rcu_read_unlock();
Ivan Kokshayskya0ca9902008-01-14 17:31:09 -050074 return -EINVAL;
Jiang Liu376f70a2012-06-22 14:55:12 +080075 }
Andi Kleen928cf8c2005-12-12 22:17:10 -080076
Linus Torvalds1da177e2005-04-16 15:20:36 -070077 switch (len) {
78 case 1:
dean gaudet3320ad92007-08-10 22:30:59 +020079 mmio_config_writeb(addr + reg, value);
Linus Torvalds1da177e2005-04-16 15:20:36 -070080 break;
81 case 2:
dean gaudet3320ad92007-08-10 22:30:59 +020082 mmio_config_writew(addr + reg, value);
Linus Torvalds1da177e2005-04-16 15:20:36 -070083 break;
84 case 4:
dean gaudet3320ad92007-08-10 22:30:59 +020085 mmio_config_writel(addr + reg, value);
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 break;
87 }
Jiang Liu376f70a2012-06-22 14:55:12 +080088 rcu_read_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -070089
90 return 0;
91}
92
Jiang Liuc0fa4072012-06-22 14:55:17 +080093const struct pci_raw_ops pci_mmcfg = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 .read = pci_mmcfg_read,
95 .write = pci_mmcfg_write,
96};
97
Jiang Liu9cf01052012-06-22 14:55:13 +080098static void __iomem * __devinit mcfg_ioremap(struct pci_mmcfg_region *cfg)
OGAWA Hirofumi44de0202007-02-13 13:26:20 +010099{
100 void __iomem *addr;
Yinghai Lu068258b2009-03-19 20:55:35 -0700101 u64 start, size;
Bjorn Helgaasdf5eb1d2009-11-13 17:34:08 -0700102 int num_buses;
OGAWA Hirofumi44de0202007-02-13 13:26:20 +0100103
Bjorn Helgaasd7e6b662009-11-13 17:34:18 -0700104 start = cfg->address + PCI_MMCFG_BUS_OFFSET(cfg->start_bus);
105 num_buses = cfg->end_bus - cfg->start_bus + 1;
Bjorn Helgaasdf5eb1d2009-11-13 17:34:08 -0700106 size = PCI_MMCFG_BUS_OFFSET(num_buses);
Yinghai Lu068258b2009-03-19 20:55:35 -0700107 addr = ioremap_nocache(start, size);
Bjorn Helgaas8c577862009-11-13 17:34:59 -0700108 if (addr)
Bjorn Helgaasd7e6b662009-11-13 17:34:18 -0700109 addr -= PCI_MMCFG_BUS_OFFSET(cfg->start_bus);
OGAWA Hirofumi44de0202007-02-13 13:26:20 +0100110 return addr;
111}
112
Olivier Galibertb7867392007-02-13 13:26:20 +0100113int __init pci_mmcfg_arch_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114{
Bjorn Helgaas3f0f5502009-11-13 17:34:39 -0700115 struct pci_mmcfg_region *cfg;
Olivier Galibertb7867392007-02-13 13:26:20 +0100116
Jiang Liu9cf01052012-06-22 14:55:13 +0800117 list_for_each_entry(cfg, &pci_mmcfg_list, list)
118 if (pci_mmcfg_arch_map(cfg)) {
Yinghai Lu0b64ad72008-02-15 01:28:41 -0800119 pci_mmcfg_arch_free();
Olivier Galibertb7867392007-02-13 13:26:20 +0100120 return 0;
Greg Kroah-Hartman1cde8a12005-06-23 17:35:56 -0700121 }
Jiang Liu9cf01052012-06-22 14:55:13 +0800122
Matthew Wilcoxb6ce0682008-02-10 09:45:28 -0500123 raw_pci_ext_ops = &pci_mmcfg;
Jiang Liu9cf01052012-06-22 14:55:13 +0800124
Olivier Galibertb7867392007-02-13 13:26:20 +0100125 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126}
Yinghai Lu0b64ad72008-02-15 01:28:41 -0800127
128void __init pci_mmcfg_arch_free(void)
129{
Bjorn Helgaas3f0f5502009-11-13 17:34:39 -0700130 struct pci_mmcfg_region *cfg;
Yinghai Lu0b64ad72008-02-15 01:28:41 -0800131
Jiang Liu9cf01052012-06-22 14:55:13 +0800132 list_for_each_entry(cfg, &pci_mmcfg_list, list)
133 pci_mmcfg_arch_unmap(cfg);
134}
135
136int __devinit pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg)
137{
138 cfg->virt = mcfg_ioremap(cfg);
139 if (!cfg->virt) {
Jiang Liu24c97f02012-06-22 14:55:22 +0800140 pr_err(PREFIX "can't map MMCONFIG at %pR\n", &cfg->res);
Jiang Liu9cf01052012-06-22 14:55:13 +0800141 return -ENOMEM;
142 }
143
144 return 0;
145}
146
147void pci_mmcfg_arch_unmap(struct pci_mmcfg_region *cfg)
148{
149 if (cfg && cfg->virt) {
150 iounmap(cfg->virt + PCI_MMCFG_BUS_OFFSET(cfg->start_bus));
151 cfg->virt = NULL;
Yinghai Lu0b64ad72008-02-15 01:28:41 -0800152 }
Yinghai Lu0b64ad72008-02-15 01:28:41 -0800153}