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Peter Ujfalusia53b8e32011-06-04 08:16:41 +03001/*
2 * twl-common.c
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc..
5 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19 * 02110-1301 USA
20 *
21 */
22
23#include <linux/i2c.h>
24#include <linux/i2c/twl.h>
25#include <linux/gpio.h>
Peter Ujfalusib22f9542011-06-07 10:26:46 +030026#include <linux/regulator/machine.h>
27#include <linux/regulator/fixed.h>
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030028
29#include <plat/i2c.h>
Peter Ujfalusib22f9542011-06-07 10:26:46 +030030#include <plat/usb.h>
Peter Ujfalusia53b8e32011-06-04 08:16:41 +030031
32#include "twl-common.h"
33
34static struct i2c_board_info __initdata pmic_i2c_board_info = {
35 .addr = 0x48,
36 .flags = I2C_CLIENT_WAKE,
37};
38
39void __init omap_pmic_init(int bus, u32 clkrate,
40 const char *pmic_type, int pmic_irq,
41 struct twl4030_platform_data *pmic_data)
42{
43 strncpy(pmic_i2c_board_info.type, pmic_type,
44 sizeof(pmic_i2c_board_info.type));
45 pmic_i2c_board_info.irq = pmic_irq;
46 pmic_i2c_board_info.platform_data = pmic_data;
47
48 omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
49}
Peter Ujfalusib22f9542011-06-07 10:26:46 +030050
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +030051#if defined(CONFIG_ARCH_OMAP3)
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +030052static struct twl4030_usb_data omap3_usb_pdata = {
53 .usb_mode = T2_USB_MODE_ULPI,
54};
55
56static int omap3_batt_table[] = {
57/* 0 C */
5830800, 29500, 28300, 27100,
5926000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
6017200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
6111600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
628020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
635640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
644040, 3910, 3790, 3670, 3550
65};
66
67static struct twl4030_bci_platform_data omap3_bci_pdata = {
68 .battery_tmp_tbl = omap3_batt_table,
69 .tblsize = ARRAY_SIZE(omap3_batt_table),
70};
71
72static struct twl4030_madc_platform_data omap3_madc_pdata = {
73 .irq_line = 1,
74};
75
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +030076static struct twl4030_codec_data omap3_codec;
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +030077
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +030078static struct twl4030_audio_data omap3_audio_pdata = {
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +030079 .audio_mclk = 26000000,
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +030080 .codec = &omap3_codec,
Peter Ujfalusi827ed9a2011-06-07 10:28:54 +030081};
82
Peter Ujfalusib252b0e2011-06-07 11:38:24 +030083static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = {
84 REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
85};
86
87static struct regulator_init_data omap3_vdac_idata = {
88 .constraints = {
89 .min_uV = 1800000,
90 .max_uV = 1800000,
91 .valid_modes_mask = REGULATOR_MODE_NORMAL
92 | REGULATOR_MODE_STANDBY,
93 .valid_ops_mask = REGULATOR_CHANGE_MODE
94 | REGULATOR_CHANGE_STATUS,
95 },
96 .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies),
97 .consumer_supplies = omap3_vdda_dac_supplies,
98};
99
100static struct regulator_consumer_supply omap3_vpll2_supplies[] = {
101 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
102 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
103};
104
105static struct regulator_init_data omap3_vpll2_idata = {
106 .constraints = {
107 .min_uV = 1800000,
108 .max_uV = 1800000,
109 .valid_modes_mask = REGULATOR_MODE_NORMAL
110 | REGULATOR_MODE_STANDBY,
111 .valid_ops_mask = REGULATOR_CHANGE_MODE
112 | REGULATOR_CHANGE_STATUS,
113 },
114 .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies),
115 .consumer_supplies = omap3_vpll2_supplies,
116};
117
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300118void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data,
119 u32 pdata_flags, u32 regulators_flags)
120{
121 if (!pmic_data->irq_base)
122 pmic_data->irq_base = TWL4030_IRQ_BASE;
123 if (!pmic_data->irq_end)
124 pmic_data->irq_end = TWL4030_IRQ_END;
125
126 /* Common platform data configurations */
127 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
128 pmic_data->usb = &omap3_usb_pdata;
129
130 if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci)
131 pmic_data->bci = &omap3_bci_pdata;
132
133 if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc)
134 pmic_data->madc = &omap3_madc_pdata;
135
136 if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->audio)
137 pmic_data->audio = &omap3_audio_pdata;
138
139 /* Common regulator configurations */
140 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
141 pmic_data->vdac = &omap3_vdac_idata;
142
143 if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2)
144 pmic_data->vpll2 = &omap3_vpll2_idata;
145}
146#endif /* CONFIG_ARCH_OMAP3 */
147
148#if defined(CONFIG_ARCH_OMAP4)
149static struct twl4030_usb_data omap4_usb_pdata = {
150 .phy_init = omap4430_phy_init,
151 .phy_exit = omap4430_phy_exit,
152 .phy_power = omap4430_phy_power,
153 .phy_set_clock = omap4430_phy_set_clk,
154 .phy_suspend = omap4430_phy_suspend,
155};
156
Peter Ujfalusib22f9542011-06-07 10:26:46 +0300157static struct regulator_init_data omap4_vdac_idata = {
158 .constraints = {
159 .min_uV = 1800000,
160 .max_uV = 1800000,
161 .valid_modes_mask = REGULATOR_MODE_NORMAL
162 | REGULATOR_MODE_STANDBY,
163 .valid_ops_mask = REGULATOR_CHANGE_MODE
164 | REGULATOR_CHANGE_STATUS,
165 },
166};
167
168static struct regulator_init_data omap4_vaux2_idata = {
169 .constraints = {
170 .min_uV = 1200000,
171 .max_uV = 2800000,
172 .apply_uV = true,
173 .valid_modes_mask = REGULATOR_MODE_NORMAL
174 | REGULATOR_MODE_STANDBY,
175 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
176 | REGULATOR_CHANGE_MODE
177 | REGULATOR_CHANGE_STATUS,
178 },
179};
180
181static struct regulator_init_data omap4_vaux3_idata = {
182 .constraints = {
183 .min_uV = 1000000,
184 .max_uV = 3000000,
185 .apply_uV = true,
186 .valid_modes_mask = REGULATOR_MODE_NORMAL
187 | REGULATOR_MODE_STANDBY,
188 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
189 | REGULATOR_CHANGE_MODE
190 | REGULATOR_CHANGE_STATUS,
191 },
192};
193
194static struct regulator_consumer_supply omap4_vmmc_supply[] = {
195 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
196};
197
198/* VMMC1 for MMC1 card */
199static struct regulator_init_data omap4_vmmc_idata = {
200 .constraints = {
201 .min_uV = 1200000,
202 .max_uV = 3000000,
203 .apply_uV = true,
204 .valid_modes_mask = REGULATOR_MODE_NORMAL
205 | REGULATOR_MODE_STANDBY,
206 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
207 | REGULATOR_CHANGE_MODE
208 | REGULATOR_CHANGE_STATUS,
209 },
210 .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply),
211 .consumer_supplies = omap4_vmmc_supply,
212};
213
214static struct regulator_init_data omap4_vpp_idata = {
215 .constraints = {
216 .min_uV = 1800000,
217 .max_uV = 2500000,
218 .apply_uV = true,
219 .valid_modes_mask = REGULATOR_MODE_NORMAL
220 | REGULATOR_MODE_STANDBY,
221 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
222 | REGULATOR_CHANGE_MODE
223 | REGULATOR_CHANGE_STATUS,
224 },
225};
226
227static struct regulator_init_data omap4_vana_idata = {
228 .constraints = {
229 .min_uV = 2100000,
230 .max_uV = 2100000,
231 .valid_modes_mask = REGULATOR_MODE_NORMAL
232 | REGULATOR_MODE_STANDBY,
233 .valid_ops_mask = REGULATOR_CHANGE_MODE
234 | REGULATOR_CHANGE_STATUS,
235 },
236};
237
238static struct regulator_init_data omap4_vcxio_idata = {
239 .constraints = {
240 .min_uV = 1800000,
241 .max_uV = 1800000,
242 .valid_modes_mask = REGULATOR_MODE_NORMAL
243 | REGULATOR_MODE_STANDBY,
244 .valid_ops_mask = REGULATOR_CHANGE_MODE
245 | REGULATOR_CHANGE_STATUS,
246 },
247};
248
249static struct regulator_init_data omap4_vusb_idata = {
250 .constraints = {
251 .min_uV = 3300000,
252 .max_uV = 3300000,
253 .apply_uV = true,
254 .valid_modes_mask = REGULATOR_MODE_NORMAL
255 | REGULATOR_MODE_STANDBY,
256 .valid_ops_mask = REGULATOR_CHANGE_MODE
257 | REGULATOR_CHANGE_STATUS,
258 },
259};
260
261static struct regulator_init_data omap4_clk32kg_idata = {
262 .constraints = {
263 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
264 },
265};
266
267void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data,
268 u32 pdata_flags, u32 regulators_flags)
269{
270 if (!pmic_data->irq_base)
271 pmic_data->irq_base = TWL6030_IRQ_BASE;
272 if (!pmic_data->irq_end)
273 pmic_data->irq_end = TWL6030_IRQ_END;
274
275 /* Common platform data configurations */
276 if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb)
277 pmic_data->usb = &omap4_usb_pdata;
278
279 /* Common regulator configurations */
280 if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac)
281 pmic_data->vdac = &omap4_vdac_idata;
282
283 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2)
284 pmic_data->vaux2 = &omap4_vaux2_idata;
285
286 if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3)
287 pmic_data->vaux3 = &omap4_vaux3_idata;
288
289 if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc)
290 pmic_data->vmmc = &omap4_vmmc_idata;
291
292 if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp)
293 pmic_data->vpp = &omap4_vpp_idata;
294
295 if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana)
296 pmic_data->vana = &omap4_vana_idata;
297
298 if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio)
299 pmic_data->vcxio = &omap4_vcxio_idata;
300
301 if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb)
302 pmic_data->vusb = &omap4_vusb_idata;
303
304 if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG &&
305 !pmic_data->clk32kg)
306 pmic_data->clk32kg = &omap4_clk32kg_idata;
307}
Peter Ujfalusid12d1fc2011-08-09 15:36:50 +0300308#endif /* CONFIG_ARCH_OMAP4 */