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Philipp Zabelb8d181e2013-10-10 16:18:45 +02001/*
2 * i.MX IPUv3 DP Overlay Planes
3 *
4 * Copyright (C) 2013 Philipp Zabel, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <drm/drmP.h>
Liu Ying5f2f9112016-07-08 17:40:59 +080017#include <drm/drm_atomic.h>
Liu Ying255c35f2016-07-08 17:40:56 +080018#include <drm/drm_atomic_helper.h>
Philipp Zabelb8d181e2013-10-10 16:18:45 +020019#include <drm/drm_fb_cma_helper.h>
20#include <drm/drm_gem_cma_helper.h>
Liu Ying33f14232016-07-08 17:40:55 +080021#include <drm/drm_plane_helper.h>
Philipp Zabelb8d181e2013-10-10 16:18:45 +020022
Philipp Zabel39b90042013-09-30 16:13:39 +020023#include "video/imx-ipu-v3.h"
Philipp Zabelb8d181e2013-10-10 16:18:45 +020024#include "ipuv3-plane.h"
25
Philipp Zabel3df07392016-07-06 15:47:11 +020026static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
27{
28 return container_of(p, struct ipu_plane, base);
29}
Philipp Zabelb8d181e2013-10-10 16:18:45 +020030
31static const uint32_t ipu_plane_formats[] = {
Philipp Zabelc639a1c2014-12-12 13:40:38 +010032 DRM_FORMAT_ARGB1555,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020033 DRM_FORMAT_XRGB1555,
Philipp Zabelc639a1c2014-12-12 13:40:38 +010034 DRM_FORMAT_ABGR1555,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020035 DRM_FORMAT_XBGR1555,
Philipp Zabelc639a1c2014-12-12 13:40:38 +010036 DRM_FORMAT_RGBA5551,
37 DRM_FORMAT_BGRA5551,
Lucas Stachcb166a32015-08-04 17:22:06 +020038 DRM_FORMAT_ARGB4444,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020039 DRM_FORMAT_ARGB8888,
40 DRM_FORMAT_XRGB8888,
41 DRM_FORMAT_ABGR8888,
42 DRM_FORMAT_XBGR8888,
Philipp Zabel59d6b712015-04-16 15:56:40 +020043 DRM_FORMAT_RGBA8888,
44 DRM_FORMAT_RGBX8888,
45 DRM_FORMAT_BGRA8888,
46 DRM_FORMAT_BGRA8888,
Philipp Zabel79321312016-02-12 14:35:55 +010047 DRM_FORMAT_UYVY,
48 DRM_FORMAT_VYUY,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020049 DRM_FORMAT_YUYV,
50 DRM_FORMAT_YVYU,
51 DRM_FORMAT_YUV420,
52 DRM_FORMAT_YVU420,
Enrico Jorns33bee522015-11-24 16:29:22 +010053 DRM_FORMAT_RGB565,
Philipp Zabelb8d181e2013-10-10 16:18:45 +020054};
55
56int ipu_plane_irq(struct ipu_plane *ipu_plane)
57{
58 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
59 IPU_IRQ_EOF);
60}
61
Liu Ying33f14232016-07-08 17:40:55 +080062static inline unsigned long
63drm_plane_state_to_eba(struct drm_plane_state *state)
64{
65 struct drm_framebuffer *fb = state->fb;
66 struct drm_gem_cma_object *cma_obj;
67
68 cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
69 BUG_ON(!cma_obj);
70
71 return cma_obj->paddr + fb->offsets[0] +
72 fb->pitches[0] * (state->src_y >> 16) +
73 (fb->bits_per_pixel >> 3) * (state->src_x >> 16);
74}
75
76static inline unsigned long
77drm_plane_state_to_ubo(struct drm_plane_state *state)
78{
79 struct drm_framebuffer *fb = state->fb;
80 struct drm_gem_cma_object *cma_obj;
81 unsigned long eba = drm_plane_state_to_eba(state);
82
83 cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
84 BUG_ON(!cma_obj);
85
86 return cma_obj->paddr + fb->offsets[1] +
87 fb->pitches[1] * (state->src_y >> 16) / 2 +
88 (state->src_x >> 16) / 2 - eba;
89}
90
91static inline unsigned long
92drm_plane_state_to_vbo(struct drm_plane_state *state)
93{
94 struct drm_framebuffer *fb = state->fb;
95 struct drm_gem_cma_object *cma_obj;
96 unsigned long eba = drm_plane_state_to_eba(state);
97
98 cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
99 BUG_ON(!cma_obj);
100
101 return cma_obj->paddr + fb->offsets[2] +
102 fb->pitches[2] * (state->src_y >> 16) / 2 +
103 (state->src_x >> 16) / 2 - eba;
104}
105
106static void ipu_plane_atomic_set_base(struct ipu_plane *ipu_plane,
107 struct drm_plane_state *old_state)
108{
109 struct drm_plane *plane = &ipu_plane->base;
110 struct drm_plane_state *state = plane->state;
Liu Ying43daa012016-10-10 14:50:06 +0800111 struct drm_crtc_state *crtc_state = state->crtc->state;
Liu Ying33f14232016-07-08 17:40:55 +0800112 struct drm_framebuffer *fb = state->fb;
113 unsigned long eba, ubo, vbo;
114 int active;
115
116 eba = drm_plane_state_to_eba(state);
117
118 switch (fb->pixel_format) {
119 case DRM_FORMAT_YUV420:
120 case DRM_FORMAT_YVU420:
121 if (old_state->fb)
122 break;
123
124 /*
125 * Multiplanar formats have to meet the following restrictions:
126 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
127 * - EBA, UBO and VBO are a multiple of 8
128 * - UBO and VBO are unsigned and not larger than 0xfffff8
129 * - Only EBA may be changed while scanout is active
130 * - The strides of U and V planes must be identical.
131 */
132 ubo = drm_plane_state_to_ubo(state);
133 vbo = drm_plane_state_to_vbo(state);
134
135 if (fb->pixel_format == DRM_FORMAT_YUV420)
136 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
137 fb->pitches[1], ubo, vbo);
138 else
139 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
140 fb->pitches[1], vbo, ubo);
141
142 dev_dbg(ipu_plane->base.dev->dev,
143 "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
144 state->src_x >> 16, state->src_y >> 16);
145 break;
146 default:
147 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
148 eba, state->src_x >> 16, state->src_y >> 16);
149
150 break;
151 }
152
Liu Ying43daa012016-10-10 14:50:06 +0800153 if (!drm_atomic_crtc_needs_modeset(crtc_state)) {
Philipp Zabel356f9522014-10-08 17:19:14 +0200154 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
155 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
156 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
157 } else {
158 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
159 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
160 }
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200161}
162
163void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
164{
165 if (!IS_ERR_OR_NULL(ipu_plane->dp))
166 ipu_dp_put(ipu_plane->dp);
167 if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
168 ipu_dmfc_put(ipu_plane->dmfc);
169 if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
170 ipu_idmac_put(ipu_plane->ipu_ch);
171}
172
173int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
174{
175 int ret;
176
177 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
178 if (IS_ERR(ipu_plane->ipu_ch)) {
179 ret = PTR_ERR(ipu_plane->ipu_ch);
180 DRM_ERROR("failed to get idmac channel: %d\n", ret);
181 return ret;
182 }
183
184 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
185 if (IS_ERR(ipu_plane->dmfc)) {
186 ret = PTR_ERR(ipu_plane->dmfc);
187 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
188 goto err_out;
189 }
190
191 if (ipu_plane->dp_flow >= 0) {
192 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
193 if (IS_ERR(ipu_plane->dp)) {
194 ret = PTR_ERR(ipu_plane->dp);
195 DRM_ERROR("failed to get dp flow: %d\n", ret);
196 goto err_out;
197 }
198 }
199
200 return 0;
201err_out:
202 ipu_plane_put_resources(ipu_plane);
203
204 return ret;
205}
206
Liu Ying33f14232016-07-08 17:40:55 +0800207static void ipu_plane_enable(struct ipu_plane *ipu_plane)
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200208{
Philipp Zabel285bbb02014-04-14 23:53:20 +0200209 if (ipu_plane->dp)
210 ipu_dp_enable(ipu_plane->ipu);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200211 ipu_dmfc_enable_channel(ipu_plane->dmfc);
212 ipu_idmac_enable_channel(ipu_plane->ipu_ch);
213 if (ipu_plane->dp)
214 ipu_dp_enable_channel(ipu_plane->dp);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200215}
216
Lucas Stachdf4b2232016-08-11 11:18:50 +0200217static int ipu_disable_plane(struct drm_plane *plane)
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200218{
Lucas Stachdf4b2232016-08-11 11:18:50 +0200219 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
220
221 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
222
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200223 ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
224
225 if (ipu_plane->dp)
226 ipu_dp_disable_channel(ipu_plane->dp);
227 ipu_idmac_disable_channel(ipu_plane->ipu_ch);
228 ipu_dmfc_disable_channel(ipu_plane->dmfc);
Philipp Zabel285bbb02014-04-14 23:53:20 +0200229 if (ipu_plane->dp)
230 ipu_dp_disable(ipu_plane->ipu);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200231
232 return 0;
233}
234
235static void ipu_plane_destroy(struct drm_plane *plane)
236{
237 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
238
239 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
240
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200241 drm_plane_cleanup(plane);
242 kfree(ipu_plane);
243}
244
Liu Ying8b3ce872016-05-24 18:10:40 +0800245static const struct drm_plane_funcs ipu_plane_funcs = {
Liu Ying5f2f9112016-07-08 17:40:59 +0800246 .update_plane = drm_atomic_helper_update_plane,
247 .disable_plane = drm_atomic_helper_disable_plane,
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200248 .destroy = ipu_plane_destroy,
Liu Ying255c35f2016-07-08 17:40:56 +0800249 .reset = drm_atomic_helper_plane_reset,
250 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
251 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200252};
253
Liu Ying33f14232016-07-08 17:40:55 +0800254static int ipu_plane_atomic_check(struct drm_plane *plane,
255 struct drm_plane_state *state)
256{
257 struct drm_plane_state *old_state = plane->state;
258 struct drm_crtc_state *crtc_state;
259 struct device *dev = plane->dev->dev;
260 struct drm_framebuffer *fb = state->fb;
261 struct drm_framebuffer *old_fb = old_state->fb;
262 unsigned long eba, ubo, vbo, old_ubo, old_vbo;
263
264 /* Ok to disable */
265 if (!fb)
Liu Ying5f2f9112016-07-08 17:40:59 +0800266 return 0;
267
268 if (!state->crtc)
269 return -EINVAL;
270
271 crtc_state =
272 drm_atomic_get_existing_crtc_state(state->state, state->crtc);
273 if (WARN_ON(!crtc_state))
274 return -EINVAL;
Liu Ying33f14232016-07-08 17:40:55 +0800275
276 /* CRTC should be enabled */
Liu Ying5f2f9112016-07-08 17:40:59 +0800277 if (!crtc_state->enable)
Liu Ying33f14232016-07-08 17:40:55 +0800278 return -EINVAL;
279
280 /* no scaling */
281 if (state->src_w >> 16 != state->crtc_w ||
282 state->src_h >> 16 != state->crtc_h)
283 return -EINVAL;
284
Liu Ying33f14232016-07-08 17:40:55 +0800285 switch (plane->type) {
286 case DRM_PLANE_TYPE_PRIMARY:
287 /* full plane doesn't support partial off screen */
288 if (state->crtc_x || state->crtc_y ||
289 state->crtc_w != crtc_state->adjusted_mode.hdisplay ||
290 state->crtc_h != crtc_state->adjusted_mode.vdisplay)
291 return -EINVAL;
292
293 /* full plane minimum width is 13 pixels */
294 if (state->crtc_w < 13)
295 return -EINVAL;
296 break;
297 case DRM_PLANE_TYPE_OVERLAY:
298 if (state->crtc_x < 0 || state->crtc_y < 0)
299 return -EINVAL;
300
301 if (state->crtc_x + state->crtc_w >
302 crtc_state->adjusted_mode.hdisplay)
303 return -EINVAL;
304 if (state->crtc_y + state->crtc_h >
305 crtc_state->adjusted_mode.vdisplay)
306 return -EINVAL;
307 break;
308 default:
309 dev_warn(dev, "Unsupported plane type\n");
310 return -EINVAL;
311 }
312
313 if (state->crtc_h < 2)
314 return -EINVAL;
315
316 /*
Liu Ying17809992016-08-26 15:30:44 +0800317 * We support resizing active plane or changing its format by
318 * forcing CRTC mode change in plane's ->atomic_check callback
319 * and disabling all affected active planes in CRTC's ->atomic_disable
320 * callback. The planes will be reenabled in plane's ->atomic_update
321 * callback.
Liu Ying33f14232016-07-08 17:40:55 +0800322 */
323 if (old_fb && (state->src_w != old_state->src_w ||
324 state->src_h != old_state->src_h ||
325 fb->pixel_format != old_fb->pixel_format))
Liu Ying17809992016-08-26 15:30:44 +0800326 crtc_state->mode_changed = true;
Liu Ying33f14232016-07-08 17:40:55 +0800327
328 eba = drm_plane_state_to_eba(state);
329
330 if (eba & 0x7)
331 return -EINVAL;
332
333 if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
334 return -EINVAL;
335
336 if (old_fb && fb->pitches[0] != old_fb->pitches[0])
Liu Ying17809992016-08-26 15:30:44 +0800337 crtc_state->mode_changed = true;
Liu Ying33f14232016-07-08 17:40:55 +0800338
339 switch (fb->pixel_format) {
340 case DRM_FORMAT_YUV420:
341 case DRM_FORMAT_YVU420:
342 /*
343 * Multiplanar formats have to meet the following restrictions:
344 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
345 * - EBA, UBO and VBO are a multiple of 8
346 * - UBO and VBO are unsigned and not larger than 0xfffff8
347 * - Only EBA may be changed while scanout is active
348 * - The strides of U and V planes must be identical.
349 */
350 ubo = drm_plane_state_to_ubo(state);
351 vbo = drm_plane_state_to_vbo(state);
352
353 if ((ubo & 0x7) || (vbo & 0x7))
354 return -EINVAL;
355
356 if ((ubo > 0xfffff8) || (vbo > 0xfffff8))
357 return -EINVAL;
358
359 if (old_fb) {
360 old_ubo = drm_plane_state_to_ubo(old_state);
361 old_vbo = drm_plane_state_to_vbo(old_state);
362 if (ubo != old_ubo || vbo != old_vbo)
363 return -EINVAL;
364 }
365
366 if (fb->pitches[1] != fb->pitches[2])
367 return -EINVAL;
368
369 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
370 return -EINVAL;
371
372 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
Liu Ying17809992016-08-26 15:30:44 +0800373 crtc_state->mode_changed = true;
Liu Ying33f14232016-07-08 17:40:55 +0800374 }
375
376 return 0;
377}
378
379static void ipu_plane_atomic_disable(struct drm_plane *plane,
380 struct drm_plane_state *old_state)
381{
382 ipu_disable_plane(plane);
383}
384
385static void ipu_plane_atomic_update(struct drm_plane *plane,
386 struct drm_plane_state *old_state)
387{
388 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
389 struct drm_plane_state *state = plane->state;
390 enum ipu_color_space ics;
391
392 if (old_state->fb) {
Liu Ying5f4df0c2016-08-26 15:30:43 +0800393 struct drm_crtc_state *crtc_state = state->crtc->state;
394
395 if (!drm_atomic_crtc_needs_modeset(crtc_state)) {
396 ipu_plane_atomic_set_base(ipu_plane, old_state);
397 return;
398 }
Liu Ying33f14232016-07-08 17:40:55 +0800399 }
400
401 switch (ipu_plane->dp_flow) {
402 case IPU_DP_FLOW_SYNC_BG:
403 ipu_dp_setup_channel(ipu_plane->dp,
404 IPUV3_COLORSPACE_RGB,
405 IPUV3_COLORSPACE_RGB);
406 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
407 break;
408 case IPU_DP_FLOW_SYNC_FG:
409 ics = ipu_drm_fourcc_to_colorspace(state->fb->pixel_format);
410 ipu_dp_setup_channel(ipu_plane->dp, ics,
411 IPUV3_COLORSPACE_UNKNOWN);
412 ipu_dp_set_window_pos(ipu_plane->dp, state->crtc_x,
413 state->crtc_y);
414 /* Enable local alpha on partial plane */
415 switch (state->fb->pixel_format) {
416 case DRM_FORMAT_ARGB1555:
417 case DRM_FORMAT_ABGR1555:
418 case DRM_FORMAT_RGBA5551:
419 case DRM_FORMAT_BGRA5551:
420 case DRM_FORMAT_ARGB4444:
421 case DRM_FORMAT_ARGB8888:
422 case DRM_FORMAT_ABGR8888:
423 case DRM_FORMAT_RGBA8888:
424 case DRM_FORMAT_BGRA8888:
425 ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
426 break;
427 default:
428 break;
429 }
430 }
431
432 ipu_dmfc_config_wait4eot(ipu_plane->dmfc, state->crtc_w);
433
434 ipu_cpmem_zero(ipu_plane->ipu_ch);
435 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, state->src_w >> 16,
436 state->src_h >> 16);
437 ipu_cpmem_set_fmt(ipu_plane->ipu_ch, state->fb->pixel_format);
438 ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
439 ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
440 ipu_cpmem_set_stride(ipu_plane->ipu_ch, state->fb->pitches[0]);
441 ipu_plane_atomic_set_base(ipu_plane, old_state);
442 ipu_plane_enable(ipu_plane);
443}
444
445static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
446 .atomic_check = ipu_plane_atomic_check,
447 .atomic_disable = ipu_plane_atomic_disable,
448 .atomic_update = ipu_plane_atomic_update,
449};
450
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200451struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
452 int dma, int dp, unsigned int possible_crtcs,
Philipp Zabel43895592015-11-06 11:08:02 +0100453 enum drm_plane_type type)
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200454{
455 struct ipu_plane *ipu_plane;
456 int ret;
457
458 DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
459 dma, dp, possible_crtcs);
460
461 ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
462 if (!ipu_plane) {
463 DRM_ERROR("failed to allocate plane\n");
464 return ERR_PTR(-ENOMEM);
465 }
466
467 ipu_plane->ipu = ipu;
468 ipu_plane->dma = dma;
469 ipu_plane->dp_flow = dp;
470
Philipp Zabel43895592015-11-06 11:08:02 +0100471 ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
472 &ipu_plane_funcs, ipu_plane_formats,
Ville Syrjäläb0b3b792015-12-09 16:19:55 +0200473 ARRAY_SIZE(ipu_plane_formats), type,
474 NULL);
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200475 if (ret) {
476 DRM_ERROR("failed to initialize plane\n");
477 kfree(ipu_plane);
478 return ERR_PTR(ret);
479 }
480
Liu Ying33f14232016-07-08 17:40:55 +0800481 drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
482
Philipp Zabelb8d181e2013-10-10 16:18:45 +0200483 return ipu_plane;
484}