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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/include/asm-arm/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
19 * 05-Oct-2004 BJD Moved memory string functions to use void __iomem
20 */
21#ifndef __ASM_ARM_IO_H
22#define __ASM_ARM_IO_H
23
24#ifdef __KERNEL__
25
26#include <linux/types.h>
27#include <asm/byteorder.h>
28#include <asm/memory.h>
29#include <asm/arch/hardware.h>
30
31/*
32 * ISA I/O bus memory addresses are 1:1 with the physical address.
33 */
34#define isa_virt_to_bus virt_to_phys
35#define isa_page_to_bus page_to_phys
36#define isa_bus_to_virt phys_to_virt
37
38/*
39 * Generic IO read/write. These perform native-endian accesses. Note
40 * that some architectures will want to re-define __raw_{read,write}w.
41 */
42extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen);
43extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
44extern void __raw_writesl(void __iomem *addr, const void *data, int longlen);
45
46extern void __raw_readsb(void __iomem *addr, void *data, int bytelen);
47extern void __raw_readsw(void __iomem *addr, void *data, int wordlen);
48extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
49
50#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v))
51#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))
52#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v))
53
54#define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a))
55#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
56#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
57
58/*
59 * Bad read/write accesses...
60 */
61extern void __readwrite_bug(const char *fn);
62
63/*
64 * Now, pick up the machine-defined IO definitions
65 */
66#include <asm/arch/io.h>
67
68#ifdef __io_pci
69#warning machine class uses buggy __io_pci
70#endif
71#if defined(__arch_putb) || defined(__arch_putw) || defined(__arch_putl) || \
72 defined(__arch_getb) || defined(__arch_getw) || defined(__arch_getl)
73#warning machine class uses old __arch_putw or __arch_getw
74#endif
75
76/*
77 * IO port access primitives
78 * -------------------------
79 *
80 * The ARM doesn't have special IO access instructions; all IO is memory
81 * mapped. Note that these are defined to perform little endian accesses
82 * only. Their primary purpose is to access PCI and ISA peripherals.
83 *
84 * Note that for a big endian machine, this implies that the following
Russell Kingc79ebfa2005-06-27 14:23:38 +010085 * big endian mode connectivity is in place, as described by numerous
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 * ARM documents:
87 *
88 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
89 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
90 *
91 * The machine specific io.h include defines __io to translate an "IO"
92 * address to a memory address.
93 *
94 * Note that we prevent GCC re-ordering or caching values in expressions
95 * by introducing sequence points into the in*() definitions. Note that
96 * __raw_* do not guarantee this behaviour.
97 *
98 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
99 */
100#ifdef __io
101#define outb(v,p) __raw_writeb(v,__io(p))
Olav Kongas05f98692005-04-29 22:08:34 +0100102#define outw(v,p) __raw_writew((__force __u16) \
103 cpu_to_le16(v),__io(p))
104#define outl(v,p) __raw_writel((__force __u32) \
105 cpu_to_le32(v),__io(p))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106
Olav Kongas05f98692005-04-29 22:08:34 +0100107#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __v; })
108#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \
109 __raw_readw(__io(p))); __v; })
110#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \
111 __raw_readl(__io(p))); __v; })
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112
113#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
114#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
115#define outsl(p,d,l) __raw_writesl(__io(p),d,l)
116
117#define insb(p,d,l) __raw_readsb(__io(p),d,l)
118#define insw(p,d,l) __raw_readsw(__io(p),d,l)
119#define insl(p,d,l) __raw_readsl(__io(p),d,l)
120#endif
121
122#define outb_p(val,port) outb((val),(port))
123#define outw_p(val,port) outw((val),(port))
124#define outl_p(val,port) outl((val),(port))
125#define inb_p(port) inb((port))
126#define inw_p(port) inw((port))
127#define inl_p(port) inl((port))
128
129#define outsb_p(port,from,len) outsb(port,from,len)
130#define outsw_p(port,from,len) outsw(port,from,len)
131#define outsl_p(port,from,len) outsl(port,from,len)
132#define insb_p(port,to,len) insb(port,to,len)
133#define insw_p(port,to,len) insw(port,to,len)
134#define insl_p(port,to,len) insl(port,to,len)
135
136/*
137 * String version of IO memory access ops:
138 */
139extern void _memcpy_fromio(void *, void __iomem *, size_t);
140extern void _memcpy_toio(void __iomem *, const void *, size_t);
141extern void _memset_io(void __iomem *, int, size_t);
142
143#define mmiowb()
144
145/*
146 * Memory access primitives
147 * ------------------------
148 *
149 * These perform PCI memory accesses via an ioremap region. They don't
150 * take an address as such, but a cookie.
151 *
152 * Again, this are defined to perform little endian accesses. See the
153 * IO port primitives for more information.
154 */
155#ifdef __mem_pci
Olav Kongas05f98692005-04-29 22:08:34 +0100156#define readb(c) ({ __u8 __v = __raw_readb(__mem_pci(c)); __v; })
157#define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \
158 __raw_readw(__mem_pci(c))); __v; })
159#define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \
160 __raw_readl(__mem_pci(c))); __v; })
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161#define readb_relaxed(addr) readb(addr)
162#define readw_relaxed(addr) readw(addr)
163#define readl_relaxed(addr) readl(addr)
164
165#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l)
166#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l)
167#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l)
168
169#define writeb(v,c) __raw_writeb(v,__mem_pci(c))
Olav Kongas05f98692005-04-29 22:08:34 +0100170#define writew(v,c) __raw_writew((__force __u16) \
171 cpu_to_le16(v),__mem_pci(c))
172#define writel(v,c) __raw_writel((__force __u32) \
173 cpu_to_le32(v),__mem_pci(c))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174
175#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l)
176#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l)
177#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l)
178
179#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
180#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
181#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
182
183#define eth_io_copy_and_sum(s,c,l,b) \
184 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
185
186static inline int
187check_signature(void __iomem *io_addr, const unsigned char *signature,
188 int length)
189{
190 int retval = 0;
191 do {
192 if (readb(io_addr) != *signature)
193 goto out;
194 io_addr++;
195 signature++;
196 length--;
197 } while (length);
198 retval = 1;
199out:
200 return retval;
201}
202
203#elif !defined(readb)
204
205#define readb(c) (__readwrite_bug("readb"),0)
206#define readw(c) (__readwrite_bug("readw"),0)
207#define readl(c) (__readwrite_bug("readl"),0)
208#define writeb(v,c) __readwrite_bug("writeb")
209#define writew(v,c) __readwrite_bug("writew")
210#define writel(v,c) __readwrite_bug("writel")
211
212#define eth_io_copy_and_sum(s,c,l,b) __readwrite_bug("eth_io_copy_and_sum")
213
214#define check_signature(io,sig,len) (0)
215
216#endif /* __mem_pci */
217
218/*
219 * If this architecture has ISA IO, then define the isa_read/isa_write
220 * macros.
221 */
222#ifdef __mem_isa
223
224#define isa_readb(addr) __raw_readb(__mem_isa(addr))
225#define isa_readw(addr) __raw_readw(__mem_isa(addr))
226#define isa_readl(addr) __raw_readl(__mem_isa(addr))
227#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
228#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
229#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
230#define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
231#define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
232#define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
233
234#define isa_eth_io_copy_and_sum(a,b,c,d) \
235 eth_copy_and_sum((a),__mem_isa(b),(c),(d))
236
237#else /* __mem_isa */
238
239#define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
240#define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
241#define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
242#define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
243#define isa_writew(val,addr) __readwrite_bug("isa_writew")
244#define isa_writel(val,addr) __readwrite_bug("isa_writel")
245#define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
246#define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
247#define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
248
249#define isa_eth_io_copy_and_sum(a,b,c,d) \
250 __readwrite_bug("isa_eth_io_copy_and_sum")
251
252#endif /* __mem_isa */
253
254/*
255 * ioremap and friends.
256 *
257 * ioremap takes a PCI memory address, as specified in
258 * Documentation/IO-mapping.txt.
259 */
260extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
261extern void __iounmap(void __iomem *addr);
262
263#ifndef __arch_ioremap
264#define ioremap(cookie,size) __ioremap(cookie,size,0,1)
265#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1)
266#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1)
267#define iounmap(cookie) __iounmap(cookie)
268#else
269#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1)
270#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1)
271#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1)
272#define iounmap(cookie) __arch_iounmap(cookie)
273#endif
274
275/*
Russell King09f05512005-06-20 18:44:37 +0100276 * io{read,write}{8,16,32} macros
277 */
Lennert Buytenhek7533fca2005-06-24 23:11:31 +0100278#ifndef ioread8
Russell King09f05512005-06-20 18:44:37 +0100279#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
280#define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
281#define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
282
283#define iowrite8(v,p) __raw_writeb(v, p)
284#define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p)
285#define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p)
286
287#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
288#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
289#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
290
291#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
292#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
293#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
294
295extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
296extern void ioport_unmap(void __iomem *addr);
Lennert Buytenhek7533fca2005-06-24 23:11:31 +0100297#endif
Russell King09f05512005-06-20 18:44:37 +0100298
299struct pci_dev;
300
301extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
302extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
303
304/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305 * can the hardware map this into one segment or not, given no other
306 * constraints.
307 */
308#define BIOVEC_MERGEABLE(vec1, vec2) \
309 ((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2)))
310
311/*
312 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
313 * access
314 */
315#define xlate_dev_mem_ptr(p) __va(p)
316
317/*
318 * Convert a virtual cached pointer to an uncached pointer
319 */
320#define xlate_dev_kmem_ptr(p) p
321
322#endif /* __KERNEL__ */
323#endif /* __ASM_ARM_IO_H */