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Kukjin Kim09ec1d72013-01-31 16:54:38 -08001/*
Ben Dooksa24c0912009-07-30 23:23:27 +01002 * Copyright (c) 2009 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/errno.h>
15#include <linux/cpufreq.h>
16#include <linux/io.h>
Heiko Stuebnerd8b53252014-05-09 05:48:44 +090017#include <linux/clk.h>
Ben Dooksa24c0912009-07-30 23:23:27 +010018
19#include <mach/map.h>
Ben Dooksa24c0912009-07-30 23:23:27 +010020#include <mach/regs-clock.h>
21
22#include <plat/cpu-freq-core.h>
23
Kukjin Kim37c3adc2013-02-03 17:00:11 -080024#include "regs-mem.h"
25
Ben Dooksa24c0912009-07-30 23:23:27 +010026/**
27 * s3c2410_cpufreq_setrefresh - set SDRAM refresh value
28 * @cfg: The frequency configuration
29 *
30 * Set the SDRAM refresh value appropriately for the configured
31 * frequency.
32 */
33void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
34{
35 struct s3c_cpufreq_board *board = cfg->board;
36 unsigned long refresh;
37 unsigned long refval;
38
39 /* Reduce both the refresh time (in ns) and the frequency (in MHz)
40 * down to ensure that we do not overflow 32 bit numbers.
41 *
42 * This should work for HCLK up to 133MHz and refresh period up
43 * to 30usec.
44 */
45
46 refresh = (cfg->freq.hclk / 100) * (board->refresh / 10);
47 refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */
48 refresh = (1 << 11) + 1 - refresh;
49
50 s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh);
51
52 refval = __raw_readl(S3C2410_REFRESH);
53 refval &= ~((1 << 12) - 1);
54 refval |= refresh;
55 __raw_writel(refval, S3C2410_REFRESH);
56}
57
58/**
59 * s3c2410_set_fvco - set the PLL value
60 * @cfg: The frequency configuration
61 */
62void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)
63{
Heiko Stuebnerd8b53252014-05-09 05:48:44 +090064 if (!IS_ERR(cfg->mpll))
65 clk_set_rate(cfg->mpll, cfg->pll.frequency);
Ben Dooksa24c0912009-07-30 23:23:27 +010066}