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gerrit-public.fairphone.software / kernel / msm-4.9 / 8321b758e08cae7fb02663f26efee4ba985c2ae5 / . / arch / arm / plat-mxc / include / mach / common.h
blob: cf663d84e7c1d1397291e4667c526087c3aaca56 [file] [log] [blame]
Quinn Jensen52c543f2007-07-09 22:06:53 +0100[diff] [blame]1/*
2 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_COMMON_H__
12#define __ASM_ARCH_MXC_COMMON_H__
13
Sascha Hauer282b13d2008-09-09 10:19:40 +0200[diff] [blame]14struct platform_device;
Sascha Hauer30c730f2009-02-16 14:36:49 +0100[diff] [blame]15struct clk;
Shawn Guoa1f1c7e2011-09-06 15:08:40 +0800[diff] [blame]16enum mxc_cpu_pwr_mode;
Sascha Hauer282b13d2008-09-09 10:19:40 +0200[diff] [blame]17
Sascha Hauercd4a05f2009-04-02 22:32:10 +0200[diff] [blame]18extern void mx1_map_io(void);
19extern void mx21_map_io(void);
Sascha Hauer8c25c362009-06-04 11:32:12 +0200[diff] [blame]20extern void mx25_map_io(void);
Sascha Hauercd4a05f2009-04-02 22:32:10 +0200[diff] [blame]21extern void mx27_map_io(void);
22extern void mx31_map_io(void);
23extern void mx35_map_io(void);
Richard Zhao3d5a44b2010-12-30 19:25:05 +0800[diff] [blame]24extern void mx50_map_io(void);
Amit Kucheriaa329b482010-02-04 12:21:53 -0800[diff] [blame]25extern void mx51_map_io(void);
Dinh Nguyenc0abefd2010-11-15 11:29:59 -0600[diff] [blame]26extern void mx53_map_io(void);
Uwe Kleine-König3dac2192011-02-07 16:35:19 +0100[diff] [blame]27extern void imx1_init_early(void);
28extern void imx21_init_early(void);
29extern void imx25_init_early(void);
30extern void imx27_init_early(void);
Uwe Kleine-König97976e22011-02-07 16:35:20 +0100[diff] [blame]31extern void imx31_init_early(void);
32extern void imx35_init_early(void);
33extern void imx50_init_early(void);
Uwe Kleine-Königab1304212011-02-07 16:35:21 +0100[diff] [blame]34extern void imx51_init_early(void);
35extern void imx53_init_early(void);
Sascha Hauerc5aa0ad2009-05-25 17:36:19 +0200[diff] [blame]36extern void mxc_init_irq(void __iomem *);
Amit Kucheriaa0037082009-12-03 22:36:41 +0200[diff] [blame]37extern void tzic_init_irq(void __iomem *);
Sascha Hauerc5aa0ad2009-05-25 17:36:19 +0200[diff] [blame]38extern void mx1_init_irq(void);
39extern void mx21_init_irq(void);
Sascha Hauer8c25c362009-06-04 11:32:12 +0200[diff] [blame]40extern void mx25_init_irq(void);
Sascha Hauerc5aa0ad2009-05-25 17:36:19 +0200[diff] [blame]41extern void mx27_init_irq(void);
42extern void mx31_init_irq(void);
43extern void mx35_init_irq(void);
Richard Zhao3d5a44b2010-12-30 19:25:05 +0800[diff] [blame]44extern void mx50_init_irq(void);
Amit Kucheriaa329b482010-02-04 12:21:53 -0800[diff] [blame]45extern void mx51_init_irq(void);
Dinh Nguyenc0abefd2010-11-15 11:29:59 -0600[diff] [blame]46extern void mx53_init_irq(void);
Shawn Guob78d8e52011-06-06 00:07:55 +0800[diff] [blame]47extern void imx1_soc_init(void);
48extern void imx21_soc_init(void);
49extern void imx25_soc_init(void);
50extern void imx27_soc_init(void);
51extern void imx31_soc_init(void);
52extern void imx35_soc_init(void);
53extern void imx50_soc_init(void);
54extern void imx51_soc_init(void);
55extern void imx53_soc_init(void);
Shawn Guo8321b752012-04-26 11:42:34 +0800[diff] [blame^]56extern void imx51_init_late(void);
Sascha Hauerf2b89012010-08-19 14:08:04 +0200[diff] [blame]57extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq);
Sascha Hauer8db5d1a2009-05-25 12:21:38 +0200[diff] [blame]58extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int);
Sascha Hauer30c730f2009-02-16 14:36:49 +0100[diff] [blame]59extern int mx1_clocks_init(unsigned long fref);
Holger Schurigaa3b0a62009-01-26 16:34:54 +0100[diff] [blame]60extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
Baruch Siachfadc0952010-01-25 12:58:19 +0200[diff] [blame]61extern int mx25_clocks_init(void);
Sascha Hauer30c730f2009-02-16 14:36:49 +0100[diff] [blame]62extern int mx27_clocks_init(unsigned long fref);
63extern int mx31_clocks_init(unsigned long fref);
Sascha Hauer2cb536d2009-02-06 17:48:59 +0100[diff] [blame]64extern int mx35_clocks_init(void);
Amit Kucheriaa329b482010-02-04 12:21:53 -0800[diff] [blame]65extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
66 unsigned long ckih1, unsigned long ckih2);
Dinh Nguyenc0abefd2010-11-15 11:29:59 -0600[diff] [blame]67extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
68 unsigned long ckih1, unsigned long ckih2);
Sascha Hauer9f0749e2012-02-28 21:57:50 +0100[diff] [blame]69extern int mx27_clocks_init_dt(void);
Shawn Guo9daaf312011-10-17 08:42:17 +0800[diff] [blame]70extern int mx51_clocks_init_dt(void);
Shawn Guo73d2b4c2011-10-17 08:42:16 +0800[diff] [blame]71extern int mx53_clocks_init_dt(void);
Shawn Guo13eed982011-09-06 15:05:25 +0800[diff] [blame]72extern int mx6q_clocks_init(void);
Shawn Guoe7fc6ae2011-07-07 00:37:41 +0800[diff] [blame]73extern struct platform_device *mxc_register_gpio(char *name, int id,
Shawn Guob78d8e52011-06-06 00:07:55 +0800[diff] [blame]74 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
Sascha Hauer198016e2009-02-06 15:38:22 +0100[diff] [blame]75extern void mxc_set_cpu_type(unsigned int type);
Russell King65ea7882011-11-06 17:12:08 +0000[diff] [blame]76extern void mxc_restart(char, const char *);
Sascha Hauerbe124c92009-06-04 12:19:02 +0200[diff] [blame]77extern void mxc_arch_reset_init(void __iomem *);
Dinh Nguyenc0abefd2010-11-15 11:29:59 -0600[diff] [blame]78extern int mx53_revision(void);
Fabio Estevam2d953782011-03-25 12:52:47 -0300[diff] [blame]79extern int mx53_display_revision(void);
Fabio Estevambb07d752012-02-29 10:28:08 -0300[diff] [blame]80extern void imx_set_aips(void __iomem *);
Shawn Guo73d2b4c2011-10-17 08:42:16 +0800[diff] [blame]81
Shawn Guo41e7daf2011-09-28 17:16:06 +0800[diff] [blame]82enum mxc_cpu_pwr_mode {
83 WAIT_CLOCKED, /* wfi only */
84 WAIT_UNCLOCKED, /* WAIT */
85 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
86 STOP_POWER_ON, /* just STOP */
87 STOP_POWER_OFF, /* STOP + SRPG */
88};
89
Fabio Estevam3ac804e2012-02-02 20:02:32 -0200[diff] [blame]90enum mx3_cpu_pwr_mode {
91 MX3_RUN,
92 MX3_WAIT,
93 MX3_DOZE,
94 MX3_SLEEP,
95};
96
97extern void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
Shawn Guo41e7daf2011-09-28 17:16:06 +0800[diff] [blame]98extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode);
Fabio Estevam059e58f2011-08-26 13:35:18 +0800[diff] [blame]99extern void imx_print_silicon_rev(const char *cpu, int srev);
Sascha Hauerb6de9432011-09-20 14:28:17 +0200[diff] [blame]100
101void avic_handle_irq(struct pt_regs *);
Sascha Hauer58a92602011-09-20 14:28:39 +0200[diff] [blame]102void tzic_handle_irq(struct pt_regs *);
Sascha Hauerb6de9432011-09-20 14:28:17 +0200[diff] [blame]103
104#define imx1_handle_irq avic_handle_irq
105#define imx21_handle_irq avic_handle_irq
106#define imx25_handle_irq avic_handle_irq
107#define imx27_handle_irq avic_handle_irq
108#define imx31_handle_irq avic_handle_irq
109#define imx35_handle_irq avic_handle_irq
Sascha Hauer58a92602011-09-20 14:28:39 +0200[diff] [blame]110#define imx50_handle_irq tzic_handle_irq
111#define imx51_handle_irq tzic_handle_irq
112#define imx53_handle_irq tzic_handle_irq
Marc Zyngierfea9fe82011-09-06 10:23:45 +0100[diff] [blame]113#define imx6q_handle_irq gic_handle_irq
Sascha Hauerb6de9432011-09-20 14:28:17 +0200[diff] [blame]114
Shawn Guo69c31b72011-09-06 14:59:40 +0800[diff] [blame]115extern void imx_enable_cpu(int cpu, bool enable);
116extern void imx_set_cpu_jump(int cpu, void *jump_addr);
Shawn Guo13eed982011-09-06 15:05:25 +0800[diff] [blame]117#ifdef CONFIG_DEBUG_LL
118extern void imx_lluart_map_io(void);
119#else
120static inline void imx_lluart_map_io(void) {}
121#endif
Shawn Guoa1f1c7e2011-09-06 15:08:40 +0800[diff] [blame]122extern void v7_cpu_resume(void);
123extern u32 *pl310_get_save_ptr(void);
Shawn Guo69c31b72011-09-06 14:59:40 +0800[diff] [blame]124#ifdef CONFIG_SMP
125extern void v7_secondary_startup(void);
Shawn Guo13eed982011-09-06 15:05:25 +0800[diff] [blame]126extern void imx_scu_map_io(void);
Shawn Guoa1f1c7e2011-09-06 15:08:40 +0800[diff] [blame]127extern void imx_smp_prepare(void);
Shawn Guo13eed982011-09-06 15:05:25 +0800[diff] [blame]128#else
129static inline void imx_scu_map_io(void) {}
Shawn Guoa1f1c7e2011-09-06 15:08:40 +0800[diff] [blame]130static inline void imx_smp_prepare(void) {}
Shawn Guo69c31b72011-09-06 14:59:40 +0800[diff] [blame]131#endif
Shawn Guo13eed982011-09-06 15:05:25 +0800[diff] [blame]132extern void imx_enable_cpu(int cpu, bool enable);
133extern void imx_set_cpu_jump(int cpu, void *jump_addr);
134extern void imx_src_init(void);
Shawn Guo0575fb72011-12-09 00:51:26 +0100[diff] [blame]135extern void imx_src_prepare_restart(void);
Shawn Guo13eed982011-09-06 15:05:25 +0800[diff] [blame]136extern void imx_gpc_init(void);
Shawn Guoa1f1c7e2011-09-06 15:08:40 +0800[diff] [blame]137extern void imx_gpc_pre_suspend(void);
138extern void imx_gpc_post_resume(void);
Shawn Guo9daaf312011-10-17 08:42:17 +0800[diff] [blame]139extern void imx51_babbage_common_init(void);
Shawn Guo73d2b4c2011-10-17 08:42:16 +0800[diff] [blame]140extern void imx53_ard_common_init(void);
141extern void imx53_evk_common_init(void);
142extern void imx53_qsb_common_init(void);
143extern void imx53_smd_common_init(void);
Shawn Guoa1f1c7e2011-09-06 15:08:40 +0800[diff] [blame]144extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
Richard Zhaof4750582011-11-17 18:54:29 +0800[diff] [blame]145extern void imx6q_clock_map_io(void);
Eric Miao46ec1b22011-12-21 22:38:23 +0800[diff] [blame]146
147#ifdef CONFIG_PM
148extern void imx6q_pm_init(void);
149#else
150static inline void imx6q_pm_init(void) {}
151#endif
152
Shawn Guo8321b752012-04-26 11:42:34 +0800[diff] [blame^]153#ifdef CONFIG_NEON
154extern int mx51_neon_fixup(void);
155#else
156static inline int mx51_neon_fixup(void) { return 0; }
157#endif
158
Quinn Jensen52c543f2007-07-09 22:06:53 +0100[diff] [blame]159#endif