Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * Overview: |
| 3 | * This is the generic MTD driver for NAND flash devices. It should be |
| 4 | * capable of working with almost all NAND chips currently available. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 5 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * Additional technical information is available on |
maximilian attems | 8b2b403 | 2007-07-28 13:07:16 +0200 | [diff] [blame] | 7 | * http://www.linux-mtd.infradead.org/doc/nand.html |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 8 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 10 | * 2002-2006 Thomas Gleixner (tglx@linutronix.de) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 12 | * Credits: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 13 | * David Woodhouse for adding multichip support |
| 14 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
| 16 | * rework for 2K page size chips |
| 17 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 18 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | * Enable cached programming for 2k page size chips |
| 20 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 21 | * if we have HW ECC support. |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 22 | * BBT table is not serialized, has to be fixed |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | * This program is free software; you can redistribute it and/or modify |
| 25 | * it under the terms of the GNU General Public License version 2 as |
| 26 | * published by the Free Software Foundation. |
| 27 | * |
| 28 | */ |
| 29 | |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 30 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 31 | |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 32 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <linux/delay.h> |
| 34 | #include <linux/errno.h> |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 35 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | #include <linux/sched.h> |
| 37 | #include <linux/slab.h> |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 38 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | #include <linux/types.h> |
| 40 | #include <linux/mtd/mtd.h> |
| 41 | #include <linux/mtd/nand.h> |
| 42 | #include <linux/mtd/nand_ecc.h> |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 43 | #include <linux/mtd/nand_bch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | #include <linux/interrupt.h> |
| 45 | #include <linux/bitops.h> |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 46 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <linux/mtd/partitions.h> |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame] | 48 | #include <linux/of_mtd.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | |
| 50 | /* Define default oob placement schemes for large and small page devices */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 51 | static struct nand_ecclayout nand_oob_8 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | .eccbytes = 3, |
| 53 | .eccpos = {0, 1, 2}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 54 | .oobfree = { |
| 55 | {.offset = 3, |
| 56 | .length = 2}, |
| 57 | {.offset = 6, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 58 | .length = 2} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | }; |
| 60 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 61 | static struct nand_ecclayout nand_oob_16 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | .eccbytes = 6, |
| 63 | .eccpos = {0, 1, 2, 3, 6, 7}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 64 | .oobfree = { |
| 65 | {.offset = 8, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 66 | . length = 8} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | }; |
| 68 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 69 | static struct nand_ecclayout nand_oob_64 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | .eccbytes = 24, |
| 71 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 72 | 40, 41, 42, 43, 44, 45, 46, 47, |
| 73 | 48, 49, 50, 51, 52, 53, 54, 55, |
| 74 | 56, 57, 58, 59, 60, 61, 62, 63}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 75 | .oobfree = { |
| 76 | {.offset = 2, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 77 | .length = 38} } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | }; |
| 79 | |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 80 | static struct nand_ecclayout nand_oob_128 = { |
| 81 | .eccbytes = 48, |
| 82 | .eccpos = { |
| 83 | 80, 81, 82, 83, 84, 85, 86, 87, |
| 84 | 88, 89, 90, 91, 92, 93, 94, 95, |
| 85 | 96, 97, 98, 99, 100, 101, 102, 103, |
| 86 | 104, 105, 106, 107, 108, 109, 110, 111, |
| 87 | 112, 113, 114, 115, 116, 117, 118, 119, |
| 88 | 120, 121, 122, 123, 124, 125, 126, 127}, |
| 89 | .oobfree = { |
| 90 | {.offset = 2, |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 91 | .length = 78} } |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 92 | }; |
| 93 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 94 | static int nand_get_device(struct mtd_info *mtd, int new_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 96 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 97 | struct mtd_oob_ops *ops); |
| 98 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 99 | static int check_offs_len(struct mtd_info *mtd, |
| 100 | loff_t ofs, uint64_t len) |
| 101 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 102 | struct nand_chip *chip = mtd_to_nand(mtd); |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 103 | int ret = 0; |
| 104 | |
| 105 | /* Start address must align on block boundary */ |
Dan Carpenter | daae74c | 2013-08-09 12:49:05 +0300 | [diff] [blame] | 106 | if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 107 | pr_debug("%s: unaligned address\n", __func__); |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 108 | ret = -EINVAL; |
| 109 | } |
| 110 | |
| 111 | /* Length must align on block boundary */ |
Dan Carpenter | daae74c | 2013-08-09 12:49:05 +0300 | [diff] [blame] | 112 | if (len & ((1ULL << chip->phys_erase_shift) - 1)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 113 | pr_debug("%s: length not block aligned\n", __func__); |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 114 | ret = -EINVAL; |
| 115 | } |
| 116 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 117 | return ret; |
| 118 | } |
| 119 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | /** |
| 121 | * nand_release_device - [GENERIC] release chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 122 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 123 | * |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 124 | * Release chip lock and wake up anyone waiting on the device. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 126 | static void nand_release_device(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 128 | struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 130 | /* Release the controller and the chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 131 | spin_lock(&chip->controller->lock); |
| 132 | chip->controller->active = NULL; |
| 133 | chip->state = FL_READY; |
| 134 | wake_up(&chip->controller->wq); |
| 135 | spin_unlock(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | /** |
| 139 | * nand_read_byte - [DEFAULT] read one byte from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 140 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 142 | * Default read function for 8bit buswidth |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 144 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 146 | struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 147 | return readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | /** |
Masanari Iida | 064a769 | 2012-11-09 23:20:58 +0900 | [diff] [blame] | 151 | * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 152 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 154 | * Default read function for 16bit buswidth with endianness conversion. |
| 155 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 157 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 159 | struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 160 | return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | } |
| 162 | |
| 163 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 164 | * nand_read_word - [DEFAULT] read one word from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 165 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 166 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 167 | * Default read function for 16bit buswidth without endianness conversion. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | */ |
| 169 | static u16 nand_read_word(struct mtd_info *mtd) |
| 170 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 171 | struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 172 | return readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | } |
| 174 | |
| 175 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 176 | * nand_select_chip - [DEFAULT] control CE line |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 177 | * @mtd: MTD device structure |
| 178 | * @chipnr: chipnumber to select, -1 for deselect |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | * |
| 180 | * Default select function for 1 chip devices. |
| 181 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 182 | static void nand_select_chip(struct mtd_info *mtd, int chipnr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 184 | struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 185 | |
| 186 | switch (chipnr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | case -1: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 188 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | break; |
| 190 | case 0: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | break; |
| 192 | |
| 193 | default: |
| 194 | BUG(); |
| 195 | } |
| 196 | } |
| 197 | |
| 198 | /** |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 199 | * nand_write_byte - [DEFAULT] write single byte to chip |
| 200 | * @mtd: MTD device structure |
| 201 | * @byte: value to write |
| 202 | * |
| 203 | * Default function to write a byte to I/O[7:0] |
| 204 | */ |
| 205 | static void nand_write_byte(struct mtd_info *mtd, uint8_t byte) |
| 206 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 207 | struct nand_chip *chip = mtd_to_nand(mtd); |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 208 | |
| 209 | chip->write_buf(mtd, &byte, 1); |
| 210 | } |
| 211 | |
| 212 | /** |
| 213 | * nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16 |
| 214 | * @mtd: MTD device structure |
| 215 | * @byte: value to write |
| 216 | * |
| 217 | * Default function to write a byte to I/O[7:0] on a 16-bit wide chip. |
| 218 | */ |
| 219 | static void nand_write_byte16(struct mtd_info *mtd, uint8_t byte) |
| 220 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 221 | struct nand_chip *chip = mtd_to_nand(mtd); |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 222 | uint16_t word = byte; |
| 223 | |
| 224 | /* |
| 225 | * It's not entirely clear what should happen to I/O[15:8] when writing |
| 226 | * a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads: |
| 227 | * |
| 228 | * When the host supports a 16-bit bus width, only data is |
| 229 | * transferred at the 16-bit width. All address and command line |
| 230 | * transfers shall use only the lower 8-bits of the data bus. During |
| 231 | * command transfers, the host may place any value on the upper |
| 232 | * 8-bits of the data bus. During address transfers, the host shall |
| 233 | * set the upper 8-bits of the data bus to 00h. |
| 234 | * |
| 235 | * One user of the write_byte callback is nand_onfi_set_features. The |
| 236 | * four parameters are specified to be written to I/O[7:0], but this is |
| 237 | * neither an address nor a command transfer. Let's assume a 0 on the |
| 238 | * upper I/O lines is OK. |
| 239 | */ |
| 240 | chip->write_buf(mtd, (uint8_t *)&word, 2); |
| 241 | } |
| 242 | |
| 243 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | * nand_write_buf - [DEFAULT] write buffer to chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 245 | * @mtd: MTD device structure |
| 246 | * @buf: data buffer |
| 247 | * @len: number of bytes to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 248 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 249 | * Default write function for 8bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 251 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 252 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 253 | struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | |
Alexander Shiyan | 7641383 | 2013-04-13 09:32:13 +0400 | [diff] [blame] | 255 | iowrite8_rep(chip->IO_ADDR_W, buf, len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | } |
| 257 | |
| 258 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 259 | * nand_read_buf - [DEFAULT] read chip data into buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 260 | * @mtd: MTD device structure |
| 261 | * @buf: buffer to store date |
| 262 | * @len: number of bytes to read |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 264 | * Default read function for 8bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 266 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 268 | struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 269 | |
Alexander Shiyan | 7641383 | 2013-04-13 09:32:13 +0400 | [diff] [blame] | 270 | ioread8_rep(chip->IO_ADDR_R, buf, len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 271 | } |
| 272 | |
| 273 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 274 | * nand_write_buf16 - [DEFAULT] write buffer to chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 275 | * @mtd: MTD device structure |
| 276 | * @buf: data buffer |
| 277 | * @len: number of bytes to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 279 | * Default write function for 16bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 280 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 281 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 283 | struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | u16 *p = (u16 *) buf; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 285 | |
Alexander Shiyan | 7641383 | 2013-04-13 09:32:13 +0400 | [diff] [blame] | 286 | iowrite16_rep(chip->IO_ADDR_W, p, len >> 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | } |
| 288 | |
| 289 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 290 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 291 | * @mtd: MTD device structure |
| 292 | * @buf: buffer to store date |
| 293 | * @len: number of bytes to read |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 295 | * Default read function for 16bit buswidth. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 297 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 298 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 299 | struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | u16 *p = (u16 *) buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 301 | |
Alexander Shiyan | 7641383 | 2013-04-13 09:32:13 +0400 | [diff] [blame] | 302 | ioread16_rep(chip->IO_ADDR_R, p, len >> 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 303 | } |
| 304 | |
| 305 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 306 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 307 | * @mtd: MTD device structure |
| 308 | * @ofs: offset from device start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 310 | * Check, if the block is bad. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 311 | */ |
Archit Taneja | 9f3e042 | 2016-02-03 14:29:49 +0530 | [diff] [blame] | 312 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 313 | { |
Archit Taneja | 9f3e042 | 2016-02-03 14:29:49 +0530 | [diff] [blame] | 314 | int page, res = 0, i = 0; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 315 | struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | u16 bad; |
| 317 | |
Brian Norris | 5fb1549 | 2011-05-31 16:31:21 -0700 | [diff] [blame] | 318 | if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) |
Kevin Cernekee | b60b08b | 2010-05-04 20:58:10 -0700 | [diff] [blame] | 319 | ofs += mtd->erasesize - mtd->writesize; |
| 320 | |
Thomas Knobloch | 1a12f46 | 2007-05-03 07:39:37 +0100 | [diff] [blame] | 321 | page = (int)(ofs >> chip->page_shift) & chip->pagemask; |
| 322 | |
Brian Norris | cdbec05 | 2012-01-13 18:11:48 -0800 | [diff] [blame] | 323 | do { |
| 324 | if (chip->options & NAND_BUSWIDTH_16) { |
| 325 | chip->cmdfunc(mtd, NAND_CMD_READOOB, |
| 326 | chip->badblockpos & 0xFE, page); |
| 327 | bad = cpu_to_le16(chip->read_word(mtd)); |
| 328 | if (chip->badblockpos & 0x1) |
| 329 | bad >>= 8; |
| 330 | else |
| 331 | bad &= 0xFF; |
| 332 | } else { |
| 333 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, |
| 334 | page); |
| 335 | bad = chip->read_byte(mtd); |
| 336 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 337 | |
Brian Norris | cdbec05 | 2012-01-13 18:11:48 -0800 | [diff] [blame] | 338 | if (likely(chip->badblockbits == 8)) |
| 339 | res = bad != 0xFF; |
| 340 | else |
| 341 | res = hweight8(bad) < chip->badblockbits; |
| 342 | ofs += mtd->writesize; |
| 343 | page = (int)(ofs >> chip->page_shift) & chip->pagemask; |
| 344 | i++; |
| 345 | } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE)); |
Maxim Levitsky | e0b58d0 | 2010-02-22 20:39:38 +0200 | [diff] [blame] | 346 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | return res; |
| 348 | } |
| 349 | |
| 350 | /** |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 351 | * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 352 | * @mtd: MTD device structure |
| 353 | * @ofs: offset from device start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 354 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 355 | * This is the default implementation, which can be overridden by a hardware |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 356 | * specific driver. It provides the details for writing a bad block marker to a |
| 357 | * block. |
| 358 | */ |
| 359 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) |
| 360 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 361 | struct nand_chip *chip = mtd_to_nand(mtd); |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 362 | struct mtd_oob_ops ops; |
| 363 | uint8_t buf[2] = { 0, 0 }; |
| 364 | int ret = 0, res, i = 0; |
| 365 | |
Brian Norris | 0ec56dc | 2015-02-28 02:02:30 -0800 | [diff] [blame] | 366 | memset(&ops, 0, sizeof(ops)); |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 367 | ops.oobbuf = buf; |
| 368 | ops.ooboffs = chip->badblockpos; |
| 369 | if (chip->options & NAND_BUSWIDTH_16) { |
| 370 | ops.ooboffs &= ~0x01; |
| 371 | ops.len = ops.ooblen = 2; |
| 372 | } else { |
| 373 | ops.len = ops.ooblen = 1; |
| 374 | } |
| 375 | ops.mode = MTD_OPS_PLACE_OOB; |
| 376 | |
| 377 | /* Write to first/last page(s) if necessary */ |
| 378 | if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) |
| 379 | ofs += mtd->erasesize - mtd->writesize; |
| 380 | do { |
| 381 | res = nand_do_write_oob(mtd, ofs, &ops); |
| 382 | if (!ret) |
| 383 | ret = res; |
| 384 | |
| 385 | i++; |
| 386 | ofs += mtd->writesize; |
| 387 | } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2); |
| 388 | |
| 389 | return ret; |
| 390 | } |
| 391 | |
| 392 | /** |
| 393 | * nand_block_markbad_lowlevel - mark a block bad |
| 394 | * @mtd: MTD device structure |
| 395 | * @ofs: offset from device start |
| 396 | * |
| 397 | * This function performs the generic NAND bad block marking steps (i.e., bad |
| 398 | * block table(s) and/or marker(s)). We only allow the hardware driver to |
| 399 | * specify how to write bad block markers to OOB (chip->block_markbad). |
| 400 | * |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 401 | * We try operations in the following order: |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 402 | * (1) erase the affected block, to allow OOB marker to be written cleanly |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 403 | * (2) write bad block marker to OOB area of affected block (unless flag |
| 404 | * NAND_BBT_NO_OOB_BBM is present) |
| 405 | * (3) update the BBT |
| 406 | * Note that we retain the first error encountered in (2) or (3), finish the |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 407 | * procedures, and dump the error in the end. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | */ |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 409 | static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 411 | struct nand_chip *chip = mtd_to_nand(mtd); |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 412 | int res, ret = 0; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 413 | |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 414 | if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) { |
Brian Norris | 0091842 | 2012-01-13 18:11:47 -0800 | [diff] [blame] | 415 | struct erase_info einfo; |
| 416 | |
| 417 | /* Attempt erase before marking OOB */ |
| 418 | memset(&einfo, 0, sizeof(einfo)); |
| 419 | einfo.mtd = mtd; |
| 420 | einfo.addr = ofs; |
Dan Carpenter | daae74c | 2013-08-09 12:49:05 +0300 | [diff] [blame] | 421 | einfo.len = 1ULL << chip->phys_erase_shift; |
Brian Norris | 0091842 | 2012-01-13 18:11:47 -0800 | [diff] [blame] | 422 | nand_erase_nand(mtd, &einfo, 0); |
Brian Norris | 0091842 | 2012-01-13 18:11:47 -0800 | [diff] [blame] | 423 | |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 424 | /* Write bad block marker to OOB */ |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 425 | nand_get_device(mtd, FL_WRITING); |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 426 | ret = chip->block_markbad(mtd, ofs); |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 427 | nand_release_device(mtd); |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 428 | } |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 429 | |
Brian Norris | b32843b | 2013-07-30 17:52:59 -0700 | [diff] [blame] | 430 | /* Mark block bad in BBT */ |
| 431 | if (chip->bbt) { |
| 432 | res = nand_markbad_bbt(mtd, ofs); |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 433 | if (!ret) |
| 434 | ret = res; |
| 435 | } |
| 436 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 437 | if (!ret) |
| 438 | mtd->ecc_stats.badblocks++; |
Artem Bityutskiy | c0b8ba7 | 2007-07-23 16:06:50 +0300 | [diff] [blame] | 439 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 440 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | } |
| 442 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 443 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | * nand_check_wp - [GENERIC] check if the chip is write protected |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 445 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 447 | * Check, if the device is write protected. The function expects, that the |
| 448 | * device is already selected. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 450 | static int nand_check_wp(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 451 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 452 | struct nand_chip *chip = mtd_to_nand(mtd); |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 453 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 454 | /* Broken xD cards report WP despite being writable */ |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 455 | if (chip->options & NAND_BROKEN_XD) |
| 456 | return 0; |
| 457 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | /* Check the WP bit */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 459 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
| 460 | return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 461 | } |
| 462 | |
| 463 | /** |
Gu Zheng | c30e1f7 | 2014-09-03 17:49:10 +0800 | [diff] [blame] | 464 | * nand_block_isreserved - [GENERIC] Check if a block is marked reserved. |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 465 | * @mtd: MTD device structure |
| 466 | * @ofs: offset from device start |
Ezequiel Garcia | 8471bb7 | 2014-05-21 19:06:12 -0300 | [diff] [blame] | 467 | * |
Gu Zheng | c30e1f7 | 2014-09-03 17:49:10 +0800 | [diff] [blame] | 468 | * Check if the block is marked as reserved. |
Ezequiel Garcia | 8471bb7 | 2014-05-21 19:06:12 -0300 | [diff] [blame] | 469 | */ |
| 470 | static int nand_block_isreserved(struct mtd_info *mtd, loff_t ofs) |
| 471 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 472 | struct nand_chip *chip = mtd_to_nand(mtd); |
Ezequiel Garcia | 8471bb7 | 2014-05-21 19:06:12 -0300 | [diff] [blame] | 473 | |
| 474 | if (!chip->bbt) |
| 475 | return 0; |
| 476 | /* Return info from the table */ |
| 477 | return nand_isreserved_bbt(mtd, ofs); |
| 478 | } |
| 479 | |
| 480 | /** |
| 481 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad |
| 482 | * @mtd: MTD device structure |
| 483 | * @ofs: offset from device start |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 484 | * @allowbbt: 1, if its allowed to access the bbt area |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 485 | * |
| 486 | * Check, if the block is bad. Either by reading the bad block table or |
| 487 | * calling of the scan function. |
| 488 | */ |
Archit Taneja | 9f3e042 | 2016-02-03 14:29:49 +0530 | [diff] [blame] | 489 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 490 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 491 | struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 492 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 493 | if (!chip->bbt) |
Archit Taneja | 9f3e042 | 2016-02-03 14:29:49 +0530 | [diff] [blame] | 494 | return chip->block_bad(mtd, ofs); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 495 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 496 | /* Return info from the table */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 497 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 498 | } |
| 499 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 500 | /** |
| 501 | * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands. |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 502 | * @mtd: MTD device structure |
| 503 | * @timeo: Timeout |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 504 | * |
| 505 | * Helper function for nand_wait_ready used when needing to wait in interrupt |
| 506 | * context. |
| 507 | */ |
| 508 | static void panic_nand_wait_ready(struct mtd_info *mtd, unsigned long timeo) |
| 509 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 510 | struct nand_chip *chip = mtd_to_nand(mtd); |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 511 | int i; |
| 512 | |
| 513 | /* Wait for the device to get ready */ |
| 514 | for (i = 0; i < timeo; i++) { |
| 515 | if (chip->dev_ready(mtd)) |
| 516 | break; |
| 517 | touch_softlockup_watchdog(); |
| 518 | mdelay(1); |
| 519 | } |
| 520 | } |
| 521 | |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 522 | /** |
| 523 | * nand_wait_ready - [GENERIC] Wait for the ready pin after commands. |
| 524 | * @mtd: MTD device structure |
| 525 | * |
| 526 | * Wait for the ready pin after a command, and warn if a timeout occurs. |
| 527 | */ |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 528 | void nand_wait_ready(struct mtd_info *mtd) |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 529 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 530 | struct nand_chip *chip = mtd_to_nand(mtd); |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 531 | unsigned long timeo = 400; |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 532 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 533 | if (in_interrupt() || oops_in_progress) |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 534 | return panic_nand_wait_ready(mtd, timeo); |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 535 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 536 | /* Wait until command is processed or timeout occurs */ |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 537 | timeo = jiffies + msecs_to_jiffies(timeo); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 538 | do { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 539 | if (chip->dev_ready(mtd)) |
Ezequiel Garcia | 4c7e054 | 2016-04-12 17:46:41 -0300 | [diff] [blame] | 540 | return; |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 541 | cond_resched(); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 542 | } while (time_before(jiffies, timeo)); |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 543 | |
Brian Norris | 9ebfdf5 | 2016-03-04 17:19:23 -0800 | [diff] [blame] | 544 | if (!chip->dev_ready(mtd)) |
| 545 | pr_warn_ratelimited("timeout while waiting for chip to become ready\n"); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 546 | } |
David Woodhouse | 4b648b0 | 2006-09-25 17:05:24 +0100 | [diff] [blame] | 547 | EXPORT_SYMBOL_GPL(nand_wait_ready); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 548 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 549 | /** |
Roger Quadros | 60c70d6 | 2015-02-23 17:26:39 +0200 | [diff] [blame] | 550 | * nand_wait_status_ready - [GENERIC] Wait for the ready status after commands. |
| 551 | * @mtd: MTD device structure |
| 552 | * @timeo: Timeout in ms |
| 553 | * |
| 554 | * Wait for status ready (i.e. command done) or timeout. |
| 555 | */ |
| 556 | static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo) |
| 557 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 558 | register struct nand_chip *chip = mtd_to_nand(mtd); |
Roger Quadros | 60c70d6 | 2015-02-23 17:26:39 +0200 | [diff] [blame] | 559 | |
| 560 | timeo = jiffies + msecs_to_jiffies(timeo); |
| 561 | do { |
| 562 | if ((chip->read_byte(mtd) & NAND_STATUS_READY)) |
| 563 | break; |
| 564 | touch_softlockup_watchdog(); |
| 565 | } while (time_before(jiffies, timeo)); |
| 566 | }; |
| 567 | |
| 568 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 569 | * nand_command - [DEFAULT] Send command to NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 570 | * @mtd: MTD device structure |
| 571 | * @command: the command to be sent |
| 572 | * @column: the column address for this command, -1 if none |
| 573 | * @page_addr: the page address for this command, -1 if none |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 574 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 575 | * Send command to NAND device. This function is used for small page devices |
Artem Bityutskiy | 51148f1 | 2013-03-05 15:00:51 +0200 | [diff] [blame] | 576 | * (512 Bytes per page). |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 578 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
| 579 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 580 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 581 | register struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 582 | int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 584 | /* Write out the command to the device */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 585 | if (command == NAND_CMD_SEQIN) { |
| 586 | int readcmd; |
| 587 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 588 | if (column >= mtd->writesize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 590 | column -= mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 591 | readcmd = NAND_CMD_READOOB; |
| 592 | } else if (column < 256) { |
| 593 | /* First 256 bytes --> READ0 */ |
| 594 | readcmd = NAND_CMD_READ0; |
| 595 | } else { |
| 596 | column -= 256; |
| 597 | readcmd = NAND_CMD_READ1; |
| 598 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 599 | chip->cmd_ctrl(mtd, readcmd, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 600 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 602 | chip->cmd_ctrl(mtd, command, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 603 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 604 | /* Address cycle, when necessary */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 605 | ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; |
| 606 | /* Serially input address */ |
| 607 | if (column != -1) { |
| 608 | /* Adjust columns for 16 bit buswidth */ |
Brian Norris | 3dad234 | 2014-01-29 14:08:12 -0800 | [diff] [blame] | 609 | if (chip->options & NAND_BUSWIDTH_16 && |
| 610 | !nand_opcode_8bits(command)) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 611 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 612 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 613 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 615 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 616 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 617 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 618 | chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 619 | /* One more address cycle for devices > 32MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 620 | if (chip->chipsize > (32 << 20)) |
| 621 | chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 622 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 623 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 624 | |
| 625 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 626 | * Program and erase have their own busy handlers status and sequential |
| 627 | * in needs no delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 628 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 630 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | case NAND_CMD_PAGEPROG: |
| 632 | case NAND_CMD_ERASE1: |
| 633 | case NAND_CMD_ERASE2: |
| 634 | case NAND_CMD_SEQIN: |
| 635 | case NAND_CMD_STATUS: |
| 636 | return; |
| 637 | |
| 638 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 639 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 640 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 641 | udelay(chip->chip_delay); |
| 642 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 643 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 644 | chip->cmd_ctrl(mtd, |
| 645 | NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Roger Quadros | 60c70d6 | 2015-02-23 17:26:39 +0200 | [diff] [blame] | 646 | /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ |
| 647 | nand_wait_status_ready(mtd, 250); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | return; |
| 649 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 650 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 652 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 653 | * If we don't have access to the busy pin, we apply the given |
| 654 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 655 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 656 | if (!chip->dev_ready) { |
| 657 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 659 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 660 | } |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 661 | /* |
| 662 | * Apply this short delay always to ensure that we do wait tWB in |
| 663 | * any case on any machine. |
| 664 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 665 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 666 | |
| 667 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 668 | } |
| 669 | |
| 670 | /** |
| 671 | * nand_command_lp - [DEFAULT] Send command to NAND large page device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 672 | * @mtd: MTD device structure |
| 673 | * @command: the command to be sent |
| 674 | * @column: the column address for this command, -1 if none |
| 675 | * @page_addr: the page address for this command, -1 if none |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 676 | * |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 677 | * Send command to NAND device. This is the version for the new large page |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 678 | * devices. We don't have the separate regions as we have in the small page |
| 679 | * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 681 | static void nand_command_lp(struct mtd_info *mtd, unsigned int command, |
| 682 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 683 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 684 | register struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 685 | |
| 686 | /* Emulate NAND_CMD_READOOB */ |
| 687 | if (command == NAND_CMD_READOOB) { |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 688 | column += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | command = NAND_CMD_READ0; |
| 690 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 691 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 692 | /* Command latch cycle */ |
Alexander Shiyan | fb066ad | 2013-02-28 12:02:19 +0400 | [diff] [blame] | 693 | chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | |
| 695 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 696 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 697 | |
| 698 | /* Serially input address */ |
| 699 | if (column != -1) { |
| 700 | /* Adjust columns for 16 bit buswidth */ |
Brian Norris | 3dad234 | 2014-01-29 14:08:12 -0800 | [diff] [blame] | 701 | if (chip->options & NAND_BUSWIDTH_16 && |
| 702 | !nand_opcode_8bits(command)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 704 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 705 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 706 | chip->cmd_ctrl(mtd, column >> 8, ctrl); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 707 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 709 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
| 710 | chip->cmd_ctrl(mtd, page_addr >> 8, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 711 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 712 | /* One more address cycle for devices > 128MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 713 | if (chip->chipsize > (128 << 20)) |
| 714 | chip->cmd_ctrl(mtd, page_addr >> 16, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 715 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 716 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 718 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 719 | |
| 720 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 721 | * Program and erase have their own busy handlers status, sequential |
Gerhard Sittig | 7a442f1 | 2014-03-29 14:36:22 +0100 | [diff] [blame] | 722 | * in and status need no delay. |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 723 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 724 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 725 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | case NAND_CMD_CACHEDPROG: |
| 727 | case NAND_CMD_PAGEPROG: |
| 728 | case NAND_CMD_ERASE1: |
| 729 | case NAND_CMD_ERASE2: |
| 730 | case NAND_CMD_SEQIN: |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 731 | case NAND_CMD_RNDIN: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | case NAND_CMD_STATUS: |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 733 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | |
| 735 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 736 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 737 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 738 | udelay(chip->chip_delay); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 739 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
| 740 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 741 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 742 | NAND_NCE | NAND_CTRL_CHANGE); |
Roger Quadros | 60c70d6 | 2015-02-23 17:26:39 +0200 | [diff] [blame] | 743 | /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ |
| 744 | nand_wait_status_ready(mtd, 250); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | return; |
| 746 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 747 | case NAND_CMD_RNDOUT: |
| 748 | /* No ready / busy check necessary */ |
| 749 | chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, |
| 750 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 751 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 752 | NAND_NCE | NAND_CTRL_CHANGE); |
| 753 | return; |
| 754 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 755 | case NAND_CMD_READ0: |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 756 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, |
| 757 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 758 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 759 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 760 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 761 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 762 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 763 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | * If we don't have access to the busy pin, we apply the given |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 765 | * command delay. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 766 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 767 | if (!chip->dev_ready) { |
| 768 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 769 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 770 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 771 | } |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 772 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 773 | /* |
| 774 | * Apply this short delay always to ensure that we do wait tWB in |
| 775 | * any case on any machine. |
| 776 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 777 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 778 | |
| 779 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 780 | } |
| 781 | |
| 782 | /** |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 783 | * panic_nand_get_device - [GENERIC] Get chip for selected access |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 784 | * @chip: the nand chip descriptor |
| 785 | * @mtd: MTD device structure |
| 786 | * @new_state: the state which is requested |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 787 | * |
| 788 | * Used when in panic, no locks are taken. |
| 789 | */ |
| 790 | static void panic_nand_get_device(struct nand_chip *chip, |
| 791 | struct mtd_info *mtd, int new_state) |
| 792 | { |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 793 | /* Hardware controller shared among independent devices */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 794 | chip->controller->active = chip; |
| 795 | chip->state = new_state; |
| 796 | } |
| 797 | |
| 798 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | * nand_get_device - [GENERIC] Get chip for selected access |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 800 | * @mtd: MTD device structure |
| 801 | * @new_state: the state which is requested |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 802 | * |
| 803 | * Get the device and lock it for exclusive access |
| 804 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 805 | static int |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 806 | nand_get_device(struct mtd_info *mtd, int new_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 807 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 808 | struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 809 | spinlock_t *lock = &chip->controller->lock; |
| 810 | wait_queue_head_t *wq = &chip->controller->wq; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 811 | DECLARE_WAITQUEUE(wait, current); |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 812 | retry: |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 813 | spin_lock(lock); |
| 814 | |
vimal singh | b8b3ee9 | 2009-07-09 20:41:22 +0530 | [diff] [blame] | 815 | /* Hardware controller shared among independent devices */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 816 | if (!chip->controller->active) |
| 817 | chip->controller->active = chip; |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 818 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 819 | if (chip->controller->active == chip && chip->state == FL_READY) { |
| 820 | chip->state = new_state; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 821 | spin_unlock(lock); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 822 | return 0; |
| 823 | } |
| 824 | if (new_state == FL_PM_SUSPENDED) { |
Li Yang | 6b0d9a8 | 2009-11-17 14:45:49 -0800 | [diff] [blame] | 825 | if (chip->controller->active->state == FL_PM_SUSPENDED) { |
| 826 | chip->state = FL_PM_SUSPENDED; |
| 827 | spin_unlock(lock); |
| 828 | return 0; |
Li Yang | 6b0d9a8 | 2009-11-17 14:45:49 -0800 | [diff] [blame] | 829 | } |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 830 | } |
| 831 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 832 | add_wait_queue(wq, &wait); |
| 833 | spin_unlock(lock); |
| 834 | schedule(); |
| 835 | remove_wait_queue(wq, &wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 836 | goto retry; |
| 837 | } |
| 838 | |
| 839 | /** |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 840 | * panic_nand_wait - [GENERIC] wait until the command is done |
| 841 | * @mtd: MTD device structure |
| 842 | * @chip: NAND chip structure |
| 843 | * @timeo: timeout |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 844 | * |
| 845 | * Wait for command done. This is a helper function for nand_wait used when |
| 846 | * we are in interrupt context. May happen when in panic and trying to write |
Uwe Kleine-König | b595076 | 2010-11-01 15:38:34 -0400 | [diff] [blame] | 847 | * an oops through mtdoops. |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 848 | */ |
| 849 | static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, |
| 850 | unsigned long timeo) |
| 851 | { |
| 852 | int i; |
| 853 | for (i = 0; i < timeo; i++) { |
| 854 | if (chip->dev_ready) { |
| 855 | if (chip->dev_ready(mtd)) |
| 856 | break; |
| 857 | } else { |
| 858 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
| 859 | break; |
| 860 | } |
| 861 | mdelay(1); |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 862 | } |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 863 | } |
| 864 | |
| 865 | /** |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 866 | * nand_wait - [DEFAULT] wait until the command is done |
| 867 | * @mtd: MTD device structure |
| 868 | * @chip: NAND chip structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 869 | * |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 870 | * Wait for command done. This applies to erase and program only. |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 871 | */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 872 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 873 | { |
| 874 | |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 875 | int status; |
| 876 | unsigned long timeo = 400; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 877 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 878 | /* |
| 879 | * Apply this short delay always to ensure that we do wait tWB in any |
| 880 | * case on any machine. |
| 881 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 882 | ndelay(100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | |
Artem Bityutskiy | 14c6578 | 2013-03-04 14:21:34 +0200 | [diff] [blame] | 884 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 885 | |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 886 | if (in_interrupt() || oops_in_progress) |
| 887 | panic_nand_wait(mtd, chip, timeo); |
| 888 | else { |
Huang Shijie | 6d2559f | 2013-01-30 10:03:56 +0800 | [diff] [blame] | 889 | timeo = jiffies + msecs_to_jiffies(timeo); |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 890 | do { |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 891 | if (chip->dev_ready) { |
| 892 | if (chip->dev_ready(mtd)) |
| 893 | break; |
| 894 | } else { |
| 895 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
| 896 | break; |
| 897 | } |
| 898 | cond_resched(); |
Alex Smith | b70af9b | 2015-10-06 14:52:07 +0100 | [diff] [blame] | 899 | } while (time_before(jiffies, timeo)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 900 | } |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 901 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 902 | status = (int)chip->read_byte(mtd); |
Matthieu CASTET | f251b8d | 2012-11-05 15:00:44 +0100 | [diff] [blame] | 903 | /* This can happen if in case of timeout or buggy dev_ready */ |
| 904 | WARN_ON(!(status & NAND_STATUS_READY)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 905 | return status; |
| 906 | } |
| 907 | |
| 908 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 909 | * __nand_unlock - [REPLACEABLE] unlocks specified locked blocks |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 910 | * @mtd: mtd info |
| 911 | * @ofs: offset to start unlock from |
| 912 | * @len: length to unlock |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 913 | * @invert: when = 0, unlock the range of blocks within the lower and |
| 914 | * upper boundary address |
| 915 | * when = 1, unlock the range of blocks outside the boundaries |
| 916 | * of the lower and upper boundary address |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 917 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 918 | * Returs unlock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 919 | */ |
| 920 | static int __nand_unlock(struct mtd_info *mtd, loff_t ofs, |
| 921 | uint64_t len, int invert) |
| 922 | { |
| 923 | int ret = 0; |
| 924 | int status, page; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 925 | struct nand_chip *chip = mtd_to_nand(mtd); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 926 | |
| 927 | /* Submit address of first page to unlock */ |
| 928 | page = ofs >> chip->page_shift; |
| 929 | chip->cmdfunc(mtd, NAND_CMD_UNLOCK1, -1, page & chip->pagemask); |
| 930 | |
| 931 | /* Submit address of last page to unlock */ |
| 932 | page = (ofs + len) >> chip->page_shift; |
| 933 | chip->cmdfunc(mtd, NAND_CMD_UNLOCK2, -1, |
| 934 | (page | invert) & chip->pagemask); |
| 935 | |
| 936 | /* Call wait ready function */ |
| 937 | status = chip->waitfunc(mtd, chip); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 938 | /* See if device thinks it succeeded */ |
Huang Shijie | 7483096 | 2012-10-14 23:47:24 -0400 | [diff] [blame] | 939 | if (status & NAND_STATUS_FAIL) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 940 | pr_debug("%s: error status = 0x%08x\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 941 | __func__, status); |
| 942 | ret = -EIO; |
| 943 | } |
| 944 | |
| 945 | return ret; |
| 946 | } |
| 947 | |
| 948 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 949 | * nand_unlock - [REPLACEABLE] unlocks specified locked blocks |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 950 | * @mtd: mtd info |
| 951 | * @ofs: offset to start unlock from |
| 952 | * @len: length to unlock |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 953 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 954 | * Returns unlock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 955 | */ |
| 956 | int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
| 957 | { |
| 958 | int ret = 0; |
| 959 | int chipnr; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 960 | struct nand_chip *chip = mtd_to_nand(mtd); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 961 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 962 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 963 | __func__, (unsigned long long)ofs, len); |
| 964 | |
| 965 | if (check_offs_len(mtd, ofs, len)) |
Brian Norris | b1a2348 | 2015-02-28 02:02:27 -0800 | [diff] [blame] | 966 | return -EINVAL; |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 967 | |
| 968 | /* Align to last block address if size addresses end of the device */ |
| 969 | if (ofs + len == mtd->size) |
| 970 | len -= mtd->erasesize; |
| 971 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 972 | nand_get_device(mtd, FL_UNLOCKING); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 973 | |
| 974 | /* Shift to get chip number */ |
| 975 | chipnr = ofs >> chip->chip_shift; |
| 976 | |
| 977 | chip->select_chip(mtd, chipnr); |
| 978 | |
White Ding | 57d3a9a | 2014-07-24 00:10:45 +0800 | [diff] [blame] | 979 | /* |
| 980 | * Reset the chip. |
| 981 | * If we want to check the WP through READ STATUS and check the bit 7 |
| 982 | * we must reset the chip |
| 983 | * some operation can also clear the bit 7 of status register |
| 984 | * eg. erase/program a locked block |
| 985 | */ |
| 986 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 987 | |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 988 | /* Check, if it is write protected */ |
| 989 | if (nand_check_wp(mtd)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 990 | pr_debug("%s: device is write protected!\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 991 | __func__); |
| 992 | ret = -EIO; |
| 993 | goto out; |
| 994 | } |
| 995 | |
| 996 | ret = __nand_unlock(mtd, ofs, len, 0); |
| 997 | |
| 998 | out: |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 999 | chip->select_chip(mtd, -1); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1000 | nand_release_device(mtd); |
| 1001 | |
| 1002 | return ret; |
| 1003 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1004 | EXPORT_SYMBOL(nand_unlock); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1005 | |
| 1006 | /** |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 1007 | * nand_lock - [REPLACEABLE] locks all blocks present in the device |
Randy Dunlap | b6d676d | 2010-08-10 18:02:50 -0700 | [diff] [blame] | 1008 | * @mtd: mtd info |
| 1009 | * @ofs: offset to start unlock from |
| 1010 | * @len: length to unlock |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1011 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1012 | * This feature is not supported in many NAND parts. 'Micron' NAND parts do |
| 1013 | * have this feature, but it allows only to lock all blocks, not for specified |
| 1014 | * range for block. Implementing 'lock' feature by making use of 'unlock', for |
| 1015 | * now. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1016 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1017 | * Returns lock status. |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1018 | */ |
| 1019 | int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) |
| 1020 | { |
| 1021 | int ret = 0; |
| 1022 | int chipnr, status, page; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 1023 | struct nand_chip *chip = mtd_to_nand(mtd); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1024 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1025 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1026 | __func__, (unsigned long long)ofs, len); |
| 1027 | |
| 1028 | if (check_offs_len(mtd, ofs, len)) |
Brian Norris | b1a2348 | 2015-02-28 02:02:27 -0800 | [diff] [blame] | 1029 | return -EINVAL; |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1030 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 1031 | nand_get_device(mtd, FL_LOCKING); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1032 | |
| 1033 | /* Shift to get chip number */ |
| 1034 | chipnr = ofs >> chip->chip_shift; |
| 1035 | |
| 1036 | chip->select_chip(mtd, chipnr); |
| 1037 | |
White Ding | 57d3a9a | 2014-07-24 00:10:45 +0800 | [diff] [blame] | 1038 | /* |
| 1039 | * Reset the chip. |
| 1040 | * If we want to check the WP through READ STATUS and check the bit 7 |
| 1041 | * we must reset the chip |
| 1042 | * some operation can also clear the bit 7 of status register |
| 1043 | * eg. erase/program a locked block |
| 1044 | */ |
| 1045 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 1046 | |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1047 | /* Check, if it is write protected */ |
| 1048 | if (nand_check_wp(mtd)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1049 | pr_debug("%s: device is write protected!\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1050 | __func__); |
| 1051 | status = MTD_ERASE_FAILED; |
| 1052 | ret = -EIO; |
| 1053 | goto out; |
| 1054 | } |
| 1055 | |
| 1056 | /* Submit address of first page to lock */ |
| 1057 | page = ofs >> chip->page_shift; |
| 1058 | chip->cmdfunc(mtd, NAND_CMD_LOCK, -1, page & chip->pagemask); |
| 1059 | |
| 1060 | /* Call wait ready function */ |
| 1061 | status = chip->waitfunc(mtd, chip); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1062 | /* See if device thinks it succeeded */ |
Huang Shijie | 7483096 | 2012-10-14 23:47:24 -0400 | [diff] [blame] | 1063 | if (status & NAND_STATUS_FAIL) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 1064 | pr_debug("%s: error status = 0x%08x\n", |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1065 | __func__, status); |
| 1066 | ret = -EIO; |
| 1067 | goto out; |
| 1068 | } |
| 1069 | |
| 1070 | ret = __nand_unlock(mtd, ofs, len, 0x1); |
| 1071 | |
| 1072 | out: |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 1073 | chip->select_chip(mtd, -1); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1074 | nand_release_device(mtd); |
| 1075 | |
| 1076 | return ret; |
| 1077 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1078 | EXPORT_SYMBOL(nand_lock); |
Vimal Singh | 7d70f33 | 2010-02-08 15:50:49 +0530 | [diff] [blame] | 1079 | |
| 1080 | /** |
Boris BREZILLON | 730a43f | 2015-09-03 18:03:38 +0200 | [diff] [blame] | 1081 | * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data |
| 1082 | * @buf: buffer to test |
| 1083 | * @len: buffer length |
| 1084 | * @bitflips_threshold: maximum number of bitflips |
| 1085 | * |
| 1086 | * Check if a buffer contains only 0xff, which means the underlying region |
| 1087 | * has been erased and is ready to be programmed. |
| 1088 | * The bitflips_threshold specify the maximum number of bitflips before |
| 1089 | * considering the region is not erased. |
| 1090 | * Note: The logic of this function has been extracted from the memweight |
| 1091 | * implementation, except that nand_check_erased_buf function exit before |
| 1092 | * testing the whole buffer if the number of bitflips exceed the |
| 1093 | * bitflips_threshold value. |
| 1094 | * |
| 1095 | * Returns a positive number of bitflips less than or equal to |
| 1096 | * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the |
| 1097 | * threshold. |
| 1098 | */ |
| 1099 | static int nand_check_erased_buf(void *buf, int len, int bitflips_threshold) |
| 1100 | { |
| 1101 | const unsigned char *bitmap = buf; |
| 1102 | int bitflips = 0; |
| 1103 | int weight; |
| 1104 | |
| 1105 | for (; len && ((uintptr_t)bitmap) % sizeof(long); |
| 1106 | len--, bitmap++) { |
| 1107 | weight = hweight8(*bitmap); |
| 1108 | bitflips += BITS_PER_BYTE - weight; |
| 1109 | if (unlikely(bitflips > bitflips_threshold)) |
| 1110 | return -EBADMSG; |
| 1111 | } |
| 1112 | |
| 1113 | for (; len >= sizeof(long); |
| 1114 | len -= sizeof(long), bitmap += sizeof(long)) { |
| 1115 | weight = hweight_long(*((unsigned long *)bitmap)); |
| 1116 | bitflips += BITS_PER_LONG - weight; |
| 1117 | if (unlikely(bitflips > bitflips_threshold)) |
| 1118 | return -EBADMSG; |
| 1119 | } |
| 1120 | |
| 1121 | for (; len > 0; len--, bitmap++) { |
| 1122 | weight = hweight8(*bitmap); |
| 1123 | bitflips += BITS_PER_BYTE - weight; |
| 1124 | if (unlikely(bitflips > bitflips_threshold)) |
| 1125 | return -EBADMSG; |
| 1126 | } |
| 1127 | |
| 1128 | return bitflips; |
| 1129 | } |
| 1130 | |
| 1131 | /** |
| 1132 | * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only |
| 1133 | * 0xff data |
| 1134 | * @data: data buffer to test |
| 1135 | * @datalen: data length |
| 1136 | * @ecc: ECC buffer |
| 1137 | * @ecclen: ECC length |
| 1138 | * @extraoob: extra OOB buffer |
| 1139 | * @extraooblen: extra OOB length |
| 1140 | * @bitflips_threshold: maximum number of bitflips |
| 1141 | * |
| 1142 | * Check if a data buffer and its associated ECC and OOB data contains only |
| 1143 | * 0xff pattern, which means the underlying region has been erased and is |
| 1144 | * ready to be programmed. |
| 1145 | * The bitflips_threshold specify the maximum number of bitflips before |
| 1146 | * considering the region as not erased. |
| 1147 | * |
| 1148 | * Note: |
| 1149 | * 1/ ECC algorithms are working on pre-defined block sizes which are usually |
| 1150 | * different from the NAND page size. When fixing bitflips, ECC engines will |
| 1151 | * report the number of errors per chunk, and the NAND core infrastructure |
| 1152 | * expect you to return the maximum number of bitflips for the whole page. |
| 1153 | * This is why you should always use this function on a single chunk and |
| 1154 | * not on the whole page. After checking each chunk you should update your |
| 1155 | * max_bitflips value accordingly. |
| 1156 | * 2/ When checking for bitflips in erased pages you should not only check |
| 1157 | * the payload data but also their associated ECC data, because a user might |
| 1158 | * have programmed almost all bits to 1 but a few. In this case, we |
| 1159 | * shouldn't consider the chunk as erased, and checking ECC bytes prevent |
| 1160 | * this case. |
| 1161 | * 3/ The extraoob argument is optional, and should be used if some of your OOB |
| 1162 | * data are protected by the ECC engine. |
| 1163 | * It could also be used if you support subpages and want to attach some |
| 1164 | * extra OOB data to an ECC chunk. |
| 1165 | * |
| 1166 | * Returns a positive number of bitflips less than or equal to |
| 1167 | * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the |
| 1168 | * threshold. In case of success, the passed buffers are filled with 0xff. |
| 1169 | */ |
| 1170 | int nand_check_erased_ecc_chunk(void *data, int datalen, |
| 1171 | void *ecc, int ecclen, |
| 1172 | void *extraoob, int extraooblen, |
| 1173 | int bitflips_threshold) |
| 1174 | { |
| 1175 | int data_bitflips = 0, ecc_bitflips = 0, extraoob_bitflips = 0; |
| 1176 | |
| 1177 | data_bitflips = nand_check_erased_buf(data, datalen, |
| 1178 | bitflips_threshold); |
| 1179 | if (data_bitflips < 0) |
| 1180 | return data_bitflips; |
| 1181 | |
| 1182 | bitflips_threshold -= data_bitflips; |
| 1183 | |
| 1184 | ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold); |
| 1185 | if (ecc_bitflips < 0) |
| 1186 | return ecc_bitflips; |
| 1187 | |
| 1188 | bitflips_threshold -= ecc_bitflips; |
| 1189 | |
| 1190 | extraoob_bitflips = nand_check_erased_buf(extraoob, extraooblen, |
| 1191 | bitflips_threshold); |
| 1192 | if (extraoob_bitflips < 0) |
| 1193 | return extraoob_bitflips; |
| 1194 | |
| 1195 | if (data_bitflips) |
| 1196 | memset(data, 0xff, datalen); |
| 1197 | |
| 1198 | if (ecc_bitflips) |
| 1199 | memset(ecc, 0xff, ecclen); |
| 1200 | |
| 1201 | if (extraoob_bitflips) |
| 1202 | memset(extraoob, 0xff, extraooblen); |
| 1203 | |
| 1204 | return data_bitflips + ecc_bitflips + extraoob_bitflips; |
| 1205 | } |
| 1206 | EXPORT_SYMBOL(nand_check_erased_ecc_chunk); |
| 1207 | |
| 1208 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1209 | * nand_read_page_raw - [INTERN] read raw page data without ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1210 | * @mtd: mtd info structure |
| 1211 | * @chip: nand chip info structure |
| 1212 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1213 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1214 | * @page: page number to read |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1215 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1216 | * Not for syndrome calculating ECC controllers, which use a special oob layout. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1217 | */ |
| 1218 | static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1219 | uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1220 | { |
| 1221 | chip->read_buf(mtd, buf, mtd->writesize); |
Brian Norris | 279f08d | 2012-05-02 10:15:03 -0700 | [diff] [blame] | 1222 | if (oob_required) |
| 1223 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1224 | return 0; |
| 1225 | } |
| 1226 | |
| 1227 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1228 | * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1229 | * @mtd: mtd info structure |
| 1230 | * @chip: nand chip info structure |
| 1231 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1232 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1233 | * @page: page number to read |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1234 | * |
| 1235 | * We need a special oob layout and handling even when OOB isn't used. |
| 1236 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1237 | static int nand_read_page_raw_syndrome(struct mtd_info *mtd, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1238 | struct nand_chip *chip, uint8_t *buf, |
| 1239 | int oob_required, int page) |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 1240 | { |
| 1241 | int eccsize = chip->ecc.size; |
| 1242 | int eccbytes = chip->ecc.bytes; |
| 1243 | uint8_t *oob = chip->oob_poi; |
| 1244 | int steps, size; |
| 1245 | |
| 1246 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 1247 | chip->read_buf(mtd, buf, eccsize); |
| 1248 | buf += eccsize; |
| 1249 | |
| 1250 | if (chip->ecc.prepad) { |
| 1251 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 1252 | oob += chip->ecc.prepad; |
| 1253 | } |
| 1254 | |
| 1255 | chip->read_buf(mtd, oob, eccbytes); |
| 1256 | oob += eccbytes; |
| 1257 | |
| 1258 | if (chip->ecc.postpad) { |
| 1259 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 1260 | oob += chip->ecc.postpad; |
| 1261 | } |
| 1262 | } |
| 1263 | |
| 1264 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 1265 | if (size) |
| 1266 | chip->read_buf(mtd, oob, size); |
| 1267 | |
| 1268 | return 0; |
| 1269 | } |
| 1270 | |
| 1271 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1272 | * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1273 | * @mtd: mtd info structure |
| 1274 | * @chip: nand chip info structure |
| 1275 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1276 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1277 | * @page: page number to read |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1278 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1279 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1280 | uint8_t *buf, int oob_required, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1281 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1282 | int i, eccsize = chip->ecc.size; |
| 1283 | int eccbytes = chip->ecc.bytes; |
| 1284 | int eccsteps = chip->ecc.steps; |
| 1285 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1286 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 1287 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1288 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1289 | unsigned int max_bitflips = 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1290 | |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1291 | chip->ecc.read_page_raw(mtd, chip, buf, 1, page); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1292 | |
| 1293 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1294 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1295 | |
| 1296 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1297 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1298 | |
| 1299 | eccsteps = chip->ecc.steps; |
| 1300 | p = buf; |
| 1301 | |
| 1302 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1303 | int stat; |
| 1304 | |
| 1305 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1306 | if (stat < 0) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1307 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1308 | } else { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1309 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1310 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1311 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1312 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1313 | return max_bitflips; |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 1314 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1315 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1316 | /** |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 1317 | * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1318 | * @mtd: mtd info structure |
| 1319 | * @chip: nand chip info structure |
| 1320 | * @data_offs: offset of requested data within the page |
| 1321 | * @readlen: data length |
| 1322 | * @bufpoi: buffer to store read data |
Huang Shijie | e004deb | 2014-01-03 11:01:40 +0800 | [diff] [blame] | 1323 | * @page: page number to read |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1324 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1325 | static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, |
Huang Shijie | e004deb | 2014-01-03 11:01:40 +0800 | [diff] [blame] | 1326 | uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi, |
| 1327 | int page) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1328 | { |
| 1329 | int start_step, end_step, num_steps; |
| 1330 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 1331 | uint8_t *p; |
| 1332 | int data_col_addr, i, gaps = 0; |
| 1333 | int datafrag_len, eccfrag_len, aligned_len, aligned_pos; |
| 1334 | int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; |
Ron | 4a4163c | 2014-03-16 04:01:07 +1030 | [diff] [blame] | 1335 | int index; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1336 | unsigned int max_bitflips = 0; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1337 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1338 | /* Column address within the page aligned to ECC size (256bytes) */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1339 | start_step = data_offs / chip->ecc.size; |
| 1340 | end_step = (data_offs + readlen - 1) / chip->ecc.size; |
| 1341 | num_steps = end_step - start_step + 1; |
Ron | 4a4163c | 2014-03-16 04:01:07 +1030 | [diff] [blame] | 1342 | index = start_step * chip->ecc.bytes; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1343 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1344 | /* Data size aligned to ECC ecc.size */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1345 | datafrag_len = num_steps * chip->ecc.size; |
| 1346 | eccfrag_len = num_steps * chip->ecc.bytes; |
| 1347 | |
| 1348 | data_col_addr = start_step * chip->ecc.size; |
| 1349 | /* If we read not a page aligned data */ |
| 1350 | if (data_col_addr != 0) |
| 1351 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); |
| 1352 | |
| 1353 | p = bufpoi + data_col_addr; |
| 1354 | chip->read_buf(mtd, p, datafrag_len); |
| 1355 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1356 | /* Calculate ECC */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1357 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) |
| 1358 | chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); |
| 1359 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1360 | /* |
| 1361 | * The performance is faster if we position offsets according to |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1362 | * ecc.pos. Let's make sure that there are no gaps in ECC positions. |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1363 | */ |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1364 | for (i = 0; i < eccfrag_len - 1; i++) { |
Ron | 47570bb1 | 2014-03-16 04:01:08 +1030 | [diff] [blame] | 1365 | if (eccpos[i + index] + 1 != eccpos[i + index + 1]) { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1366 | gaps = 1; |
| 1367 | break; |
| 1368 | } |
| 1369 | } |
| 1370 | if (gaps) { |
| 1371 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); |
| 1372 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1373 | } else { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1374 | /* |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1375 | * Send the command to read the particular ECC bytes take care |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1376 | * about buswidth alignment in read_buf. |
| 1377 | */ |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1378 | aligned_pos = eccpos[index] & ~(busw - 1); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1379 | aligned_len = eccfrag_len; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1380 | if (eccpos[index] & (busw - 1)) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1381 | aligned_len++; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1382 | if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1383 | aligned_len++; |
| 1384 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1385 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, |
| 1386 | mtd->writesize + aligned_pos, -1); |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1387 | chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len); |
| 1388 | } |
| 1389 | |
| 1390 | for (i = 0; i < eccfrag_len; i++) |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1391 | chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]]; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1392 | |
| 1393 | p = bufpoi + data_col_addr; |
| 1394 | for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { |
| 1395 | int stat; |
| 1396 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1397 | stat = chip->ecc.correct(mtd, p, |
| 1398 | &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]); |
Boris BREZILLON | 40cbe6e | 2015-12-30 20:32:04 +0100 | [diff] [blame] | 1399 | if (stat == -EBADMSG && |
| 1400 | (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { |
| 1401 | /* check for empty pages with bitflips */ |
| 1402 | stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, |
| 1403 | &chip->buffers->ecccode[i], |
| 1404 | chip->ecc.bytes, |
| 1405 | NULL, 0, |
| 1406 | chip->ecc.strength); |
| 1407 | } |
| 1408 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1409 | if (stat < 0) { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1410 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1411 | } else { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1412 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1413 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1414 | } |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1415 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1416 | return max_bitflips; |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1417 | } |
| 1418 | |
| 1419 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1420 | * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1421 | * @mtd: mtd info structure |
| 1422 | * @chip: nand chip info structure |
| 1423 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1424 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1425 | * @page: page number to read |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1426 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1427 | * Not for syndrome calculating ECC controllers which need a special oob layout. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1428 | */ |
| 1429 | static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1430 | uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1431 | { |
| 1432 | int i, eccsize = chip->ecc.size; |
| 1433 | int eccbytes = chip->ecc.bytes; |
| 1434 | int eccsteps = chip->ecc.steps; |
| 1435 | uint8_t *p = buf; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1436 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 1437 | uint8_t *ecc_code = chip->buffers->ecccode; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 1438 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1439 | unsigned int max_bitflips = 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1440 | |
| 1441 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1442 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1443 | chip->read_buf(mtd, p, eccsize); |
| 1444 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1445 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1446 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1447 | |
| 1448 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1449 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1450 | |
| 1451 | eccsteps = chip->ecc.steps; |
| 1452 | p = buf; |
| 1453 | |
| 1454 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1455 | int stat; |
| 1456 | |
| 1457 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
Boris BREZILLON | 40cbe6e | 2015-12-30 20:32:04 +0100 | [diff] [blame] | 1458 | if (stat == -EBADMSG && |
| 1459 | (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { |
| 1460 | /* check for empty pages with bitflips */ |
| 1461 | stat = nand_check_erased_ecc_chunk(p, eccsize, |
| 1462 | &ecc_code[i], eccbytes, |
| 1463 | NULL, 0, |
| 1464 | chip->ecc.strength); |
| 1465 | } |
| 1466 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1467 | if (stat < 0) { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1468 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1469 | } else { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1470 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1471 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1472 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1473 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1474 | return max_bitflips; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1475 | } |
| 1476 | |
| 1477 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1478 | * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1479 | * @mtd: mtd info structure |
| 1480 | * @chip: nand chip info structure |
| 1481 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1482 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1483 | * @page: page number to read |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1484 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1485 | * Hardware ECC for large page chips, require OOB to be read first. For this |
| 1486 | * ECC mode, the write_page method is re-used from ECC_HW. These methods |
| 1487 | * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with |
| 1488 | * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from |
| 1489 | * the data area, by overwriting the NAND manufacturer bad block markings. |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1490 | */ |
| 1491 | static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1492 | struct nand_chip *chip, uint8_t *buf, int oob_required, int page) |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1493 | { |
| 1494 | int i, eccsize = chip->ecc.size; |
| 1495 | int eccbytes = chip->ecc.bytes; |
| 1496 | int eccsteps = chip->ecc.steps; |
| 1497 | uint8_t *p = buf; |
| 1498 | uint8_t *ecc_code = chip->buffers->ecccode; |
| 1499 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 1500 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1501 | unsigned int max_bitflips = 0; |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1502 | |
| 1503 | /* Read the OOB area first */ |
| 1504 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
| 1505 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1506 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 1507 | |
| 1508 | for (i = 0; i < chip->ecc.total; i++) |
| 1509 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
| 1510 | |
| 1511 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1512 | int stat; |
| 1513 | |
| 1514 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1515 | chip->read_buf(mtd, p, eccsize); |
| 1516 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1517 | |
| 1518 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); |
Boris BREZILLON | 40cbe6e | 2015-12-30 20:32:04 +0100 | [diff] [blame] | 1519 | if (stat == -EBADMSG && |
| 1520 | (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { |
| 1521 | /* check for empty pages with bitflips */ |
| 1522 | stat = nand_check_erased_ecc_chunk(p, eccsize, |
| 1523 | &ecc_code[i], eccbytes, |
| 1524 | NULL, 0, |
| 1525 | chip->ecc.strength); |
| 1526 | } |
| 1527 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1528 | if (stat < 0) { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1529 | mtd->ecc_stats.failed++; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1530 | } else { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1531 | mtd->ecc_stats.corrected += stat; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1532 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1533 | } |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1534 | } |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1535 | return max_bitflips; |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 1536 | } |
| 1537 | |
| 1538 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1539 | * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1540 | * @mtd: mtd info structure |
| 1541 | * @chip: nand chip info structure |
| 1542 | * @buf: buffer to store read data |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1543 | * @oob_required: caller requires OOB data read to chip->oob_poi |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1544 | * @page: page number to read |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1545 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1546 | * The hw generator calculates the error syndrome automatically. Therefore we |
| 1547 | * need a special oob layout and handling. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1548 | */ |
| 1549 | static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1550 | uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1551 | { |
| 1552 | int i, eccsize = chip->ecc.size; |
| 1553 | int eccbytes = chip->ecc.bytes; |
| 1554 | int eccsteps = chip->ecc.steps; |
Boris BREZILLON | 40cbe6e | 2015-12-30 20:32:04 +0100 | [diff] [blame] | 1555 | int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1556 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1557 | uint8_t *oob = chip->oob_poi; |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1558 | unsigned int max_bitflips = 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1559 | |
| 1560 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1561 | int stat; |
| 1562 | |
| 1563 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 1564 | chip->read_buf(mtd, p, eccsize); |
| 1565 | |
| 1566 | if (chip->ecc.prepad) { |
| 1567 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 1568 | oob += chip->ecc.prepad; |
| 1569 | } |
| 1570 | |
| 1571 | chip->ecc.hwctl(mtd, NAND_ECC_READSYN); |
| 1572 | chip->read_buf(mtd, oob, eccbytes); |
| 1573 | stat = chip->ecc.correct(mtd, p, oob, NULL); |
| 1574 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1575 | oob += eccbytes; |
| 1576 | |
| 1577 | if (chip->ecc.postpad) { |
| 1578 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 1579 | oob += chip->ecc.postpad; |
| 1580 | } |
Boris BREZILLON | 40cbe6e | 2015-12-30 20:32:04 +0100 | [diff] [blame] | 1581 | |
| 1582 | if (stat == -EBADMSG && |
| 1583 | (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { |
| 1584 | /* check for empty pages with bitflips */ |
| 1585 | stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, |
| 1586 | oob - eccpadbytes, |
| 1587 | eccpadbytes, |
| 1588 | NULL, 0, |
| 1589 | chip->ecc.strength); |
| 1590 | } |
| 1591 | |
| 1592 | if (stat < 0) { |
| 1593 | mtd->ecc_stats.failed++; |
| 1594 | } else { |
| 1595 | mtd->ecc_stats.corrected += stat; |
| 1596 | max_bitflips = max_t(unsigned int, max_bitflips, stat); |
| 1597 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1598 | } |
| 1599 | |
| 1600 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 1601 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1602 | if (i) |
| 1603 | chip->read_buf(mtd, oob, i); |
| 1604 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1605 | return max_bitflips; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1606 | } |
| 1607 | |
| 1608 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1609 | * nand_transfer_oob - [INTERN] Transfer oob to client buffer |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1610 | * @chip: nand chip structure |
| 1611 | * @oob: oob destination address |
| 1612 | * @ops: oob ops structure |
| 1613 | * @len: size of oob to transfer |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1614 | */ |
| 1615 | static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1616 | struct mtd_oob_ops *ops, size_t len) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1617 | { |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1618 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1619 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1620 | case MTD_OPS_PLACE_OOB: |
| 1621 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1622 | memcpy(oob, chip->oob_poi + ops->ooboffs, len); |
| 1623 | return oob + len; |
| 1624 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1625 | case MTD_OPS_AUTO_OOB: { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1626 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1627 | uint32_t boffs = 0, roffs = ops->ooboffs; |
| 1628 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1629 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1630 | for (; free->length && len; free++, len -= bytes) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1631 | /* Read request not from offset 0? */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1632 | if (unlikely(roffs)) { |
| 1633 | if (roffs >= free->length) { |
| 1634 | roffs -= free->length; |
| 1635 | continue; |
| 1636 | } |
| 1637 | boffs = free->offset + roffs; |
| 1638 | bytes = min_t(size_t, len, |
| 1639 | (free->length - roffs)); |
| 1640 | roffs = 0; |
| 1641 | } else { |
| 1642 | bytes = min_t(size_t, len, free->length); |
| 1643 | boffs = free->offset; |
| 1644 | } |
| 1645 | memcpy(oob, chip->oob_poi + boffs, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1646 | oob += bytes; |
| 1647 | } |
| 1648 | return oob; |
| 1649 | } |
| 1650 | default: |
| 1651 | BUG(); |
| 1652 | } |
| 1653 | return NULL; |
| 1654 | } |
| 1655 | |
| 1656 | /** |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1657 | * nand_setup_read_retry - [INTERN] Set the READ RETRY mode |
| 1658 | * @mtd: MTD device structure |
| 1659 | * @retry_mode: the retry mode to use |
| 1660 | * |
| 1661 | * Some vendors supply a special command to shift the Vt threshold, to be used |
| 1662 | * when there are too many bitflips in a page (i.e., ECC error). After setting |
| 1663 | * a new threshold, the host should retry reading the page. |
| 1664 | */ |
| 1665 | static int nand_setup_read_retry(struct mtd_info *mtd, int retry_mode) |
| 1666 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 1667 | struct nand_chip *chip = mtd_to_nand(mtd); |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1668 | |
| 1669 | pr_debug("setting READ RETRY mode %d\n", retry_mode); |
| 1670 | |
| 1671 | if (retry_mode >= chip->read_retries) |
| 1672 | return -EINVAL; |
| 1673 | |
| 1674 | if (!chip->setup_read_retry) |
| 1675 | return -EOPNOTSUPP; |
| 1676 | |
| 1677 | return chip->setup_read_retry(mtd, retry_mode); |
| 1678 | } |
| 1679 | |
| 1680 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1681 | * nand_do_read_ops - [INTERN] Read data with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1682 | * @mtd: MTD device structure |
| 1683 | * @from: offset to read from |
| 1684 | * @ops: oob ops structure |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1685 | * |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1686 | * Internal function. Called with chip held. |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1687 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1688 | static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, |
| 1689 | struct mtd_oob_ops *ops) |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1690 | { |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1691 | int chipnr, page, realpage, col, bytes, aligned, oob_required; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 1692 | struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1693 | int ret = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1694 | uint32_t readlen = ops->len; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1695 | uint32_t oobreadlen = ops->ooblen; |
Boris BREZILLON | 29f1058 | 2016-03-07 10:46:52 +0100 | [diff] [blame] | 1696 | uint32_t max_oobsize = mtd_oobavail(mtd, ops); |
Maxim Levitsky | 9aca334 | 2010-02-22 20:39:35 +0200 | [diff] [blame] | 1697 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1698 | uint8_t *bufpoi, *oob, *buf; |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1699 | int use_bufpoi; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1700 | unsigned int max_bitflips = 0; |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1701 | int retry_mode = 0; |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1702 | bool ecc_fail = false; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1703 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1704 | chipnr = (int)(from >> chip->chip_shift); |
| 1705 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1706 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1707 | realpage = (int)(from >> chip->page_shift); |
| 1708 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1709 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1710 | col = (int)(from & (mtd->writesize - 1)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1711 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1712 | buf = ops->datbuf; |
| 1713 | oob = ops->oobbuf; |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1714 | oob_required = oob ? 1 : 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1715 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 1716 | while (1) { |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1717 | unsigned int ecc_failures = mtd->ecc_stats.failed; |
| 1718 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1719 | bytes = min(mtd->writesize - col, readlen); |
| 1720 | aligned = (bytes == mtd->writesize); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1721 | |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1722 | if (!aligned) |
| 1723 | use_bufpoi = 1; |
| 1724 | else if (chip->options & NAND_USE_BOUNCE_BUFFER) |
| 1725 | use_bufpoi = !virt_addr_valid(buf); |
| 1726 | else |
| 1727 | use_bufpoi = 0; |
| 1728 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1729 | /* Is the current page in the buffer? */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1730 | if (realpage != chip->pagebuf || oob) { |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1731 | bufpoi = use_bufpoi ? chip->buffers->databuf : buf; |
| 1732 | |
| 1733 | if (use_bufpoi && aligned) |
| 1734 | pr_debug("%s: using read bounce buffer for buf@%p\n", |
| 1735 | __func__, buf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1736 | |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1737 | read_retry: |
Brian Norris | c00a099 | 2012-05-01 17:12:54 -0700 | [diff] [blame] | 1738 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1739 | |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1740 | /* |
| 1741 | * Now read the page into the buffer. Absent an error, |
| 1742 | * the read methods return max bitflips per ecc step. |
| 1743 | */ |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 1744 | if (unlikely(ops->mode == MTD_OPS_RAW)) |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 1745 | ret = chip->ecc.read_page_raw(mtd, chip, bufpoi, |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1746 | oob_required, |
| 1747 | page); |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 1748 | else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) && |
| 1749 | !oob) |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 1750 | ret = chip->ecc.read_subpage(mtd, chip, |
Huang Shijie | e004deb | 2014-01-03 11:01:40 +0800 | [diff] [blame] | 1751 | col, bytes, bufpoi, |
| 1752 | page); |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 1753 | else |
Sneha Narnakaje | 46a8cf2 | 2009-09-18 12:51:46 -0700 | [diff] [blame] | 1754 | ret = chip->ecc.read_page(mtd, chip, bufpoi, |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 1755 | oob_required, page); |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1756 | if (ret < 0) { |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1757 | if (use_bufpoi) |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1758 | /* Invalidate page cache */ |
| 1759 | chip->pagebuf = -1; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1760 | break; |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1761 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1762 | |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1763 | max_bitflips = max_t(unsigned int, max_bitflips, ret); |
| 1764 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1765 | /* Transfer not aligned data */ |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 1766 | if (use_bufpoi) { |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 1767 | if (!NAND_HAS_SUBPAGE_READ(chip) && !oob && |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1768 | !(mtd->ecc_stats.failed - ecc_failures) && |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1769 | (ops->mode != MTD_OPS_RAW)) { |
Alexey Korolev | 3d45955 | 2008-05-15 17:23:18 +0100 | [diff] [blame] | 1770 | chip->pagebuf = realpage; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1771 | chip->pagebuf_bitflips = ret; |
| 1772 | } else { |
Brian Norris | 6d77b9d | 2011-09-07 13:13:40 -0700 | [diff] [blame] | 1773 | /* Invalidate page cache */ |
| 1774 | chip->pagebuf = -1; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1775 | } |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1776 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1777 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1778 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1779 | if (unlikely(oob)) { |
Maxim Levitsky | b64d39d | 2010-02-22 20:39:37 +0200 | [diff] [blame] | 1780 | int toread = min(oobreadlen, max_oobsize); |
| 1781 | |
| 1782 | if (toread) { |
| 1783 | oob = nand_transfer_oob(chip, |
| 1784 | oob, ops, toread); |
| 1785 | oobreadlen -= toread; |
| 1786 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1787 | } |
Brian Norris | 5bc7c33 | 2013-03-13 09:51:31 -0700 | [diff] [blame] | 1788 | |
| 1789 | if (chip->options & NAND_NEED_READRDY) { |
| 1790 | /* Apply delay or wait for ready/busy pin */ |
| 1791 | if (!chip->dev_ready) |
| 1792 | udelay(chip->chip_delay); |
| 1793 | else |
| 1794 | nand_wait_ready(mtd); |
| 1795 | } |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1796 | |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1797 | if (mtd->ecc_stats.failed - ecc_failures) { |
Brian Norris | 28fa65e | 2014-02-12 16:08:28 -0800 | [diff] [blame] | 1798 | if (retry_mode + 1 < chip->read_retries) { |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1799 | retry_mode++; |
| 1800 | ret = nand_setup_read_retry(mtd, |
| 1801 | retry_mode); |
| 1802 | if (ret < 0) |
| 1803 | break; |
| 1804 | |
| 1805 | /* Reset failures; retry */ |
| 1806 | mtd->ecc_stats.failed = ecc_failures; |
| 1807 | goto read_retry; |
| 1808 | } else { |
| 1809 | /* No more retry modes; real failure */ |
| 1810 | ecc_fail = true; |
| 1811 | } |
| 1812 | } |
| 1813 | |
| 1814 | buf += bytes; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1815 | } else { |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 1816 | memcpy(buf, chip->buffers->databuf + col, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1817 | buf += bytes; |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1818 | max_bitflips = max_t(unsigned int, max_bitflips, |
| 1819 | chip->pagebuf_bitflips); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1820 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1821 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1822 | readlen -= bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1823 | |
Brian Norris | ba84fb5 | 2014-01-03 15:13:33 -0800 | [diff] [blame] | 1824 | /* Reset to retry mode 0 */ |
| 1825 | if (retry_mode) { |
| 1826 | ret = nand_setup_read_retry(mtd, 0); |
| 1827 | if (ret < 0) |
| 1828 | break; |
| 1829 | retry_mode = 0; |
| 1830 | } |
| 1831 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1832 | if (!readlen) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1833 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1834 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1835 | /* For subsequent reads align to page boundary */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1836 | col = 0; |
| 1837 | /* Increment page address */ |
| 1838 | realpage++; |
| 1839 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1840 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1841 | /* Check, if we cross a chip boundary */ |
| 1842 | if (!page) { |
| 1843 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1844 | chip->select_chip(mtd, -1); |
| 1845 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1846 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1847 | } |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 1848 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1849 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1850 | ops->retlen = ops->len - (size_t) readlen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 1851 | if (oob) |
| 1852 | ops->oobretlen = ops->ooblen - oobreadlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1853 | |
Mike Dunn | 3f91e94 | 2012-04-25 12:06:09 -0700 | [diff] [blame] | 1854 | if (ret < 0) |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1855 | return ret; |
| 1856 | |
Brian Norris | b72f3df | 2013-12-03 11:04:14 -0800 | [diff] [blame] | 1857 | if (ecc_fail) |
Thomas Gleixner | 9a1fcdf | 2006-05-29 14:56:39 +0200 | [diff] [blame] | 1858 | return -EBADMSG; |
| 1859 | |
Mike Dunn | edbc4540 | 2012-04-25 12:06:11 -0700 | [diff] [blame] | 1860 | return max_bitflips; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1861 | } |
| 1862 | |
| 1863 | /** |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1864 | * nand_read - [MTD Interface] MTD compatibility function for nand_do_read_ecc |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1865 | * @mtd: MTD device structure |
| 1866 | * @from: offset to read from |
| 1867 | * @len: number of bytes to read |
| 1868 | * @retlen: pointer to variable to store the number of read bytes |
| 1869 | * @buf: the databuffer to put data |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1870 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1871 | * Get hold of the chip and call nand_do_read. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1872 | */ |
| 1873 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 1874 | size_t *retlen, uint8_t *buf) |
| 1875 | { |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1876 | struct mtd_oob_ops ops; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1877 | int ret; |
| 1878 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 1879 | nand_get_device(mtd, FL_READING); |
Brian Norris | 0ec56dc | 2015-02-28 02:02:30 -0800 | [diff] [blame] | 1880 | memset(&ops, 0, sizeof(ops)); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1881 | ops.len = len; |
| 1882 | ops.datbuf = buf; |
Huang Shijie | 11041ae | 2012-07-03 16:44:14 +0800 | [diff] [blame] | 1883 | ops.mode = MTD_OPS_PLACE_OOB; |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1884 | ret = nand_do_read_ops(mtd, from, &ops); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 1885 | *retlen = ops.retlen; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1886 | nand_release_device(mtd); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1887 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1888 | } |
| 1889 | |
| 1890 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1891 | * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1892 | * @mtd: mtd info structure |
| 1893 | * @chip: nand chip info structure |
| 1894 | * @page: page number to read |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1895 | */ |
Boris Brezillon | 9d02fc2 | 2015-08-26 16:08:12 +0200 | [diff] [blame] | 1896 | int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, int page) |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1897 | { |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1898 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1899 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1900 | return 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1901 | } |
Boris Brezillon | 9d02fc2 | 2015-08-26 16:08:12 +0200 | [diff] [blame] | 1902 | EXPORT_SYMBOL(nand_read_oob_std); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1903 | |
| 1904 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1905 | * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1906 | * with syndromes |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1907 | * @mtd: mtd info structure |
| 1908 | * @chip: nand chip info structure |
| 1909 | * @page: page number to read |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1910 | */ |
Boris Brezillon | 9d02fc2 | 2015-08-26 16:08:12 +0200 | [diff] [blame] | 1911 | int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 1912 | int page) |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1913 | { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1914 | int length = mtd->oobsize; |
| 1915 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1916 | int eccsize = chip->ecc.size; |
Baruch Siach | 2ea69d2 | 2015-01-22 15:23:05 +0200 | [diff] [blame] | 1917 | uint8_t *bufpoi = chip->oob_poi; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1918 | int i, toread, sndrnd = 0, pos; |
| 1919 | |
| 1920 | chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); |
| 1921 | for (i = 0; i < chip->ecc.steps; i++) { |
| 1922 | if (sndrnd) { |
| 1923 | pos = eccsize + i * (eccsize + chunk); |
| 1924 | if (mtd->writesize > 512) |
| 1925 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1); |
| 1926 | else |
| 1927 | chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page); |
| 1928 | } else |
| 1929 | sndrnd = 1; |
| 1930 | toread = min_t(int, length, chunk); |
| 1931 | chip->read_buf(mtd, bufpoi, toread); |
| 1932 | bufpoi += toread; |
| 1933 | length -= toread; |
| 1934 | } |
| 1935 | if (length > 0) |
| 1936 | chip->read_buf(mtd, bufpoi, length); |
| 1937 | |
Shmulik Ladkani | 5c2ffb1 | 2012-05-09 13:06:35 +0300 | [diff] [blame] | 1938 | return 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1939 | } |
Boris Brezillon | 9d02fc2 | 2015-08-26 16:08:12 +0200 | [diff] [blame] | 1940 | EXPORT_SYMBOL(nand_read_oob_syndrome); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1941 | |
| 1942 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1943 | * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1944 | * @mtd: mtd info structure |
| 1945 | * @chip: nand chip info structure |
| 1946 | * @page: page number to write |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1947 | */ |
Boris Brezillon | 9d02fc2 | 2015-08-26 16:08:12 +0200 | [diff] [blame] | 1948 | int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, int page) |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1949 | { |
| 1950 | int status = 0; |
| 1951 | const uint8_t *buf = chip->oob_poi; |
| 1952 | int length = mtd->oobsize; |
| 1953 | |
| 1954 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); |
| 1955 | chip->write_buf(mtd, buf, length); |
| 1956 | /* Send command to program the OOB data */ |
| 1957 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1958 | |
| 1959 | status = chip->waitfunc(mtd, chip); |
| 1960 | |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1961 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1962 | } |
Boris Brezillon | 9d02fc2 | 2015-08-26 16:08:12 +0200 | [diff] [blame] | 1963 | EXPORT_SYMBOL(nand_write_oob_std); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1964 | |
| 1965 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 1966 | * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 1967 | * with syndrome - only for large page flash |
| 1968 | * @mtd: mtd info structure |
| 1969 | * @chip: nand chip info structure |
| 1970 | * @page: page number to write |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1971 | */ |
Boris Brezillon | 9d02fc2 | 2015-08-26 16:08:12 +0200 | [diff] [blame] | 1972 | int nand_write_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 1973 | int page) |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1974 | { |
| 1975 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1976 | int eccsize = chip->ecc.size, length = mtd->oobsize; |
| 1977 | int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; |
| 1978 | const uint8_t *bufpoi = chip->oob_poi; |
| 1979 | |
| 1980 | /* |
| 1981 | * data-ecc-data-ecc ... ecc-oob |
| 1982 | * or |
| 1983 | * data-pad-ecc-pad-data-pad .... ecc-pad-oob |
| 1984 | */ |
| 1985 | if (!chip->ecc.prepad && !chip->ecc.postpad) { |
| 1986 | pos = steps * (eccsize + chunk); |
| 1987 | steps = 0; |
| 1988 | } else |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 1989 | pos = eccsize; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1990 | |
| 1991 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page); |
| 1992 | for (i = 0; i < steps; i++) { |
| 1993 | if (sndcmd) { |
| 1994 | if (mtd->writesize <= 512) { |
| 1995 | uint32_t fill = 0xFFFFFFFF; |
| 1996 | |
| 1997 | len = eccsize; |
| 1998 | while (len > 0) { |
| 1999 | int num = min_t(int, len, 4); |
| 2000 | chip->write_buf(mtd, (uint8_t *)&fill, |
| 2001 | num); |
| 2002 | len -= num; |
| 2003 | } |
| 2004 | } else { |
| 2005 | pos = eccsize + i * (eccsize + chunk); |
| 2006 | chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1); |
| 2007 | } |
| 2008 | } else |
| 2009 | sndcmd = 1; |
| 2010 | len = min_t(int, length, chunk); |
| 2011 | chip->write_buf(mtd, bufpoi, len); |
| 2012 | bufpoi += len; |
| 2013 | length -= len; |
| 2014 | } |
| 2015 | if (length > 0) |
| 2016 | chip->write_buf(mtd, bufpoi, length); |
| 2017 | |
| 2018 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 2019 | status = chip->waitfunc(mtd, chip); |
| 2020 | |
| 2021 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
| 2022 | } |
Boris Brezillon | 9d02fc2 | 2015-08-26 16:08:12 +0200 | [diff] [blame] | 2023 | EXPORT_SYMBOL(nand_write_oob_syndrome); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2024 | |
| 2025 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2026 | * nand_do_read_oob - [INTERN] NAND read out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2027 | * @mtd: MTD device structure |
| 2028 | * @from: offset to read from |
| 2029 | * @ops: oob operations description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2030 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2031 | * NAND read out-of-band data from the spare area. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2032 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2033 | static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, |
| 2034 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2035 | { |
Brian Norris | c00a099 | 2012-05-01 17:12:54 -0700 | [diff] [blame] | 2036 | int page, realpage, chipnr; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 2037 | struct nand_chip *chip = mtd_to_nand(mtd); |
Brian Norris | 041e457 | 2011-06-23 16:45:24 -0700 | [diff] [blame] | 2038 | struct mtd_ecc_stats stats; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2039 | int readlen = ops->ooblen; |
| 2040 | int len; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2041 | uint8_t *buf = ops->oobbuf; |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 2042 | int ret = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2043 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2044 | pr_debug("%s: from = 0x%08Lx, len = %i\n", |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2045 | __func__, (unsigned long long)from, readlen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2046 | |
Brian Norris | 041e457 | 2011-06-23 16:45:24 -0700 | [diff] [blame] | 2047 | stats = mtd->ecc_stats; |
| 2048 | |
Boris BREZILLON | 29f1058 | 2016-03-07 10:46:52 +0100 | [diff] [blame] | 2049 | len = mtd_oobavail(mtd, ops); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2050 | |
| 2051 | if (unlikely(ops->ooboffs >= len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2052 | pr_debug("%s: attempt to start read outside oob\n", |
| 2053 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2054 | return -EINVAL; |
| 2055 | } |
| 2056 | |
| 2057 | /* Do not allow reads past end of device */ |
| 2058 | if (unlikely(from >= mtd->size || |
| 2059 | ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) - |
| 2060 | (from >> chip->page_shift)) * len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2061 | pr_debug("%s: attempt to read beyond end of device\n", |
| 2062 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2063 | return -EINVAL; |
| 2064 | } |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2065 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2066 | chipnr = (int)(from >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2067 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2068 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2069 | /* Shift to get page */ |
| 2070 | realpage = (int)(from >> chip->page_shift); |
| 2071 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2072 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2073 | while (1) { |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2074 | if (ops->mode == MTD_OPS_RAW) |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 2075 | ret = chip->ecc.read_oob_raw(mtd, chip, page); |
Brian Norris | c46f648 | 2011-08-30 18:45:38 -0700 | [diff] [blame] | 2076 | else |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 2077 | ret = chip->ecc.read_oob(mtd, chip, page); |
| 2078 | |
| 2079 | if (ret < 0) |
| 2080 | break; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2081 | |
| 2082 | len = min(len, readlen); |
| 2083 | buf = nand_transfer_oob(chip, buf, ops, len); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2084 | |
Brian Norris | 5bc7c33 | 2013-03-13 09:51:31 -0700 | [diff] [blame] | 2085 | if (chip->options & NAND_NEED_READRDY) { |
| 2086 | /* Apply delay or wait for ready/busy pin */ |
| 2087 | if (!chip->dev_ready) |
| 2088 | udelay(chip->chip_delay); |
| 2089 | else |
| 2090 | nand_wait_ready(mtd); |
| 2091 | } |
| 2092 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2093 | readlen -= len; |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 2094 | if (!readlen) |
| 2095 | break; |
| 2096 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2097 | /* Increment page address */ |
| 2098 | realpage++; |
| 2099 | |
| 2100 | page = realpage & chip->pagemask; |
| 2101 | /* Check, if we cross a chip boundary */ |
| 2102 | if (!page) { |
| 2103 | chipnr++; |
| 2104 | chip->select_chip(mtd, -1); |
| 2105 | chip->select_chip(mtd, chipnr); |
| 2106 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2107 | } |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2108 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2109 | |
Shmulik Ladkani | 1951f2f | 2012-05-09 13:13:34 +0300 | [diff] [blame] | 2110 | ops->oobretlen = ops->ooblen - readlen; |
| 2111 | |
| 2112 | if (ret < 0) |
| 2113 | return ret; |
Brian Norris | 041e457 | 2011-06-23 16:45:24 -0700 | [diff] [blame] | 2114 | |
| 2115 | if (mtd->ecc_stats.failed - stats.failed) |
| 2116 | return -EBADMSG; |
| 2117 | |
| 2118 | return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2119 | } |
| 2120 | |
| 2121 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2122 | * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2123 | * @mtd: MTD device structure |
| 2124 | * @from: offset to read from |
| 2125 | * @ops: oob operation description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2126 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2127 | * NAND read data and/or out-of-band data. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2128 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2129 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, |
| 2130 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2131 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2132 | int ret = -ENOTSUPP; |
| 2133 | |
| 2134 | ops->retlen = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2135 | |
| 2136 | /* Do not allow reads past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2137 | if (ops->datbuf && (from + ops->len) > mtd->size) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2138 | pr_debug("%s: attempt to read beyond end of device\n", |
| 2139 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2140 | return -EINVAL; |
| 2141 | } |
| 2142 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2143 | nand_get_device(mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2144 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2145 | switch (ops->mode) { |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2146 | case MTD_OPS_PLACE_OOB: |
| 2147 | case MTD_OPS_AUTO_OOB: |
| 2148 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2149 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2150 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2151 | default: |
| 2152 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2153 | } |
| 2154 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2155 | if (!ops->datbuf) |
| 2156 | ret = nand_do_read_oob(mtd, from, ops); |
| 2157 | else |
| 2158 | ret = nand_do_read_ops(mtd, from, ops); |
| 2159 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2160 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2161 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2162 | return ret; |
| 2163 | } |
| 2164 | |
| 2165 | |
| 2166 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2167 | * nand_write_page_raw - [INTERN] raw page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2168 | * @mtd: mtd info structure |
| 2169 | * @chip: nand chip info structure |
| 2170 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2171 | * @oob_required: must write chip->oob_poi to OOB |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2172 | * @page: page number to write |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2173 | * |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2174 | * Not for syndrome calculating ECC controllers, which use a special oob layout. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2175 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2176 | static int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2177 | const uint8_t *buf, int oob_required, int page) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2178 | { |
| 2179 | chip->write_buf(mtd, buf, mtd->writesize); |
Brian Norris | 279f08d | 2012-05-02 10:15:03 -0700 | [diff] [blame] | 2180 | if (oob_required) |
| 2181 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2182 | |
| 2183 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2184 | } |
| 2185 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2186 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2187 | * nand_write_page_raw_syndrome - [INTERN] raw page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2188 | * @mtd: mtd info structure |
| 2189 | * @chip: nand chip info structure |
| 2190 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2191 | * @oob_required: must write chip->oob_poi to OOB |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2192 | * @page: page number to write |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2193 | * |
| 2194 | * We need a special oob layout and handling even when ECC isn't checked. |
| 2195 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2196 | static int nand_write_page_raw_syndrome(struct mtd_info *mtd, |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2197 | struct nand_chip *chip, |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2198 | const uint8_t *buf, int oob_required, |
| 2199 | int page) |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2200 | { |
| 2201 | int eccsize = chip->ecc.size; |
| 2202 | int eccbytes = chip->ecc.bytes; |
| 2203 | uint8_t *oob = chip->oob_poi; |
| 2204 | int steps, size; |
| 2205 | |
| 2206 | for (steps = chip->ecc.steps; steps > 0; steps--) { |
| 2207 | chip->write_buf(mtd, buf, eccsize); |
| 2208 | buf += eccsize; |
| 2209 | |
| 2210 | if (chip->ecc.prepad) { |
| 2211 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 2212 | oob += chip->ecc.prepad; |
| 2213 | } |
| 2214 | |
Boris BREZILLON | 60c3bc1 | 2014-02-01 19:10:28 +0100 | [diff] [blame] | 2215 | chip->write_buf(mtd, oob, eccbytes); |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2216 | oob += eccbytes; |
| 2217 | |
| 2218 | if (chip->ecc.postpad) { |
| 2219 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 2220 | oob += chip->ecc.postpad; |
| 2221 | } |
| 2222 | } |
| 2223 | |
| 2224 | size = mtd->oobsize - (oob - chip->oob_poi); |
| 2225 | if (size) |
| 2226 | chip->write_buf(mtd, oob, size); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2227 | |
| 2228 | return 0; |
David Brownell | 52ff49d | 2009-03-04 12:01:36 -0800 | [diff] [blame] | 2229 | } |
| 2230 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2231 | * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2232 | * @mtd: mtd info structure |
| 2233 | * @chip: nand chip info structure |
| 2234 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2235 | * @oob_required: must write chip->oob_poi to OOB |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2236 | * @page: page number to write |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2237 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2238 | static int nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2239 | const uint8_t *buf, int oob_required, |
| 2240 | int page) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2241 | { |
| 2242 | int i, eccsize = chip->ecc.size; |
| 2243 | int eccbytes = chip->ecc.bytes; |
| 2244 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 2245 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2246 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 2247 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2248 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2249 | /* Software ECC calculation */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2250 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 2251 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2252 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2253 | for (i = 0; i < chip->ecc.total; i++) |
| 2254 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2255 | |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2256 | return chip->ecc.write_page_raw(mtd, chip, buf, 1, page); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2257 | } |
| 2258 | |
| 2259 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2260 | * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2261 | * @mtd: mtd info structure |
| 2262 | * @chip: nand chip info structure |
| 2263 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2264 | * @oob_required: must write chip->oob_poi to OOB |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2265 | * @page: page number to write |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2266 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2267 | static int nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2268 | const uint8_t *buf, int oob_required, |
| 2269 | int page) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2270 | { |
| 2271 | int i, eccsize = chip->ecc.size; |
| 2272 | int eccbytes = chip->ecc.bytes; |
| 2273 | int eccsteps = chip->ecc.steps; |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 2274 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2275 | const uint8_t *p = buf; |
Ben Dooks | 8b099a3 | 2007-05-28 19:17:54 +0100 | [diff] [blame] | 2276 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2277 | |
| 2278 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 2279 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
David Woodhouse | 29da9ce | 2006-05-26 23:05:44 +0100 | [diff] [blame] | 2280 | chip->write_buf(mtd, p, eccsize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2281 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 2282 | } |
| 2283 | |
| 2284 | for (i = 0; i < chip->ecc.total; i++) |
| 2285 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 2286 | |
| 2287 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2288 | |
| 2289 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2290 | } |
| 2291 | |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2292 | |
| 2293 | /** |
Brian Norris | 73c8aaf | 2015-02-28 02:04:18 -0800 | [diff] [blame] | 2294 | * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2295 | * @mtd: mtd info structure |
| 2296 | * @chip: nand chip info structure |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2297 | * @offset: column address of subpage within the page |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2298 | * @data_len: data length |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2299 | * @buf: data buffer |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2300 | * @oob_required: must write chip->oob_poi to OOB |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2301 | * @page: page number to write |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2302 | */ |
| 2303 | static int nand_write_subpage_hwecc(struct mtd_info *mtd, |
| 2304 | struct nand_chip *chip, uint32_t offset, |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2305 | uint32_t data_len, const uint8_t *buf, |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2306 | int oob_required, int page) |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2307 | { |
| 2308 | uint8_t *oob_buf = chip->oob_poi; |
| 2309 | uint8_t *ecc_calc = chip->buffers->ecccalc; |
| 2310 | int ecc_size = chip->ecc.size; |
| 2311 | int ecc_bytes = chip->ecc.bytes; |
| 2312 | int ecc_steps = chip->ecc.steps; |
| 2313 | uint32_t *eccpos = chip->ecc.layout->eccpos; |
| 2314 | uint32_t start_step = offset / ecc_size; |
| 2315 | uint32_t end_step = (offset + data_len - 1) / ecc_size; |
| 2316 | int oob_bytes = mtd->oobsize / ecc_steps; |
| 2317 | int step, i; |
| 2318 | |
| 2319 | for (step = 0; step < ecc_steps; step++) { |
| 2320 | /* configure controller for WRITE access */ |
| 2321 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 2322 | |
| 2323 | /* write data (untouched subpages already masked by 0xFF) */ |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2324 | chip->write_buf(mtd, buf, ecc_size); |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2325 | |
| 2326 | /* mask ECC of un-touched subpages by padding 0xFF */ |
| 2327 | if ((step < start_step) || (step > end_step)) |
| 2328 | memset(ecc_calc, 0xff, ecc_bytes); |
| 2329 | else |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2330 | chip->ecc.calculate(mtd, buf, ecc_calc); |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2331 | |
| 2332 | /* mask OOB of un-touched subpages by padding 0xFF */ |
| 2333 | /* if oob_required, preserve OOB metadata of written subpage */ |
| 2334 | if (!oob_required || (step < start_step) || (step > end_step)) |
| 2335 | memset(oob_buf, 0xff, oob_bytes); |
| 2336 | |
Brian Norris | d6a95080 | 2013-08-08 17:16:36 -0700 | [diff] [blame] | 2337 | buf += ecc_size; |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2338 | ecc_calc += ecc_bytes; |
| 2339 | oob_buf += oob_bytes; |
| 2340 | } |
| 2341 | |
| 2342 | /* copy calculated ECC for whole page to chip->buffer->oob */ |
| 2343 | /* this include masked-value(0xFF) for unwritten subpages */ |
| 2344 | ecc_calc = chip->buffers->ecccalc; |
| 2345 | for (i = 0; i < chip->ecc.total; i++) |
| 2346 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 2347 | |
| 2348 | /* write OOB buffer to NAND device */ |
| 2349 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 2350 | |
| 2351 | return 0; |
| 2352 | } |
| 2353 | |
| 2354 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2355 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2356 | * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2357 | * @mtd: mtd info structure |
| 2358 | * @chip: nand chip info structure |
| 2359 | * @buf: data buffer |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2360 | * @oob_required: must write chip->oob_poi to OOB |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2361 | * @page: page number to write |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2362 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2363 | * The hw generator calculates the error syndrome automatically. Therefore we |
| 2364 | * need a special oob layout and handling. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2365 | */ |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2366 | static int nand_write_page_syndrome(struct mtd_info *mtd, |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2367 | struct nand_chip *chip, |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2368 | const uint8_t *buf, int oob_required, |
| 2369 | int page) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2370 | { |
| 2371 | int i, eccsize = chip->ecc.size; |
| 2372 | int eccbytes = chip->ecc.bytes; |
| 2373 | int eccsteps = chip->ecc.steps; |
| 2374 | const uint8_t *p = buf; |
| 2375 | uint8_t *oob = chip->oob_poi; |
| 2376 | |
| 2377 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 2378 | |
| 2379 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 2380 | chip->write_buf(mtd, p, eccsize); |
| 2381 | |
| 2382 | if (chip->ecc.prepad) { |
| 2383 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 2384 | oob += chip->ecc.prepad; |
| 2385 | } |
| 2386 | |
| 2387 | chip->ecc.calculate(mtd, p, oob); |
| 2388 | chip->write_buf(mtd, oob, eccbytes); |
| 2389 | oob += eccbytes; |
| 2390 | |
| 2391 | if (chip->ecc.postpad) { |
| 2392 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 2393 | oob += chip->ecc.postpad; |
| 2394 | } |
| 2395 | } |
| 2396 | |
| 2397 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 2398 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2399 | if (i) |
| 2400 | chip->write_buf(mtd, oob, i); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2401 | |
| 2402 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2403 | } |
| 2404 | |
| 2405 | /** |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2406 | * nand_write_page - [REPLACEABLE] write one page |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2407 | * @mtd: MTD device structure |
| 2408 | * @chip: NAND chip descriptor |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2409 | * @offset: address offset within the page |
| 2410 | * @data_len: length of actual data to be written |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2411 | * @buf: the data to write |
Brian Norris | 1fbb938 | 2012-05-02 10:14:55 -0700 | [diff] [blame] | 2412 | * @oob_required: must write chip->oob_poi to OOB |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2413 | * @page: page number to write |
| 2414 | * @cached: cached programming |
| 2415 | * @raw: use _raw version of write_page |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2416 | */ |
| 2417 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2418 | uint32_t offset, int data_len, const uint8_t *buf, |
| 2419 | int oob_required, int page, int cached, int raw) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2420 | { |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2421 | int status, subpage; |
| 2422 | |
| 2423 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && |
| 2424 | chip->ecc.write_subpage) |
| 2425 | subpage = offset || (data_len < mtd->writesize); |
| 2426 | else |
| 2427 | subpage = 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2428 | |
| 2429 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
| 2430 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2431 | if (unlikely(raw)) |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2432 | status = chip->ecc.write_page_raw(mtd, chip, buf, |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2433 | oob_required, page); |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2434 | else if (subpage) |
| 2435 | status = chip->ecc.write_subpage(mtd, chip, offset, data_len, |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2436 | buf, oob_required, page); |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 2437 | else |
Boris BREZILLON | 45aaeff | 2015-10-13 11:22:18 +0200 | [diff] [blame] | 2438 | status = chip->ecc.write_page(mtd, chip, buf, oob_required, |
| 2439 | page); |
Josh Wu | fdbad98d | 2012-06-25 18:07:45 +0800 | [diff] [blame] | 2440 | |
| 2441 | if (status < 0) |
| 2442 | return status; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2443 | |
| 2444 | /* |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2445 | * Cached progamming disabled for now. Not sure if it's worth the |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2446 | * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s). |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2447 | */ |
| 2448 | cached = 0; |
| 2449 | |
Artem Bityutskiy | 3239a6c | 2013-03-04 14:56:18 +0200 | [diff] [blame] | 2450 | if (!cached || !NAND_HAS_CACHEPROG(chip)) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2451 | |
| 2452 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2453 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2454 | /* |
| 2455 | * See if operation failed and additional status checks are |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2456 | * available. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2457 | */ |
| 2458 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 2459 | status = chip->errstat(mtd, chip, FL_WRITING, status, |
| 2460 | page); |
| 2461 | |
| 2462 | if (status & NAND_STATUS_FAIL) |
| 2463 | return -EIO; |
| 2464 | } else { |
| 2465 | chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2466 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2467 | } |
| 2468 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2469 | return 0; |
| 2470 | } |
| 2471 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2472 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2473 | * nand_fill_oob - [INTERN] Transfer client buffer to oob |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2474 | * @mtd: MTD device structure |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2475 | * @oob: oob data buffer |
| 2476 | * @len: oob data write length |
| 2477 | * @ops: oob ops structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2478 | */ |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2479 | static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len, |
| 2480 | struct mtd_oob_ops *ops) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2481 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 2482 | struct nand_chip *chip = mtd_to_nand(mtd); |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2483 | |
| 2484 | /* |
| 2485 | * Initialise to all 0xFF, to avoid the possibility of left over OOB |
| 2486 | * data from a previous OOB read. |
| 2487 | */ |
| 2488 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
| 2489 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2490 | switch (ops->mode) { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2491 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2492 | case MTD_OPS_PLACE_OOB: |
| 2493 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2494 | memcpy(chip->oob_poi + ops->ooboffs, oob, len); |
| 2495 | return oob + len; |
| 2496 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2497 | case MTD_OPS_AUTO_OOB: { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2498 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2499 | uint32_t boffs = 0, woffs = ops->ooboffs; |
| 2500 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2501 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2502 | for (; free->length && len; free++, len -= bytes) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2503 | /* Write request not from offset 0? */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2504 | if (unlikely(woffs)) { |
| 2505 | if (woffs >= free->length) { |
| 2506 | woffs -= free->length; |
| 2507 | continue; |
| 2508 | } |
| 2509 | boffs = free->offset + woffs; |
| 2510 | bytes = min_t(size_t, len, |
| 2511 | (free->length - woffs)); |
| 2512 | woffs = 0; |
| 2513 | } else { |
| 2514 | bytes = min_t(size_t, len, free->length); |
| 2515 | boffs = free->offset; |
| 2516 | } |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 2517 | memcpy(chip->oob_poi + boffs, oob, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2518 | oob += bytes; |
| 2519 | } |
| 2520 | return oob; |
| 2521 | } |
| 2522 | default: |
| 2523 | BUG(); |
| 2524 | } |
| 2525 | return NULL; |
| 2526 | } |
| 2527 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2528 | #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2529 | |
| 2530 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2531 | * nand_do_write_ops - [INTERN] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2532 | * @mtd: MTD device structure |
| 2533 | * @to: offset to write to |
| 2534 | * @ops: oob operations description structure |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2535 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2536 | * NAND write with ECC. |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2537 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2538 | static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, |
| 2539 | struct mtd_oob_ops *ops) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2540 | { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2541 | int chipnr, realpage, page, blockmask, column; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 2542 | struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2543 | uint32_t writelen = ops->len; |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2544 | |
| 2545 | uint32_t oobwritelen = ops->ooblen; |
Boris BREZILLON | 29f1058 | 2016-03-07 10:46:52 +0100 | [diff] [blame] | 2546 | uint32_t oobmaxlen = mtd_oobavail(mtd, ops); |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2547 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2548 | uint8_t *oob = ops->oobbuf; |
| 2549 | uint8_t *buf = ops->datbuf; |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2550 | int ret; |
Brian Norris | e47f3db | 2012-05-02 10:14:56 -0700 | [diff] [blame] | 2551 | int oob_required = oob ? 1 : 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2552 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2553 | ops->retlen = 0; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2554 | if (!writelen) |
| 2555 | return 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2556 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2557 | /* Reject writes, which are not page aligned */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2558 | if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 2559 | pr_notice("%s: attempt to write non page aligned data\n", |
| 2560 | __func__); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2561 | return -EINVAL; |
| 2562 | } |
| 2563 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2564 | column = to & (mtd->writesize - 1); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2565 | |
Thomas Gleixner | 6a93096 | 2006-06-28 00:11:45 +0200 | [diff] [blame] | 2566 | chipnr = (int)(to >> chip->chip_shift); |
| 2567 | chip->select_chip(mtd, chipnr); |
| 2568 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2569 | /* Check, if it is write protected */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2570 | if (nand_check_wp(mtd)) { |
| 2571 | ret = -EIO; |
| 2572 | goto err_out; |
| 2573 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2574 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2575 | realpage = (int)(to >> chip->page_shift); |
| 2576 | page = realpage & chip->pagemask; |
| 2577 | blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 2578 | |
| 2579 | /* Invalidate the page cache, when we write to the cached page */ |
Brian Norris | 537ab1b | 2014-07-21 19:08:03 -0700 | [diff] [blame] | 2580 | if (to <= ((loff_t)chip->pagebuf << chip->page_shift) && |
| 2581 | ((loff_t)chip->pagebuf << chip->page_shift) < (to + ops->len)) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2582 | chip->pagebuf = -1; |
| 2583 | |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2584 | /* Don't allow multipage oob writes with offset */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2585 | if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) { |
| 2586 | ret = -EINVAL; |
| 2587 | goto err_out; |
| 2588 | } |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2589 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2590 | while (1) { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2591 | int bytes = mtd->writesize; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2592 | int cached = writelen > bytes && page != blockmask; |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2593 | uint8_t *wbuf = buf; |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 2594 | int use_bufpoi; |
| 2595 | int part_pagewr = (column || writelen < (mtd->writesize - 1)); |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2596 | |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 2597 | if (part_pagewr) |
| 2598 | use_bufpoi = 1; |
| 2599 | else if (chip->options & NAND_USE_BOUNCE_BUFFER) |
| 2600 | use_bufpoi = !virt_addr_valid(buf); |
| 2601 | else |
| 2602 | use_bufpoi = 0; |
| 2603 | |
| 2604 | /* Partial page write?, or need to use bounce buffer */ |
| 2605 | if (use_bufpoi) { |
| 2606 | pr_debug("%s: using write bounce buffer for buf@%p\n", |
| 2607 | __func__, buf); |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2608 | cached = 0; |
Kamal Dasu | 66507c7 | 2014-05-01 20:51:19 -0400 | [diff] [blame] | 2609 | if (part_pagewr) |
| 2610 | bytes = min_t(int, bytes - column, writelen); |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2611 | chip->pagebuf = -1; |
| 2612 | memset(chip->buffers->databuf, 0xff, mtd->writesize); |
| 2613 | memcpy(&chip->buffers->databuf[column], buf, bytes); |
| 2614 | wbuf = chip->buffers->databuf; |
| 2615 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2616 | |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2617 | if (unlikely(oob)) { |
| 2618 | size_t len = min(oobwritelen, oobmaxlen); |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2619 | oob = nand_fill_oob(mtd, oob, len, ops); |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2620 | oobwritelen -= len; |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2621 | } else { |
| 2622 | /* We still need to erase leftover OOB data */ |
| 2623 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
Maxim Levitsky | 782ce79 | 2010-02-22 20:39:36 +0200 | [diff] [blame] | 2624 | } |
Gupta, Pekon | 837a6ba | 2013-03-15 17:55:53 +0530 | [diff] [blame] | 2625 | ret = chip->write_page(mtd, chip, column, bytes, wbuf, |
| 2626 | oob_required, page, cached, |
| 2627 | (ops->mode == MTD_OPS_RAW)); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2628 | if (ret) |
| 2629 | break; |
| 2630 | |
| 2631 | writelen -= bytes; |
| 2632 | if (!writelen) |
| 2633 | break; |
| 2634 | |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 2635 | column = 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2636 | buf += bytes; |
| 2637 | realpage++; |
| 2638 | |
| 2639 | page = realpage & chip->pagemask; |
| 2640 | /* Check, if we cross a chip boundary */ |
| 2641 | if (!page) { |
| 2642 | chipnr++; |
| 2643 | chip->select_chip(mtd, -1); |
| 2644 | chip->select_chip(mtd, chipnr); |
| 2645 | } |
| 2646 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2647 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2648 | ops->retlen = ops->len - writelen; |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2649 | if (unlikely(oob)) |
| 2650 | ops->oobretlen = ops->ooblen; |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2651 | |
| 2652 | err_out: |
| 2653 | chip->select_chip(mtd, -1); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2654 | return ret; |
| 2655 | } |
| 2656 | |
| 2657 | /** |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2658 | * panic_nand_write - [MTD Interface] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2659 | * @mtd: MTD device structure |
| 2660 | * @to: offset to write to |
| 2661 | * @len: number of bytes to write |
| 2662 | * @retlen: pointer to variable to store the number of written bytes |
| 2663 | * @buf: the data to write |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2664 | * |
| 2665 | * NAND write with ECC. Used when performing writes in interrupt context, this |
| 2666 | * may for example be called by mtdoops when writing an oops while in panic. |
| 2667 | */ |
| 2668 | static int panic_nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 2669 | size_t *retlen, const uint8_t *buf) |
| 2670 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 2671 | struct nand_chip *chip = mtd_to_nand(mtd); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2672 | struct mtd_oob_ops ops; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2673 | int ret; |
| 2674 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2675 | /* Wait for the device to get ready */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2676 | panic_nand_wait(mtd, chip, 400); |
| 2677 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2678 | /* Grab the device */ |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2679 | panic_nand_get_device(chip, mtd, FL_WRITING); |
| 2680 | |
Brian Norris | 0ec56dc | 2015-02-28 02:02:30 -0800 | [diff] [blame] | 2681 | memset(&ops, 0, sizeof(ops)); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2682 | ops.len = len; |
| 2683 | ops.datbuf = (uint8_t *)buf; |
Huang Shijie | 11041ae | 2012-07-03 16:44:14 +0800 | [diff] [blame] | 2684 | ops.mode = MTD_OPS_PLACE_OOB; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2685 | |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2686 | ret = nand_do_write_ops(mtd, to, &ops); |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2687 | |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2688 | *retlen = ops.retlen; |
Simon Kagstrom | 2af7c65 | 2009-10-05 15:55:52 +0200 | [diff] [blame] | 2689 | return ret; |
| 2690 | } |
| 2691 | |
| 2692 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2693 | * nand_write - [MTD Interface] NAND write with ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2694 | * @mtd: MTD device structure |
| 2695 | * @to: offset to write to |
| 2696 | * @len: number of bytes to write |
| 2697 | * @retlen: pointer to variable to store the number of written bytes |
| 2698 | * @buf: the data to write |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2699 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2700 | * NAND write with ECC. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2701 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2702 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2703 | size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2704 | { |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2705 | struct mtd_oob_ops ops; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2706 | int ret; |
| 2707 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2708 | nand_get_device(mtd, FL_WRITING); |
Brian Norris | 0ec56dc | 2015-02-28 02:02:30 -0800 | [diff] [blame] | 2709 | memset(&ops, 0, sizeof(ops)); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2710 | ops.len = len; |
| 2711 | ops.datbuf = (uint8_t *)buf; |
Huang Shijie | 11041ae | 2012-07-03 16:44:14 +0800 | [diff] [blame] | 2712 | ops.mode = MTD_OPS_PLACE_OOB; |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2713 | ret = nand_do_write_ops(mtd, to, &ops); |
Brian Norris | 4a89ff8 | 2011-08-30 18:45:45 -0700 | [diff] [blame] | 2714 | *retlen = ops.retlen; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2715 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2716 | return ret; |
| 2717 | } |
| 2718 | |
| 2719 | /** |
| 2720 | * nand_do_write_oob - [MTD Interface] NAND write out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2721 | * @mtd: MTD device structure |
| 2722 | * @to: offset to write to |
| 2723 | * @ops: oob operation description structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2724 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2725 | * NAND write out-of-band. |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2726 | */ |
| 2727 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 2728 | struct mtd_oob_ops *ops) |
| 2729 | { |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2730 | int chipnr, page, status, len; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 2731 | struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2732 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2733 | pr_debug("%s: to = 0x%08x, len = %i\n", |
vimal singh | 20d8e24 | 2009-07-07 15:49:49 +0530 | [diff] [blame] | 2734 | __func__, (unsigned int)to, (int)ops->ooblen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2735 | |
Boris BREZILLON | 29f1058 | 2016-03-07 10:46:52 +0100 | [diff] [blame] | 2736 | len = mtd_oobavail(mtd, ops); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2737 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2738 | /* Do not allow write past end of page */ |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2739 | if ((ops->ooboffs + ops->ooblen) > len) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2740 | pr_debug("%s: attempt to write past end of page\n", |
| 2741 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2742 | return -EINVAL; |
| 2743 | } |
| 2744 | |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2745 | if (unlikely(ops->ooboffs >= len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2746 | pr_debug("%s: attempt to start write outside oob\n", |
| 2747 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2748 | return -EINVAL; |
| 2749 | } |
| 2750 | |
Jason Liu | 775adc3 | 2011-02-25 13:06:18 +0800 | [diff] [blame] | 2751 | /* Do not allow write past end of device */ |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2752 | if (unlikely(to >= mtd->size || |
| 2753 | ops->ooboffs + ops->ooblen > |
| 2754 | ((mtd->size >> chip->page_shift) - |
| 2755 | (to >> chip->page_shift)) * len)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2756 | pr_debug("%s: attempt to write beyond end of device\n", |
| 2757 | __func__); |
Adrian Hunter | 0373615 | 2007-01-31 17:58:29 +0200 | [diff] [blame] | 2758 | return -EINVAL; |
| 2759 | } |
| 2760 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2761 | chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2762 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2763 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 2764 | /* Shift to get page */ |
| 2765 | page = (int)(to >> chip->page_shift); |
| 2766 | |
| 2767 | /* |
| 2768 | * Reset the chip. Some chips (like the Toshiba TC5832DC found in one |
| 2769 | * of my DiskOnChip 2000 test units) will clear the whole data page too |
| 2770 | * if we don't do this. I have no clue why, but I seem to have 'fixed' |
| 2771 | * it in the doc2000 driver in August 1999. dwmw2. |
| 2772 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2773 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2774 | |
| 2775 | /* Check, if it is write protected */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2776 | if (nand_check_wp(mtd)) { |
| 2777 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2778 | return -EROFS; |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2779 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2780 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2781 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2782 | if (page == chip->pagebuf) |
| 2783 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2784 | |
THOMSON, Adam (Adam) | f722013 | 2011-06-14 16:52:38 +0200 | [diff] [blame] | 2785 | nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops); |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 2786 | |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2787 | if (ops->mode == MTD_OPS_RAW) |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 2788 | status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask); |
| 2789 | else |
| 2790 | status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2791 | |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2792 | chip->select_chip(mtd, -1); |
| 2793 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2794 | if (status) |
| 2795 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2796 | |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2797 | ops->oobretlen = ops->ooblen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2798 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2799 | return 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2800 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2801 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2802 | /** |
| 2803 | * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2804 | * @mtd: MTD device structure |
| 2805 | * @to: offset to write to |
| 2806 | * @ops: oob operation description structure |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2807 | */ |
| 2808 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, |
| 2809 | struct mtd_oob_ops *ops) |
| 2810 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2811 | int ret = -ENOTSUPP; |
| 2812 | |
| 2813 | ops->retlen = 0; |
| 2814 | |
| 2815 | /* Do not allow writes past end of device */ |
Vitaly Wool | 7014568 | 2006-11-03 18:20:38 +0300 | [diff] [blame] | 2816 | if (ops->datbuf && (to + ops->len) > mtd->size) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2817 | pr_debug("%s: attempt to write beyond end of device\n", |
| 2818 | __func__); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2819 | return -EINVAL; |
| 2820 | } |
| 2821 | |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2822 | nand_get_device(mtd, FL_WRITING); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2823 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 2824 | switch (ops->mode) { |
Brian Norris | 0612b9d | 2011-08-30 18:45:40 -0700 | [diff] [blame] | 2825 | case MTD_OPS_PLACE_OOB: |
| 2826 | case MTD_OPS_AUTO_OOB: |
| 2827 | case MTD_OPS_RAW: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2828 | break; |
| 2829 | |
| 2830 | default: |
| 2831 | goto out; |
| 2832 | } |
| 2833 | |
| 2834 | if (!ops->datbuf) |
| 2835 | ret = nand_do_write_oob(mtd, to, ops); |
| 2836 | else |
| 2837 | ret = nand_do_write_ops(mtd, to, ops); |
| 2838 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2839 | out: |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2840 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2841 | return ret; |
| 2842 | } |
| 2843 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2844 | /** |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2845 | * single_erase - [GENERIC] NAND standard block erase command function |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2846 | * @mtd: MTD device structure |
| 2847 | * @page: the page address of the block which will be erased |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2848 | * |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2849 | * Standard erase command for NAND chips. Returns NAND status. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2850 | */ |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2851 | static int single_erase(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2852 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 2853 | struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2854 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2855 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 2856 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2857 | |
| 2858 | return chip->waitfunc(mtd, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2859 | } |
| 2860 | |
| 2861 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2862 | * nand_erase - [MTD Interface] erase block(s) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2863 | * @mtd: MTD device structure |
| 2864 | * @instr: erase instruction |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2865 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2866 | * Erase one ore more blocks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2867 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2868 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2869 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2870 | return nand_erase_nand(mtd, instr, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2871 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2872 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2873 | /** |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 2874 | * nand_erase_nand - [INTERN] erase block(s) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2875 | * @mtd: MTD device structure |
| 2876 | * @instr: erase instruction |
| 2877 | * @allowbbt: allow erasing the bbt area |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2878 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2879 | * Erase one ore more blocks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2880 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2881 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, |
| 2882 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2883 | { |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2884 | int page, status, pages_per_block, ret, chipnr; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 2885 | struct nand_chip *chip = mtd_to_nand(mtd); |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2886 | loff_t len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2887 | |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2888 | pr_debug("%s: start = 0x%012llx, len = %llu\n", |
| 2889 | __func__, (unsigned long long)instr->addr, |
| 2890 | (unsigned long long)instr->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2891 | |
Vimal Singh | 6fe5a6a | 2010-02-03 14:12:24 +0530 | [diff] [blame] | 2892 | if (check_offs_len(mtd, instr->addr, instr->len)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2893 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2894 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2895 | /* Grab the lock and see if the device is available */ |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2896 | nand_get_device(mtd, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2897 | |
| 2898 | /* Shift to get first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2899 | page = (int)(instr->addr >> chip->page_shift); |
| 2900 | chipnr = (int)(instr->addr >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2901 | |
| 2902 | /* Calculate pages in each block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2903 | pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2904 | |
| 2905 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2906 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2907 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2908 | /* Check, if it is write protected */ |
| 2909 | if (nand_check_wp(mtd)) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2910 | pr_debug("%s: device is write protected!\n", |
| 2911 | __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2912 | instr->state = MTD_ERASE_FAILED; |
| 2913 | goto erase_exit; |
| 2914 | } |
| 2915 | |
| 2916 | /* Loop through the pages */ |
| 2917 | len = instr->len; |
| 2918 | |
| 2919 | instr->state = MTD_ERASING; |
| 2920 | |
| 2921 | while (len) { |
Wolfram Sang | 12183a2 | 2011-12-21 23:01:20 +0100 | [diff] [blame] | 2922 | /* Check if we have a bad block, we do not erase bad blocks! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2923 | if (nand_block_checkbad(mtd, ((loff_t) page) << |
Archit Taneja | 9f3e042 | 2016-02-03 14:29:49 +0530 | [diff] [blame] | 2924 | chip->page_shift, allowbbt)) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 2925 | pr_warn("%s: attempt to erase a bad block at page 0x%08x\n", |
| 2926 | __func__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2927 | instr->state = MTD_ERASE_FAILED; |
| 2928 | goto erase_exit; |
| 2929 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2930 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2931 | /* |
| 2932 | * Invalidate the page cache, if we erase the block which |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2933 | * contains the current cached page. |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2934 | */ |
| 2935 | if (page <= chip->pagebuf && chip->pagebuf < |
| 2936 | (page + pages_per_block)) |
| 2937 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2938 | |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 2939 | status = chip->erase(mtd, page & chip->pagemask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2940 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2941 | /* |
| 2942 | * See if operation failed and additional status checks are |
| 2943 | * available |
| 2944 | */ |
| 2945 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 2946 | status = chip->errstat(mtd, chip, FL_ERASING, |
| 2947 | status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 2948 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2949 | /* See if block erase succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 2950 | if (status & NAND_STATUS_FAIL) { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2951 | pr_debug("%s: failed erase, page 0x%08x\n", |
| 2952 | __func__, page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2953 | instr->state = MTD_ERASE_FAILED; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 2954 | instr->fail_addr = |
| 2955 | ((loff_t)page << chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2956 | goto erase_exit; |
| 2957 | } |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2958 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2959 | /* Increment page address and decrement length */ |
Dan Carpenter | daae74c | 2013-08-09 12:49:05 +0300 | [diff] [blame] | 2960 | len -= (1ULL << chip->phys_erase_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2961 | page += pages_per_block; |
| 2962 | |
| 2963 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2964 | if (len && !(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2965 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2966 | chip->select_chip(mtd, -1); |
| 2967 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2968 | } |
| 2969 | } |
| 2970 | instr->state = MTD_ERASE_DONE; |
| 2971 | |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 2972 | erase_exit: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2973 | |
| 2974 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2975 | |
| 2976 | /* Deselect and wake up anyone waiting on the device */ |
Huang Shijie | b0bb690 | 2012-11-19 14:43:29 +0800 | [diff] [blame] | 2977 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2978 | nand_release_device(mtd); |
| 2979 | |
David Woodhouse | 49defc0 | 2007-10-06 15:01:59 -0400 | [diff] [blame] | 2980 | /* Do call back function */ |
| 2981 | if (!ret) |
| 2982 | mtd_erase_callback(instr); |
| 2983 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2984 | /* Return more or less happy */ |
| 2985 | return ret; |
| 2986 | } |
| 2987 | |
| 2988 | /** |
| 2989 | * nand_sync - [MTD Interface] sync |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2990 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2991 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 2992 | * Sync is actually a wait for chip ready function. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2993 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2994 | static void nand_sync(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2995 | { |
Brian Norris | 289c052 | 2011-07-19 10:06:09 -0700 | [diff] [blame] | 2996 | pr_debug("%s: called\n", __func__); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2997 | |
| 2998 | /* Grab the lock and see if the device is available */ |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 2999 | nand_get_device(mtd, FL_SYNCING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3000 | /* Release it and go back */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3001 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3002 | } |
| 3003 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3004 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3005 | * nand_block_isbad - [MTD Interface] Check if block at offset is bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3006 | * @mtd: MTD device structure |
| 3007 | * @offs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3008 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3009 | static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3010 | { |
Archit Taneja | 9f3e042 | 2016-02-03 14:29:49 +0530 | [diff] [blame] | 3011 | struct nand_chip *chip = mtd_to_nand(mtd); |
| 3012 | int chipnr = (int)(offs >> chip->chip_shift); |
| 3013 | int ret; |
| 3014 | |
| 3015 | /* Select the NAND device */ |
| 3016 | nand_get_device(mtd, FL_READING); |
| 3017 | chip->select_chip(mtd, chipnr); |
| 3018 | |
| 3019 | ret = nand_block_checkbad(mtd, offs, 0); |
| 3020 | |
| 3021 | chip->select_chip(mtd, -1); |
| 3022 | nand_release_device(mtd); |
| 3023 | |
| 3024 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3025 | } |
| 3026 | |
| 3027 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3028 | * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3029 | * @mtd: MTD device structure |
| 3030 | * @ofs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3031 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3032 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3033 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3034 | int ret; |
| 3035 | |
Florian Fainelli | f8ac041 | 2010-09-07 13:23:43 +0200 | [diff] [blame] | 3036 | ret = nand_block_isbad(mtd, ofs); |
| 3037 | if (ret) { |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3038 | /* If it was bad already, return success and do nothing */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3039 | if (ret > 0) |
| 3040 | return 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 3041 | return ret; |
| 3042 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3043 | |
Brian Norris | 5a0edb2 | 2013-07-30 17:52:58 -0700 | [diff] [blame] | 3044 | return nand_block_markbad_lowlevel(mtd, ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3045 | } |
| 3046 | |
| 3047 | /** |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 3048 | * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand |
| 3049 | * @mtd: MTD device structure |
| 3050 | * @chip: nand chip info structure |
| 3051 | * @addr: feature address. |
| 3052 | * @subfeature_param: the subfeature parameters, a four bytes array. |
| 3053 | */ |
| 3054 | static int nand_onfi_set_features(struct mtd_info *mtd, struct nand_chip *chip, |
| 3055 | int addr, uint8_t *subfeature_param) |
| 3056 | { |
| 3057 | int status; |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 3058 | int i; |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 3059 | |
David Mosberger | d914c93 | 2013-05-29 15:30:13 +0300 | [diff] [blame] | 3060 | if (!chip->onfi_version || |
| 3061 | !(le16_to_cpu(chip->onfi_params.opt_cmd) |
| 3062 | & ONFI_OPT_CMD_SET_GET_FEATURES)) |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 3063 | return -EINVAL; |
| 3064 | |
| 3065 | chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1); |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 3066 | for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i) |
| 3067 | chip->write_byte(mtd, subfeature_param[i]); |
| 3068 | |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 3069 | status = chip->waitfunc(mtd, chip); |
| 3070 | if (status & NAND_STATUS_FAIL) |
| 3071 | return -EIO; |
| 3072 | return 0; |
| 3073 | } |
| 3074 | |
| 3075 | /** |
| 3076 | * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand |
| 3077 | * @mtd: MTD device structure |
| 3078 | * @chip: nand chip info structure |
| 3079 | * @addr: feature address. |
| 3080 | * @subfeature_param: the subfeature parameters, a four bytes array. |
| 3081 | */ |
| 3082 | static int nand_onfi_get_features(struct mtd_info *mtd, struct nand_chip *chip, |
| 3083 | int addr, uint8_t *subfeature_param) |
| 3084 | { |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 3085 | int i; |
| 3086 | |
David Mosberger | d914c93 | 2013-05-29 15:30:13 +0300 | [diff] [blame] | 3087 | if (!chip->onfi_version || |
| 3088 | !(le16_to_cpu(chip->onfi_params.opt_cmd) |
| 3089 | & ONFI_OPT_CMD_SET_GET_FEATURES)) |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 3090 | return -EINVAL; |
| 3091 | |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 3092 | chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1); |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 3093 | for (i = 0; i < ONFI_SUBFEATURE_PARAM_LEN; ++i) |
| 3094 | *subfeature_param++ = chip->read_byte(mtd); |
Huang Shijie | 7db03ec | 2012-09-13 14:57:52 +0800 | [diff] [blame] | 3095 | return 0; |
| 3096 | } |
| 3097 | |
| 3098 | /** |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 3099 | * nand_suspend - [MTD Interface] Suspend the NAND flash |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3100 | * @mtd: MTD device structure |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 3101 | */ |
| 3102 | static int nand_suspend(struct mtd_info *mtd) |
| 3103 | { |
Huang Shijie | 6a8214a | 2012-11-19 14:43:30 +0800 | [diff] [blame] | 3104 | return nand_get_device(mtd, FL_PM_SUSPENDED); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 3105 | } |
| 3106 | |
| 3107 | /** |
| 3108 | * nand_resume - [MTD Interface] Resume the NAND flash |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3109 | * @mtd: MTD device structure |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 3110 | */ |
| 3111 | static void nand_resume(struct mtd_info *mtd) |
| 3112 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 3113 | struct nand_chip *chip = mtd_to_nand(mtd); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 3114 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3115 | if (chip->state == FL_PM_SUSPENDED) |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 3116 | nand_release_device(mtd); |
| 3117 | else |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3118 | pr_err("%s called for a chip which is not in suspended state\n", |
| 3119 | __func__); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 3120 | } |
| 3121 | |
Scott Branden | 72ea403 | 2014-11-20 11:18:05 -0800 | [diff] [blame] | 3122 | /** |
| 3123 | * nand_shutdown - [MTD Interface] Finish the current NAND operation and |
| 3124 | * prevent further operations |
| 3125 | * @mtd: MTD device structure |
| 3126 | */ |
| 3127 | static void nand_shutdown(struct mtd_info *mtd) |
| 3128 | { |
Brian Norris | 9ca641b | 2015-11-09 16:37:28 -0800 | [diff] [blame] | 3129 | nand_get_device(mtd, FL_PM_SUSPENDED); |
Scott Branden | 72ea403 | 2014-11-20 11:18:05 -0800 | [diff] [blame] | 3130 | } |
| 3131 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3132 | /* Set default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3133 | static void nand_set_defaults(struct nand_chip *chip, int busw) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3134 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3135 | /* check for proper chip_delay setup, set 20us if not */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3136 | if (!chip->chip_delay) |
| 3137 | chip->chip_delay = 20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3138 | |
| 3139 | /* check, if a user supplied command function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3140 | if (chip->cmdfunc == NULL) |
| 3141 | chip->cmdfunc = nand_command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3142 | |
| 3143 | /* check, if a user supplied wait function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3144 | if (chip->waitfunc == NULL) |
| 3145 | chip->waitfunc = nand_wait; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3146 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3147 | if (!chip->select_chip) |
| 3148 | chip->select_chip = nand_select_chip; |
Brian Norris | 68e8078 | 2013-07-18 01:17:02 -0700 | [diff] [blame] | 3149 | |
Huang Shijie | 4204ccc | 2013-08-16 10:10:07 +0800 | [diff] [blame] | 3150 | /* set for ONFI nand */ |
| 3151 | if (!chip->onfi_set_features) |
| 3152 | chip->onfi_set_features = nand_onfi_set_features; |
| 3153 | if (!chip->onfi_get_features) |
| 3154 | chip->onfi_get_features = nand_onfi_get_features; |
| 3155 | |
Brian Norris | 68e8078 | 2013-07-18 01:17:02 -0700 | [diff] [blame] | 3156 | /* If called twice, pointers that depend on busw may need to be reset */ |
| 3157 | if (!chip->read_byte || chip->read_byte == nand_read_byte) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3158 | chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; |
| 3159 | if (!chip->read_word) |
| 3160 | chip->read_word = nand_read_word; |
| 3161 | if (!chip->block_bad) |
| 3162 | chip->block_bad = nand_block_bad; |
| 3163 | if (!chip->block_markbad) |
| 3164 | chip->block_markbad = nand_default_block_markbad; |
Brian Norris | 68e8078 | 2013-07-18 01:17:02 -0700 | [diff] [blame] | 3165 | if (!chip->write_buf || chip->write_buf == nand_write_buf) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3166 | chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; |
Uwe Kleine-König | 05f7835 | 2013-12-05 22:22:04 +0100 | [diff] [blame] | 3167 | if (!chip->write_byte || chip->write_byte == nand_write_byte) |
| 3168 | chip->write_byte = busw ? nand_write_byte16 : nand_write_byte; |
Brian Norris | 68e8078 | 2013-07-18 01:17:02 -0700 | [diff] [blame] | 3169 | if (!chip->read_buf || chip->read_buf == nand_read_buf) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3170 | chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3171 | if (!chip->scan_bbt) |
| 3172 | chip->scan_bbt = nand_default_bbt; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 3173 | |
| 3174 | if (!chip->controller) { |
| 3175 | chip->controller = &chip->hwcontrol; |
| 3176 | spin_lock_init(&chip->controller->lock); |
| 3177 | init_waitqueue_head(&chip->controller->wq); |
| 3178 | } |
| 3179 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3180 | } |
| 3181 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3182 | /* Sanitize ONFI strings so we can safely print them */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3183 | static void sanitize_string(uint8_t *s, size_t len) |
| 3184 | { |
| 3185 | ssize_t i; |
| 3186 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3187 | /* Null terminate */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3188 | s[len - 1] = 0; |
| 3189 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3190 | /* Remove non printable chars */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3191 | for (i = 0; i < len - 1; i++) { |
| 3192 | if (s[i] < ' ' || s[i] > 127) |
| 3193 | s[i] = '?'; |
| 3194 | } |
| 3195 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3196 | /* Remove trailing spaces */ |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3197 | strim(s); |
| 3198 | } |
| 3199 | |
| 3200 | static u16 onfi_crc16(u16 crc, u8 const *p, size_t len) |
| 3201 | { |
| 3202 | int i; |
| 3203 | while (len--) { |
| 3204 | crc ^= *p++ << 8; |
| 3205 | for (i = 0; i < 8; i++) |
| 3206 | crc = (crc << 1) ^ ((crc & 0x8000) ? 0x8005 : 0); |
| 3207 | } |
| 3208 | |
| 3209 | return crc; |
| 3210 | } |
| 3211 | |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3212 | /* Parse the Extended Parameter Page. */ |
| 3213 | static int nand_flash_detect_ext_param_page(struct mtd_info *mtd, |
| 3214 | struct nand_chip *chip, struct nand_onfi_params *p) |
| 3215 | { |
| 3216 | struct onfi_ext_param_page *ep; |
| 3217 | struct onfi_ext_section *s; |
| 3218 | struct onfi_ext_ecc_info *ecc; |
| 3219 | uint8_t *cursor; |
| 3220 | int ret = -EINVAL; |
| 3221 | int len; |
| 3222 | int i; |
| 3223 | |
| 3224 | len = le16_to_cpu(p->ext_param_page_length) * 16; |
| 3225 | ep = kmalloc(len, GFP_KERNEL); |
Brian Norris | 5cb1327 | 2013-09-16 17:59:20 -0700 | [diff] [blame] | 3226 | if (!ep) |
| 3227 | return -ENOMEM; |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3228 | |
| 3229 | /* Send our own NAND_CMD_PARAM. */ |
| 3230 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); |
| 3231 | |
| 3232 | /* Use the Change Read Column command to skip the ONFI param pages. */ |
| 3233 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, |
| 3234 | sizeof(*p) * p->num_of_param_pages , -1); |
| 3235 | |
| 3236 | /* Read out the Extended Parameter Page. */ |
| 3237 | chip->read_buf(mtd, (uint8_t *)ep, len); |
| 3238 | if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2) |
| 3239 | != le16_to_cpu(ep->crc))) { |
| 3240 | pr_debug("fail in the CRC.\n"); |
| 3241 | goto ext_out; |
| 3242 | } |
| 3243 | |
| 3244 | /* |
| 3245 | * Check the signature. |
| 3246 | * Do not strictly follow the ONFI spec, maybe changed in future. |
| 3247 | */ |
| 3248 | if (strncmp(ep->sig, "EPPS", 4)) { |
| 3249 | pr_debug("The signature is invalid.\n"); |
| 3250 | goto ext_out; |
| 3251 | } |
| 3252 | |
| 3253 | /* find the ECC section. */ |
| 3254 | cursor = (uint8_t *)(ep + 1); |
| 3255 | for (i = 0; i < ONFI_EXT_SECTION_MAX; i++) { |
| 3256 | s = ep->sections + i; |
| 3257 | if (s->type == ONFI_SECTION_TYPE_2) |
| 3258 | break; |
| 3259 | cursor += s->length * 16; |
| 3260 | } |
| 3261 | if (i == ONFI_EXT_SECTION_MAX) { |
| 3262 | pr_debug("We can not find the ECC section.\n"); |
| 3263 | goto ext_out; |
| 3264 | } |
| 3265 | |
| 3266 | /* get the info we want. */ |
| 3267 | ecc = (struct onfi_ext_ecc_info *)cursor; |
| 3268 | |
Brian Norris | 4ae7d22 | 2013-09-16 18:20:21 -0700 | [diff] [blame] | 3269 | if (!ecc->codeword_size) { |
| 3270 | pr_debug("Invalid codeword size\n"); |
| 3271 | goto ext_out; |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3272 | } |
| 3273 | |
Brian Norris | 4ae7d22 | 2013-09-16 18:20:21 -0700 | [diff] [blame] | 3274 | chip->ecc_strength_ds = ecc->ecc_bits; |
| 3275 | chip->ecc_step_ds = 1 << ecc->codeword_size; |
Brian Norris | 5cb1327 | 2013-09-16 17:59:20 -0700 | [diff] [blame] | 3276 | ret = 0; |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3277 | |
| 3278 | ext_out: |
| 3279 | kfree(ep); |
| 3280 | return ret; |
| 3281 | } |
| 3282 | |
Brian Norris | 8429bb3 | 2013-12-03 15:51:09 -0800 | [diff] [blame] | 3283 | static int nand_setup_read_retry_micron(struct mtd_info *mtd, int retry_mode) |
| 3284 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 3285 | struct nand_chip *chip = mtd_to_nand(mtd); |
Brian Norris | 8429bb3 | 2013-12-03 15:51:09 -0800 | [diff] [blame] | 3286 | uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode}; |
| 3287 | |
| 3288 | return chip->onfi_set_features(mtd, chip, ONFI_FEATURE_ADDR_READ_RETRY, |
| 3289 | feature); |
| 3290 | } |
| 3291 | |
| 3292 | /* |
| 3293 | * Configure chip properties from Micron vendor-specific ONFI table |
| 3294 | */ |
| 3295 | static void nand_onfi_detect_micron(struct nand_chip *chip, |
| 3296 | struct nand_onfi_params *p) |
| 3297 | { |
| 3298 | struct nand_onfi_vendor_micron *micron = (void *)p->vendor; |
| 3299 | |
| 3300 | if (le16_to_cpu(p->vendor_revision) < 1) |
| 3301 | return; |
| 3302 | |
| 3303 | chip->read_retries = micron->read_retry_options; |
| 3304 | chip->setup_read_retry = nand_setup_read_retry_micron; |
| 3305 | } |
| 3306 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3307 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3308 | * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise. |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3309 | */ |
| 3310 | static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip, |
Matthieu CASTET | 08c248f | 2011-06-26 18:26:55 +0200 | [diff] [blame] | 3311 | int *busw) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3312 | { |
| 3313 | struct nand_onfi_params *p = &chip->onfi_params; |
Brian Norris | bd9c6e9 | 2013-11-29 22:04:28 -0800 | [diff] [blame] | 3314 | int i, j; |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3315 | int val; |
| 3316 | |
Brian Norris | 7854d3f | 2011-06-23 14:12:08 -0700 | [diff] [blame] | 3317 | /* Try ONFI for unknown chip or LP */ |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3318 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); |
| 3319 | if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || |
| 3320 | chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') |
| 3321 | return 0; |
| 3322 | |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3323 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); |
| 3324 | for (i = 0; i < 3; i++) { |
Brian Norris | bd9c6e9 | 2013-11-29 22:04:28 -0800 | [diff] [blame] | 3325 | for (j = 0; j < sizeof(*p); j++) |
| 3326 | ((uint8_t *)p)[j] = chip->read_byte(mtd); |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3327 | if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 254) == |
| 3328 | le16_to_cpu(p->crc)) { |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3329 | break; |
| 3330 | } |
| 3331 | } |
| 3332 | |
Brian Norris | c7f23a7 | 2013-08-13 10:51:55 -0700 | [diff] [blame] | 3333 | if (i == 3) { |
| 3334 | pr_err("Could not find valid ONFI parameter page; aborting\n"); |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3335 | return 0; |
Brian Norris | c7f23a7 | 2013-08-13 10:51:55 -0700 | [diff] [blame] | 3336 | } |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3337 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3338 | /* Check version */ |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3339 | val = le16_to_cpu(p->revision); |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 3340 | if (val & (1 << 5)) |
| 3341 | chip->onfi_version = 23; |
| 3342 | else if (val & (1 << 4)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3343 | chip->onfi_version = 22; |
| 3344 | else if (val & (1 << 3)) |
| 3345 | chip->onfi_version = 21; |
| 3346 | else if (val & (1 << 2)) |
| 3347 | chip->onfi_version = 20; |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 3348 | else if (val & (1 << 1)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3349 | chip->onfi_version = 10; |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 3350 | |
| 3351 | if (!chip->onfi_version) { |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 3352 | pr_info("unsupported ONFI version: %d\n", val); |
Brian Norris | b7b1a29 | 2010-12-12 00:23:33 -0800 | [diff] [blame] | 3353 | return 0; |
| 3354 | } |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3355 | |
| 3356 | sanitize_string(p->manufacturer, sizeof(p->manufacturer)); |
| 3357 | sanitize_string(p->model, sizeof(p->model)); |
| 3358 | if (!mtd->name) |
| 3359 | mtd->name = p->model; |
Brian Norris | 4355b70 | 2013-08-27 18:45:10 -0700 | [diff] [blame] | 3360 | |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3361 | mtd->writesize = le32_to_cpu(p->byte_per_page); |
Brian Norris | 4355b70 | 2013-08-27 18:45:10 -0700 | [diff] [blame] | 3362 | |
| 3363 | /* |
| 3364 | * pages_per_block and blocks_per_lun may not be a power-of-2 size |
| 3365 | * (don't ask me who thought of this...). MTD assumes that these |
| 3366 | * dimensions will be power-of-2, so just truncate the remaining area. |
| 3367 | */ |
| 3368 | mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1); |
| 3369 | mtd->erasesize *= mtd->writesize; |
| 3370 | |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3371 | mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); |
Brian Norris | 4355b70 | 2013-08-27 18:45:10 -0700 | [diff] [blame] | 3372 | |
| 3373 | /* See erasesize comment */ |
| 3374 | chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1); |
Matthieu CASTET | 6379575 | 2012-03-19 15:35:25 +0100 | [diff] [blame] | 3375 | chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; |
Huang Shijie | 13fbd17 | 2013-09-25 14:58:13 +0800 | [diff] [blame] | 3376 | chip->bits_per_cell = p->bits_per_cell; |
Huang Shijie | e2985fc | 2013-05-17 11:17:30 +0800 | [diff] [blame] | 3377 | |
| 3378 | if (onfi_feature(chip) & ONFI_FEATURE_16_BIT_BUS) |
Matthieu CASTET | 08c248f | 2011-06-26 18:26:55 +0200 | [diff] [blame] | 3379 | *busw = NAND_BUSWIDTH_16; |
Huang Shijie | e2985fc | 2013-05-17 11:17:30 +0800 | [diff] [blame] | 3380 | else |
| 3381 | *busw = 0; |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3382 | |
Huang Shijie | 10c86ba | 2013-05-17 11:17:26 +0800 | [diff] [blame] | 3383 | if (p->ecc_bits != 0xff) { |
| 3384 | chip->ecc_strength_ds = p->ecc_bits; |
| 3385 | chip->ecc_step_ds = 512; |
Huang Shijie | 6dcbe0c | 2013-05-22 10:28:27 +0800 | [diff] [blame] | 3386 | } else if (chip->onfi_version >= 21 && |
| 3387 | (onfi_feature(chip) & ONFI_FEATURE_EXT_PARAM_PAGE)) { |
| 3388 | |
| 3389 | /* |
| 3390 | * The nand_flash_detect_ext_param_page() uses the |
| 3391 | * Change Read Column command which maybe not supported |
| 3392 | * by the chip->cmdfunc. So try to update the chip->cmdfunc |
| 3393 | * now. We do not replace user supplied command function. |
| 3394 | */ |
| 3395 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 3396 | chip->cmdfunc = nand_command_lp; |
| 3397 | |
| 3398 | /* The Extended Parameter Page is supported since ONFI 2.1. */ |
| 3399 | if (nand_flash_detect_ext_param_page(mtd, chip, p)) |
Brian Norris | c7f23a7 | 2013-08-13 10:51:55 -0700 | [diff] [blame] | 3400 | pr_warn("Failed to detect ONFI extended param page\n"); |
| 3401 | } else { |
| 3402 | pr_warn("Could not retrieve ONFI ECC requirements\n"); |
Huang Shijie | 10c86ba | 2013-05-17 11:17:26 +0800 | [diff] [blame] | 3403 | } |
| 3404 | |
Brian Norris | 8429bb3 | 2013-12-03 15:51:09 -0800 | [diff] [blame] | 3405 | if (p->jedec_id == NAND_MFR_MICRON) |
| 3406 | nand_onfi_detect_micron(chip, p); |
| 3407 | |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3408 | return 1; |
| 3409 | } |
| 3410 | |
| 3411 | /* |
Huang Shijie | 9136181 | 2014-02-21 13:39:40 +0800 | [diff] [blame] | 3412 | * Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise. |
| 3413 | */ |
| 3414 | static int nand_flash_detect_jedec(struct mtd_info *mtd, struct nand_chip *chip, |
| 3415 | int *busw) |
| 3416 | { |
| 3417 | struct nand_jedec_params *p = &chip->jedec_params; |
| 3418 | struct jedec_ecc_info *ecc; |
| 3419 | int val; |
| 3420 | int i, j; |
| 3421 | |
| 3422 | /* Try JEDEC for unknown chip or LP */ |
| 3423 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x40, -1); |
| 3424 | if (chip->read_byte(mtd) != 'J' || chip->read_byte(mtd) != 'E' || |
| 3425 | chip->read_byte(mtd) != 'D' || chip->read_byte(mtd) != 'E' || |
| 3426 | chip->read_byte(mtd) != 'C') |
| 3427 | return 0; |
| 3428 | |
| 3429 | chip->cmdfunc(mtd, NAND_CMD_PARAM, 0x40, -1); |
| 3430 | for (i = 0; i < 3; i++) { |
| 3431 | for (j = 0; j < sizeof(*p); j++) |
| 3432 | ((uint8_t *)p)[j] = chip->read_byte(mtd); |
| 3433 | |
| 3434 | if (onfi_crc16(ONFI_CRC_BASE, (uint8_t *)p, 510) == |
| 3435 | le16_to_cpu(p->crc)) |
| 3436 | break; |
| 3437 | } |
| 3438 | |
| 3439 | if (i == 3) { |
| 3440 | pr_err("Could not find valid JEDEC parameter page; aborting\n"); |
| 3441 | return 0; |
| 3442 | } |
| 3443 | |
| 3444 | /* Check version */ |
| 3445 | val = le16_to_cpu(p->revision); |
| 3446 | if (val & (1 << 2)) |
| 3447 | chip->jedec_version = 10; |
| 3448 | else if (val & (1 << 1)) |
| 3449 | chip->jedec_version = 1; /* vendor specific version */ |
| 3450 | |
| 3451 | if (!chip->jedec_version) { |
| 3452 | pr_info("unsupported JEDEC version: %d\n", val); |
| 3453 | return 0; |
| 3454 | } |
| 3455 | |
| 3456 | sanitize_string(p->manufacturer, sizeof(p->manufacturer)); |
| 3457 | sanitize_string(p->model, sizeof(p->model)); |
| 3458 | if (!mtd->name) |
| 3459 | mtd->name = p->model; |
| 3460 | |
| 3461 | mtd->writesize = le32_to_cpu(p->byte_per_page); |
| 3462 | |
| 3463 | /* Please reference to the comment for nand_flash_detect_onfi. */ |
| 3464 | mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1); |
| 3465 | mtd->erasesize *= mtd->writesize; |
| 3466 | |
| 3467 | mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); |
| 3468 | |
| 3469 | /* Please reference to the comment for nand_flash_detect_onfi. */ |
| 3470 | chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1); |
| 3471 | chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; |
| 3472 | chip->bits_per_cell = p->bits_per_cell; |
| 3473 | |
| 3474 | if (jedec_feature(chip) & JEDEC_FEATURE_16_BIT_BUS) |
| 3475 | *busw = NAND_BUSWIDTH_16; |
| 3476 | else |
| 3477 | *busw = 0; |
| 3478 | |
| 3479 | /* ECC info */ |
| 3480 | ecc = &p->ecc_info[0]; |
| 3481 | |
| 3482 | if (ecc->codeword_size >= 9) { |
| 3483 | chip->ecc_strength_ds = ecc->ecc_bits; |
| 3484 | chip->ecc_step_ds = 1 << ecc->codeword_size; |
| 3485 | } else { |
| 3486 | pr_warn("Invalid codeword size\n"); |
| 3487 | } |
| 3488 | |
| 3489 | return 1; |
| 3490 | } |
| 3491 | |
| 3492 | /* |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3493 | * nand_id_has_period - Check if an ID string has a given wraparound period |
| 3494 | * @id_data: the ID string |
| 3495 | * @arrlen: the length of the @id_data array |
| 3496 | * @period: the period of repitition |
| 3497 | * |
| 3498 | * Check if an ID string is repeated within a given sequence of bytes at |
| 3499 | * specific repetition interval period (e.g., {0x20,0x01,0x7F,0x20} has a |
Brian Norris | d4d4f1b | 2012-11-14 21:54:20 -0800 | [diff] [blame] | 3500 | * period of 3). This is a helper function for nand_id_len(). Returns non-zero |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3501 | * if the repetition has a period of @period; otherwise, returns zero. |
| 3502 | */ |
| 3503 | static int nand_id_has_period(u8 *id_data, int arrlen, int period) |
| 3504 | { |
| 3505 | int i, j; |
| 3506 | for (i = 0; i < period; i++) |
| 3507 | for (j = i + period; j < arrlen; j += period) |
| 3508 | if (id_data[i] != id_data[j]) |
| 3509 | return 0; |
| 3510 | return 1; |
| 3511 | } |
| 3512 | |
| 3513 | /* |
| 3514 | * nand_id_len - Get the length of an ID string returned by CMD_READID |
| 3515 | * @id_data: the ID string |
| 3516 | * @arrlen: the length of the @id_data array |
| 3517 | |
| 3518 | * Returns the length of the ID string, according to known wraparound/trailing |
| 3519 | * zero patterns. If no pattern exists, returns the length of the array. |
| 3520 | */ |
| 3521 | static int nand_id_len(u8 *id_data, int arrlen) |
| 3522 | { |
| 3523 | int last_nonzero, period; |
| 3524 | |
| 3525 | /* Find last non-zero byte */ |
| 3526 | for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--) |
| 3527 | if (id_data[last_nonzero]) |
| 3528 | break; |
| 3529 | |
| 3530 | /* All zeros */ |
| 3531 | if (last_nonzero < 0) |
| 3532 | return 0; |
| 3533 | |
| 3534 | /* Calculate wraparound period */ |
| 3535 | for (period = 1; period < arrlen; period++) |
| 3536 | if (nand_id_has_period(id_data, arrlen, period)) |
| 3537 | break; |
| 3538 | |
| 3539 | /* There's a repeated pattern */ |
| 3540 | if (period < arrlen) |
| 3541 | return period; |
| 3542 | |
| 3543 | /* There are trailing zeros */ |
| 3544 | if (last_nonzero < arrlen - 1) |
| 3545 | return last_nonzero + 1; |
| 3546 | |
| 3547 | /* No pattern detected */ |
| 3548 | return arrlen; |
| 3549 | } |
| 3550 | |
Huang Shijie | 7db906b | 2013-09-25 14:58:11 +0800 | [diff] [blame] | 3551 | /* Extract the bits of per cell from the 3rd byte of the extended ID */ |
| 3552 | static int nand_get_bits_per_cell(u8 cellinfo) |
| 3553 | { |
| 3554 | int bits; |
| 3555 | |
| 3556 | bits = cellinfo & NAND_CI_CELLTYPE_MSK; |
| 3557 | bits >>= NAND_CI_CELLTYPE_SHIFT; |
| 3558 | return bits + 1; |
| 3559 | } |
| 3560 | |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3561 | /* |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3562 | * Many new NAND share similar device ID codes, which represent the size of the |
| 3563 | * chip. The rest of the parameters must be decoded according to generic or |
| 3564 | * manufacturer-specific "extended ID" decoding patterns. |
| 3565 | */ |
| 3566 | static void nand_decode_ext_id(struct mtd_info *mtd, struct nand_chip *chip, |
| 3567 | u8 id_data[8], int *busw) |
| 3568 | { |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3569 | int extid, id_len; |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3570 | /* The 3rd id byte holds MLC / multichip data */ |
Huang Shijie | 7db906b | 2013-09-25 14:58:11 +0800 | [diff] [blame] | 3571 | chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3572 | /* The 4th id byte is the important one */ |
| 3573 | extid = id_data[3]; |
| 3574 | |
Brian Norris | e3b88bd | 2012-09-24 20:40:52 -0700 | [diff] [blame] | 3575 | id_len = nand_id_len(id_data, 8); |
| 3576 | |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3577 | /* |
| 3578 | * Field definitions are in the following datasheets: |
| 3579 | * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32) |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 3580 | * New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44) |
Brian Norris | 73ca392 | 2012-09-24 20:40:54 -0700 | [diff] [blame] | 3581 | * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22) |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3582 | * |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 3583 | * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung |
| 3584 | * ID to decide what to do. |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3585 | */ |
Brian Norris | af451af | 2012-10-09 23:26:06 -0700 | [diff] [blame] | 3586 | if (id_len == 6 && id_data[0] == NAND_MFR_SAMSUNG && |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3587 | !nand_is_slc(chip) && id_data[5] != 0x00) { |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3588 | /* Calc pagesize */ |
| 3589 | mtd->writesize = 2048 << (extid & 0x03); |
| 3590 | extid >>= 2; |
| 3591 | /* Calc oobsize */ |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 3592 | switch (((extid >> 2) & 0x04) | (extid & 0x03)) { |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3593 | case 1: |
| 3594 | mtd->oobsize = 128; |
| 3595 | break; |
| 3596 | case 2: |
| 3597 | mtd->oobsize = 218; |
| 3598 | break; |
| 3599 | case 3: |
| 3600 | mtd->oobsize = 400; |
| 3601 | break; |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 3602 | case 4: |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3603 | mtd->oobsize = 436; |
| 3604 | break; |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 3605 | case 5: |
| 3606 | mtd->oobsize = 512; |
| 3607 | break; |
| 3608 | case 6: |
Brian Norris | e2d3a35 | 2012-09-24 20:40:55 -0700 | [diff] [blame] | 3609 | mtd->oobsize = 640; |
| 3610 | break; |
Huang Shijie | 94d04e8 | 2013-12-25 17:18:55 +0800 | [diff] [blame] | 3611 | case 7: |
| 3612 | default: /* Other cases are "reserved" (unknown) */ |
| 3613 | mtd->oobsize = 1024; |
| 3614 | break; |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3615 | } |
| 3616 | extid >>= 2; |
| 3617 | /* Calc blocksize */ |
| 3618 | mtd->erasesize = (128 * 1024) << |
| 3619 | (((extid >> 1) & 0x04) | (extid & 0x03)); |
| 3620 | *busw = 0; |
Brian Norris | 73ca392 | 2012-09-24 20:40:54 -0700 | [diff] [blame] | 3621 | } else if (id_len == 6 && id_data[0] == NAND_MFR_HYNIX && |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3622 | !nand_is_slc(chip)) { |
Brian Norris | 73ca392 | 2012-09-24 20:40:54 -0700 | [diff] [blame] | 3623 | unsigned int tmp; |
| 3624 | |
| 3625 | /* Calc pagesize */ |
| 3626 | mtd->writesize = 2048 << (extid & 0x03); |
| 3627 | extid >>= 2; |
| 3628 | /* Calc oobsize */ |
| 3629 | switch (((extid >> 2) & 0x04) | (extid & 0x03)) { |
| 3630 | case 0: |
| 3631 | mtd->oobsize = 128; |
| 3632 | break; |
| 3633 | case 1: |
| 3634 | mtd->oobsize = 224; |
| 3635 | break; |
| 3636 | case 2: |
| 3637 | mtd->oobsize = 448; |
| 3638 | break; |
| 3639 | case 3: |
| 3640 | mtd->oobsize = 64; |
| 3641 | break; |
| 3642 | case 4: |
| 3643 | mtd->oobsize = 32; |
| 3644 | break; |
| 3645 | case 5: |
| 3646 | mtd->oobsize = 16; |
| 3647 | break; |
| 3648 | default: |
| 3649 | mtd->oobsize = 640; |
| 3650 | break; |
| 3651 | } |
| 3652 | extid >>= 2; |
| 3653 | /* Calc blocksize */ |
| 3654 | tmp = ((extid >> 1) & 0x04) | (extid & 0x03); |
| 3655 | if (tmp < 0x03) |
| 3656 | mtd->erasesize = (128 * 1024) << tmp; |
| 3657 | else if (tmp == 0x03) |
| 3658 | mtd->erasesize = 768 * 1024; |
| 3659 | else |
| 3660 | mtd->erasesize = (64 * 1024) << tmp; |
| 3661 | *busw = 0; |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3662 | } else { |
| 3663 | /* Calc pagesize */ |
| 3664 | mtd->writesize = 1024 << (extid & 0x03); |
| 3665 | extid >>= 2; |
| 3666 | /* Calc oobsize */ |
| 3667 | mtd->oobsize = (8 << (extid & 0x01)) * |
| 3668 | (mtd->writesize >> 9); |
| 3669 | extid >>= 2; |
| 3670 | /* Calc blocksize. Blocksize is multiples of 64KiB */ |
| 3671 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
| 3672 | extid >>= 2; |
| 3673 | /* Get buswidth information */ |
| 3674 | *busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; |
Brian Norris | 60c6738 | 2013-06-25 13:17:59 -0700 | [diff] [blame] | 3675 | |
| 3676 | /* |
| 3677 | * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per |
| 3678 | * 512B page. For Toshiba SLC, we decode the 5th/6th byte as |
| 3679 | * follows: |
| 3680 | * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm, |
| 3681 | * 110b -> 24nm |
| 3682 | * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC |
| 3683 | */ |
| 3684 | if (id_len >= 6 && id_data[0] == NAND_MFR_TOSHIBA && |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3685 | nand_is_slc(chip) && |
Brian Norris | 60c6738 | 2013-06-25 13:17:59 -0700 | [diff] [blame] | 3686 | (id_data[5] & 0x7) == 0x6 /* 24nm */ && |
| 3687 | !(id_data[4] & 0x80) /* !BENAND */) { |
| 3688 | mtd->oobsize = 32 * mtd->writesize >> 9; |
| 3689 | } |
| 3690 | |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3691 | } |
| 3692 | } |
| 3693 | |
| 3694 | /* |
Brian Norris | f23a481 | 2012-09-24 20:40:51 -0700 | [diff] [blame] | 3695 | * Old devices have chip data hardcoded in the device ID table. nand_decode_id |
| 3696 | * decodes a matching ID table entry and assigns the MTD size parameters for |
| 3697 | * the chip. |
| 3698 | */ |
| 3699 | static void nand_decode_id(struct mtd_info *mtd, struct nand_chip *chip, |
| 3700 | struct nand_flash_dev *type, u8 id_data[8], |
| 3701 | int *busw) |
| 3702 | { |
| 3703 | int maf_id = id_data[0]; |
| 3704 | |
| 3705 | mtd->erasesize = type->erasesize; |
| 3706 | mtd->writesize = type->pagesize; |
| 3707 | mtd->oobsize = mtd->writesize / 32; |
| 3708 | *busw = type->options & NAND_BUSWIDTH_16; |
| 3709 | |
Huang Shijie | 1c195e9 | 2013-09-25 14:58:12 +0800 | [diff] [blame] | 3710 | /* All legacy ID NAND are small-page, SLC */ |
| 3711 | chip->bits_per_cell = 1; |
| 3712 | |
Brian Norris | f23a481 | 2012-09-24 20:40:51 -0700 | [diff] [blame] | 3713 | /* |
| 3714 | * Check for Spansion/AMD ID + repeating 5th, 6th byte since |
| 3715 | * some Spansion chips have erasesize that conflicts with size |
| 3716 | * listed in nand_ids table. |
| 3717 | * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) |
| 3718 | */ |
| 3719 | if (maf_id == NAND_MFR_AMD && id_data[4] != 0x00 && id_data[5] == 0x00 |
| 3720 | && id_data[6] == 0x00 && id_data[7] == 0x00 |
| 3721 | && mtd->writesize == 512) { |
| 3722 | mtd->erasesize = 128 * 1024; |
| 3723 | mtd->erasesize <<= ((id_data[3] & 0x03) << 1); |
| 3724 | } |
| 3725 | } |
| 3726 | |
| 3727 | /* |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3728 | * Set the bad block marker/indicator (BBM/BBI) patterns according to some |
| 3729 | * heuristic patterns using various detected parameters (e.g., manufacturer, |
| 3730 | * page size, cell-type information). |
| 3731 | */ |
| 3732 | static void nand_decode_bbm_options(struct mtd_info *mtd, |
| 3733 | struct nand_chip *chip, u8 id_data[8]) |
| 3734 | { |
| 3735 | int maf_id = id_data[0]; |
| 3736 | |
| 3737 | /* Set the bad block position */ |
| 3738 | if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) |
| 3739 | chip->badblockpos = NAND_LARGE_BADBLOCK_POS; |
| 3740 | else |
| 3741 | chip->badblockpos = NAND_SMALL_BADBLOCK_POS; |
| 3742 | |
| 3743 | /* |
| 3744 | * Bad block marker is stored in the last page of each block on Samsung |
| 3745 | * and Hynix MLC devices; stored in first two pages of each block on |
| 3746 | * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba, |
| 3747 | * AMD/Spansion, and Macronix. All others scan only the first page. |
| 3748 | */ |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3749 | if (!nand_is_slc(chip) && |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3750 | (maf_id == NAND_MFR_SAMSUNG || |
| 3751 | maf_id == NAND_MFR_HYNIX)) |
| 3752 | chip->bbt_options |= NAND_BBT_SCANLASTPAGE; |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 3753 | else if ((nand_is_slc(chip) && |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3754 | (maf_id == NAND_MFR_SAMSUNG || |
| 3755 | maf_id == NAND_MFR_HYNIX || |
| 3756 | maf_id == NAND_MFR_TOSHIBA || |
| 3757 | maf_id == NAND_MFR_AMD || |
| 3758 | maf_id == NAND_MFR_MACRONIX)) || |
| 3759 | (mtd->writesize == 2048 && |
| 3760 | maf_id == NAND_MFR_MICRON)) |
| 3761 | chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; |
| 3762 | } |
| 3763 | |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3764 | static inline bool is_full_id_nand(struct nand_flash_dev *type) |
| 3765 | { |
| 3766 | return type->id_len; |
| 3767 | } |
| 3768 | |
| 3769 | static bool find_full_id_nand(struct mtd_info *mtd, struct nand_chip *chip, |
| 3770 | struct nand_flash_dev *type, u8 *id_data, int *busw) |
| 3771 | { |
| 3772 | if (!strncmp(type->id, id_data, type->id_len)) { |
| 3773 | mtd->writesize = type->pagesize; |
| 3774 | mtd->erasesize = type->erasesize; |
| 3775 | mtd->oobsize = type->oobsize; |
| 3776 | |
Huang Shijie | 7db906b | 2013-09-25 14:58:11 +0800 | [diff] [blame] | 3777 | chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3778 | chip->chipsize = (uint64_t)type->chipsize << 20; |
| 3779 | chip->options |= type->options; |
Huang Shijie | 5721934 | 2013-05-17 11:17:32 +0800 | [diff] [blame] | 3780 | chip->ecc_strength_ds = NAND_ECC_STRENGTH(type); |
| 3781 | chip->ecc_step_ds = NAND_ECC_STEP(type); |
Boris BREZILLON | 57a94e2 | 2014-09-22 20:11:50 +0200 | [diff] [blame] | 3782 | chip->onfi_timing_mode_default = |
| 3783 | type->onfi_timing_mode_default; |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3784 | |
| 3785 | *busw = type->options & NAND_BUSWIDTH_16; |
| 3786 | |
Cai Zhiyong | 092b6a1 | 2013-12-25 21:19:21 +0800 | [diff] [blame] | 3787 | if (!mtd->name) |
| 3788 | mtd->name = type->name; |
| 3789 | |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3790 | return true; |
| 3791 | } |
| 3792 | return false; |
| 3793 | } |
| 3794 | |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3795 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3796 | * Get the flash and manufacturer id and lookup if the type is supported. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3797 | */ |
| 3798 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3799 | struct nand_chip *chip, |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3800 | int *maf_id, int *dev_id, |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3801 | struct nand_flash_dev *type) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3802 | { |
Cai Zhiyong | bb77082 | 2013-12-25 20:11:15 +0800 | [diff] [blame] | 3803 | int busw; |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3804 | int i, maf_idx; |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 3805 | u8 id_data[8]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3806 | |
| 3807 | /* Select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3808 | chip->select_chip(mtd, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3809 | |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 3810 | /* |
| 3811 | * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx) |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3812 | * after power-up. |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 3813 | */ |
| 3814 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
| 3815 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3816 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3817 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3818 | |
| 3819 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3820 | *maf_id = chip->read_byte(mtd); |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3821 | *dev_id = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3822 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3823 | /* |
| 3824 | * Try again to make sure, as some systems the bus-hold or other |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 3825 | * interface concerns can cause random data which looks like a |
| 3826 | * possibly credible NAND flash to appear. If the two results do |
| 3827 | * not match, ignore the device completely. |
| 3828 | */ |
| 3829 | |
| 3830 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
| 3831 | |
Brian Norris | 4aef9b7 | 2012-09-24 20:40:48 -0700 | [diff] [blame] | 3832 | /* Read entire ID string */ |
| 3833 | for (i = 0; i < 8; i++) |
Kevin Cernekee | 426c457 | 2010-05-04 20:58:03 -0700 | [diff] [blame] | 3834 | id_data[i] = chip->read_byte(mtd); |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 3835 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3836 | if (id_data[0] != *maf_id || id_data[1] != *dev_id) { |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 3837 | pr_info("second ID read did not match %02x,%02x against %02x,%02x\n", |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3838 | *maf_id, *dev_id, id_data[0], id_data[1]); |
Ben Dooks | ed8165c | 2008-04-14 14:58:58 +0100 | [diff] [blame] | 3839 | return ERR_PTR(-ENODEV); |
| 3840 | } |
| 3841 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3842 | if (!type) |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3843 | type = nand_flash_ids; |
| 3844 | |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3845 | for (; type->name != NULL; type++) { |
| 3846 | if (is_full_id_nand(type)) { |
| 3847 | if (find_full_id_nand(mtd, chip, type, id_data, &busw)) |
| 3848 | goto ident_done; |
| 3849 | } else if (*dev_id == type->dev_id) { |
Brian Norris | db5b09f | 2015-05-22 10:43:12 -0700 | [diff] [blame] | 3850 | break; |
Huang Shijie | ec6e87e | 2013-03-15 11:01:00 +0800 | [diff] [blame] | 3851 | } |
| 3852 | } |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3853 | |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3854 | chip->onfi_version = 0; |
| 3855 | if (!type->name || !type->pagesize) { |
Masahiro Yamada | 35fc519 | 2014-04-09 16:26:26 +0900 | [diff] [blame] | 3856 | /* Check if the chip is ONFI compliant */ |
Brian Norris | 47450b3 | 2012-09-24 20:40:47 -0700 | [diff] [blame] | 3857 | if (nand_flash_detect_onfi(mtd, chip, &busw)) |
Florian Fainelli | 6fb277b | 2010-09-01 22:28:59 +0200 | [diff] [blame] | 3858 | goto ident_done; |
Huang Shijie | 9136181 | 2014-02-21 13:39:40 +0800 | [diff] [blame] | 3859 | |
| 3860 | /* Check if the chip is JEDEC compliant */ |
| 3861 | if (nand_flash_detect_jedec(mtd, chip, &busw)) |
| 3862 | goto ident_done; |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3863 | } |
| 3864 | |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 3865 | if (!type->name) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3866 | return ERR_PTR(-ENODEV); |
| 3867 | |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 3868 | if (!mtd->name) |
| 3869 | mtd->name = type->name; |
| 3870 | |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 3871 | chip->chipsize = (uint64_t)type->chipsize << 20; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3872 | |
Boris BREZILLON | a7f5ba4 | 2015-10-01 16:58:27 +0200 | [diff] [blame] | 3873 | if (!type->pagesize) { |
Brian Norris | fc09bbc | 2012-09-24 20:40:50 -0700 | [diff] [blame] | 3874 | /* Decode parameters from extended ID */ |
| 3875 | nand_decode_ext_id(mtd, chip, id_data, &busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3876 | } else { |
Brian Norris | f23a481 | 2012-09-24 20:40:51 -0700 | [diff] [blame] | 3877 | nand_decode_id(mtd, chip, type, id_data, &busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3878 | } |
Brian Norris | bf7a01b | 2012-07-13 09:28:24 -0700 | [diff] [blame] | 3879 | /* Get chip options */ |
| 3880 | chip->options |= type->options; |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3881 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3882 | /* |
| 3883 | * Check if chip is not a Samsung device. Do not clear the |
| 3884 | * options for chips which do not have an extended id. |
Florian Fainelli | d1e1f4e | 2010-08-30 18:32:24 +0200 | [diff] [blame] | 3885 | */ |
| 3886 | if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) |
| 3887 | chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; |
| 3888 | ident_done: |
| 3889 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3890 | /* Try to identify manufacturer */ |
David Woodhouse | 9a90986 | 2006-07-15 13:26:18 +0100 | [diff] [blame] | 3891 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_idx++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3892 | if (nand_manuf_ids[maf_idx].id == *maf_id) |
| 3893 | break; |
| 3894 | } |
| 3895 | |
Matthieu CASTET | 64b37b2 | 2012-11-06 11:51:44 +0100 | [diff] [blame] | 3896 | if (chip->options & NAND_BUSWIDTH_AUTO) { |
| 3897 | WARN_ON(chip->options & NAND_BUSWIDTH_16); |
| 3898 | chip->options |= busw; |
| 3899 | nand_set_defaults(chip, busw); |
| 3900 | } else if (busw != (chip->options & NAND_BUSWIDTH_16)) { |
| 3901 | /* |
| 3902 | * Check, if buswidth is correct. Hardware drivers should set |
| 3903 | * chip correct! |
| 3904 | */ |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 3905 | pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", |
| 3906 | *maf_id, *dev_id); |
| 3907 | pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, mtd->name); |
| 3908 | pr_warn("bus width %d instead %d bit\n", |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 3909 | (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, |
| 3910 | busw ? 16 : 8); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3911 | return ERR_PTR(-EINVAL); |
| 3912 | } |
| 3913 | |
Brian Norris | 7e74c2d | 2012-09-24 20:40:49 -0700 | [diff] [blame] | 3914 | nand_decode_bbm_options(mtd, chip, id_data); |
| 3915 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3916 | /* Calculate the address shift from the page size */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3917 | chip->page_shift = ffs(mtd->writesize) - 1; |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3918 | /* Convert chipsize to number of pages per chip -1 */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3919 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3920 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3921 | chip->bbt_erase_shift = chip->phys_erase_shift = |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3922 | ffs(mtd->erasesize) - 1; |
Adrian Hunter | 69423d9 | 2008-12-10 13:37:21 +0000 | [diff] [blame] | 3923 | if (chip->chipsize & 0xffffffff) |
| 3924 | chip->chip_shift = ffs((unsigned)chip->chipsize) - 1; |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 3925 | else { |
| 3926 | chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)); |
| 3927 | chip->chip_shift += 32 - 1; |
| 3928 | } |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3929 | |
Artem Bityutskiy | 26d9be1 | 2011-04-28 20:26:59 +0300 | [diff] [blame] | 3930 | chip->badblockbits = 8; |
Brian Norris | 49c50b9 | 2014-05-06 16:02:19 -0700 | [diff] [blame] | 3931 | chip->erase = single_erase; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3932 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3933 | /* Do not replace user supplied command function! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 3934 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 3935 | chip->cmdfunc = nand_command_lp; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3936 | |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 3937 | pr_info("device found, Manufacturer ID: 0x%02x, Chip ID: 0x%02x\n", |
| 3938 | *maf_id, *dev_id); |
Huang Shijie | ffdac6cd | 2014-02-21 13:39:41 +0800 | [diff] [blame] | 3939 | |
| 3940 | if (chip->onfi_version) |
| 3941 | pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, |
| 3942 | chip->onfi_params.model); |
| 3943 | else if (chip->jedec_version) |
| 3944 | pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, |
| 3945 | chip->jedec_params.model); |
| 3946 | else |
| 3947 | pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, |
| 3948 | type->name); |
| 3949 | |
Rafał Miłecki | 3755a99 | 2014-10-21 00:01:04 +0200 | [diff] [blame] | 3950 | pr_info("%d MiB, %s, erase size: %d KiB, page size: %d, OOB size: %d\n", |
Huang Shijie | 3723e93 | 2013-09-25 14:58:14 +0800 | [diff] [blame] | 3951 | (int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC", |
Rafał Miłecki | 3755a99 | 2014-10-21 00:01:04 +0200 | [diff] [blame] | 3952 | mtd->erasesize >> 10, mtd->writesize, mtd->oobsize); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3953 | return type; |
| 3954 | } |
| 3955 | |
Boris BREZILLON | 7194a29 | 2015-12-10 09:00:37 +0100 | [diff] [blame] | 3956 | static int nand_dt_init(struct nand_chip *chip) |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame] | 3957 | { |
Boris BREZILLON | 7194a29 | 2015-12-10 09:00:37 +0100 | [diff] [blame] | 3958 | struct device_node *dn = nand_get_flash_node(chip); |
Rafał Miłecki | 7908245 | 2016-03-23 11:19:02 +0100 | [diff] [blame] | 3959 | int ecc_mode, ecc_algo, ecc_strength, ecc_step; |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame] | 3960 | |
Boris BREZILLON | 7194a29 | 2015-12-10 09:00:37 +0100 | [diff] [blame] | 3961 | if (!dn) |
| 3962 | return 0; |
| 3963 | |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame] | 3964 | if (of_get_nand_bus_width(dn) == 16) |
| 3965 | chip->options |= NAND_BUSWIDTH_16; |
| 3966 | |
| 3967 | if (of_get_nand_on_flash_bbt(dn)) |
| 3968 | chip->bbt_options |= NAND_BBT_USE_FLASH; |
| 3969 | |
| 3970 | ecc_mode = of_get_nand_ecc_mode(dn); |
Rafał Miłecki | 7908245 | 2016-03-23 11:19:02 +0100 | [diff] [blame] | 3971 | ecc_algo = of_get_nand_ecc_algo(dn); |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame] | 3972 | ecc_strength = of_get_nand_ecc_strength(dn); |
| 3973 | ecc_step = of_get_nand_ecc_step_size(dn); |
| 3974 | |
| 3975 | if ((ecc_step >= 0 && !(ecc_strength >= 0)) || |
| 3976 | (!(ecc_step >= 0) && ecc_strength >= 0)) { |
| 3977 | pr_err("must set both strength and step size in DT\n"); |
| 3978 | return -EINVAL; |
| 3979 | } |
| 3980 | |
| 3981 | if (ecc_mode >= 0) |
| 3982 | chip->ecc.mode = ecc_mode; |
| 3983 | |
Rafał Miłecki | 7908245 | 2016-03-23 11:19:02 +0100 | [diff] [blame] | 3984 | if (ecc_algo >= 0) |
| 3985 | chip->ecc.algo = ecc_algo; |
| 3986 | |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame] | 3987 | if (ecc_strength >= 0) |
| 3988 | chip->ecc.strength = ecc_strength; |
| 3989 | |
| 3990 | if (ecc_step > 0) |
| 3991 | chip->ecc.size = ecc_step; |
| 3992 | |
| 3993 | return 0; |
| 3994 | } |
| 3995 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 3996 | /** |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 3997 | * nand_scan_ident - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 3998 | * @mtd: MTD device structure |
| 3999 | * @maxchips: number of chips to scan for |
| 4000 | * @table: alternative NAND ID table |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4001 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4002 | * This is the first phase of the normal nand_scan() function. It reads the |
| 4003 | * flash ID and sets up MTD fields accordingly. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4004 | * |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4005 | * The mtd->owner field must be set to the module of the caller. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4006 | */ |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 4007 | int nand_scan_ident(struct mtd_info *mtd, int maxchips, |
| 4008 | struct nand_flash_dev *table) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4009 | { |
Cai Zhiyong | bb77082 | 2013-12-25 20:11:15 +0800 | [diff] [blame] | 4010 | int i, nand_maf_id, nand_dev_id; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 4011 | struct nand_chip *chip = mtd_to_nand(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4012 | struct nand_flash_dev *type; |
Brian Norris | 5844fee | 2015-01-23 00:22:27 -0800 | [diff] [blame] | 4013 | int ret; |
| 4014 | |
Boris BREZILLON | 7194a29 | 2015-12-10 09:00:37 +0100 | [diff] [blame] | 4015 | ret = nand_dt_init(chip); |
| 4016 | if (ret) |
| 4017 | return ret; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4018 | |
Brian Norris | f7a8e38 | 2016-01-05 10:39:45 -0800 | [diff] [blame] | 4019 | if (!mtd->name && mtd->dev.parent) |
| 4020 | mtd->name = dev_name(mtd->dev.parent); |
| 4021 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4022 | /* Set the default functions */ |
Cai Zhiyong | bb77082 | 2013-12-25 20:11:15 +0800 | [diff] [blame] | 4023 | nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4024 | |
| 4025 | /* Read the flash type */ |
Cai Zhiyong | bb77082 | 2013-12-25 20:11:15 +0800 | [diff] [blame] | 4026 | type = nand_get_flash_type(mtd, chip, &nand_maf_id, |
| 4027 | &nand_dev_id, table); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4028 | |
| 4029 | if (IS_ERR(type)) { |
Ben Dooks | b1c6e6d | 2009-11-02 18:12:33 +0000 | [diff] [blame] | 4030 | if (!(chip->options & NAND_SCAN_SILENT_NODEV)) |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 4031 | pr_warn("No NAND device found\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4032 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4033 | return PTR_ERR(type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4034 | } |
| 4035 | |
Huang Shijie | 0730016 | 2012-11-09 16:23:45 +0800 | [diff] [blame] | 4036 | chip->select_chip(mtd, -1); |
| 4037 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4038 | /* Check for a chip array */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4039 | for (i = 1; i < maxchips; i++) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4040 | chip->select_chip(mtd, i); |
Karl Beldan | ef89a88 | 2008-09-15 14:37:29 +0200 | [diff] [blame] | 4041 | /* See comment in nand_get_flash_type for reset */ |
| 4042 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4043 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4044 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4045 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4046 | if (nand_maf_id != chip->read_byte(mtd) || |
Huang Shijie | 0730016 | 2012-11-09 16:23:45 +0800 | [diff] [blame] | 4047 | nand_dev_id != chip->read_byte(mtd)) { |
| 4048 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4049 | break; |
Huang Shijie | 0730016 | 2012-11-09 16:23:45 +0800 | [diff] [blame] | 4050 | } |
| 4051 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4052 | } |
| 4053 | if (i > 1) |
Ezequiel Garcia | 2017164 | 2013-11-25 08:30:31 -0300 | [diff] [blame] | 4054 | pr_info("%d chips detected\n", i); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4055 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4056 | /* Store the number of chips and calc total size for mtd */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4057 | chip->numchips = i; |
| 4058 | mtd->size = i * chip->chipsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4059 | |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4060 | return 0; |
| 4061 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 4062 | EXPORT_SYMBOL(nand_scan_ident); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4063 | |
Ezequiel Garcia | 67a9ad9 | 2014-05-14 14:58:06 -0300 | [diff] [blame] | 4064 | /* |
| 4065 | * Check if the chip configuration meet the datasheet requirements. |
| 4066 | |
| 4067 | * If our configuration corrects A bits per B bytes and the minimum |
| 4068 | * required correction level is X bits per Y bytes, then we must ensure |
| 4069 | * both of the following are true: |
| 4070 | * |
| 4071 | * (1) A / B >= X / Y |
| 4072 | * (2) A >= X |
| 4073 | * |
| 4074 | * Requirement (1) ensures we can correct for the required bitflip density. |
| 4075 | * Requirement (2) ensures we can correct even when all bitflips are clumped |
| 4076 | * in the same sector. |
| 4077 | */ |
| 4078 | static bool nand_ecc_strength_good(struct mtd_info *mtd) |
| 4079 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 4080 | struct nand_chip *chip = mtd_to_nand(mtd); |
Ezequiel Garcia | 67a9ad9 | 2014-05-14 14:58:06 -0300 | [diff] [blame] | 4081 | struct nand_ecc_ctrl *ecc = &chip->ecc; |
| 4082 | int corr, ds_corr; |
| 4083 | |
| 4084 | if (ecc->size == 0 || chip->ecc_step_ds == 0) |
| 4085 | /* Not enough information */ |
| 4086 | return true; |
| 4087 | |
| 4088 | /* |
| 4089 | * We get the number of corrected bits per page to compare |
| 4090 | * the correction density. |
| 4091 | */ |
| 4092 | corr = (mtd->writesize * ecc->strength) / ecc->size; |
| 4093 | ds_corr = (mtd->writesize * chip->ecc_strength_ds) / chip->ecc_step_ds; |
| 4094 | |
| 4095 | return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds; |
| 4096 | } |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4097 | |
| 4098 | /** |
| 4099 | * nand_scan_tail - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4100 | * @mtd: MTD device structure |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4101 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4102 | * This is the second phase of the normal nand_scan() function. It fills out |
| 4103 | * all the uninitialized function pointers with the defaults and scans for a |
| 4104 | * bad block table if appropriate. |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4105 | */ |
| 4106 | int nand_scan_tail(struct mtd_info *mtd) |
| 4107 | { |
| 4108 | int i; |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 4109 | struct nand_chip *chip = mtd_to_nand(mtd); |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4110 | struct nand_ecc_ctrl *ecc = &chip->ecc; |
Huang Shijie | f02ea4e | 2014-01-13 14:27:12 +0800 | [diff] [blame] | 4111 | struct nand_buffers *nbuf; |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4112 | int ret; |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4113 | |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 4114 | /* New bad blocks should be marked in OOB, flash-based BBT, or both */ |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4115 | if (WARN_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && |
| 4116 | !(chip->bbt_options & NAND_BBT_USE_FLASH))) |
| 4117 | return -EINVAL; |
Brian Norris | e2414f4 | 2012-02-06 13:44:00 -0800 | [diff] [blame] | 4118 | |
Huang Shijie | f02ea4e | 2014-01-13 14:27:12 +0800 | [diff] [blame] | 4119 | if (!(chip->options & NAND_OWN_BUFFERS)) { |
| 4120 | nbuf = kzalloc(sizeof(*nbuf) + mtd->writesize |
| 4121 | + mtd->oobsize * 3, GFP_KERNEL); |
| 4122 | if (!nbuf) |
| 4123 | return -ENOMEM; |
| 4124 | nbuf->ecccalc = (uint8_t *)(nbuf + 1); |
| 4125 | nbuf->ecccode = nbuf->ecccalc + mtd->oobsize; |
| 4126 | nbuf->databuf = nbuf->ecccode + mtd->oobsize; |
| 4127 | |
| 4128 | chip->buffers = nbuf; |
| 4129 | } else { |
| 4130 | if (!chip->buffers) |
| 4131 | return -ENOMEM; |
| 4132 | } |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 4133 | |
David Woodhouse | 7dcdcbef | 2006-10-21 17:09:53 +0100 | [diff] [blame] | 4134 | /* Set the internal oob buffer location, just after the page data */ |
David Woodhouse | 784f4d5 | 2006-10-22 01:47:45 +0100 | [diff] [blame] | 4135 | chip->oob_poi = chip->buffers->databuf + mtd->writesize; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4136 | |
| 4137 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4138 | * If no default placement scheme is given, select an appropriate one. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4139 | */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4140 | if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4141 | switch (mtd->oobsize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4142 | case 8: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4143 | ecc->layout = &nand_oob_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4144 | break; |
| 4145 | case 16: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4146 | ecc->layout = &nand_oob_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4147 | break; |
| 4148 | case 64: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4149 | ecc->layout = &nand_oob_64; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4150 | break; |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 4151 | case 128: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4152 | ecc->layout = &nand_oob_128; |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 4153 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4154 | default: |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4155 | WARN(1, "No oob scheme defined for oobsize %d\n", |
| 4156 | mtd->oobsize); |
| 4157 | ret = -EINVAL; |
| 4158 | goto err_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4159 | } |
| 4160 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4161 | |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 4162 | if (!chip->write_page) |
| 4163 | chip->write_page = nand_write_page; |
| 4164 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4165 | /* |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4166 | * Check ECC mode, default to software if 3byte/512byte hardware ECC is |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4167 | * selected and we have 256 byte pagesize fallback to software ECC |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4168 | */ |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 4169 | |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4170 | switch (ecc->mode) { |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 4171 | case NAND_ECC_HW_OOB_FIRST: |
| 4172 | /* Similar to NAND_ECC_HW, but a separate read_page handle */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4173 | if (!ecc->calculate || !ecc->correct || !ecc->hwctl) { |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4174 | WARN(1, "No ECC functions supplied; hardware ECC not possible\n"); |
| 4175 | ret = -EINVAL; |
| 4176 | goto err_free; |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 4177 | } |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4178 | if (!ecc->read_page) |
| 4179 | ecc->read_page = nand_read_page_hwecc_oob_first; |
Sneha Narnakaje | 6e0cb13 | 2009-09-18 12:51:47 -0700 | [diff] [blame] | 4180 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4181 | case NAND_ECC_HW: |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4182 | /* Use standard hwecc read page function? */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4183 | if (!ecc->read_page) |
| 4184 | ecc->read_page = nand_read_page_hwecc; |
| 4185 | if (!ecc->write_page) |
| 4186 | ecc->write_page = nand_write_page_hwecc; |
| 4187 | if (!ecc->read_page_raw) |
| 4188 | ecc->read_page_raw = nand_read_page_raw; |
| 4189 | if (!ecc->write_page_raw) |
| 4190 | ecc->write_page_raw = nand_write_page_raw; |
| 4191 | if (!ecc->read_oob) |
| 4192 | ecc->read_oob = nand_read_oob_std; |
| 4193 | if (!ecc->write_oob) |
| 4194 | ecc->write_oob = nand_write_oob_std; |
| 4195 | if (!ecc->read_subpage) |
| 4196 | ecc->read_subpage = nand_read_subpage; |
Helmut Schaa | 44991b3 | 2014-04-09 11:13:24 +0200 | [diff] [blame] | 4197 | if (!ecc->write_subpage && ecc->hwctl && ecc->calculate) |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4198 | ecc->write_subpage = nand_write_subpage_hwecc; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 4199 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4200 | case NAND_ECC_HW_SYNDROME: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4201 | if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && |
| 4202 | (!ecc->read_page || |
| 4203 | ecc->read_page == nand_read_page_hwecc || |
| 4204 | !ecc->write_page || |
| 4205 | ecc->write_page == nand_write_page_hwecc)) { |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4206 | WARN(1, "No ECC functions supplied; hardware ECC not possible\n"); |
| 4207 | ret = -EINVAL; |
| 4208 | goto err_free; |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4209 | } |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4210 | /* Use standard syndrome read/write page function? */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4211 | if (!ecc->read_page) |
| 4212 | ecc->read_page = nand_read_page_syndrome; |
| 4213 | if (!ecc->write_page) |
| 4214 | ecc->write_page = nand_write_page_syndrome; |
| 4215 | if (!ecc->read_page_raw) |
| 4216 | ecc->read_page_raw = nand_read_page_raw_syndrome; |
| 4217 | if (!ecc->write_page_raw) |
| 4218 | ecc->write_page_raw = nand_write_page_raw_syndrome; |
| 4219 | if (!ecc->read_oob) |
| 4220 | ecc->read_oob = nand_read_oob_syndrome; |
| 4221 | if (!ecc->write_oob) |
| 4222 | ecc->write_oob = nand_write_oob_syndrome; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 4223 | |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4224 | if (mtd->writesize >= ecc->size) { |
| 4225 | if (!ecc->strength) { |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4226 | WARN(1, "Driver must set ecc.strength when using hardware ECC\n"); |
| 4227 | ret = -EINVAL; |
| 4228 | goto err_free; |
Mike Dunn | e2788c9 | 2012-04-25 12:06:10 -0700 | [diff] [blame] | 4229 | } |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4230 | break; |
Mike Dunn | e2788c9 | 2012-04-25 12:06:10 -0700 | [diff] [blame] | 4231 | } |
Rafał Miłecki | 2ac63d9 | 2014-08-19 13:55:34 +0200 | [diff] [blame] | 4232 | pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", |
| 4233 | ecc->size, mtd->writesize); |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4234 | ecc->mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4235 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 4236 | case NAND_ECC_SOFT: |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4237 | ecc->calculate = nand_calculate_ecc; |
| 4238 | ecc->correct = nand_correct_data; |
| 4239 | ecc->read_page = nand_read_page_swecc; |
| 4240 | ecc->read_subpage = nand_read_subpage; |
| 4241 | ecc->write_page = nand_write_page_swecc; |
| 4242 | ecc->read_page_raw = nand_read_page_raw; |
| 4243 | ecc->write_page_raw = nand_write_page_raw; |
| 4244 | ecc->read_oob = nand_read_oob_std; |
| 4245 | ecc->write_oob = nand_write_oob_std; |
| 4246 | if (!ecc->size) |
| 4247 | ecc->size = 256; |
| 4248 | ecc->bytes = 3; |
| 4249 | ecc->strength = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4250 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4251 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4252 | case NAND_ECC_SOFT_BCH: |
| 4253 | if (!mtd_nand_has_bch()) { |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4254 | WARN(1, "CONFIG_MTD_NAND_ECC_BCH not enabled\n"); |
| 4255 | ret = -EINVAL; |
| 4256 | goto err_free; |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4257 | } |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4258 | ecc->calculate = nand_bch_calculate_ecc; |
| 4259 | ecc->correct = nand_bch_correct_data; |
| 4260 | ecc->read_page = nand_read_page_swecc; |
| 4261 | ecc->read_subpage = nand_read_subpage; |
| 4262 | ecc->write_page = nand_write_page_swecc; |
| 4263 | ecc->read_page_raw = nand_read_page_raw; |
| 4264 | ecc->write_page_raw = nand_write_page_raw; |
| 4265 | ecc->read_oob = nand_read_oob_std; |
| 4266 | ecc->write_oob = nand_write_oob_std; |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4267 | /* |
Aaron Sierra | e0377cd | 2015-01-14 17:41:31 -0600 | [diff] [blame] | 4268 | * Board driver should supply ecc.size and ecc.strength values |
| 4269 | * to select how many bits are correctable. Otherwise, default |
| 4270 | * to 4 bits for large page devices. |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4271 | */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4272 | if (!ecc->size && (mtd->oobsize >= 64)) { |
| 4273 | ecc->size = 512; |
Aaron Sierra | e0377cd | 2015-01-14 17:41:31 -0600 | [diff] [blame] | 4274 | ecc->strength = 4; |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4275 | } |
Aaron Sierra | e0377cd | 2015-01-14 17:41:31 -0600 | [diff] [blame] | 4276 | |
| 4277 | /* See nand_bch_init() for details. */ |
Boris BREZILLON | a8c65d5 | 2016-03-07 10:46:54 +0100 | [diff] [blame] | 4278 | ecc->bytes = 0; |
| 4279 | ecc->priv = nand_bch_init(mtd); |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4280 | if (!ecc->priv) { |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4281 | WARN(1, "BCH ECC initialization failed!\n"); |
| 4282 | ret = -EINVAL; |
| 4283 | goto err_free; |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4284 | } |
| 4285 | break; |
| 4286 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4287 | case NAND_ECC_NONE: |
Rafał Miłecki | 2ac63d9 | 2014-08-19 13:55:34 +0200 | [diff] [blame] | 4288 | pr_warn("NAND_ECC_NONE selected by board driver. This is not recommended!\n"); |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4289 | ecc->read_page = nand_read_page_raw; |
| 4290 | ecc->write_page = nand_write_page_raw; |
| 4291 | ecc->read_oob = nand_read_oob_std; |
| 4292 | ecc->read_page_raw = nand_read_page_raw; |
| 4293 | ecc->write_page_raw = nand_write_page_raw; |
| 4294 | ecc->write_oob = nand_write_oob_std; |
| 4295 | ecc->size = mtd->writesize; |
| 4296 | ecc->bytes = 0; |
| 4297 | ecc->strength = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4298 | break; |
David Woodhouse | 956e944 | 2006-09-25 17:12:39 +0100 | [diff] [blame] | 4299 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4300 | default: |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4301 | WARN(1, "Invalid NAND_ECC_MODE %d\n", ecc->mode); |
| 4302 | ret = -EINVAL; |
| 4303 | goto err_free; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4304 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4305 | |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 4306 | /* For many systems, the standard OOB write also works for raw */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4307 | if (!ecc->read_oob_raw) |
| 4308 | ecc->read_oob_raw = ecc->read_oob; |
| 4309 | if (!ecc->write_oob_raw) |
| 4310 | ecc->write_oob_raw = ecc->write_oob; |
Brian Norris | 9ce244b | 2011-08-30 18:45:37 -0700 | [diff] [blame] | 4311 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4312 | /* |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 4313 | * The number of bytes available for a client to place data into |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4314 | * the out of band area. |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 4315 | */ |
Boris BREZILLON | f5b8aa7 | 2016-03-07 10:46:51 +0100 | [diff] [blame] | 4316 | mtd->oobavail = 0; |
| 4317 | if (ecc->layout) { |
| 4318 | for (i = 0; ecc->layout->oobfree[i].length; i++) |
| 4319 | mtd->oobavail += ecc->layout->oobfree[i].length; |
| 4320 | } |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 4321 | |
Thomas Petazzoni | 54c39e9 | 2014-07-02 15:16:32 +0200 | [diff] [blame] | 4322 | /* ECC sanity check: warn if it's too weak */ |
| 4323 | if (!nand_ecc_strength_good(mtd)) |
| 4324 | pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the NAND chip\n", |
| 4325 | mtd->name); |
Ezequiel Garcia | 67a9ad9 | 2014-05-14 14:58:06 -0300 | [diff] [blame] | 4326 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 4327 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4328 | * Set the number of read / write steps for one page depending on ECC |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4329 | * mode. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 4330 | */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4331 | ecc->steps = mtd->writesize / ecc->size; |
| 4332 | if (ecc->steps * ecc->size != mtd->writesize) { |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4333 | WARN(1, "Invalid ECC parameters\n"); |
| 4334 | ret = -EINVAL; |
| 4335 | goto err_free; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4336 | } |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4337 | ecc->total = ecc->steps * ecc->bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4338 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4339 | /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ |
Huang Shijie | 1d0ed69 | 2013-09-25 14:58:10 +0800 | [diff] [blame] | 4340 | if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4341 | switch (ecc->steps) { |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 4342 | case 2: |
| 4343 | mtd->subpage_sft = 1; |
| 4344 | break; |
| 4345 | case 4: |
| 4346 | case 8: |
Thomas Gleixner | 81ec536 | 2007-12-12 17:27:03 +0100 | [diff] [blame] | 4347 | case 16: |
Thomas Gleixner | 29072b9 | 2006-09-28 15:38:36 +0200 | [diff] [blame] | 4348 | mtd->subpage_sft = 2; |
| 4349 | break; |
| 4350 | } |
| 4351 | } |
| 4352 | chip->subpagesize = mtd->writesize >> mtd->subpage_sft; |
| 4353 | |
Thomas Gleixner | 04bbd0e | 2006-05-25 09:45:29 +0200 | [diff] [blame] | 4354 | /* Initialize state */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4355 | chip->state = FL_READY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4356 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4357 | /* Invalidate the pagebuffer reference */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4358 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4359 | |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 4360 | /* Large page NAND with SOFT_ECC should support subpage reads */ |
Ron Lee | 4007e2d | 2014-04-25 15:01:35 +0930 | [diff] [blame] | 4361 | switch (ecc->mode) { |
| 4362 | case NAND_ECC_SOFT: |
| 4363 | case NAND_ECC_SOFT_BCH: |
| 4364 | if (chip->page_shift > 9) |
| 4365 | chip->options |= NAND_SUBPAGE_READ; |
| 4366 | break; |
| 4367 | |
| 4368 | default: |
| 4369 | break; |
| 4370 | } |
Jeff Westfahl | a5ff4f1 | 2012-08-13 16:35:30 -0500 | [diff] [blame] | 4371 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4372 | /* Fill in remaining MTD driver data */ |
Huang Shijie | 963d1c2 | 2013-09-25 14:58:21 +0800 | [diff] [blame] | 4373 | mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH; |
Maxim Levitsky | 93edbad | 2010-02-22 20:39:40 +0200 | [diff] [blame] | 4374 | mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM : |
| 4375 | MTD_CAP_NANDFLASH; |
Artem Bityutskiy | 3c3c10b | 2012-01-30 14:58:32 +0200 | [diff] [blame] | 4376 | mtd->_erase = nand_erase; |
| 4377 | mtd->_point = NULL; |
| 4378 | mtd->_unpoint = NULL; |
| 4379 | mtd->_read = nand_read; |
| 4380 | mtd->_write = nand_write; |
| 4381 | mtd->_panic_write = panic_nand_write; |
| 4382 | mtd->_read_oob = nand_read_oob; |
| 4383 | mtd->_write_oob = nand_write_oob; |
| 4384 | mtd->_sync = nand_sync; |
| 4385 | mtd->_lock = NULL; |
| 4386 | mtd->_unlock = NULL; |
| 4387 | mtd->_suspend = nand_suspend; |
| 4388 | mtd->_resume = nand_resume; |
Scott Branden | 72ea403 | 2014-11-20 11:18:05 -0800 | [diff] [blame] | 4389 | mtd->_reboot = nand_shutdown; |
Ezequiel Garcia | 8471bb7 | 2014-05-21 19:06:12 -0300 | [diff] [blame] | 4390 | mtd->_block_isreserved = nand_block_isreserved; |
Artem Bityutskiy | 3c3c10b | 2012-01-30 14:58:32 +0200 | [diff] [blame] | 4391 | mtd->_block_isbad = nand_block_isbad; |
| 4392 | mtd->_block_markbad = nand_block_markbad; |
Anatolij Gustschin | cbcab65 | 2010-12-16 23:42:16 +0100 | [diff] [blame] | 4393 | mtd->writebufsize = mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4394 | |
Mike Dunn | 6a918ba | 2012-03-11 14:21:11 -0700 | [diff] [blame] | 4395 | /* propagate ecc info to mtd_info */ |
Huang Shijie | 97de79e0 | 2013-10-18 14:20:53 +0800 | [diff] [blame] | 4396 | mtd->ecclayout = ecc->layout; |
| 4397 | mtd->ecc_strength = ecc->strength; |
| 4398 | mtd->ecc_step_size = ecc->size; |
Shmulik Ladkani | ea3b2ea | 2012-06-08 18:29:06 +0300 | [diff] [blame] | 4399 | /* |
| 4400 | * Initialize bitflip_threshold to its default prior scan_bbt() call. |
| 4401 | * scan_bbt() might invoke mtd_read(), thus bitflip_threshold must be |
| 4402 | * properly set. |
| 4403 | */ |
| 4404 | if (!mtd->bitflip_threshold) |
Brian Norris | 240181f | 2015-01-12 12:51:29 -0800 | [diff] [blame] | 4405 | mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4406 | |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 4407 | /* Check, if we should skip the bad block table scan */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4408 | if (chip->options & NAND_SKIP_BBTSCAN) |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 4409 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4410 | |
| 4411 | /* Build bad block table */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4412 | return chip->scan_bbt(mtd); |
Ezequiel GarcĂa | 11eaf6d | 2016-04-01 18:29:24 -0300 | [diff] [blame] | 4413 | err_free: |
| 4414 | if (!(chip->options & NAND_OWN_BUFFERS)) |
| 4415 | kfree(chip->buffers); |
| 4416 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4417 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 4418 | EXPORT_SYMBOL(nand_scan_tail); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4419 | |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4420 | /* |
| 4421 | * is_module_text_address() isn't exported, and it's mostly a pointless |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 4422 | * test if this is a module _anyway_ -- they'd have to try _really_ hard |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4423 | * to call us from in-kernel code if the core NAND support is modular. |
| 4424 | */ |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4425 | #ifdef MODULE |
| 4426 | #define caller_is_module() (1) |
| 4427 | #else |
| 4428 | #define caller_is_module() \ |
Rusty Russell | a6e6abd | 2009-03-31 13:05:31 -0600 | [diff] [blame] | 4429 | is_module_text_address((unsigned long)__builtin_return_address(0)) |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4430 | #endif |
| 4431 | |
| 4432 | /** |
| 4433 | * nand_scan - [NAND Interface] Scan for the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4434 | * @mtd: MTD device structure |
| 4435 | * @maxchips: number of chips to scan for |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4436 | * |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4437 | * This fills out all the uninitialized function pointers with the defaults. |
| 4438 | * The flash ID is read and the mtd/chip structures are filled with the |
| 4439 | * appropriate values. The mtd->owner field must be set to the module of the |
| 4440 | * caller. |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4441 | */ |
| 4442 | int nand_scan(struct mtd_info *mtd, int maxchips) |
| 4443 | { |
| 4444 | int ret; |
| 4445 | |
| 4446 | /* Many callers got this wrong, so check for it for a while... */ |
| 4447 | if (!mtd->owner && caller_is_module()) { |
Brian Norris | d037021 | 2011-07-19 10:06:08 -0700 | [diff] [blame] | 4448 | pr_crit("%s called with NULL mtd->owner!\n", __func__); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4449 | BUG(); |
| 4450 | } |
| 4451 | |
David Woodhouse | 5e81e88 | 2010-02-26 18:32:56 +0000 | [diff] [blame] | 4452 | ret = nand_scan_ident(mtd, maxchips, NULL); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4453 | if (!ret) |
| 4454 | ret = nand_scan_tail(mtd); |
| 4455 | return ret; |
| 4456 | } |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 4457 | EXPORT_SYMBOL(nand_scan); |
David Woodhouse | 3b85c32 | 2006-09-25 17:06:53 +0100 | [diff] [blame] | 4458 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4459 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 4460 | * nand_release - [NAND Interface] Free resources held by the NAND device |
Brian Norris | 8b6e50c | 2011-05-25 14:59:01 -0700 | [diff] [blame] | 4461 | * @mtd: MTD device structure |
| 4462 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4463 | void nand_release(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4464 | { |
Boris BREZILLON | 862eba5 | 2015-12-01 12:03:03 +0100 | [diff] [blame] | 4465 | struct nand_chip *chip = mtd_to_nand(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4466 | |
Ivan Djelic | 193bd40 | 2011-03-11 11:05:33 +0100 | [diff] [blame] | 4467 | if (chip->ecc.mode == NAND_ECC_SOFT_BCH) |
| 4468 | nand_bch_free((struct nand_bch_control *)chip->ecc.priv); |
| 4469 | |
Jamie Iles | 5ffcaf3 | 2011-05-23 10:22:46 +0100 | [diff] [blame] | 4470 | mtd_device_unregister(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4471 | |
Jesper Juhl | fa67164 | 2005-11-07 01:01:27 -0800 | [diff] [blame] | 4472 | /* Free bad block table memory */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 4473 | kfree(chip->bbt); |
David Woodhouse | 4bf63fc | 2006-09-25 17:08:04 +0100 | [diff] [blame] | 4474 | if (!(chip->options & NAND_OWN_BUFFERS)) |
| 4475 | kfree(chip->buffers); |
Brian Norris | 58373ff | 2010-07-15 12:15:44 -0700 | [diff] [blame] | 4476 | |
| 4477 | /* Free bad block descriptor memory */ |
| 4478 | if (chip->badblock_pattern && chip->badblock_pattern->options |
| 4479 | & NAND_BBT_DYNAMICSTRUCT) |
| 4480 | kfree(chip->badblock_pattern); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4481 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4482 | EXPORT_SYMBOL_GPL(nand_release); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 4483 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4484 | MODULE_LICENSE("GPL"); |
Florian Fainelli | 7351d3a | 2010-09-07 13:23:45 +0200 | [diff] [blame] | 4485 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>"); |
| 4486 | MODULE_AUTHOR("Thomas Gleixner <tglx@linutronix.de>"); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 4487 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |