| Deepak Katragadda | 7843b10 | 2016-12-15 14:12:40 -0800 | [diff] [blame] | 1 | Qualcomm Technologies Camera Clock & Reset Controller Binding |
| 2 | ---------------------------------------------------- |
| 3 | |
| 4 | Required properties : |
| Deepak Katragadda | 443bd8d | 2017-08-28 22:30:19 +0530 | [diff] [blame] | 5 | - compatible : shall contain "qcom,cam_cc-sdm845", "qcom,cam_cc-sdm845-v2" or |
| 6 | "qcom,cam_cc-sdm670" |
| Deepak Katragadda | 7843b10 | 2016-12-15 14:12:40 -0800 | [diff] [blame] | 7 | - reg : shall contain base register location and length |
| 8 | - reg-names: names of registers listed in the same order as in |
| 9 | the reg property. |
| 10 | - #clock-cells : shall contain 1 |
| 11 | - #reset-cells : shall contain 1 |
| 12 | |
| 13 | Optional properties : |
| 14 | - vdd_<rail>-supply: The logic rail supply. |
| 15 | |
| 16 | Example: |
| 17 | clock_camcc: qcom,camcc@ad00000 { |
| 18 | compatible = "qcom,cam_cc-sdm845"; |
| 19 | reg = <0xad00000 0x10000>; |
| 20 | reg-names = "cc_base"; |
| 21 | vdd_cx-supply = <&pm8998_s9_level>; |
| 22 | vdd_mx-supply = <&pm8998_s6_level>; |
| 23 | #clock-cells = <1>; |
| 24 | #reset-cells = <1>; |
| 25 | }; |
| 26 | |