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Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
Tejun Heo8c3d3d42013-05-14 11:09:50 -07004 * Maintained by: Tejun Heo <tj@kernel.org>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05005 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/gfp.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050037#include <linux/pci.h>
Paul Gortmakerbff78322011-07-03 13:41:29 -040038#include <linux/module.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050039#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090040#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050041
42#include "libata.h"
43
Tejun Heoc4291372010-05-10 21:41:38 +020044static struct workqueue_struct *ata_sff_wq;
45
Tejun Heo624d5c52008-03-25 22:16:41 +090046const struct ata_port_operations ata_sff_port_ops = {
47 .inherits = &ata_base_port_ops,
48
Tejun Heof47451c2010-05-10 21:41:40 +020049 .qc_prep = ata_noop_qc_prep,
Tejun Heo9363c382008-04-07 22:47:16 +090050 .qc_issue = ata_sff_qc_issue,
Tejun Heo4c9bf4e2008-04-07 22:47:20 +090051 .qc_fill_rtf = ata_sff_qc_fill_rtf,
Tejun Heo624d5c52008-03-25 22:16:41 +090052
Tejun Heo9363c382008-04-07 22:47:16 +090053 .freeze = ata_sff_freeze,
54 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090055 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090056 .softreset = ata_sff_softreset,
Tejun Heo57c9efd2008-04-07 22:47:19 +090057 .hardreset = sata_sff_hardreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090058 .postreset = ata_sff_postreset,
Tejun Heo9363c382008-04-07 22:47:16 +090059 .error_handler = ata_sff_error_handler,
Tejun Heo624d5c52008-03-25 22:16:41 +090060
Tejun Heo5682ed32008-04-07 22:47:16 +090061 .sff_dev_select = ata_sff_dev_select,
62 .sff_check_status = ata_sff_check_status,
63 .sff_tf_load = ata_sff_tf_load,
64 .sff_tf_read = ata_sff_tf_read,
65 .sff_exec_command = ata_sff_exec_command,
66 .sff_data_xfer = ata_sff_data_xfer,
Tejun Heo8244cd02010-05-10 21:41:36 +020067 .sff_drain_fifo = ata_sff_drain_fifo,
Tejun Heo624d5c52008-03-25 22:16:41 +090068
Alan Coxc96f1732009-03-24 10:23:46 +000069 .lost_interrupt = ata_sff_lost_interrupt,
Tejun Heo624d5c52008-03-25 22:16:41 +090070};
Alan Cox0fe40ff2009-01-05 14:16:13 +000071EXPORT_SYMBOL_GPL(ata_sff_port_ops);
Tejun Heo624d5c52008-03-25 22:16:41 +090072
Tejun Heo624d5c52008-03-25 22:16:41 +090073/**
Tejun Heo9363c382008-04-07 22:47:16 +090074 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +090075 * @ap: port where the device is
76 *
77 * Reads ATA taskfile status register for currently-selected device
78 * and return its value. This also clears pending interrupts
79 * from this device
80 *
81 * LOCKING:
82 * Inherited from caller.
83 */
Tejun Heo9363c382008-04-07 22:47:16 +090084u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +090085{
86 return ioread8(ap->ioaddr.status_addr);
87}
Alan Cox0fe40ff2009-01-05 14:16:13 +000088EXPORT_SYMBOL_GPL(ata_sff_check_status);
Tejun Heo272f7882008-03-25 22:16:40 +090089
90/**
Tejun Heo9363c382008-04-07 22:47:16 +090091 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +090092 * @ap: port where the device is
93 *
94 * Reads ATA taskfile alternate status register for
95 * currently-selected device and return its value.
96 *
97 * Note: may NOT be used as the check_altstatus() entry in
98 * ata_port_operations.
99 *
100 * LOCKING:
101 * Inherited from caller.
102 */
Alan Coxa57c1ba2008-05-29 22:10:58 +0100103static u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900104{
Tejun Heo5682ed32008-04-07 22:47:16 +0900105 if (ap->ops->sff_check_altstatus)
106 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900107
108 return ioread8(ap->ioaddr.altstatus_addr);
109}
110
111/**
Alan Coxa57c1ba2008-05-29 22:10:58 +0100112 * ata_sff_irq_status - Check if the device is busy
113 * @ap: port where the device is
114 *
115 * Determine if the port is currently busy. Uses altstatus
116 * if available in order to avoid clearing shared IRQ status
117 * when finding an IRQ source. Non ctl capable devices don't
118 * share interrupt lines fortunately for us.
119 *
120 * LOCKING:
121 * Inherited from caller.
122 */
123static u8 ata_sff_irq_status(struct ata_port *ap)
124{
125 u8 status;
126
127 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
128 status = ata_sff_altstatus(ap);
129 /* Not us: We are busy */
130 if (status & ATA_BUSY)
Alan Cox0fe40ff2009-01-05 14:16:13 +0000131 return status;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100132 }
133 /* Clear INTRQ latch */
Hugh Dickins6311c902008-06-05 14:44:39 +0100134 status = ap->ops->sff_check_status(ap);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100135 return status;
136}
137
138/**
139 * ata_sff_sync - Flush writes
140 * @ap: Port to wait for.
141 *
142 * CAUTION:
143 * If we have an mmio device with no ctl and no altstatus
144 * method this will fail. No such devices are known to exist.
145 *
146 * LOCKING:
147 * Inherited from caller.
148 */
149
150static void ata_sff_sync(struct ata_port *ap)
151{
152 if (ap->ops->sff_check_altstatus)
153 ap->ops->sff_check_altstatus(ap);
154 else if (ap->ioaddr.altstatus_addr)
155 ioread8(ap->ioaddr.altstatus_addr);
156}
157
158/**
159 * ata_sff_pause - Flush writes and wait 400nS
160 * @ap: Port to pause for.
161 *
162 * CAUTION:
163 * If we have an mmio device with no ctl and no altstatus
164 * method this will fail. No such devices are known to exist.
165 *
166 * LOCKING:
167 * Inherited from caller.
168 */
169
170void ata_sff_pause(struct ata_port *ap)
171{
172 ata_sff_sync(ap);
173 ndelay(400);
174}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000175EXPORT_SYMBOL_GPL(ata_sff_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100176
177/**
178 * ata_sff_dma_pause - Pause before commencing DMA
179 * @ap: Port to pause for.
180 *
181 * Perform I/O fencing and ensure sufficient cycle delays occur
182 * for the HDMA1:0 transition
183 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000184
Alan Coxa57c1ba2008-05-29 22:10:58 +0100185void ata_sff_dma_pause(struct ata_port *ap)
186{
187 if (ap->ops->sff_check_altstatus || ap->ioaddr.altstatus_addr) {
188 /* An altstatus read will cause the needed delay without
189 messing up the IRQ status */
190 ata_sff_altstatus(ap);
191 return;
192 }
193 /* There are no DMA controllers without ctl. BUG here to ensure
194 we never violate the HDMA1:0 transition timing and risk
195 corruption. */
196 BUG();
197}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000198EXPORT_SYMBOL_GPL(ata_sff_dma_pause);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100199
200/**
Tejun Heo9363c382008-04-07 22:47:16 +0900201 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900202 * @ap: port containing status register to be polled
Tejun Heo341c2c92008-05-20 02:17:51 +0900203 * @tmout_pat: impatience timeout in msecs
204 * @tmout: overall timeout in msecs
Tejun Heo624d5c52008-03-25 22:16:41 +0900205 *
206 * Sleep until ATA Status register bit BSY clears,
207 * or a timeout occurs.
208 *
209 * LOCKING:
210 * Kernel thread context (may sleep).
211 *
212 * RETURNS:
213 * 0 on success, -errno otherwise.
214 */
Tejun Heo9363c382008-04-07 22:47:16 +0900215int ata_sff_busy_sleep(struct ata_port *ap,
216 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900217{
218 unsigned long timer_start, timeout;
219 u8 status;
220
Tejun Heo9363c382008-04-07 22:47:16 +0900221 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900222 timer_start = jiffies;
Tejun Heo341c2c92008-05-20 02:17:51 +0900223 timeout = ata_deadline(timer_start, tmout_pat);
Tejun Heo624d5c52008-03-25 22:16:41 +0900224 while (status != 0xff && (status & ATA_BUSY) &&
225 time_before(jiffies, timeout)) {
Tejun Heo97750ce2010-09-06 17:56:29 +0200226 ata_msleep(ap, 50);
Tejun Heo9363c382008-04-07 22:47:16 +0900227 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900228 }
229
230 if (status != 0xff && (status & ATA_BUSY))
Joe Perchesa9a79df2011-04-15 15:51:59 -0700231 ata_port_warn(ap,
232 "port is slow to respond, please be patient (Status 0x%x)\n",
233 status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900234
Tejun Heo341c2c92008-05-20 02:17:51 +0900235 timeout = ata_deadline(timer_start, tmout);
Tejun Heo624d5c52008-03-25 22:16:41 +0900236 while (status != 0xff && (status & ATA_BUSY) &&
237 time_before(jiffies, timeout)) {
Tejun Heo97750ce2010-09-06 17:56:29 +0200238 ata_msleep(ap, 50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900239 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900240 }
241
242 if (status == 0xff)
243 return -ENODEV;
244
245 if (status & ATA_BUSY) {
Joe Perchesa9a79df2011-04-15 15:51:59 -0700246 ata_port_err(ap,
247 "port failed to respond (%lu secs, Status 0x%x)\n",
248 DIV_ROUND_UP(tmout, 1000), status);
Tejun Heo624d5c52008-03-25 22:16:41 +0900249 return -EBUSY;
250 }
251
252 return 0;
253}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000254EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
Tejun Heo624d5c52008-03-25 22:16:41 +0900255
Tejun Heoaa2731a2008-04-07 22:47:19 +0900256static int ata_sff_check_ready(struct ata_link *link)
257{
258 u8 status = link->ap->ops->sff_check_status(link->ap);
259
Tejun Heo78ab88f2008-05-01 23:41:41 +0900260 return ata_check_ready(status);
Tejun Heoaa2731a2008-04-07 22:47:19 +0900261}
262
Tejun Heo624d5c52008-03-25 22:16:41 +0900263/**
Tejun Heo9363c382008-04-07 22:47:16 +0900264 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900265 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900266 * @deadline: deadline jiffies for the operation
267 *
268 * Sleep until ATA Status register bit BSY clears, or timeout
269 * occurs.
270 *
271 * LOCKING:
272 * Kernel thread context (may sleep).
273 *
274 * RETURNS:
275 * 0 on success, -errno otherwise.
276 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900277int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900278{
Tejun Heoaa2731a2008-04-07 22:47:19 +0900279 return ata_wait_ready(link, deadline, ata_sff_check_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900280}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000281EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900282
283/**
Sergei Shtylyov41dec292010-05-07 22:47:50 +0400284 * ata_sff_set_devctl - Write device control reg
285 * @ap: port where the device is
286 * @ctl: value to write
287 *
288 * Writes ATA taskfile device control register.
289 *
290 * Note: may NOT be used as the sff_set_devctl() entry in
291 * ata_port_operations.
292 *
293 * LOCKING:
294 * Inherited from caller.
295 */
296static void ata_sff_set_devctl(struct ata_port *ap, u8 ctl)
297{
298 if (ap->ops->sff_set_devctl)
299 ap->ops->sff_set_devctl(ap, ctl);
300 else
301 iowrite8(ctl, ap->ioaddr.ctl_addr);
302}
303
304/**
Tejun Heo9363c382008-04-07 22:47:16 +0900305 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900306 * @ap: ATA channel to manipulate
307 * @device: ATA device (numbered from zero) to select
308 *
309 * Use the method defined in the ATA specification to
310 * make either device 0, or device 1, active on the
311 * ATA channel. Works with both PIO and MMIO.
312 *
313 * May be used as the dev_select() entry in ata_port_operations.
314 *
315 * LOCKING:
316 * caller.
317 */
Tejun Heo9363c382008-04-07 22:47:16 +0900318void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900319{
320 u8 tmp;
321
322 if (device == 0)
323 tmp = ATA_DEVICE_OBS;
324 else
325 tmp = ATA_DEVICE_OBS | ATA_DEV1;
326
327 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900328 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900329}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000330EXPORT_SYMBOL_GPL(ata_sff_dev_select);
Tejun Heo624d5c52008-03-25 22:16:41 +0900331
332/**
333 * ata_dev_select - Select device 0/1 on ATA bus
334 * @ap: ATA channel to manipulate
335 * @device: ATA device (numbered from zero) to select
336 * @wait: non-zero to wait for Status register BSY bit to clear
337 * @can_sleep: non-zero if context allows sleeping
338 *
339 * Use the method defined in the ATA specification to
340 * make either device 0, or device 1, active on the
341 * ATA channel.
342 *
Tejun Heo9363c382008-04-07 22:47:16 +0900343 * This is a high-level version of ata_sff_dev_select(), which
344 * additionally provides the services of inserting the proper
345 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900346 *
347 * LOCKING:
348 * caller.
349 */
Tejun Heoc7a82092010-05-10 21:41:29 +0200350static void ata_dev_select(struct ata_port *ap, unsigned int device,
Tejun Heo624d5c52008-03-25 22:16:41 +0900351 unsigned int wait, unsigned int can_sleep)
352{
353 if (ata_msg_probe(ap))
Joe Perchesa9a79df2011-04-15 15:51:59 -0700354 ata_port_info(ap, "ata_dev_select: ENTER, device %u, wait %u\n",
355 device, wait);
Tejun Heo624d5c52008-03-25 22:16:41 +0900356
357 if (wait)
358 ata_wait_idle(ap);
359
Tejun Heo5682ed32008-04-07 22:47:16 +0900360 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900361
362 if (wait) {
363 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
Tejun Heo97750ce2010-09-06 17:56:29 +0200364 ata_msleep(ap, 150);
Tejun Heo624d5c52008-03-25 22:16:41 +0900365 ata_wait_idle(ap);
366 }
367}
368
369/**
Tejun Heo9363c382008-04-07 22:47:16 +0900370 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900371 * @ap: Port on which interrupts are enabled.
372 *
373 * Enable interrupts on a legacy IDE device using MMIO or PIO,
374 * wait for idle, clear any pending interrupts.
375 *
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400376 * Note: may NOT be used as the sff_irq_on() entry in
377 * ata_port_operations.
378 *
Tejun Heo90088bb2006-10-09 11:10:26 +0900379 * LOCKING:
380 * Inherited from caller.
381 */
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400382void ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900383{
384 struct ata_ioports *ioaddr = &ap->ioaddr;
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400385
386 if (ap->ops->sff_irq_on) {
387 ap->ops->sff_irq_on(ap);
388 return;
389 }
Tejun Heo90088bb2006-10-09 11:10:26 +0900390
391 ap->ctl &= ~ATA_NIEN;
392 ap->last_ctl = ap->ctl;
393
Sergei Shtylyove42a5422010-05-07 22:49:02 +0400394 if (ap->ops->sff_set_devctl || ioaddr->ctl_addr)
395 ata_sff_set_devctl(ap, ap->ctl);
396 ata_wait_idle(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900397
Tejun Heo37f65b82010-05-19 22:10:20 +0200398 if (ap->ops->sff_irq_clear)
399 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900400}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000401EXPORT_SYMBOL_GPL(ata_sff_irq_on);
Tejun Heo90088bb2006-10-09 11:10:26 +0900402
403/**
Tejun Heo9363c382008-04-07 22:47:16 +0900404 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500405 * @ap: Port to which output is sent
406 * @tf: ATA taskfile register set
407 *
408 * Outputs ATA taskfile to standard ATA host controller.
409 *
410 * LOCKING:
411 * Inherited from caller.
412 */
Tejun Heo9363c382008-04-07 22:47:16 +0900413void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500414{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900415 struct ata_ioports *ioaddr = &ap->ioaddr;
416 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
417
418 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900419 if (ioaddr->ctl_addr)
420 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900421 ap->last_ctl = tf->ctl;
Tejun Heo40c60232010-09-09 17:13:31 +0200422 ata_wait_idle(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900423 }
424
425 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900426 WARN_ON_ONCE(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900427 iowrite8(tf->hob_feature, ioaddr->feature_addr);
428 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
429 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
430 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
431 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
432 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
433 tf->hob_feature,
434 tf->hob_nsect,
435 tf->hob_lbal,
436 tf->hob_lbam,
437 tf->hob_lbah);
438 }
439
440 if (is_addr) {
441 iowrite8(tf->feature, ioaddr->feature_addr);
442 iowrite8(tf->nsect, ioaddr->nsect_addr);
443 iowrite8(tf->lbal, ioaddr->lbal_addr);
444 iowrite8(tf->lbam, ioaddr->lbam_addr);
445 iowrite8(tf->lbah, ioaddr->lbah_addr);
446 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
447 tf->feature,
448 tf->nsect,
449 tf->lbal,
450 tf->lbam,
451 tf->lbah);
452 }
453
454 if (tf->flags & ATA_TFLAG_DEVICE) {
455 iowrite8(tf->device, ioaddr->device_addr);
456 VPRINTK("device 0x%X\n", tf->device);
457 }
Tejun Heo40c60232010-09-09 17:13:31 +0200458
459 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500460}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000461EXPORT_SYMBOL_GPL(ata_sff_tf_load);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500462
463/**
Tejun Heo9363c382008-04-07 22:47:16 +0900464 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500465 * @ap: Port from which input is read
466 * @tf: ATA taskfile register set for storing input
467 *
468 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000469 * into @tf. Assumes the device has a fully SFF compliant task file
470 * layout and behaviour. If you device does not (eg has a different
471 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500472 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500473 * LOCKING:
474 * Inherited from caller.
475 */
Tejun Heo9363c382008-04-07 22:47:16 +0900476void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500477{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900478 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500479
Tejun Heo9363c382008-04-07 22:47:16 +0900480 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900481 tf->feature = ioread8(ioaddr->error_addr);
482 tf->nsect = ioread8(ioaddr->nsect_addr);
483 tf->lbal = ioread8(ioaddr->lbal_addr);
484 tf->lbam = ioread8(ioaddr->lbam_addr);
485 tf->lbah = ioread8(ioaddr->lbah_addr);
486 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500487
Tejun Heo0d5ff562007-02-01 15:06:36 +0900488 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900489 if (likely(ioaddr->ctl_addr)) {
490 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
491 tf->hob_feature = ioread8(ioaddr->error_addr);
492 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
493 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
494 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
495 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
496 iowrite8(tf->ctl, ioaddr->ctl_addr);
497 ap->last_ctl = tf->ctl;
498 } else
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900499 WARN_ON_ONCE(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900500 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500501}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000502EXPORT_SYMBOL_GPL(ata_sff_tf_read);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500503
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500504/**
Tejun Heo9363c382008-04-07 22:47:16 +0900505 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900506 * @ap: port to which command is being issued
507 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500508 *
Tejun Heo272f7882008-03-25 22:16:40 +0900509 * Issues ATA command, with proper synchronization with interrupt
510 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500511 *
512 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400513 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500514 */
Tejun Heo9363c382008-04-07 22:47:16 +0900515void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500516{
Tejun Heo272f7882008-03-25 22:16:40 +0900517 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500518
Tejun Heo272f7882008-03-25 22:16:40 +0900519 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900520 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500521}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000522EXPORT_SYMBOL_GPL(ata_sff_exec_command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500523
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900524/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900525 * ata_tf_to_host - issue ATA taskfile to host controller
526 * @ap: port to which command is being issued
527 * @tf: ATA taskfile register set
528 *
529 * Issues ATA taskfile register set to ATA host controller,
530 * with proper synchronization with interrupt handler and
531 * other threads.
532 *
533 * LOCKING:
534 * spin_lock_irqsave(host lock)
535 */
536static inline void ata_tf_to_host(struct ata_port *ap,
537 const struct ata_taskfile *tf)
538{
Tejun Heo5682ed32008-04-07 22:47:16 +0900539 ap->ops->sff_tf_load(ap, tf);
540 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900541}
542
543/**
Tejun Heo9363c382008-04-07 22:47:16 +0900544 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900545 * @dev: device to target
546 * @buf: data buffer
547 * @buflen: buffer length
548 * @rw: read/write
549 *
550 * Transfer data from/to the device data register by PIO.
551 *
552 * LOCKING:
553 * Inherited from caller.
554 *
555 * RETURNS:
556 * Bytes consumed.
557 */
Tejun Heo9363c382008-04-07 22:47:16 +0900558unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
559 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900560{
561 struct ata_port *ap = dev->link->ap;
562 void __iomem *data_addr = ap->ioaddr.data_addr;
563 unsigned int words = buflen >> 1;
564
565 /* Transfer multiple of 2 bytes */
566 if (rw == READ)
567 ioread16_rep(data_addr, buf, words);
568 else
569 iowrite16_rep(data_addr, buf, words);
570
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400571 /* Transfer trailing byte, if any. */
Tejun Heo624d5c52008-03-25 22:16:41 +0900572 if (unlikely(buflen & 0x01)) {
Tejun Heo21dba242011-09-06 13:09:05 +0900573 unsigned char pad[2] = { };
Tejun Heo624d5c52008-03-25 22:16:41 +0900574
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400575 /* Point buf to the tail of buffer */
576 buf += buflen - 1;
577
578 /*
579 * Use io*16_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100580 * swapping bytes to and from on the big endian machines...
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400581 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900582 if (rw == READ) {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400583 ioread16_rep(data_addr, pad, 1);
584 *buf = pad[0];
Tejun Heo624d5c52008-03-25 22:16:41 +0900585 } else {
Sergei Shtylyov2102d742009-02-15 23:30:38 +0400586 pad[0] = *buf;
587 iowrite16_rep(data_addr, pad, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +0900588 }
589 words++;
590 }
591
592 return words << 1;
593}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000594EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
Tejun Heo624d5c52008-03-25 22:16:41 +0900595
596/**
Alan Cox871af122009-01-05 14:16:39 +0000597 * ata_sff_data_xfer32 - Transfer data by PIO
598 * @dev: device to target
599 * @buf: data buffer
600 * @buflen: buffer length
601 * @rw: read/write
602 *
603 * Transfer data from/to the device data register by PIO using 32bit
604 * I/O operations.
605 *
606 * LOCKING:
607 * Inherited from caller.
608 *
609 * RETURNS:
610 * Bytes consumed.
611 */
612
613unsigned int ata_sff_data_xfer32(struct ata_device *dev, unsigned char *buf,
614 unsigned int buflen, int rw)
615{
616 struct ata_port *ap = dev->link->ap;
617 void __iomem *data_addr = ap->ioaddr.data_addr;
618 unsigned int words = buflen >> 2;
619 int slop = buflen & 3;
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100620
Alan Coxe3cf95d2009-04-09 17:31:17 +0100621 if (!(ap->pflags & ATA_PFLAG_PIO32))
622 return ata_sff_data_xfer(dev, buf, buflen, rw);
Alan Cox871af122009-01-05 14:16:39 +0000623
624 /* Transfer multiple of 4 bytes */
625 if (rw == READ)
626 ioread32_rep(data_addr, buf, words);
627 else
628 iowrite32_rep(data_addr, buf, words);
629
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400630 /* Transfer trailing bytes, if any */
Alan Cox871af122009-01-05 14:16:39 +0000631 if (unlikely(slop)) {
Tejun Heo21dba242011-09-06 13:09:05 +0900632 unsigned char pad[4] = { };
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400633
634 /* Point buf to the tail of buffer */
635 buf += buflen - slop;
636
637 /*
638 * Use io*_rep() accessors here as well to avoid pointlessly
Krzysztof Halasa972b94f2009-11-11 00:55:27 +0100639 * swapping bytes to and from on the big endian machines...
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400640 */
Alan Cox871af122009-01-05 14:16:39 +0000641 if (rw == READ) {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400642 if (slop < 3)
643 ioread16_rep(data_addr, pad, 1);
644 else
645 ioread32_rep(data_addr, pad, 1);
646 memcpy(buf, pad, slop);
Alan Cox871af122009-01-05 14:16:39 +0000647 } else {
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400648 memcpy(pad, buf, slop);
649 if (slop < 3)
650 iowrite16_rep(data_addr, pad, 1);
651 else
652 iowrite32_rep(data_addr, pad, 1);
Alan Cox871af122009-01-05 14:16:39 +0000653 }
Alan Cox871af122009-01-05 14:16:39 +0000654 }
Sergei Shtylyovd1b35252009-02-15 23:24:24 +0400655 return (buflen + 1) & ~1;
Alan Cox871af122009-01-05 14:16:39 +0000656}
657EXPORT_SYMBOL_GPL(ata_sff_data_xfer32);
658
659/**
Tejun Heo9363c382008-04-07 22:47:16 +0900660 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900661 * @dev: device to target
662 * @buf: data buffer
663 * @buflen: buffer length
664 * @rw: read/write
665 *
666 * Transfer data from/to the device data register by PIO. Do the
667 * transfer with interrupts disabled.
668 *
669 * LOCKING:
670 * Inherited from caller.
671 *
672 * RETURNS:
673 * Bytes consumed.
674 */
Tejun Heo9363c382008-04-07 22:47:16 +0900675unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
676 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900677{
678 unsigned long flags;
679 unsigned int consumed;
680
681 local_irq_save(flags);
Bartlomiej Zolnierkiewicz418fae22011-10-13 15:04:43 +0200682 consumed = ata_sff_data_xfer32(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900683 local_irq_restore(flags);
684
685 return consumed;
686}
Alan Cox0fe40ff2009-01-05 14:16:13 +0000687EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
Tejun Heo624d5c52008-03-25 22:16:41 +0900688
689/**
690 * ata_pio_sector - Transfer a sector of data.
691 * @qc: Command on going
692 *
693 * Transfer qc->sect_size bytes of data from/to the ATA device.
694 *
695 * LOCKING:
696 * Inherited from caller.
697 */
698static void ata_pio_sector(struct ata_queued_cmd *qc)
699{
700 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
701 struct ata_port *ap = qc->ap;
702 struct page *page;
703 unsigned int offset;
704 unsigned char *buf;
705
706 if (qc->curbytes == qc->nbytes - qc->sect_size)
707 ap->hsm_task_state = HSM_ST_LAST;
708
709 page = sg_page(qc->cursg);
710 offset = qc->cursg->offset + qc->cursg_ofs;
711
712 /* get the current page and offset */
713 page = nth_page(page, (offset >> PAGE_SHIFT));
714 offset %= PAGE_SIZE;
715
716 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
717
718 if (PageHighMem(page)) {
719 unsigned long flags;
720
721 /* FIXME: use a bounce buffer */
722 local_irq_save(flags);
Cong Wang496cda82011-11-25 23:14:18 +0800723 buf = kmap_atomic(page);
Tejun Heo624d5c52008-03-25 22:16:41 +0900724
725 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900726 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
727 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900728
Cong Wang496cda82011-11-25 23:14:18 +0800729 kunmap_atomic(buf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900730 local_irq_restore(flags);
731 } else {
732 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900733 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
734 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900735 }
736
Sebastian Andrzej Siewior3842e832010-03-21 22:52:23 +0100737 if (!do_write && !PageSlab(page))
Catalin Marinas2d68b7f2010-02-04 01:04:50 -0500738 flush_dcache_page(page);
739
Tejun Heo624d5c52008-03-25 22:16:41 +0900740 qc->curbytes += qc->sect_size;
741 qc->cursg_ofs += qc->sect_size;
742
743 if (qc->cursg_ofs == qc->cursg->length) {
744 qc->cursg = sg_next(qc->cursg);
745 qc->cursg_ofs = 0;
746 }
747}
748
749/**
750 * ata_pio_sectors - Transfer one or many sectors.
751 * @qc: Command on going
752 *
753 * Transfer one or many sectors of data from/to the
754 * ATA device for the DRQ request.
755 *
756 * LOCKING:
757 * Inherited from caller.
758 */
759static void ata_pio_sectors(struct ata_queued_cmd *qc)
760{
761 if (is_multi_taskfile(&qc->tf)) {
762 /* READ/WRITE MULTIPLE */
763 unsigned int nsect;
764
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900765 WARN_ON_ONCE(qc->dev->multi_count == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +0900766
767 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
768 qc->dev->multi_count);
769 while (nsect--)
770 ata_pio_sector(qc);
771 } else
772 ata_pio_sector(qc);
773
Alan Coxa57c1ba2008-05-29 22:10:58 +0100774 ata_sff_sync(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900775}
776
777/**
778 * atapi_send_cdb - Write CDB bytes to hardware
779 * @ap: Port to which ATAPI device is attached.
780 * @qc: Taskfile currently active
781 *
782 * When device has indicated its readiness to accept
783 * a CDB, this function is called. Send the CDB.
784 *
785 * LOCKING:
786 * caller.
787 */
788static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
789{
790 /* send SCSI cdb */
791 DPRINTK("send cdb\n");
Tejun Heoefcb3cf2009-01-09 19:19:14 +0900792 WARN_ON_ONCE(qc->dev->cdb_len < 12);
Tejun Heo624d5c52008-03-25 22:16:41 +0900793
Tejun Heo5682ed32008-04-07 22:47:16 +0900794 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Alan Coxa57c1ba2008-05-29 22:10:58 +0100795 ata_sff_sync(ap);
796 /* FIXME: If the CDB is for DMA do we need to do the transition delay
797 or is bmdma_start guaranteed to do it ? */
Tejun Heo624d5c52008-03-25 22:16:41 +0900798 switch (qc->tf.protocol) {
799 case ATAPI_PROT_PIO:
800 ap->hsm_task_state = HSM_ST;
801 break;
802 case ATAPI_PROT_NODATA:
803 ap->hsm_task_state = HSM_ST_LAST;
804 break;
Tejun Heo9a7780c2010-05-19 22:10:24 +0200805#ifdef CONFIG_ATA_BMDMA
Tejun Heo624d5c52008-03-25 22:16:41 +0900806 case ATAPI_PROT_DMA:
807 ap->hsm_task_state = HSM_ST_LAST;
808 /* initiate bmdma */
809 ap->ops->bmdma_start(qc);
810 break;
Tejun Heo9a7780c2010-05-19 22:10:24 +0200811#endif /* CONFIG_ATA_BMDMA */
812 default:
813 BUG();
Tejun Heo624d5c52008-03-25 22:16:41 +0900814 }
815}
816
817/**
818 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
819 * @qc: Command on going
820 * @bytes: number of bytes
821 *
822 * Transfer Transfer data from/to the ATAPI device.
823 *
824 * LOCKING:
825 * Inherited from caller.
826 *
827 */
828static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
829{
830 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
831 struct ata_port *ap = qc->ap;
832 struct ata_device *dev = qc->dev;
833 struct ata_eh_info *ehi = &dev->link->eh_info;
834 struct scatterlist *sg;
835 struct page *page;
836 unsigned char *buf;
837 unsigned int offset, count, consumed;
838
839next_sg:
840 sg = qc->cursg;
841 if (unlikely(!sg)) {
842 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
843 "buf=%u cur=%u bytes=%u",
844 qc->nbytes, qc->curbytes, bytes);
845 return -1;
846 }
847
848 page = sg_page(sg);
849 offset = sg->offset + qc->cursg_ofs;
850
851 /* get the current page and offset */
852 page = nth_page(page, (offset >> PAGE_SHIFT));
853 offset %= PAGE_SIZE;
854
855 /* don't overrun current sg */
856 count = min(sg->length - qc->cursg_ofs, bytes);
857
858 /* don't cross page boundaries */
859 count = min(count, (unsigned int)PAGE_SIZE - offset);
860
861 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
862
863 if (PageHighMem(page)) {
864 unsigned long flags;
865
866 /* FIXME: use bounce buffer */
867 local_irq_save(flags);
Cong Wang496cda82011-11-25 23:14:18 +0800868 buf = kmap_atomic(page);
Tejun Heo624d5c52008-03-25 22:16:41 +0900869
870 /* do the actual data transfer */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000871 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
872 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900873
Cong Wang496cda82011-11-25 23:14:18 +0800874 kunmap_atomic(buf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900875 local_irq_restore(flags);
876 } else {
877 buf = page_address(page);
Alan Cox0fe40ff2009-01-05 14:16:13 +0000878 consumed = ap->ops->sff_data_xfer(dev, buf + offset,
879 count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900880 }
881
882 bytes -= min(bytes, consumed);
883 qc->curbytes += count;
884 qc->cursg_ofs += count;
885
886 if (qc->cursg_ofs == sg->length) {
887 qc->cursg = sg_next(qc->cursg);
888 qc->cursg_ofs = 0;
889 }
890
Christian Borntraegera0f79f72009-01-13 10:38:36 +0100891 /*
892 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
893 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
894 * check correctly as it doesn't know if it is the last request being
895 * made. Somebody should implement a proper sanity check.
896 */
Tejun Heo624d5c52008-03-25 22:16:41 +0900897 if (bytes)
898 goto next_sg;
899 return 0;
900}
901
902/**
903 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
904 * @qc: Command on going
905 *
906 * Transfer Transfer data from/to the ATAPI device.
907 *
908 * LOCKING:
909 * Inherited from caller.
910 */
911static void atapi_pio_bytes(struct ata_queued_cmd *qc)
912{
913 struct ata_port *ap = qc->ap;
914 struct ata_device *dev = qc->dev;
915 struct ata_eh_info *ehi = &dev->link->eh_info;
916 unsigned int ireason, bc_lo, bc_hi, bytes;
917 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
918
919 /* Abuse qc->result_tf for temp storage of intermediate TF
920 * here to save some kernel stack usage.
921 * For normal completion, qc->result_tf is not relevant. For
922 * error, qc->result_tf is later overwritten by ata_qc_complete().
923 * So, the correctness of qc->result_tf is not affected.
924 */
Tejun Heo5682ed32008-04-07 22:47:16 +0900925 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900926 ireason = qc->result_tf.nsect;
927 bc_lo = qc->result_tf.lbam;
928 bc_hi = qc->result_tf.lbah;
929 bytes = (bc_hi << 8) | bc_lo;
930
931 /* shall be cleared to zero, indicating xfer of data */
Sergei Shtylyov002ae082011-12-02 18:39:53 +0300932 if (unlikely(ireason & ATAPI_COD))
Tejun Heo624d5c52008-03-25 22:16:41 +0900933 goto atapi_check;
934
935 /* make sure transfer direction matches expected */
Sergei Shtylyov002ae082011-12-02 18:39:53 +0300936 i_write = ((ireason & ATAPI_IO) == 0) ? 1 : 0;
Tejun Heo624d5c52008-03-25 22:16:41 +0900937 if (unlikely(do_write != i_write))
938 goto atapi_check;
939
940 if (unlikely(!bytes))
941 goto atapi_check;
942
943 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
944
945 if (unlikely(__atapi_pio_bytes(qc, bytes)))
946 goto err_out;
Alan Coxa57c1ba2008-05-29 22:10:58 +0100947 ata_sff_sync(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900948
949 return;
950
951 atapi_check:
952 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
953 ireason, bytes);
954 err_out:
955 qc->err_mask |= AC_ERR_HSM;
956 ap->hsm_task_state = HSM_ST_ERR;
957}
958
959/**
960 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
961 * @ap: the target ata_port
962 * @qc: qc on going
963 *
964 * RETURNS:
965 * 1 if ok in workqueue, 0 otherwise.
966 */
Alan Cox0fe40ff2009-01-05 14:16:13 +0000967static inline int ata_hsm_ok_in_wq(struct ata_port *ap,
968 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900969{
970 if (qc->tf.flags & ATA_TFLAG_POLLING)
971 return 1;
972
973 if (ap->hsm_task_state == HSM_ST_FIRST) {
974 if (qc->tf.protocol == ATA_PROT_PIO &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000975 (qc->tf.flags & ATA_TFLAG_WRITE))
Tejun Heo624d5c52008-03-25 22:16:41 +0900976 return 1;
977
978 if (ata_is_atapi(qc->tf.protocol) &&
Alan Cox0fe40ff2009-01-05 14:16:13 +0000979 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heo624d5c52008-03-25 22:16:41 +0900980 return 1;
981 }
982
983 return 0;
984}
985
986/**
987 * ata_hsm_qc_complete - finish a qc running on standard HSM
988 * @qc: Command to complete
989 * @in_wq: 1 if called from workqueue, 0 otherwise
990 *
991 * Finish @qc which is running on standard HSM.
992 *
993 * LOCKING:
994 * If @in_wq is zero, spin_lock_irqsave(host lock).
995 * Otherwise, none on entry and grabs host lock.
996 */
997static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
998{
999 struct ata_port *ap = qc->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09001000
1001 if (ap->ops->error_handler) {
1002 if (in_wq) {
Tejun Heo624d5c52008-03-25 22:16:41 +09001003 /* EH might have kicked in while host lock is
1004 * released.
1005 */
1006 qc = ata_qc_from_tag(ap, qc->tag);
1007 if (qc) {
1008 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001009 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001010 ata_qc_complete(qc);
1011 } else
1012 ata_port_freeze(ap);
1013 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001014 } else {
1015 if (likely(!(qc->err_mask & AC_ERR_HSM)))
1016 ata_qc_complete(qc);
1017 else
1018 ata_port_freeze(ap);
1019 }
1020 } else {
1021 if (in_wq) {
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001022 ata_sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001023 ata_qc_complete(qc);
Tejun Heo624d5c52008-03-25 22:16:41 +09001024 } else
1025 ata_qc_complete(qc);
1026 }
1027}
1028
1029/**
Tejun Heo9363c382008-04-07 22:47:16 +09001030 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001031 * @ap: the target ata_port
1032 * @qc: qc on going
1033 * @status: current device status
1034 * @in_wq: 1 if called from workqueue, 0 otherwise
1035 *
1036 * RETURNS:
1037 * 1 when poll next status needed, 0 otherwise.
1038 */
Tejun Heo9363c382008-04-07 22:47:16 +09001039int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1040 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001041{
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001042 struct ata_link *link = qc->dev->link;
1043 struct ata_eh_info *ehi = &link->eh_info;
Tejun Heo624d5c52008-03-25 22:16:41 +09001044 int poll_next;
1045
Tejun Heo8eee1d32016-02-01 11:33:21 -05001046 lockdep_assert_held(ap->lock);
1047
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001048 WARN_ON_ONCE((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001049
Tejun Heo9363c382008-04-07 22:47:16 +09001050 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001051 * like DMA polling into the workqueue. Notice that
1052 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1053 */
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001054 WARN_ON_ONCE(in_wq != ata_hsm_ok_in_wq(ap, qc));
Tejun Heo624d5c52008-03-25 22:16:41 +09001055
1056fsm_start:
1057 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1058 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1059
1060 switch (ap->hsm_task_state) {
1061 case HSM_ST_FIRST:
1062 /* Send first data block or PACKET CDB */
1063
1064 /* If polling, we will stay in the work queue after
1065 * sending the data. Otherwise, interrupt handler
1066 * takes over after sending the data.
1067 */
1068 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1069
1070 /* check device status */
1071 if (unlikely((status & ATA_DRQ) == 0)) {
1072 /* handle BSY=0, DRQ=0 as error */
1073 if (likely(status & (ATA_ERR | ATA_DF)))
1074 /* device stops HSM for abort/error */
1075 qc->err_mask |= AC_ERR_DEV;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001076 else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001077 /* HSM violation. Let EH handle this */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001078 ata_ehi_push_desc(ehi,
1079 "ST_FIRST: !(DRQ|ERR|DF)");
Tejun Heo624d5c52008-03-25 22:16:41 +09001080 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001081 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001082
1083 ap->hsm_task_state = HSM_ST_ERR;
1084 goto fsm_start;
1085 }
1086
1087 /* Device should not ask for data transfer (DRQ=1)
1088 * when it finds something wrong.
1089 * We ignore DRQ here and stop the HSM by
1090 * changing hsm_task_state to HSM_ST_ERR and
1091 * let the EH abort the command or reset the device.
1092 */
1093 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1094 /* Some ATAPI tape drives forget to clear the ERR bit
1095 * when doing the next command (mostly request sense).
1096 * We ignore ERR here to workaround and proceed sending
1097 * the CDB.
1098 */
1099 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001100 ata_ehi_push_desc(ehi, "ST_FIRST: "
1101 "DRQ=1 with device error, "
1102 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001103 qc->err_mask |= AC_ERR_HSM;
1104 ap->hsm_task_state = HSM_ST_ERR;
1105 goto fsm_start;
1106 }
1107 }
1108
Tejun Heo624d5c52008-03-25 22:16:41 +09001109 if (qc->tf.protocol == ATA_PROT_PIO) {
1110 /* PIO data out protocol.
1111 * send first data block.
1112 */
1113
1114 /* ata_pio_sectors() might change the state
1115 * to HSM_ST_LAST. so, the state is changed here
1116 * before ata_pio_sectors().
1117 */
1118 ap->hsm_task_state = HSM_ST;
1119 ata_pio_sectors(qc);
1120 } else
1121 /* send CDB */
1122 atapi_send_cdb(ap, qc);
1123
Tejun Heoc4291372010-05-10 21:41:38 +02001124 /* if polling, ata_sff_pio_task() handles the rest.
Tejun Heo624d5c52008-03-25 22:16:41 +09001125 * otherwise, interrupt handler takes over from here.
1126 */
1127 break;
1128
1129 case HSM_ST:
1130 /* complete command or read/write the data register */
1131 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1132 /* ATAPI PIO protocol */
1133 if ((status & ATA_DRQ) == 0) {
1134 /* No more data to transfer or device error.
1135 * Device error will be tagged in HSM_ST_LAST.
1136 */
1137 ap->hsm_task_state = HSM_ST_LAST;
1138 goto fsm_start;
1139 }
1140
1141 /* Device should not ask for data transfer (DRQ=1)
1142 * when it finds something wrong.
1143 * We ignore DRQ here and stop the HSM by
1144 * changing hsm_task_state to HSM_ST_ERR and
1145 * let the EH abort the command or reset the device.
1146 */
1147 if (unlikely(status & (ATA_ERR | ATA_DF))) {
Tejun Heoa836d3e2008-06-28 01:39:43 +09001148 ata_ehi_push_desc(ehi, "ST-ATAPI: "
1149 "DRQ=1 with device error, "
1150 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001151 qc->err_mask |= AC_ERR_HSM;
1152 ap->hsm_task_state = HSM_ST_ERR;
1153 goto fsm_start;
1154 }
1155
1156 atapi_pio_bytes(qc);
1157
1158 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1159 /* bad ireason reported by device */
1160 goto fsm_start;
1161
1162 } else {
1163 /* ATA PIO protocol */
1164 if (unlikely((status & ATA_DRQ) == 0)) {
1165 /* handle BSY=0, DRQ=0 as error */
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001166 if (likely(status & (ATA_ERR | ATA_DF))) {
Tejun Heo624d5c52008-03-25 22:16:41 +09001167 /* device stops HSM for abort/error */
1168 qc->err_mask |= AC_ERR_DEV;
Tejun Heo6a6b97d2008-11-13 10:04:46 +09001169
1170 /* If diagnostic failed and this is
1171 * IDENTIFY, it's likely a phantom
1172 * device. Mark hint.
1173 */
1174 if (qc->dev->horkage &
1175 ATA_HORKAGE_DIAGNOSTIC)
1176 qc->err_mask |=
1177 AC_ERR_NODEV_HINT;
1178 } else {
Tejun Heo624d5c52008-03-25 22:16:41 +09001179 /* HSM violation. Let EH handle this.
1180 * Phantom devices also trigger this
1181 * condition. Mark hint.
1182 */
Tejun Heoa836d3e2008-06-28 01:39:43 +09001183 ata_ehi_push_desc(ehi, "ST-ATA: "
Tejun Heo80ee6f52009-01-23 14:12:59 +09001184 "DRQ=0 without device error, "
Tejun Heoa836d3e2008-06-28 01:39:43 +09001185 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001186 qc->err_mask |= AC_ERR_HSM |
1187 AC_ERR_NODEV_HINT;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001188 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001189
1190 ap->hsm_task_state = HSM_ST_ERR;
1191 goto fsm_start;
1192 }
1193
1194 /* For PIO reads, some devices may ask for
1195 * data transfer (DRQ=1) alone with ERR=1.
1196 * We respect DRQ here and transfer one
1197 * block of junk data before changing the
1198 * hsm_task_state to HSM_ST_ERR.
1199 *
1200 * For PIO writes, ERR=1 DRQ=1 doesn't make
1201 * sense since the data block has been
1202 * transferred to the device.
1203 */
1204 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1205 /* data might be corrputed */
1206 qc->err_mask |= AC_ERR_DEV;
1207
1208 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1209 ata_pio_sectors(qc);
1210 status = ata_wait_idle(ap);
1211 }
1212
Tejun Heoa836d3e2008-06-28 01:39:43 +09001213 if (status & (ATA_BUSY | ATA_DRQ)) {
1214 ata_ehi_push_desc(ehi, "ST-ATA: "
1215 "BUSY|DRQ persists on ERR|DF, "
1216 "dev_stat 0x%X", status);
Tejun Heo624d5c52008-03-25 22:16:41 +09001217 qc->err_mask |= AC_ERR_HSM;
Tejun Heoa836d3e2008-06-28 01:39:43 +09001218 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001219
Tejun Heob9199302009-01-25 10:26:00 +09001220 /* There are oddball controllers with
1221 * status register stuck at 0x7f and
1222 * lbal/m/h at zero which makes it
1223 * pass all other presence detection
1224 * mechanisms we have. Set NODEV_HINT
1225 * for it. Kernel bz#7241.
1226 */
1227 if (status == 0x7f)
1228 qc->err_mask |= AC_ERR_NODEV_HINT;
1229
Tejun Heo624d5c52008-03-25 22:16:41 +09001230 /* ata_pio_sectors() might change the
1231 * state to HSM_ST_LAST. so, the state
1232 * is changed after ata_pio_sectors().
1233 */
1234 ap->hsm_task_state = HSM_ST_ERR;
1235 goto fsm_start;
1236 }
1237
1238 ata_pio_sectors(qc);
1239
1240 if (ap->hsm_task_state == HSM_ST_LAST &&
1241 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1242 /* all data read */
1243 status = ata_wait_idle(ap);
1244 goto fsm_start;
1245 }
1246 }
1247
1248 poll_next = 1;
1249 break;
1250
1251 case HSM_ST_LAST:
1252 if (unlikely(!ata_ok(status))) {
1253 qc->err_mask |= __ac_err_mask(status);
1254 ap->hsm_task_state = HSM_ST_ERR;
1255 goto fsm_start;
1256 }
1257
1258 /* no more data to transfer */
1259 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1260 ap->print_id, qc->dev->devno, status);
1261
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001262 WARN_ON_ONCE(qc->err_mask & (AC_ERR_DEV | AC_ERR_HSM));
Tejun Heo624d5c52008-03-25 22:16:41 +09001263
1264 ap->hsm_task_state = HSM_ST_IDLE;
1265
1266 /* complete taskfile transaction */
1267 ata_hsm_qc_complete(qc, in_wq);
1268
1269 poll_next = 0;
1270 break;
1271
1272 case HSM_ST_ERR:
Tejun Heo624d5c52008-03-25 22:16:41 +09001273 ap->hsm_task_state = HSM_ST_IDLE;
1274
1275 /* complete taskfile transaction */
1276 ata_hsm_qc_complete(qc, in_wq);
1277
1278 poll_next = 0;
1279 break;
1280 default:
1281 poll_next = 0;
Tejun Heoa588afc2016-01-29 07:06:53 -05001282 WARN(true, "ata%d: SFF host state machine in invalid state %d",
1283 ap->print_id, ap->hsm_task_state);
Tejun Heo624d5c52008-03-25 22:16:41 +09001284 }
1285
1286 return poll_next;
1287}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001288EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
Tejun Heo624d5c52008-03-25 22:16:41 +09001289
Viresh Kumar64b97592011-02-22 14:32:38 +05301290void ata_sff_queue_work(struct work_struct *work)
1291{
1292 queue_work(ata_sff_wq, work);
1293}
1294EXPORT_SYMBOL_GPL(ata_sff_queue_work);
1295
1296void ata_sff_queue_delayed_work(struct delayed_work *dwork, unsigned long delay)
1297{
1298 queue_delayed_work(ata_sff_wq, dwork, delay);
1299}
1300EXPORT_SYMBOL_GPL(ata_sff_queue_delayed_work);
1301
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001302void ata_sff_queue_pio_task(struct ata_link *link, unsigned long delay)
Tejun Heoc4291372010-05-10 21:41:38 +02001303{
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001304 struct ata_port *ap = link->ap;
1305
1306 WARN_ON((ap->sff_pio_task_link != NULL) &&
1307 (ap->sff_pio_task_link != link));
1308 ap->sff_pio_task_link = link;
1309
Tejun Heoc4291372010-05-10 21:41:38 +02001310 /* may fail if ata_sff_flush_pio_task() in progress */
Viresh Kumar64b97592011-02-22 14:32:38 +05301311 ata_sff_queue_delayed_work(&ap->sff_pio_task, msecs_to_jiffies(delay));
Tejun Heoc4291372010-05-10 21:41:38 +02001312}
1313EXPORT_SYMBOL_GPL(ata_sff_queue_pio_task);
1314
1315void ata_sff_flush_pio_task(struct ata_port *ap)
1316{
1317 DPRINTK("ENTER\n");
1318
Tejun Heoafe2c512010-12-14 16:21:17 +01001319 cancel_delayed_work_sync(&ap->sff_pio_task);
David Jefferyce751452015-01-19 13:03:25 -06001320
1321 /*
1322 * We wanna reset the HSM state to IDLE. If we do so without
1323 * grabbing the port lock, critical sections protected by it which
1324 * expect the HSM state to stay stable may get surprised. For
1325 * example, we may set IDLE in between the time
1326 * __ata_sff_port_intr() checks for HSM_ST_IDLE and before it calls
1327 * ata_sff_hsm_move() causing ata_sff_hsm_move() to BUG().
1328 */
1329 spin_lock_irq(ap->lock);
Tejun Heoc4291372010-05-10 21:41:38 +02001330 ap->hsm_task_state = HSM_ST_IDLE;
David Jefferyce751452015-01-19 13:03:25 -06001331 spin_unlock_irq(ap->lock);
1332
Gwendal Grignoud4d8eaf2011-07-22 13:48:32 -07001333 ap->sff_pio_task_link = NULL;
Tejun Heoc4291372010-05-10 21:41:38 +02001334
1335 if (ata_msg_ctl(ap))
Joe Perchesa9a79df2011-04-15 15:51:59 -07001336 ata_port_dbg(ap, "%s: EXIT\n", __func__);
Tejun Heoc4291372010-05-10 21:41:38 +02001337}
1338
1339static void ata_sff_pio_task(struct work_struct *work)
Tejun Heo624d5c52008-03-25 22:16:41 +09001340{
1341 struct ata_port *ap =
Tejun Heoc4291372010-05-10 21:41:38 +02001342 container_of(work, struct ata_port, sff_pio_task.work);
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001343 struct ata_link *link = ap->sff_pio_task_link;
Tejun Heoc4291372010-05-10 21:41:38 +02001344 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001345 u8 status;
1346 int poll_next;
1347
Tejun Heo8eee1d32016-02-01 11:33:21 -05001348 spin_lock_irq(ap->lock);
1349
Jeff Garzik4fca3772011-02-15 01:13:24 -05001350 BUG_ON(ap->sff_pio_task_link == NULL);
Tejun Heoc4291372010-05-10 21:41:38 +02001351 /* qc can be NULL if timeout occurred */
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001352 qc = ata_qc_from_tag(ap, link->active_tag);
1353 if (!qc) {
1354 ap->sff_pio_task_link = NULL;
Tejun Heo8eee1d32016-02-01 11:33:21 -05001355 goto out_unlock;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001356 }
Tejun Heoc4291372010-05-10 21:41:38 +02001357
Tejun Heo624d5c52008-03-25 22:16:41 +09001358fsm_start:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001359 WARN_ON_ONCE(ap->hsm_task_state == HSM_ST_IDLE);
Tejun Heo624d5c52008-03-25 22:16:41 +09001360
1361 /*
1362 * This is purely heuristic. This is a fast path.
1363 * Sometimes when we enter, BSY will be cleared in
1364 * a chk-status or two. If not, the drive is probably seeking
1365 * or something. Snooze for a couple msecs, then
1366 * chk-status again. If still busy, queue delayed work.
1367 */
Tejun Heo9363c382008-04-07 22:47:16 +09001368 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001369 if (status & ATA_BUSY) {
Tejun Heo8eee1d32016-02-01 11:33:21 -05001370 spin_unlock_irq(ap->lock);
Tejun Heo97750ce2010-09-06 17:56:29 +02001371 ata_msleep(ap, 2);
Tejun Heo8eee1d32016-02-01 11:33:21 -05001372 spin_lock_irq(ap->lock);
1373
Tejun Heo9363c382008-04-07 22:47:16 +09001374 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001375 if (status & ATA_BUSY) {
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001376 ata_sff_queue_pio_task(link, ATA_SHORT_PAUSE);
Tejun Heo8eee1d32016-02-01 11:33:21 -05001377 goto out_unlock;
Tejun Heo624d5c52008-03-25 22:16:41 +09001378 }
1379 }
1380
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001381 /*
1382 * hsm_move() may trigger another command to be processed.
1383 * clean the link beforehand.
1384 */
1385 ap->sff_pio_task_link = NULL;
Tejun Heo624d5c52008-03-25 22:16:41 +09001386 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001387 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001388
1389 /* another command or interrupt handler
1390 * may be running at this point.
1391 */
1392 if (poll_next)
1393 goto fsm_start;
Tejun Heo8eee1d32016-02-01 11:33:21 -05001394out_unlock:
1395 spin_unlock_irq(ap->lock);
Tejun Heo624d5c52008-03-25 22:16:41 +09001396}
1397
1398/**
Tejun Heo360ff782010-05-10 21:41:42 +02001399 * ata_sff_qc_issue - issue taskfile to a SFF controller
Tejun Heo624d5c52008-03-25 22:16:41 +09001400 * @qc: command to issue to device
1401 *
Tejun Heo360ff782010-05-10 21:41:42 +02001402 * This function issues a PIO or NODATA command to a SFF
1403 * controller.
Tejun Heo624d5c52008-03-25 22:16:41 +09001404 *
1405 * LOCKING:
1406 * spin_lock_irqsave(host lock)
1407 *
1408 * RETURNS:
1409 * Zero on success, AC_ERR_* mask on failure
1410 */
Tejun Heo9363c382008-04-07 22:47:16 +09001411unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001412{
1413 struct ata_port *ap = qc->ap;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001414 struct ata_link *link = qc->dev->link;
Tejun Heo624d5c52008-03-25 22:16:41 +09001415
1416 /* Use polling pio if the LLD doesn't handle
1417 * interrupt driven pio and atapi CDB interrupt.
1418 */
Tejun Heo360ff782010-05-10 21:41:42 +02001419 if (ap->flags & ATA_FLAG_PIO_POLLING)
1420 qc->tf.flags |= ATA_TFLAG_POLLING;
Tejun Heo624d5c52008-03-25 22:16:41 +09001421
1422 /* select the device */
1423 ata_dev_select(ap, qc->dev->devno, 1, 0);
1424
1425 /* start the command */
1426 switch (qc->tf.protocol) {
1427 case ATA_PROT_NODATA:
1428 if (qc->tf.flags & ATA_TFLAG_POLLING)
1429 ata_qc_set_polling(qc);
1430
1431 ata_tf_to_host(ap, &qc->tf);
1432 ap->hsm_task_state = HSM_ST_LAST;
1433
1434 if (qc->tf.flags & ATA_TFLAG_POLLING)
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001435 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001436
1437 break;
1438
Tejun Heo624d5c52008-03-25 22:16:41 +09001439 case ATA_PROT_PIO:
1440 if (qc->tf.flags & ATA_TFLAG_POLLING)
1441 ata_qc_set_polling(qc);
1442
1443 ata_tf_to_host(ap, &qc->tf);
1444
1445 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1446 /* PIO data out protocol */
1447 ap->hsm_task_state = HSM_ST_FIRST;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001448 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001449
Tejun Heoc4291372010-05-10 21:41:38 +02001450 /* always send first data block using the
1451 * ata_sff_pio_task() codepath.
Tejun Heo624d5c52008-03-25 22:16:41 +09001452 */
1453 } else {
1454 /* PIO data in protocol */
1455 ap->hsm_task_state = HSM_ST;
1456
1457 if (qc->tf.flags & ATA_TFLAG_POLLING)
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001458 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001459
Tejun Heoc4291372010-05-10 21:41:38 +02001460 /* if polling, ata_sff_pio_task() handles the
1461 * rest. otherwise, interrupt handler takes
1462 * over from here.
Tejun Heo624d5c52008-03-25 22:16:41 +09001463 */
1464 }
1465
1466 break;
1467
1468 case ATAPI_PROT_PIO:
1469 case ATAPI_PROT_NODATA:
1470 if (qc->tf.flags & ATA_TFLAG_POLLING)
1471 ata_qc_set_polling(qc);
1472
1473 ata_tf_to_host(ap, &qc->tf);
1474
1475 ap->hsm_task_state = HSM_ST_FIRST;
1476
1477 /* send cdb by polling if no cdb interrupt */
1478 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1479 (qc->tf.flags & ATA_TFLAG_POLLING))
Gwendal Grignouea3c6452010-08-31 16:20:36 -07001480 ata_sff_queue_pio_task(link, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001481 break;
1482
Tejun Heo624d5c52008-03-25 22:16:41 +09001483 default:
Tejun Heoefcb3cf2009-01-09 19:19:14 +09001484 WARN_ON_ONCE(1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001485 return AC_ERR_SYSTEM;
1486 }
1487
1488 return 0;
1489}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001490EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
Tejun Heo624d5c52008-03-25 22:16:41 +09001491
1492/**
Tejun Heo22183bf2008-04-07 22:47:20 +09001493 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1494 * @qc: qc to fill result TF for
1495 *
1496 * @qc is finished and result TF needs to be filled. Fill it
1497 * using ->sff_tf_read.
1498 *
1499 * LOCKING:
1500 * spin_lock_irqsave(host lock)
1501 *
1502 * RETURNS:
1503 * true indicating that result TF is successfully filled.
1504 */
1505bool ata_sff_qc_fill_rtf(struct ata_queued_cmd *qc)
1506{
1507 qc->ap->ops->sff_tf_read(qc->ap, &qc->result_tf);
1508 return true;
1509}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001510EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf);
Tejun Heo22183bf2008-04-07 22:47:20 +09001511
Tejun Heoc3b28892010-05-19 22:10:21 +02001512static unsigned int ata_sff_idle_irq(struct ata_port *ap)
Tejun Heo624d5c52008-03-25 22:16:41 +09001513{
Tejun Heoc3b28892010-05-19 22:10:21 +02001514 ap->stats.idle_irq++;
1515
1516#ifdef ATA_IRQ_TRAP
1517 if ((ap->stats.idle_irq % 1000) == 0) {
1518 ap->ops->sff_check_status(ap);
1519 if (ap->ops->sff_irq_clear)
1520 ap->ops->sff_irq_clear(ap);
Joe Perchesa9a79df2011-04-15 15:51:59 -07001521 ata_port_warn(ap, "irq trap\n");
Tejun Heoc3b28892010-05-19 22:10:21 +02001522 return 1;
1523 }
1524#endif
1525 return 0; /* irq not handled */
1526}
1527
1528static unsigned int __ata_sff_port_intr(struct ata_port *ap,
1529 struct ata_queued_cmd *qc,
1530 bool hsmv_on_idle)
1531{
1532 u8 status;
Tejun Heo624d5c52008-03-25 22:16:41 +09001533
1534 VPRINTK("ata%u: protocol %d task_state %d\n",
1535 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1536
1537 /* Check whether we are expecting interrupt in this state */
1538 switch (ap->hsm_task_state) {
1539 case HSM_ST_FIRST:
1540 /* Some pre-ATAPI-4 devices assert INTRQ
1541 * at this state when ready to receive CDB.
1542 */
1543
1544 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1545 * The flag was turned on only for atapi devices. No
1546 * need to check ata_is_atapi(qc->tf.protocol) again.
1547 */
1548 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Tejun Heoc3b28892010-05-19 22:10:21 +02001549 return ata_sff_idle_irq(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001550 break;
Tejun Heo687a9932010-12-03 15:19:13 +01001551 case HSM_ST_IDLE:
Tejun Heoc3b28892010-05-19 22:10:21 +02001552 return ata_sff_idle_irq(ap);
Tejun Heo687a9932010-12-03 15:19:13 +01001553 default:
1554 break;
Tejun Heo624d5c52008-03-25 22:16:41 +09001555 }
1556
Alan Coxa57c1ba2008-05-29 22:10:58 +01001557 /* check main status, clearing INTRQ if needed */
1558 status = ata_sff_irq_status(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001559 if (status & ATA_BUSY) {
Tejun Heoc3b28892010-05-19 22:10:21 +02001560 if (hsmv_on_idle) {
Tejun Heo332ac7f2010-03-23 12:24:08 +09001561 /* BMDMA engine is already stopped, we're screwed */
1562 qc->err_mask |= AC_ERR_HSM;
1563 ap->hsm_task_state = HSM_ST_ERR;
1564 } else
Tejun Heoc3b28892010-05-19 22:10:21 +02001565 return ata_sff_idle_irq(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001566 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001567
Tejun Heo9f2f7212010-05-10 21:41:32 +02001568 /* clear irq events */
Tejun Heo37f65b82010-05-19 22:10:20 +02001569 if (ap->ops->sff_irq_clear)
1570 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001571
Tejun Heo9363c382008-04-07 22:47:16 +09001572 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001573
Tejun Heo624d5c52008-03-25 22:16:41 +09001574 return 1; /* irq handled */
Tejun Heo624d5c52008-03-25 22:16:41 +09001575}
1576
1577/**
Tejun Heoc3b28892010-05-19 22:10:21 +02001578 * ata_sff_port_intr - Handle SFF port interrupt
1579 * @ap: Port on which interrupt arrived (possibly...)
1580 * @qc: Taskfile currently active in engine
Tejun Heo624d5c52008-03-25 22:16:41 +09001581 *
Tejun Heoc3b28892010-05-19 22:10:21 +02001582 * Handle port interrupt for given queued command.
Tejun Heo624d5c52008-03-25 22:16:41 +09001583 *
1584 * LOCKING:
Tejun Heoc3b28892010-05-19 22:10:21 +02001585 * spin_lock_irqsave(host lock)
Tejun Heo624d5c52008-03-25 22:16:41 +09001586 *
1587 * RETURNS:
Tejun Heoc3b28892010-05-19 22:10:21 +02001588 * One if interrupt was handled, zero if not (shared irq).
Tejun Heo624d5c52008-03-25 22:16:41 +09001589 */
Tejun Heoc3b28892010-05-19 22:10:21 +02001590unsigned int ata_sff_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1591{
1592 return __ata_sff_port_intr(ap, qc, false);
1593}
1594EXPORT_SYMBOL_GPL(ata_sff_port_intr);
1595
1596static inline irqreturn_t __ata_sff_interrupt(int irq, void *dev_instance,
1597 unsigned int (*port_intr)(struct ata_port *, struct ata_queued_cmd *))
Tejun Heo624d5c52008-03-25 22:16:41 +09001598{
1599 struct ata_host *host = dev_instance;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001600 bool retried = false;
Tejun Heo624d5c52008-03-25 22:16:41 +09001601 unsigned int i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001602 unsigned int handled, idle, polling;
Tejun Heo624d5c52008-03-25 22:16:41 +09001603 unsigned long flags;
1604
1605 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1606 spin_lock_irqsave(&host->lock, flags);
1607
Tejun Heo332ac7f2010-03-23 12:24:08 +09001608retry:
1609 handled = idle = polling = 0;
Tejun Heo624d5c52008-03-25 22:16:41 +09001610 for (i = 0; i < host->n_ports; i++) {
Tejun Heod88ec2e2010-01-19 10:46:32 +09001611 struct ata_port *ap = host->ports[i];
1612 struct ata_queued_cmd *qc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001613
Tejun Heod88ec2e2010-01-19 10:46:32 +09001614 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo27943622010-01-19 10:49:19 +09001615 if (qc) {
1616 if (!(qc->tf.flags & ATA_TFLAG_POLLING))
Tejun Heoc3b28892010-05-19 22:10:21 +02001617 handled |= port_intr(ap, qc);
Tejun Heo27943622010-01-19 10:49:19 +09001618 else
1619 polling |= 1 << i;
Tejun Heo332ac7f2010-03-23 12:24:08 +09001620 } else
1621 idle |= 1 << i;
Tejun Heo27943622010-01-19 10:49:19 +09001622 }
1623
1624 /*
1625 * If no port was expecting IRQ but the controller is actually
1626 * asserting IRQ line, nobody cared will ensue. Check IRQ
1627 * pending status if available and clear spurious IRQ.
1628 */
Tejun Heo332ac7f2010-03-23 12:24:08 +09001629 if (!handled && !retried) {
1630 bool retry = false;
1631
Tejun Heo27943622010-01-19 10:49:19 +09001632 for (i = 0; i < host->n_ports; i++) {
1633 struct ata_port *ap = host->ports[i];
1634
1635 if (polling & (1 << i))
1636 continue;
1637
1638 if (!ap->ops->sff_irq_check ||
1639 !ap->ops->sff_irq_check(ap))
1640 continue;
1641
Tejun Heo332ac7f2010-03-23 12:24:08 +09001642 if (idle & (1 << i)) {
1643 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02001644 if (ap->ops->sff_irq_clear)
1645 ap->ops->sff_irq_clear(ap);
Tejun Heo332ac7f2010-03-23 12:24:08 +09001646 } else {
1647 /* clear INTRQ and check if BUSY cleared */
1648 if (!(ap->ops->sff_check_status(ap) & ATA_BUSY))
1649 retry |= true;
1650 /*
1651 * With command in flight, we can't do
1652 * sff_irq_clear() w/o racing with completion.
1653 */
1654 }
1655 }
1656
1657 if (retry) {
1658 retried = true;
1659 goto retry;
Tejun Heo27943622010-01-19 10:49:19 +09001660 }
Tejun Heo624d5c52008-03-25 22:16:41 +09001661 }
1662
1663 spin_unlock_irqrestore(&host->lock, flags);
1664
1665 return IRQ_RETVAL(handled);
1666}
Tejun Heoc3b28892010-05-19 22:10:21 +02001667
1668/**
1669 * ata_sff_interrupt - Default SFF ATA host interrupt handler
1670 * @irq: irq line (unused)
1671 * @dev_instance: pointer to our ata_host information structure
1672 *
1673 * Default interrupt handler for PCI IDE devices. Calls
1674 * ata_sff_port_intr() for each port that is not disabled.
1675 *
1676 * LOCKING:
1677 * Obtains host lock during operation.
1678 *
1679 * RETURNS:
1680 * IRQ_NONE or IRQ_HANDLED.
1681 */
1682irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
1683{
1684 return __ata_sff_interrupt(irq, dev_instance, ata_sff_port_intr);
1685}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001686EXPORT_SYMBOL_GPL(ata_sff_interrupt);
Tejun Heo624d5c52008-03-25 22:16:41 +09001687
1688/**
Alan Coxc96f1732009-03-24 10:23:46 +00001689 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1690 * @ap: port that appears to have timed out
1691 *
1692 * Called from the libata error handlers when the core code suspects
1693 * an interrupt has been lost. If it has complete anything we can and
1694 * then return. Interface must support altstatus for this faster
1695 * recovery to occur.
1696 *
1697 * Locking:
1698 * Caller holds host lock
1699 */
1700
1701void ata_sff_lost_interrupt(struct ata_port *ap)
1702{
1703 u8 status;
1704 struct ata_queued_cmd *qc;
1705
1706 /* Only one outstanding command per SFF channel */
1707 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo3e4ec342010-05-10 21:41:30 +02001708 /* We cannot lose an interrupt on a non-existent or polled command */
1709 if (!qc || qc->tf.flags & ATA_TFLAG_POLLING)
Alan Coxc96f1732009-03-24 10:23:46 +00001710 return;
1711 /* See if the controller thinks it is still busy - if so the command
1712 isn't a lost IRQ but is still in progress */
1713 status = ata_sff_altstatus(ap);
1714 if (status & ATA_BUSY)
1715 return;
1716
1717 /* There was a command running, we are no longer busy and we have
1718 no interrupt. */
Joe Perchesa9a79df2011-04-15 15:51:59 -07001719 ata_port_warn(ap, "lost interrupt (Status 0x%x)\n",
Alan Coxc96f1732009-03-24 10:23:46 +00001720 status);
1721 /* Run the host interrupt logic as if the interrupt had not been
1722 lost */
Tejun Heoc3b28892010-05-19 22:10:21 +02001723 ata_sff_port_intr(ap, qc);
Alan Coxc96f1732009-03-24 10:23:46 +00001724}
1725EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt);
1726
1727/**
Tejun Heo9363c382008-04-07 22:47:16 +09001728 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001729 * @ap: port to freeze
1730 *
Tejun Heo9f2f7212010-05-10 21:41:32 +02001731 * Freeze SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001732 *
1733 * LOCKING:
1734 * Inherited from caller.
1735 */
Tejun Heo9363c382008-04-07 22:47:16 +09001736void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001737{
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001738 ap->ctl |= ATA_NIEN;
1739 ap->last_ctl = ap->ctl;
1740
Sergei Shtylyov41dec292010-05-07 22:47:50 +04001741 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr)
1742 ata_sff_set_devctl(ap, ap->ctl);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001743
1744 /* Under certain circumstances, some controllers raise IRQ on
1745 * ATA_NIEN manipulation. Also, many controllers fail to mask
1746 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1747 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001748 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001749
Tejun Heo37f65b82010-05-19 22:10:20 +02001750 if (ap->ops->sff_irq_clear)
1751 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001752}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001753EXPORT_SYMBOL_GPL(ata_sff_freeze);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001754
1755/**
Tejun Heo9363c382008-04-07 22:47:16 +09001756 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001757 * @ap: port to thaw
1758 *
Tejun Heo9363c382008-04-07 22:47:16 +09001759 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001760 *
1761 * LOCKING:
1762 * Inherited from caller.
1763 */
Tejun Heo9363c382008-04-07 22:47:16 +09001764void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001765{
1766 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001767 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02001768 if (ap->ops->sff_irq_clear)
1769 ap->ops->sff_irq_clear(ap);
Sergei Shtylyove42a5422010-05-07 22:49:02 +04001770 ata_sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001771}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001772EXPORT_SYMBOL_GPL(ata_sff_thaw);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001773
1774/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001775 * ata_sff_prereset - prepare SFF link for reset
1776 * @link: SFF link to be reset
1777 * @deadline: deadline jiffies for the operation
1778 *
1779 * SFF link @link is about to be reset. Initialize it. It first
1780 * calls ata_std_prereset() and wait for !BSY if the port is
1781 * being softreset.
1782 *
1783 * LOCKING:
1784 * Kernel thread context (may sleep)
1785 *
1786 * RETURNS:
1787 * 0 on success, -errno otherwise.
1788 */
1789int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1790{
Tejun Heo0aa11132008-04-07 22:47:18 +09001791 struct ata_eh_context *ehc = &link->eh_context;
1792 int rc;
1793
1794 rc = ata_std_prereset(link, deadline);
1795 if (rc)
1796 return rc;
1797
1798 /* if we're about to do hardreset, nothing more to do */
1799 if (ehc->i.action & ATA_EH_HARDRESET)
1800 return 0;
1801
1802 /* wait for !BSY if we don't know that no device is attached */
1803 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001804 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001805 if (rc && rc != -ENODEV) {
Joe Perchesa9a79df2011-04-15 15:51:59 -07001806 ata_link_warn(link,
1807 "device not ready (errno=%d), forcing hardreset\n",
1808 rc);
Tejun Heo0aa11132008-04-07 22:47:18 +09001809 ehc->i.action |= ATA_EH_HARDRESET;
1810 }
1811 }
1812
1813 return 0;
1814}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001815EXPORT_SYMBOL_GPL(ata_sff_prereset);
Tejun Heo0aa11132008-04-07 22:47:18 +09001816
1817/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001818 * ata_devchk - PATA device presence detection
1819 * @ap: ATA channel to examine
1820 * @device: Device to examine (starting at zero)
1821 *
1822 * This technique was originally described in
1823 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1824 * later found its way into the ATA/ATAPI spec.
1825 *
1826 * Write a pattern to the ATA shadow registers,
1827 * and if a device is present, it will respond by
1828 * correctly storing and echoing back the
1829 * ATA shadow register contents.
1830 *
1831 * LOCKING:
1832 * caller.
1833 */
1834static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1835{
1836 struct ata_ioports *ioaddr = &ap->ioaddr;
1837 u8 nsect, lbal;
1838
Tejun Heo5682ed32008-04-07 22:47:16 +09001839 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09001840
1841 iowrite8(0x55, ioaddr->nsect_addr);
1842 iowrite8(0xaa, ioaddr->lbal_addr);
1843
1844 iowrite8(0xaa, ioaddr->nsect_addr);
1845 iowrite8(0x55, ioaddr->lbal_addr);
1846
1847 iowrite8(0x55, ioaddr->nsect_addr);
1848 iowrite8(0xaa, ioaddr->lbal_addr);
1849
1850 nsect = ioread8(ioaddr->nsect_addr);
1851 lbal = ioread8(ioaddr->lbal_addr);
1852
1853 if ((nsect == 0x55) && (lbal == 0xaa))
1854 return 1; /* we found a device */
1855
1856 return 0; /* nothing found */
1857}
1858
1859/**
Tejun Heo9363c382008-04-07 22:47:16 +09001860 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09001861 * @dev: ATA device to classify (starting at zero)
1862 * @present: device seems present
1863 * @r_err: Value of error register on completion
1864 *
1865 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1866 * an ATA/ATAPI-defined set of values is placed in the ATA
1867 * shadow registers, indicating the results of device detection
1868 * and diagnostics.
1869 *
1870 * Select the ATA device, and read the values from the ATA shadow
1871 * registers. Then parse according to the Error register value,
1872 * and the spec-defined values examined by ata_dev_classify().
1873 *
1874 * LOCKING:
1875 * caller.
1876 *
1877 * RETURNS:
1878 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1879 */
Tejun Heo9363c382008-04-07 22:47:16 +09001880unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09001881 u8 *r_err)
1882{
1883 struct ata_port *ap = dev->link->ap;
1884 struct ata_taskfile tf;
1885 unsigned int class;
1886 u8 err;
1887
Tejun Heo5682ed32008-04-07 22:47:16 +09001888 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09001889
1890 memset(&tf, 0, sizeof(tf));
1891
Tejun Heo5682ed32008-04-07 22:47:16 +09001892 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001893 err = tf.feature;
1894 if (r_err)
1895 *r_err = err;
1896
1897 /* see if device passed diags: continue and warn later */
1898 if (err == 0)
1899 /* diagnostic fail : do nothing _YET_ */
1900 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1901 else if (err == 1)
1902 /* do nothing */ ;
1903 else if ((dev->devno == 0) && (err == 0x81))
1904 /* do nothing */ ;
1905 else
1906 return ATA_DEV_NONE;
1907
1908 /* determine if device is ATA or ATAPI */
1909 class = ata_dev_classify(&tf);
1910
1911 if (class == ATA_DEV_UNKNOWN) {
1912 /* If the device failed diagnostic, it's likely to
1913 * have reported incorrect device signature too.
1914 * Assume ATA device if the device seems present but
1915 * device signature is invalid with diagnostic
1916 * failure.
1917 */
1918 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1919 class = ATA_DEV_ATA;
1920 else
1921 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09001922 } else if ((class == ATA_DEV_ATA) &&
1923 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09001924 class = ATA_DEV_NONE;
1925
1926 return class;
1927}
Alan Cox0fe40ff2009-01-05 14:16:13 +00001928EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
Tejun Heo624d5c52008-03-25 22:16:41 +09001929
Tejun Heo705e76b2008-04-07 22:47:19 +09001930/**
1931 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1932 * @link: SFF link which is just reset
1933 * @devmask: mask of present devices
1934 * @deadline: deadline jiffies for the operation
1935 *
1936 * Wait devices attached to SFF @link to become ready after
1937 * reset. It contains preceding 150ms wait to avoid accessing TF
1938 * status register too early.
1939 *
1940 * LOCKING:
1941 * Kernel thread context (may sleep).
1942 *
1943 * RETURNS:
1944 * 0 on success, -ENODEV if some or all of devices in @devmask
1945 * don't seem to exist. -errno on other errors.
1946 */
1947int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1948 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09001949{
Tejun Heo705e76b2008-04-07 22:47:19 +09001950 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09001951 struct ata_ioports *ioaddr = &ap->ioaddr;
1952 unsigned int dev0 = devmask & (1 << 0);
1953 unsigned int dev1 = devmask & (1 << 1);
1954 int rc, ret = 0;
1955
Tejun Heo97750ce2010-09-06 17:56:29 +02001956 ata_msleep(ap, ATA_WAIT_AFTER_RESET);
Tejun Heo705e76b2008-04-07 22:47:19 +09001957
1958 /* always check readiness of the master device */
1959 rc = ata_sff_wait_ready(link, deadline);
1960 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1961 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09001962 */
Tejun Heo705e76b2008-04-07 22:47:19 +09001963 if (rc)
1964 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001965
1966 /* if device 1 was found in ata_devchk, wait for register
1967 * access briefly, then wait for BSY to clear.
1968 */
1969 if (dev1) {
1970 int i;
1971
Tejun Heo5682ed32008-04-07 22:47:16 +09001972 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001973
1974 /* Wait for register access. Some ATAPI devices fail
1975 * to set nsect/lbal after reset, so don't waste too
1976 * much time on it. We're gonna wait for !BSY anyway.
1977 */
1978 for (i = 0; i < 2; i++) {
1979 u8 nsect, lbal;
1980
1981 nsect = ioread8(ioaddr->nsect_addr);
1982 lbal = ioread8(ioaddr->lbal_addr);
1983 if ((nsect == 1) && (lbal == 1))
1984 break;
Tejun Heo97750ce2010-09-06 17:56:29 +02001985 ata_msleep(ap, 50); /* give drive a breather */
Tejun Heo624d5c52008-03-25 22:16:41 +09001986 }
1987
Tejun Heo705e76b2008-04-07 22:47:19 +09001988 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001989 if (rc) {
1990 if (rc != -ENODEV)
1991 return rc;
1992 ret = rc;
1993 }
1994 }
1995
1996 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09001997 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001998 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09001999 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002000 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09002001 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002002
2003 return ret;
2004}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002005EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002006
Tejun Heo624d5c52008-03-25 22:16:41 +09002007static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
2008 unsigned long deadline)
2009{
2010 struct ata_ioports *ioaddr = &ap->ioaddr;
2011
2012 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
2013
Ondrej Zary6d8ca282014-09-27 00:04:46 +02002014 if (ap->ioaddr.ctl_addr) {
2015 /* software reset. causes dev0 to be selected */
2016 iowrite8(ap->ctl, ioaddr->ctl_addr);
2017 udelay(20); /* FIXME: flush */
2018 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2019 udelay(20); /* FIXME: flush */
2020 iowrite8(ap->ctl, ioaddr->ctl_addr);
2021 ap->last_ctl = ap->ctl;
2022 }
Tejun Heo624d5c52008-03-25 22:16:41 +09002023
Tejun Heo705e76b2008-04-07 22:47:19 +09002024 /* wait the port to become ready */
2025 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09002026}
2027
2028/**
Tejun Heo9363c382008-04-07 22:47:16 +09002029 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09002030 * @link: ATA link to reset
2031 * @classes: resulting classes of attached devices
2032 * @deadline: deadline jiffies for the operation
2033 *
2034 * Reset host port using ATA SRST.
2035 *
2036 * LOCKING:
2037 * Kernel thread context (may sleep)
2038 *
2039 * RETURNS:
2040 * 0 on success, -errno otherwise.
2041 */
Tejun Heo9363c382008-04-07 22:47:16 +09002042int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09002043 unsigned long deadline)
2044{
2045 struct ata_port *ap = link->ap;
2046 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2047 unsigned int devmask = 0;
2048 int rc;
2049 u8 err;
2050
2051 DPRINTK("ENTER\n");
2052
Tejun Heo624d5c52008-03-25 22:16:41 +09002053 /* determine if device 0/1 are present */
2054 if (ata_devchk(ap, 0))
2055 devmask |= (1 << 0);
2056 if (slave_possible && ata_devchk(ap, 1))
2057 devmask |= (1 << 1);
2058
2059 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002060 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002061
2062 /* issue bus reset */
2063 DPRINTK("about to softreset, devmask=%x\n", devmask);
2064 rc = ata_bus_softreset(ap, devmask, deadline);
2065 /* if link is occupied, -ENODEV too is an error */
2066 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
Joe Perchesa9a79df2011-04-15 15:51:59 -07002067 ata_link_err(link, "SRST failed (errno=%d)\n", rc);
Tejun Heo624d5c52008-03-25 22:16:41 +09002068 return rc;
2069 }
2070
2071 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09002072 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09002073 devmask & (1 << 0), &err);
2074 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09002075 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09002076 devmask & (1 << 1), &err);
2077
Tejun Heo624d5c52008-03-25 22:16:41 +09002078 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2079 return 0;
2080}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002081EXPORT_SYMBOL_GPL(ata_sff_softreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002082
2083/**
Tejun Heo9363c382008-04-07 22:47:16 +09002084 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09002085 * @link: link to reset
2086 * @class: resulting class of attached device
2087 * @deadline: deadline jiffies for the operation
2088 *
2089 * SATA phy-reset host port using DET bits of SControl register,
2090 * wait for !BSY and classify the attached device.
2091 *
2092 * LOCKING:
2093 * Kernel thread context (may sleep)
2094 *
2095 * RETURNS:
2096 * 0 on success, -errno otherwise.
2097 */
Tejun Heo9363c382008-04-07 22:47:16 +09002098int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09002099 unsigned long deadline)
2100{
Tejun Heo9dadd452008-04-07 22:47:19 +09002101 struct ata_eh_context *ehc = &link->eh_context;
2102 const unsigned long *timing = sata_ehc_deb_timing(ehc);
2103 bool online;
Tejun Heo624d5c52008-03-25 22:16:41 +09002104 int rc;
2105
Tejun Heo9dadd452008-04-07 22:47:19 +09002106 rc = sata_link_hardreset(link, timing, deadline, &online,
2107 ata_sff_check_ready);
Tejun Heo9dadd452008-04-07 22:47:19 +09002108 if (online)
2109 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09002110
2111 DPRINTK("EXIT, class=%u\n", *class);
Tejun Heo9dadd452008-04-07 22:47:19 +09002112 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09002113}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002114EXPORT_SYMBOL_GPL(sata_sff_hardreset);
Tejun Heo624d5c52008-03-25 22:16:41 +09002115
2116/**
Tejun Heo203c75b2008-04-07 22:47:18 +09002117 * ata_sff_postreset - SFF postreset callback
2118 * @link: the target SFF ata_link
2119 * @classes: classes of attached devices
2120 *
2121 * This function is invoked after a successful reset. It first
2122 * calls ata_std_postreset() and performs SFF specific postreset
2123 * processing.
2124 *
2125 * LOCKING:
2126 * Kernel thread context (may sleep)
2127 */
2128void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
2129{
2130 struct ata_port *ap = link->ap;
2131
2132 ata_std_postreset(link, classes);
2133
2134 /* is double-select really necessary? */
2135 if (classes[0] != ATA_DEV_NONE)
2136 ap->ops->sff_dev_select(ap, 1);
2137 if (classes[1] != ATA_DEV_NONE)
2138 ap->ops->sff_dev_select(ap, 0);
2139
2140 /* bail out if no device is present */
2141 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2142 DPRINTK("EXIT, no device\n");
2143 return;
2144 }
2145
2146 /* set up device control */
Sergei Shtylyov41dec292010-05-07 22:47:50 +04002147 if (ap->ops->sff_set_devctl || ap->ioaddr.ctl_addr) {
2148 ata_sff_set_devctl(ap, ap->ctl);
Stuart MENEFYe3e43852009-03-10 11:38:13 +00002149 ap->last_ctl = ap->ctl;
2150 }
Tejun Heo203c75b2008-04-07 22:47:18 +09002151}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002152EXPORT_SYMBOL_GPL(ata_sff_postreset);
Tejun Heo203c75b2008-04-07 22:47:18 +09002153
2154/**
Alan Cox3d47aa82009-03-24 10:23:19 +00002155 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2156 * @qc: command
2157 *
2158 * Drain the FIFO and device of any stuck data following a command
Daniel Mack3ad2f3f2010-02-03 08:01:28 +08002159 * failing to complete. In some cases this is necessary before a
Alan Cox3d47aa82009-03-24 10:23:19 +00002160 * reset will recover the device.
2161 *
2162 */
2163
2164void ata_sff_drain_fifo(struct ata_queued_cmd *qc)
2165{
2166 int count;
2167 struct ata_port *ap;
2168
2169 /* We only need to flush incoming data when a command was running */
2170 if (qc == NULL || qc->dma_dir == DMA_TO_DEVICE)
2171 return;
2172
2173 ap = qc->ap;
2174 /* Drain up to 64K of data before we give up this recovery method */
2175 for (count = 0; (ap->ops->sff_check_status(ap) & ATA_DRQ)
Robert Hancock9a8fd682009-12-08 20:48:10 -06002176 && count < 65536; count += 2)
Alan Cox3d47aa82009-03-24 10:23:19 +00002177 ioread16(ap->ioaddr.data_addr);
2178
2179 /* Can become DEBUG later */
2180 if (count)
Joe Perchesa9a79df2011-04-15 15:51:59 -07002181 ata_port_dbg(ap, "drained %d bytes to clear DRQ\n", count);
Alan Cox3d47aa82009-03-24 10:23:19 +00002182
2183}
2184EXPORT_SYMBOL_GPL(ata_sff_drain_fifo);
2185
2186/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002187 * ata_sff_error_handler - Stock error handler for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002188 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002189 *
Tejun Heo9363c382008-04-07 22:47:16 +09002190 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002191 * PATA and SATA controllers. Many controllers should be able to
2192 * use this EH as-is or with some added handling before and
2193 * after.
2194 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002195 * LOCKING:
2196 * Kernel thread context (may sleep)
2197 */
Tejun Heo9363c382008-04-07 22:47:16 +09002198void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002199{
Tejun Heoa1efdab2008-03-25 12:22:50 +09002200 ata_reset_fn_t softreset = ap->ops->softreset;
2201 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002202 struct ata_queued_cmd *qc;
2203 unsigned long flags;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002204
Tejun Heo9af5c9c2007-08-06 18:36:22 +09002205 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002206 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2207 qc = NULL;
2208
Jeff Garzikba6a1302006-06-22 23:46:10 -04002209 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002210
Tejun Heofe06e5f2010-05-10 21:41:39 +02002211 /*
2212 * We *MUST* do FIFO draining before we issue a reset as
2213 * several devices helpfully clear their internal state and
2214 * will lock solid if we touch the data port post reset. Pass
2215 * qc in case anyone wants to do different PIO/DMA recovery or
2216 * has per command fixups
Alan Cox3d47aa82009-03-24 10:23:19 +00002217 */
Tejun Heo8244cd02010-05-10 21:41:36 +02002218 if (ap->ops->sff_drain_fifo)
2219 ap->ops->sff_drain_fifo(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002220
Jeff Garzikba6a1302006-06-22 23:46:10 -04002221 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002222
Tejun Heofe06e5f2010-05-10 21:41:39 +02002223 /* ignore built-in hardresets if SCR access is not available */
2224 if ((hardreset == sata_std_hardreset ||
2225 hardreset == sata_sff_hardreset) && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002226 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002227
Tejun Heoa1efdab2008-03-25 12:22:50 +09002228 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2229 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002230}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002231EXPORT_SYMBOL_GPL(ata_sff_error_handler);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002232
2233/**
Tejun Heo9363c382008-04-07 22:47:16 +09002234 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002235 * @ioaddr: IO address structure to be initialized
2236 *
2237 * Utility function which initializes data_addr, error_addr,
2238 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2239 * device_addr, status_addr, and command_addr to standard offsets
2240 * relative to cmd_addr.
2241 *
2242 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2243 */
Tejun Heo9363c382008-04-07 22:47:16 +09002244void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002245{
2246 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2247 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2248 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2249 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2250 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2251 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2252 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2253 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2254 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2255 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2256}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002257EXPORT_SYMBOL_GPL(ata_sff_std_ports);
Tejun Heo624d5c52008-03-25 22:16:41 +09002258
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002259#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002260
Tejun Heo272f7882008-03-25 22:16:40 +09002261static int ata_resources_present(struct pci_dev *pdev, int port)
2262{
2263 int i;
2264
2265 /* Check the PCI resources for this channel are enabled */
2266 port = port * 2;
Alan Cox0fe40ff2009-01-05 14:16:13 +00002267 for (i = 0; i < 2; i++) {
Tejun Heo272f7882008-03-25 22:16:40 +09002268 if (pci_resource_start(pdev, port + i) == 0 ||
2269 pci_resource_len(pdev, port + i) == 0)
2270 return 0;
2271 }
2272 return 1;
2273}
2274
Tejun Heod491b272007-04-17 23:44:07 +09002275/**
Tejun Heo9363c382008-04-07 22:47:16 +09002276 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002277 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002278 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002279 * Acquire native PCI ATA resources for @host and initialize the
2280 * first two ports of @host accordingly. Ports marked dummy are
2281 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002282 *
Tejun Heod583bc12007-07-04 18:02:07 +09002283 * Note that native PCI resources are valid even for legacy hosts
2284 * as we fix up pdev resources array early in boot, so this
2285 * function can be used for both native and legacy SFF hosts.
2286 *
Tejun Heod491b272007-04-17 23:44:07 +09002287 * LOCKING:
2288 * Inherited from calling layer (may sleep).
2289 *
2290 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002291 * 0 if at least one port is initialized, -ENODEV if no port is
2292 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002293 */
Tejun Heo9363c382008-04-07 22:47:16 +09002294int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002295{
2296 struct device *gdev = host->dev;
2297 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002298 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002299 int i, rc;
2300
Tejun Heod491b272007-04-17 23:44:07 +09002301 /* request, iomap BARs and init port addresses accordingly */
2302 for (i = 0; i < 2; i++) {
2303 struct ata_port *ap = host->ports[i];
2304 int base = i * 2;
2305 void __iomem * const *iomap;
2306
Tejun Heo1626aeb2007-05-04 12:43:58 +02002307 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002308 continue;
2309
Tejun Heo1626aeb2007-05-04 12:43:58 +02002310 /* Discard disabled ports. Some controllers show
2311 * their unused channels this way. Disabled ports are
2312 * made dummy.
2313 */
2314 if (!ata_resources_present(pdev, i)) {
2315 ap->ops = &ata_dummy_port_ops;
2316 continue;
2317 }
2318
Tejun Heo35a10a82008-01-04 18:42:21 +09002319 rc = pcim_iomap_regions(pdev, 0x3 << base,
2320 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002321 if (rc) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002322 dev_warn(gdev,
2323 "failed to request/iomap BARs for port %d (errno=%d)\n",
2324 i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002325 if (rc == -EBUSY)
2326 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002327 ap->ops = &ata_dummy_port_ops;
2328 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002329 }
2330 host->iomap = iomap = pcim_iomap_table(pdev);
2331
2332 ap->ioaddr.cmd_addr = iomap[base];
2333 ap->ioaddr.altstatus_addr =
2334 ap->ioaddr.ctl_addr = (void __iomem *)
2335 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002336 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002337
Tejun Heocbcdd872007-08-18 13:14:55 +09002338 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2339 (unsigned long long)pci_resource_start(pdev, base),
2340 (unsigned long long)pci_resource_start(pdev, base + 1));
2341
Tejun Heo1626aeb2007-05-04 12:43:58 +02002342 mask |= 1 << i;
2343 }
2344
2345 if (!mask) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002346 dev_err(gdev, "no available native port\n");
Tejun Heo1626aeb2007-05-04 12:43:58 +02002347 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002348 }
2349
2350 return 0;
2351}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002352EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
Tejun Heod491b272007-04-17 23:44:07 +09002353
Tejun Heo21b0ad42007-04-17 23:44:07 +09002354/**
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002355 * ata_pci_sff_prepare_host - helper to prepare PCI PIO-only SFF ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002356 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002357 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002358 * @r_host: out argument for the initialized ATA host
2359 *
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002360 * Helper to allocate PIO-only SFF ATA host for @pdev, acquire
2361 * all PCI resources and initialize it accordingly in one go.
Tejun Heo21b0ad42007-04-17 23:44:07 +09002362 *
2363 * LOCKING:
2364 * Inherited from calling layer (may sleep).
2365 *
2366 * RETURNS:
2367 * 0 on success, -errno otherwise.
2368 */
Tejun Heo9363c382008-04-07 22:47:16 +09002369int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Alan Cox0fe40ff2009-01-05 14:16:13 +00002370 const struct ata_port_info * const *ppi,
Tejun Heod583bc12007-07-04 18:02:07 +09002371 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002372{
2373 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002374 int rc;
2375
2376 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2377 return -ENOMEM;
2378
2379 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2380 if (!host) {
Joe Perchesa44fec12011-04-15 15:51:58 -07002381 dev_err(&pdev->dev, "failed to allocate ATA host\n");
Tejun Heo21b0ad42007-04-17 23:44:07 +09002382 rc = -ENOMEM;
2383 goto err_out;
2384 }
2385
Tejun Heo9363c382008-04-07 22:47:16 +09002386 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002387 if (rc)
2388 goto err_out;
2389
Tejun Heo21b0ad42007-04-17 23:44:07 +09002390 devres_remove_group(&pdev->dev, NULL);
2391 *r_host = host;
2392 return 0;
2393
Alan Cox0fe40ff2009-01-05 14:16:13 +00002394err_out:
Tejun Heo21b0ad42007-04-17 23:44:07 +09002395 devres_release_group(&pdev->dev, NULL);
2396 return rc;
2397}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002398EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002399
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002400/**
Tejun Heo9363c382008-04-07 22:47:16 +09002401 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002402 * @host: target SFF ATA host
2403 * @irq_handler: irq_handler used when requesting IRQ(s)
2404 * @sht: scsi_host_template to use when registering the host
2405 *
2406 * This is the counterpart of ata_host_activate() for SFF ATA
2407 * hosts. This separate helper is necessary because SFF hosts
2408 * use two separate interrupts in legacy mode.
2409 *
2410 * LOCKING:
2411 * Inherited from calling layer (may sleep).
2412 *
2413 * RETURNS:
2414 * 0 on success, -errno otherwise.
2415 */
Tejun Heo9363c382008-04-07 22:47:16 +09002416int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002417 irq_handler_t irq_handler,
2418 struct scsi_host_template *sht)
2419{
2420 struct device *dev = host->dev;
2421 struct pci_dev *pdev = to_pci_dev(dev);
2422 const char *drv_name = dev_driver_string(host->dev);
2423 int legacy_mode = 0, rc;
2424
2425 rc = ata_host_start(host);
2426 if (rc)
2427 return rc;
2428
2429 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2430 u8 tmp8, mask;
2431
2432 /* TODO: What if one channel is in native mode ... */
2433 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2434 mask = (1 << 2) | (1 << 0);
2435 if ((tmp8 & mask) != mask)
2436 legacy_mode = 1;
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002437 }
2438
2439 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2440 return -ENOMEM;
2441
2442 if (!legacy_mode && pdev->irq) {
James Bottomleyaf649a12011-04-24 14:31:33 -05002443 int i;
2444
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002445 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2446 IRQF_SHARED, drv_name, host);
2447 if (rc)
2448 goto out;
2449
James Bottomleyaf649a12011-04-24 14:31:33 -05002450 for (i = 0; i < 2; i++) {
2451 if (ata_port_is_dummy(host->ports[i]))
2452 continue;
2453 ata_port_desc(host->ports[i], "irq %d", pdev->irq);
2454 }
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002455 } else if (legacy_mode) {
2456 if (!ata_port_is_dummy(host->ports[0])) {
2457 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2458 irq_handler, IRQF_SHARED,
2459 drv_name, host);
2460 if (rc)
2461 goto out;
2462
2463 ata_port_desc(host->ports[0], "irq %d",
2464 ATA_PRIMARY_IRQ(pdev));
2465 }
2466
2467 if (!ata_port_is_dummy(host->ports[1])) {
2468 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2469 irq_handler, IRQF_SHARED,
2470 drv_name, host);
2471 if (rc)
2472 goto out;
2473
2474 ata_port_desc(host->ports[1], "irq %d",
2475 ATA_SECONDARY_IRQ(pdev));
2476 }
2477 }
2478
2479 rc = ata_host_register(host, sht);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002480out:
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002481 if (rc == 0)
2482 devres_remove_group(dev, NULL);
2483 else
2484 devres_release_group(dev, NULL);
2485
2486 return rc;
2487}
Alan Cox0fe40ff2009-01-05 14:16:13 +00002488EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002489
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002490static const struct ata_port_info *ata_sff_find_valid_pi(
2491 const struct ata_port_info * const *ppi)
2492{
2493 int i;
2494
2495 /* look up the first valid port_info */
2496 for (i = 0; i < 2 && ppi[i]; i++)
2497 if (ppi[i]->port_ops != &ata_dummy_port_ops)
2498 return ppi[i];
2499
2500 return NULL;
2501}
2502
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002503static int ata_pci_init_one(struct pci_dev *pdev,
2504 const struct ata_port_info * const *ppi,
2505 struct scsi_host_template *sht, void *host_priv,
2506 int hflags, bool bmdma)
2507{
2508 struct device *dev = &pdev->dev;
2509 const struct ata_port_info *pi;
2510 struct ata_host *host = NULL;
2511 int rc;
2512
2513 DPRINTK("ENTER\n");
2514
2515 pi = ata_sff_find_valid_pi(ppi);
2516 if (!pi) {
2517 dev_err(&pdev->dev, "no valid port_info specified\n");
2518 return -EINVAL;
2519 }
2520
2521 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2522 return -ENOMEM;
2523
2524 rc = pcim_enable_device(pdev);
2525 if (rc)
2526 goto out;
2527
Alexander Beregalovaab94402011-11-13 01:30:56 +04002528#ifdef CONFIG_ATA_BMDMA
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002529 if (bmdma)
2530 /* prepare and activate BMDMA host */
2531 rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host);
2532 else
Alexander Beregalovaab94402011-11-13 01:30:56 +04002533#endif
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002534 /* prepare and activate SFF host */
2535 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
2536 if (rc)
2537 goto out;
2538 host->private_data = host_priv;
2539 host->flags |= hflags;
2540
Alexander Beregalovaab94402011-11-13 01:30:56 +04002541#ifdef CONFIG_ATA_BMDMA
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002542 if (bmdma) {
2543 pci_set_master(pdev);
2544 rc = ata_pci_sff_activate_host(host, ata_bmdma_interrupt, sht);
2545 } else
Alexander Beregalovaab94402011-11-13 01:30:56 +04002546#endif
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002547 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
2548out:
2549 if (rc == 0)
2550 devres_remove_group(&pdev->dev, NULL);
2551 else
2552 devres_release_group(&pdev->dev, NULL);
2553
2554 return rc;
2555}
2556
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002557/**
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002558 * ata_pci_sff_init_one - Initialize/register PIO-only PCI IDE controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002559 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02002560 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09002561 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09002562 * @host_priv: host private_data
Alan Cox16ea0fc2010-02-23 02:26:06 -05002563 * @hflag: host flags
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002564 *
2565 * This is a helper function which can be called from a driver's
2566 * xxx_init_one() probe function if the hardware uses traditional
Tejun Heo1c5afdf2010-05-19 22:10:22 +02002567 * IDE taskfile registers and is PIO only.
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002568 *
Alan Cox2ec7df02006-08-10 16:59:10 +09002569 * ASSUMPTION:
2570 * Nobody makes a single channel controller that appears solely as
2571 * the secondary legacy port on PCI.
2572 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002573 * LOCKING:
2574 * Inherited from PCI layer (may sleep).
2575 *
2576 * RETURNS:
2577 * Zero on success, negative on errno-based value on error.
2578 */
Tejun Heo9363c382008-04-07 22:47:16 +09002579int ata_pci_sff_init_one(struct pci_dev *pdev,
Alan Cox16ea0fc2010-02-23 02:26:06 -05002580 const struct ata_port_info * const *ppi,
2581 struct scsi_host_template *sht, void *host_priv, int hflag)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002582{
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02002583 return ata_pci_init_one(pdev, ppi, sht, host_priv, hflag, 0);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002584}
Tejun Heo9363c382008-04-07 22:47:16 +09002585EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Alan Cox0fe40ff2009-01-05 14:16:13 +00002586
Tejun Heo624d5c52008-03-25 22:16:41 +09002587#endif /* CONFIG_PCI */
Tejun Heo9f2f7212010-05-10 21:41:32 +02002588
Tejun Heo9a7780c2010-05-19 22:10:24 +02002589/*
2590 * BMDMA support
2591 */
2592
2593#ifdef CONFIG_ATA_BMDMA
2594
Tejun Heo9f2f7212010-05-10 21:41:32 +02002595const struct ata_port_operations ata_bmdma_port_ops = {
2596 .inherits = &ata_sff_port_ops,
2597
Tejun Heofe06e5f2010-05-10 21:41:39 +02002598 .error_handler = ata_bmdma_error_handler,
2599 .post_internal_cmd = ata_bmdma_post_internal_cmd,
2600
Tejun Heof47451c2010-05-10 21:41:40 +02002601 .qc_prep = ata_bmdma_qc_prep,
Tejun Heo360ff782010-05-10 21:41:42 +02002602 .qc_issue = ata_bmdma_qc_issue,
Tejun Heof47451c2010-05-10 21:41:40 +02002603
Tejun Heo37f65b82010-05-19 22:10:20 +02002604 .sff_irq_clear = ata_bmdma_irq_clear,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002605 .bmdma_setup = ata_bmdma_setup,
2606 .bmdma_start = ata_bmdma_start,
2607 .bmdma_stop = ata_bmdma_stop,
2608 .bmdma_status = ata_bmdma_status,
Tejun Heoc7087652010-05-10 21:41:34 +02002609
2610 .port_start = ata_bmdma_port_start,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002611};
2612EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
2613
2614const struct ata_port_operations ata_bmdma32_port_ops = {
2615 .inherits = &ata_bmdma_port_ops,
2616
2617 .sff_data_xfer = ata_sff_data_xfer32,
Tejun Heoc7087652010-05-10 21:41:34 +02002618 .port_start = ata_bmdma_port_start32,
Tejun Heo9f2f7212010-05-10 21:41:32 +02002619};
2620EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops);
2621
Tejun Heo9f2f7212010-05-10 21:41:32 +02002622/**
Tejun Heof47451c2010-05-10 21:41:40 +02002623 * ata_bmdma_fill_sg - Fill PCI IDE PRD table
2624 * @qc: Metadata associated with taskfile to be transferred
2625 *
2626 * Fill PCI IDE PRD (scatter-gather) table with segments
2627 * associated with the current disk command.
2628 *
2629 * LOCKING:
2630 * spin_lock_irqsave(host lock)
2631 *
2632 */
2633static void ata_bmdma_fill_sg(struct ata_queued_cmd *qc)
2634{
2635 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002636 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002637 struct scatterlist *sg;
2638 unsigned int si, pi;
2639
2640 pi = 0;
2641 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2642 u32 addr, offset;
2643 u32 sg_len, len;
2644
2645 /* determine if physical DMA addr spans 64K boundary.
2646 * Note h/w doesn't support 64-bit, so we unconditionally
2647 * truncate dma_addr_t to u32.
2648 */
2649 addr = (u32) sg_dma_address(sg);
2650 sg_len = sg_dma_len(sg);
2651
2652 while (sg_len) {
2653 offset = addr & 0xffff;
2654 len = sg_len;
2655 if ((offset + sg_len) > 0x10000)
2656 len = 0x10000 - offset;
2657
Tejun Heof60d7012010-05-10 21:41:41 +02002658 prd[pi].addr = cpu_to_le32(addr);
2659 prd[pi].flags_len = cpu_to_le32(len & 0xffff);
Tejun Heof47451c2010-05-10 21:41:40 +02002660 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2661
2662 pi++;
2663 sg_len -= len;
2664 addr += len;
2665 }
2666 }
2667
Tejun Heof60d7012010-05-10 21:41:41 +02002668 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002669}
2670
2671/**
2672 * ata_bmdma_fill_sg_dumb - Fill PCI IDE PRD table
2673 * @qc: Metadata associated with taskfile to be transferred
2674 *
2675 * Fill PCI IDE PRD (scatter-gather) table with segments
2676 * associated with the current disk command. Perform the fill
2677 * so that we avoid writing any length 64K records for
2678 * controllers that don't follow the spec.
2679 *
2680 * LOCKING:
2681 * spin_lock_irqsave(host lock)
2682 *
2683 */
2684static void ata_bmdma_fill_sg_dumb(struct ata_queued_cmd *qc)
2685{
2686 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +02002687 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Tejun Heof47451c2010-05-10 21:41:40 +02002688 struct scatterlist *sg;
2689 unsigned int si, pi;
2690
2691 pi = 0;
2692 for_each_sg(qc->sg, sg, qc->n_elem, si) {
2693 u32 addr, offset;
2694 u32 sg_len, len, blen;
2695
2696 /* determine if physical DMA addr spans 64K boundary.
2697 * Note h/w doesn't support 64-bit, so we unconditionally
2698 * truncate dma_addr_t to u32.
2699 */
2700 addr = (u32) sg_dma_address(sg);
2701 sg_len = sg_dma_len(sg);
2702
2703 while (sg_len) {
2704 offset = addr & 0xffff;
2705 len = sg_len;
2706 if ((offset + sg_len) > 0x10000)
2707 len = 0x10000 - offset;
2708
2709 blen = len & 0xffff;
Tejun Heof60d7012010-05-10 21:41:41 +02002710 prd[pi].addr = cpu_to_le32(addr);
Tejun Heof47451c2010-05-10 21:41:40 +02002711 if (blen == 0) {
2712 /* Some PATA chipsets like the CS5530 can't
2713 cope with 0x0000 meaning 64K as the spec
2714 says */
Tejun Heof60d7012010-05-10 21:41:41 +02002715 prd[pi].flags_len = cpu_to_le32(0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002716 blen = 0x8000;
Tejun Heof60d7012010-05-10 21:41:41 +02002717 prd[++pi].addr = cpu_to_le32(addr + 0x8000);
Tejun Heof47451c2010-05-10 21:41:40 +02002718 }
Tejun Heof60d7012010-05-10 21:41:41 +02002719 prd[pi].flags_len = cpu_to_le32(blen);
Tejun Heof47451c2010-05-10 21:41:40 +02002720 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
2721
2722 pi++;
2723 sg_len -= len;
2724 addr += len;
2725 }
2726 }
2727
Tejun Heof60d7012010-05-10 21:41:41 +02002728 prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Tejun Heof47451c2010-05-10 21:41:40 +02002729}
2730
2731/**
2732 * ata_bmdma_qc_prep - Prepare taskfile for submission
2733 * @qc: Metadata associated with taskfile to be prepared
2734 *
2735 * Prepare ATA taskfile for submission.
2736 *
2737 * LOCKING:
2738 * spin_lock_irqsave(host lock)
2739 */
2740void ata_bmdma_qc_prep(struct ata_queued_cmd *qc)
2741{
2742 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2743 return;
2744
2745 ata_bmdma_fill_sg(qc);
2746}
2747EXPORT_SYMBOL_GPL(ata_bmdma_qc_prep);
2748
2749/**
2750 * ata_bmdma_dumb_qc_prep - Prepare taskfile for submission
2751 * @qc: Metadata associated with taskfile to be prepared
2752 *
2753 * Prepare ATA taskfile for submission.
2754 *
2755 * LOCKING:
2756 * spin_lock_irqsave(host lock)
2757 */
2758void ata_bmdma_dumb_qc_prep(struct ata_queued_cmd *qc)
2759{
2760 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2761 return;
2762
2763 ata_bmdma_fill_sg_dumb(qc);
2764}
2765EXPORT_SYMBOL_GPL(ata_bmdma_dumb_qc_prep);
2766
2767/**
Tejun Heo360ff782010-05-10 21:41:42 +02002768 * ata_bmdma_qc_issue - issue taskfile to a BMDMA controller
2769 * @qc: command to issue to device
2770 *
2771 * This function issues a PIO, NODATA or DMA command to a
2772 * SFF/BMDMA controller. PIO and NODATA are handled by
2773 * ata_sff_qc_issue().
2774 *
2775 * LOCKING:
2776 * spin_lock_irqsave(host lock)
2777 *
2778 * RETURNS:
2779 * Zero on success, AC_ERR_* mask on failure
2780 */
2781unsigned int ata_bmdma_qc_issue(struct ata_queued_cmd *qc)
2782{
2783 struct ata_port *ap = qc->ap;
Gwendal Grignouea3c6452010-08-31 16:20:36 -07002784 struct ata_link *link = qc->dev->link;
Tejun Heo360ff782010-05-10 21:41:42 +02002785
Tejun Heo360ff782010-05-10 21:41:42 +02002786 /* defer PIO handling to sff_qc_issue */
2787 if (!ata_is_dma(qc->tf.protocol))
2788 return ata_sff_qc_issue(qc);
2789
2790 /* select the device */
2791 ata_dev_select(ap, qc->dev->devno, 1, 0);
2792
2793 /* start the command */
2794 switch (qc->tf.protocol) {
2795 case ATA_PROT_DMA:
2796 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2797
2798 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2799 ap->ops->bmdma_setup(qc); /* set up bmdma */
2800 ap->ops->bmdma_start(qc); /* initiate bmdma */
2801 ap->hsm_task_state = HSM_ST_LAST;
2802 break;
2803
2804 case ATAPI_PROT_DMA:
2805 WARN_ON_ONCE(qc->tf.flags & ATA_TFLAG_POLLING);
2806
2807 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
2808 ap->ops->bmdma_setup(qc); /* set up bmdma */
2809 ap->hsm_task_state = HSM_ST_FIRST;
2810
2811 /* send cdb by polling if no cdb interrupt */
2812 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
Gwendal Grignouea3c6452010-08-31 16:20:36 -07002813 ata_sff_queue_pio_task(link, 0);
Tejun Heo360ff782010-05-10 21:41:42 +02002814 break;
2815
2816 default:
2817 WARN_ON(1);
2818 return AC_ERR_SYSTEM;
2819 }
2820
2821 return 0;
2822}
2823EXPORT_SYMBOL_GPL(ata_bmdma_qc_issue);
2824
2825/**
Tejun Heoc3b28892010-05-19 22:10:21 +02002826 * ata_bmdma_port_intr - Handle BMDMA port interrupt
2827 * @ap: Port on which interrupt arrived (possibly...)
2828 * @qc: Taskfile currently active in engine
2829 *
2830 * Handle port interrupt for given queued command.
2831 *
2832 * LOCKING:
2833 * spin_lock_irqsave(host lock)
2834 *
2835 * RETURNS:
2836 * One if interrupt was handled, zero if not (shared irq).
2837 */
2838unsigned int ata_bmdma_port_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
2839{
2840 struct ata_eh_info *ehi = &ap->link.eh_info;
2841 u8 host_stat = 0;
2842 bool bmdma_stopped = false;
2843 unsigned int handled;
2844
2845 if (ap->hsm_task_state == HSM_ST_LAST && ata_is_dma(qc->tf.protocol)) {
2846 /* check status of DMA engine */
2847 host_stat = ap->ops->bmdma_status(ap);
2848 VPRINTK("ata%u: host_stat 0x%X\n", ap->print_id, host_stat);
2849
2850 /* if it's not our irq... */
2851 if (!(host_stat & ATA_DMA_INTR))
2852 return ata_sff_idle_irq(ap);
2853
2854 /* before we do anything else, clear DMA-Start bit */
2855 ap->ops->bmdma_stop(qc);
2856 bmdma_stopped = true;
2857
2858 if (unlikely(host_stat & ATA_DMA_ERR)) {
Lucas De Marchi25985ed2011-03-30 22:57:33 -03002859 /* error when transferring data to/from memory */
Tejun Heoc3b28892010-05-19 22:10:21 +02002860 qc->err_mask |= AC_ERR_HOST_BUS;
2861 ap->hsm_task_state = HSM_ST_ERR;
2862 }
2863 }
2864
2865 handled = __ata_sff_port_intr(ap, qc, bmdma_stopped);
2866
2867 if (unlikely(qc->err_mask) && ata_is_dma(qc->tf.protocol))
2868 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
2869
2870 return handled;
2871}
2872EXPORT_SYMBOL_GPL(ata_bmdma_port_intr);
2873
2874/**
2875 * ata_bmdma_interrupt - Default BMDMA ATA host interrupt handler
2876 * @irq: irq line (unused)
2877 * @dev_instance: pointer to our ata_host information structure
2878 *
2879 * Default interrupt handler for PCI IDE devices. Calls
2880 * ata_bmdma_port_intr() for each port that is not disabled.
2881 *
2882 * LOCKING:
2883 * Obtains host lock during operation.
2884 *
2885 * RETURNS:
2886 * IRQ_NONE or IRQ_HANDLED.
2887 */
2888irqreturn_t ata_bmdma_interrupt(int irq, void *dev_instance)
2889{
2890 return __ata_sff_interrupt(irq, dev_instance, ata_bmdma_port_intr);
2891}
2892EXPORT_SYMBOL_GPL(ata_bmdma_interrupt);
2893
2894/**
Tejun Heofe06e5f2010-05-10 21:41:39 +02002895 * ata_bmdma_error_handler - Stock error handler for BMDMA controller
2896 * @ap: port to handle error for
2897 *
2898 * Stock error handler for BMDMA controller. It can handle both
2899 * PATA and SATA controllers. Most BMDMA controllers should be
2900 * able to use this EH as-is or with some added handling before
2901 * and after.
2902 *
2903 * LOCKING:
2904 * Kernel thread context (may sleep)
2905 */
2906void ata_bmdma_error_handler(struct ata_port *ap)
2907{
2908 struct ata_queued_cmd *qc;
2909 unsigned long flags;
2910 bool thaw = false;
2911
2912 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
2913 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
2914 qc = NULL;
2915
2916 /* reset PIO HSM and stop DMA engine */
2917 spin_lock_irqsave(ap->lock, flags);
2918
2919 if (qc && ata_is_dma(qc->tf.protocol)) {
2920 u8 host_stat;
2921
2922 host_stat = ap->ops->bmdma_status(ap);
2923
2924 /* BMDMA controllers indicate host bus error by
2925 * setting DMA_ERR bit and timing out. As it wasn't
2926 * really a timeout event, adjust error mask and
2927 * cancel frozen state.
2928 */
2929 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
2930 qc->err_mask = AC_ERR_HOST_BUS;
2931 thaw = true;
2932 }
2933
2934 ap->ops->bmdma_stop(qc);
2935
2936 /* if we're gonna thaw, make sure IRQ is clear */
2937 if (thaw) {
2938 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +02002939 if (ap->ops->sff_irq_clear)
2940 ap->ops->sff_irq_clear(ap);
Tejun Heofe06e5f2010-05-10 21:41:39 +02002941 }
2942 }
2943
2944 spin_unlock_irqrestore(ap->lock, flags);
2945
2946 if (thaw)
2947 ata_eh_thaw_port(ap);
2948
2949 ata_sff_error_handler(ap);
2950}
2951EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
2952
2953/**
2954 * ata_bmdma_post_internal_cmd - Stock post_internal_cmd for BMDMA
2955 * @qc: internal command to clean up
2956 *
2957 * LOCKING:
2958 * Kernel thread context (may sleep)
2959 */
2960void ata_bmdma_post_internal_cmd(struct ata_queued_cmd *qc)
2961{
2962 struct ata_port *ap = qc->ap;
2963 unsigned long flags;
2964
2965 if (ata_is_dma(qc->tf.protocol)) {
2966 spin_lock_irqsave(ap->lock, flags);
2967 ap->ops->bmdma_stop(qc);
2968 spin_unlock_irqrestore(ap->lock, flags);
2969 }
2970}
2971EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
2972
2973/**
Tejun Heo37f65b82010-05-19 22:10:20 +02002974 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
2975 * @ap: Port associated with this ATA transaction.
2976 *
2977 * Clear interrupt and error flags in DMA status register.
2978 *
2979 * May be used as the irq_clear() entry in ata_port_operations.
2980 *
2981 * LOCKING:
2982 * spin_lock_irqsave(host lock)
2983 */
2984void ata_bmdma_irq_clear(struct ata_port *ap)
2985{
2986 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2987
2988 if (!mmio)
2989 return;
2990
2991 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
2992}
2993EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
2994
2995/**
Tejun Heo9f2f7212010-05-10 21:41:32 +02002996 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2997 * @qc: Info associated with this ATA transaction.
2998 *
2999 * LOCKING:
3000 * spin_lock_irqsave(host lock)
3001 */
3002void ata_bmdma_setup(struct ata_queued_cmd *qc)
3003{
3004 struct ata_port *ap = qc->ap;
3005 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3006 u8 dmactl;
3007
3008 /* load PRD table addr. */
3009 mb(); /* make sure PRD table writes are visible to controller */
Tejun Heof60d7012010-05-10 21:41:41 +02003010 iowrite32(ap->bmdma_prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
Tejun Heo9f2f7212010-05-10 21:41:32 +02003011
3012 /* specify data direction, triple-check start bit is clear */
3013 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3014 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3015 if (!rw)
3016 dmactl |= ATA_DMA_WR;
3017 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3018
3019 /* issue r/w command */
3020 ap->ops->sff_exec_command(ap, &qc->tf);
3021}
3022EXPORT_SYMBOL_GPL(ata_bmdma_setup);
3023
3024/**
3025 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3026 * @qc: Info associated with this ATA transaction.
3027 *
3028 * LOCKING:
3029 * spin_lock_irqsave(host lock)
3030 */
3031void ata_bmdma_start(struct ata_queued_cmd *qc)
3032{
3033 struct ata_port *ap = qc->ap;
3034 u8 dmactl;
3035
3036 /* start host DMA transaction */
3037 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3038 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3039
3040 /* Strictly, one may wish to issue an ioread8() here, to
3041 * flush the mmio write. However, control also passes
3042 * to the hardware at this point, and it will interrupt
3043 * us when we are to resume control. So, in effect,
3044 * we don't care when the mmio write flushes.
3045 * Further, a read of the DMA status register _immediately_
3046 * following the write may not be what certain flaky hardware
3047 * is expected, so I think it is best to not add a readb()
3048 * without first all the MMIO ATA cards/mobos.
3049 * Or maybe I'm just being paranoid.
3050 *
3051 * FIXME: The posting of this write means I/O starts are
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003052 * unnecessarily delayed for MMIO
Tejun Heo9f2f7212010-05-10 21:41:32 +02003053 */
3054}
3055EXPORT_SYMBOL_GPL(ata_bmdma_start);
3056
3057/**
3058 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3059 * @qc: Command we are ending DMA for
3060 *
3061 * Clears the ATA_DMA_START flag in the dma control register
3062 *
3063 * May be used as the bmdma_stop() entry in ata_port_operations.
3064 *
3065 * LOCKING:
3066 * spin_lock_irqsave(host lock)
3067 */
3068void ata_bmdma_stop(struct ata_queued_cmd *qc)
3069{
3070 struct ata_port *ap = qc->ap;
3071 void __iomem *mmio = ap->ioaddr.bmdma_addr;
3072
3073 /* clear start/stop bit */
3074 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3075 mmio + ATA_DMA_CMD);
3076
3077 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3078 ata_sff_dma_pause(ap);
3079}
3080EXPORT_SYMBOL_GPL(ata_bmdma_stop);
3081
3082/**
3083 * ata_bmdma_status - Read PCI IDE BMDMA status
3084 * @ap: Port associated with this ATA transaction.
3085 *
3086 * Read and return BMDMA status register.
3087 *
3088 * May be used as the bmdma_status() entry in ata_port_operations.
3089 *
3090 * LOCKING:
3091 * spin_lock_irqsave(host lock)
3092 */
3093u8 ata_bmdma_status(struct ata_port *ap)
3094{
3095 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3096}
3097EXPORT_SYMBOL_GPL(ata_bmdma_status);
3098
Tejun Heoc7087652010-05-10 21:41:34 +02003099
3100/**
3101 * ata_bmdma_port_start - Set port up for bmdma.
3102 * @ap: Port to initialize
3103 *
3104 * Called just after data structures for each port are
3105 * initialized. Allocates space for PRD table.
3106 *
3107 * May be used as the port_start() entry in ata_port_operations.
3108 *
3109 * LOCKING:
3110 * Inherited from caller.
3111 */
3112int ata_bmdma_port_start(struct ata_port *ap)
3113{
3114 if (ap->mwdma_mask || ap->udma_mask) {
Tejun Heof60d7012010-05-10 21:41:41 +02003115 ap->bmdma_prd =
3116 dmam_alloc_coherent(ap->host->dev, ATA_PRD_TBL_SZ,
3117 &ap->bmdma_prd_dma, GFP_KERNEL);
3118 if (!ap->bmdma_prd)
Tejun Heoc7087652010-05-10 21:41:34 +02003119 return -ENOMEM;
3120 }
3121
3122 return 0;
3123}
3124EXPORT_SYMBOL_GPL(ata_bmdma_port_start);
3125
3126/**
3127 * ata_bmdma_port_start32 - Set port up for dma.
3128 * @ap: Port to initialize
3129 *
3130 * Called just after data structures for each port are
3131 * initialized. Enables 32bit PIO and allocates space for PRD
3132 * table.
3133 *
3134 * May be used as the port_start() entry in ata_port_operations for
3135 * devices that are capable of 32bit PIO.
3136 *
3137 * LOCKING:
3138 * Inherited from caller.
3139 */
3140int ata_bmdma_port_start32(struct ata_port *ap)
3141{
3142 ap->pflags |= ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE;
3143 return ata_bmdma_port_start(ap);
3144}
3145EXPORT_SYMBOL_GPL(ata_bmdma_port_start32);
3146
Tejun Heo9f2f7212010-05-10 21:41:32 +02003147#ifdef CONFIG_PCI
3148
3149/**
3150 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
3151 * @pdev: PCI device
3152 *
3153 * Some PCI ATA devices report simplex mode but in fact can be told to
3154 * enter non simplex mode. This implements the necessary logic to
3155 * perform the task on such devices. Calling it on other devices will
3156 * have -undefined- behaviour.
3157 */
3158int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
3159{
3160 unsigned long bmdma = pci_resource_start(pdev, 4);
3161 u8 simplex;
3162
3163 if (bmdma == 0)
3164 return -ENOENT;
3165
3166 simplex = inb(bmdma + 0x02);
3167 outb(simplex & 0x60, bmdma + 0x02);
3168 simplex = inb(bmdma + 0x02);
3169 if (simplex & 0x80)
3170 return -EOPNOTSUPP;
3171 return 0;
3172}
3173EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
3174
Tejun Heoc7087652010-05-10 21:41:34 +02003175static void ata_bmdma_nodma(struct ata_host *host, const char *reason)
3176{
3177 int i;
3178
Joe Perchesa44fec12011-04-15 15:51:58 -07003179 dev_err(host->dev, "BMDMA: %s, falling back to PIO\n", reason);
Tejun Heoc7087652010-05-10 21:41:34 +02003180
3181 for (i = 0; i < 2; i++) {
3182 host->ports[i]->mwdma_mask = 0;
3183 host->ports[i]->udma_mask = 0;
3184 }
3185}
3186
Tejun Heo9f2f7212010-05-10 21:41:32 +02003187/**
3188 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
3189 * @host: target ATA host
3190 *
3191 * Acquire PCI BMDMA resources and initialize @host accordingly.
3192 *
3193 * LOCKING:
3194 * Inherited from calling layer (may sleep).
Tejun Heo9f2f7212010-05-10 21:41:32 +02003195 */
Tejun Heoc7087652010-05-10 21:41:34 +02003196void ata_pci_bmdma_init(struct ata_host *host)
Tejun Heo9f2f7212010-05-10 21:41:32 +02003197{
3198 struct device *gdev = host->dev;
3199 struct pci_dev *pdev = to_pci_dev(gdev);
3200 int i, rc;
3201
3202 /* No BAR4 allocation: No DMA */
Tejun Heoc7087652010-05-10 21:41:34 +02003203 if (pci_resource_start(pdev, 4) == 0) {
3204 ata_bmdma_nodma(host, "BAR4 is zero");
3205 return;
3206 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003207
Tejun Heoc7087652010-05-10 21:41:34 +02003208 /*
3209 * Some controllers require BMDMA region to be initialized
3210 * even if DMA is not in use to clear IRQ status via
3211 * ->sff_irq_clear method. Try to initialize bmdma_addr
3212 * regardless of dma masks.
3213 */
Quentin Lambertc54c7192015-04-08 14:34:10 +02003214 rc = dma_set_mask(&pdev->dev, ATA_DMA_MASK);
Tejun Heo9f2f7212010-05-10 21:41:32 +02003215 if (rc)
Tejun Heoc7087652010-05-10 21:41:34 +02003216 ata_bmdma_nodma(host, "failed to set dma mask");
3217 if (!rc) {
Quentin Lambertc54c7192015-04-08 14:34:10 +02003218 rc = dma_set_coherent_mask(&pdev->dev, ATA_DMA_MASK);
Tejun Heoc7087652010-05-10 21:41:34 +02003219 if (rc)
3220 ata_bmdma_nodma(host,
3221 "failed to set consistent dma mask");
3222 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003223
3224 /* request and iomap DMA region */
3225 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
3226 if (rc) {
Tejun Heoc7087652010-05-10 21:41:34 +02003227 ata_bmdma_nodma(host, "failed to request/iomap BAR4");
3228 return;
Tejun Heo9f2f7212010-05-10 21:41:32 +02003229 }
3230 host->iomap = pcim_iomap_table(pdev);
3231
3232 for (i = 0; i < 2; i++) {
3233 struct ata_port *ap = host->ports[i];
3234 void __iomem *bmdma = host->iomap[4] + 8 * i;
3235
3236 if (ata_port_is_dummy(ap))
3237 continue;
3238
3239 ap->ioaddr.bmdma_addr = bmdma;
3240 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
3241 (ioread8(bmdma + 2) & 0x80))
3242 host->flags |= ATA_HOST_SIMPLEX;
3243
3244 ata_port_desc(ap, "bmdma 0x%llx",
3245 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
3246 }
Tejun Heo9f2f7212010-05-10 21:41:32 +02003247}
3248EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
3249
Tejun Heo1c5afdf2010-05-19 22:10:22 +02003250/**
3251 * ata_pci_bmdma_prepare_host - helper to prepare PCI BMDMA ATA host
3252 * @pdev: target PCI device
3253 * @ppi: array of port_info, must be enough for two ports
3254 * @r_host: out argument for the initialized ATA host
3255 *
3256 * Helper to allocate BMDMA ATA host for @pdev, acquire all PCI
3257 * resources and initialize it accordingly in one go.
3258 *
3259 * LOCKING:
3260 * Inherited from calling layer (may sleep).
3261 *
3262 * RETURNS:
3263 * 0 on success, -errno otherwise.
3264 */
3265int ata_pci_bmdma_prepare_host(struct pci_dev *pdev,
3266 const struct ata_port_info * const * ppi,
3267 struct ata_host **r_host)
3268{
3269 int rc;
3270
3271 rc = ata_pci_sff_prepare_host(pdev, ppi, r_host);
3272 if (rc)
3273 return rc;
3274
3275 ata_pci_bmdma_init(*r_host);
3276 return 0;
3277}
3278EXPORT_SYMBOL_GPL(ata_pci_bmdma_prepare_host);
3279
3280/**
3281 * ata_pci_bmdma_init_one - Initialize/register BMDMA PCI IDE controller
3282 * @pdev: Controller to be initialized
3283 * @ppi: array of port_info, must be enough for two ports
3284 * @sht: scsi_host_template to use when registering the host
3285 * @host_priv: host private_data
3286 * @hflags: host flags
3287 *
3288 * This function is similar to ata_pci_sff_init_one() but also
3289 * takes care of BMDMA initialization.
3290 *
3291 * LOCKING:
3292 * Inherited from PCI layer (may sleep).
3293 *
3294 * RETURNS:
3295 * Zero on success, negative on errno-based value on error.
3296 */
3297int ata_pci_bmdma_init_one(struct pci_dev *pdev,
3298 const struct ata_port_info * const * ppi,
3299 struct scsi_host_template *sht, void *host_priv,
3300 int hflags)
3301{
Bartlomiej Zolnierkiewiczc2036032011-10-11 19:22:16 +02003302 return ata_pci_init_one(pdev, ppi, sht, host_priv, hflags, 1);
Tejun Heo1c5afdf2010-05-19 22:10:22 +02003303}
3304EXPORT_SYMBOL_GPL(ata_pci_bmdma_init_one);
3305
Tejun Heo9f2f7212010-05-10 21:41:32 +02003306#endif /* CONFIG_PCI */
Tejun Heo9a7780c2010-05-19 22:10:24 +02003307#endif /* CONFIG_ATA_BMDMA */
Tejun Heo270390e2010-05-10 21:41:35 +02003308
3309/**
3310 * ata_sff_port_init - Initialize SFF/BMDMA ATA port
3311 * @ap: Port to initialize
3312 *
3313 * Called on port allocation to initialize SFF/BMDMA specific
3314 * fields.
3315 *
3316 * LOCKING:
3317 * None.
3318 */
3319void ata_sff_port_init(struct ata_port *ap)
3320{
Tejun Heoc4291372010-05-10 21:41:38 +02003321 INIT_DELAYED_WORK(&ap->sff_pio_task, ata_sff_pio_task);
Tejun Heo5fe74542010-05-10 21:41:37 +02003322 ap->ctl = ATA_DEVCTL_OBS;
3323 ap->last_ctl = 0xFF;
Tejun Heo270390e2010-05-10 21:41:35 +02003324}
3325
3326int __init ata_sff_init(void)
3327{
Tejun Heo6370a6a2010-10-11 15:12:27 +02003328 ata_sff_wq = alloc_workqueue("ata_sff", WQ_MEM_RECLAIM, WQ_MAX_ACTIVE);
Tejun Heoc4291372010-05-10 21:41:38 +02003329 if (!ata_sff_wq)
3330 return -ENOMEM;
3331
Tejun Heo270390e2010-05-10 21:41:35 +02003332 return 0;
3333}
3334
Luck, Tonyc43d5592010-08-23 13:18:02 -07003335void ata_sff_exit(void)
Tejun Heo270390e2010-05-10 21:41:35 +02003336{
Tejun Heoc4291372010-05-10 21:41:38 +02003337 destroy_workqueue(ata_sff_wq);
Tejun Heo270390e2010-05-10 21:41:35 +02003338}