blob: 8490d37aee2a466809c2634e51e8b96386e2eecb [file] [log] [blame]
Thomas Petazzonia3464ed2014-04-15 17:00:03 +02001/*
2 * AHCI glue platform driver for Marvell EBU SOCs
3 *
4 * Copyright (C) 2014 Marvell
5 *
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
7 * Marcin Wojtas <mw@semihalf.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/ahci_platform.h>
15#include <linux/kernel.h>
16#include <linux/mbus.h>
17#include <linux/module.h>
18#include <linux/of_device.h>
19#include <linux/platform_device.h>
20#include "ahci.h"
21
Akinobu Mita018d5ef2015-01-29 08:30:29 +090022#define DRV_NAME "ahci-mvebu"
23
Thomas Petazzonia3464ed2014-04-15 17:00:03 +020024#define AHCI_VENDOR_SPECIFIC_0_ADDR 0xa0
25#define AHCI_VENDOR_SPECIFIC_0_DATA 0xa4
26
27#define AHCI_WINDOW_CTRL(win) (0x60 + ((win) << 4))
28#define AHCI_WINDOW_BASE(win) (0x64 + ((win) << 4))
29#define AHCI_WINDOW_SIZE(win) (0x68 + ((win) << 4))
30
31static void ahci_mvebu_mbus_config(struct ahci_host_priv *hpriv,
32 const struct mbus_dram_target_info *dram)
33{
34 int i;
35
36 for (i = 0; i < 4; i++) {
37 writel(0, hpriv->mmio + AHCI_WINDOW_CTRL(i));
38 writel(0, hpriv->mmio + AHCI_WINDOW_BASE(i));
39 writel(0, hpriv->mmio + AHCI_WINDOW_SIZE(i));
40 }
41
42 for (i = 0; i < dram->num_cs; i++) {
43 const struct mbus_dram_window *cs = dram->cs + i;
44
45 writel((cs->mbus_attr << 8) |
46 (dram->mbus_dram_target_id << 4) | 1,
47 hpriv->mmio + AHCI_WINDOW_CTRL(i));
Nadav Haklaie96998f2015-05-26 18:47:23 +020048 writel(cs->base >> 16, hpriv->mmio + AHCI_WINDOW_BASE(i));
Thomas Petazzonia3464ed2014-04-15 17:00:03 +020049 writel(((cs->size - 1) & 0xffff0000),
50 hpriv->mmio + AHCI_WINDOW_SIZE(i));
51 }
52}
53
54static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv)
55{
56 /*
57 * Enable the regret bit to allow the SATA unit to regret a
58 * request that didn't receive an acknowlegde and avoid a
59 * deadlock
60 */
61 writel(0x4, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_ADDR);
62 writel(0x80, hpriv->mmio + AHCI_VENDOR_SPECIFIC_0_DATA);
63}
64
Thomas Petazzonid6ecf152015-06-17 14:11:01 +020065static int ahci_mvebu_suspend(struct platform_device *pdev, pm_message_t state)
66{
67 return ahci_platform_suspend_host(&pdev->dev);
68}
69
70static int ahci_mvebu_resume(struct platform_device *pdev)
71{
72 struct ata_host *host = platform_get_drvdata(pdev);
73 struct ahci_host_priv *hpriv = host->private_data;
74 const struct mbus_dram_target_info *dram;
75
76 dram = mv_mbus_dram_info();
77 if (dram)
78 ahci_mvebu_mbus_config(hpriv, dram);
79
80 ahci_mvebu_regret_option(hpriv);
81
82 return ahci_platform_resume_host(&pdev->dev);
83}
84
Thomas Petazzonia3464ed2014-04-15 17:00:03 +020085static const struct ata_port_info ahci_mvebu_port_info = {
86 .flags = AHCI_FLAG_COMMON,
87 .pio_mask = ATA_PIO4,
88 .udma_mask = ATA_UDMA6,
89 .port_ops = &ahci_platform_ops,
90};
91
Akinobu Mita018d5ef2015-01-29 08:30:29 +090092static struct scsi_host_template ahci_platform_sht = {
93 AHCI_SHT(DRV_NAME),
94};
95
Thomas Petazzonia3464ed2014-04-15 17:00:03 +020096static int ahci_mvebu_probe(struct platform_device *pdev)
97{
98 struct ahci_host_priv *hpriv;
99 const struct mbus_dram_target_info *dram;
100 int rc;
101
102 hpriv = ahci_platform_get_resources(pdev);
103 if (IS_ERR(hpriv))
104 return PTR_ERR(hpriv);
105
106 rc = ahci_platform_enable_resources(hpriv);
107 if (rc)
108 return rc;
109
110 dram = mv_mbus_dram_info();
111 if (!dram)
112 return -ENODEV;
113
114 ahci_mvebu_mbus_config(hpriv, dram);
115 ahci_mvebu_regret_option(hpriv);
116
Akinobu Mita018d5ef2015-01-29 08:30:29 +0900117 rc = ahci_platform_init_host(pdev, hpriv, &ahci_mvebu_port_info,
118 &ahci_platform_sht);
Thomas Petazzonia3464ed2014-04-15 17:00:03 +0200119 if (rc)
120 goto disable_resources;
121
122 return 0;
123
124disable_resources:
125 ahci_platform_disable_resources(hpriv);
126 return rc;
127}
128
129static const struct of_device_id ahci_mvebu_of_match[] = {
130 { .compatible = "marvell,armada-380-ahci", },
131 { },
132};
133MODULE_DEVICE_TABLE(of, ahci_mvebu_of_match);
134
135/*
136 * We currently don't provide power management related operations,
137 * since there is no suspend/resume support at the platform level for
138 * Armada 38x for the moment.
139 */
140static struct platform_driver ahci_mvebu_driver = {
141 .probe = ahci_mvebu_probe,
142 .remove = ata_platform_remove_one,
Thomas Petazzonid6ecf152015-06-17 14:11:01 +0200143 .suspend = ahci_mvebu_suspend,
144 .resume = ahci_mvebu_resume,
Thomas Petazzonia3464ed2014-04-15 17:00:03 +0200145 .driver = {
Akinobu Mita018d5ef2015-01-29 08:30:29 +0900146 .name = DRV_NAME,
Thomas Petazzonia3464ed2014-04-15 17:00:03 +0200147 .of_match_table = ahci_mvebu_of_match,
148 },
149};
150module_platform_driver(ahci_mvebu_driver);
151
152MODULE_DESCRIPTION("Marvell EBU AHCI SATA driver");
153MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>, Marcin Wojtas <mw@semihalf.com>");
154MODULE_LICENSE("GPL");
155MODULE_ALIAS("platform:ahci_mvebu");