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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Frank Myhr15872212008-08-06 22:41:06 +02002 * hwmon-vid.c - VID/VRM/VRD voltage conversions
3 *
4 * Copyright (c) 2004 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * Partly imported from i2c-vid.h of the lm_sensors project
7 * Copyright (c) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com>
8 * With assistance from Trent Piepho <xyzzy@speakeasy.org>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070024
Joe Perches1f923c72010-10-20 06:51:36 +000025#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <linux/module.h>
28#include <linux/kernel.h>
Jean Delvare303760b2005-07-31 21:52:01 +020029#include <linux/hwmon-vid.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Jean Delvared0f28272005-08-01 22:50:08 +020031/*
Frank Myhr15872212008-08-06 22:41:06 +020032 * Common code for decoding VID pins.
33 *
34 * References:
35 *
36 * For VRM 8.4 to 9.1, "VRM x.y DC-DC Converter Design Guidelines",
37 * available at http://developer.intel.com/.
38 *
39 * For VRD 10.0 and up, "VRD x.y Design Guide",
40 * available at http://developer.intel.com/.
41 *
Jean Delvarecebd7702008-08-15 10:58:05 +020042 * AMD Athlon 64 and AMD Opteron Processors, AMD Publication 26094,
Guenter Roeck86d566e2012-01-19 11:02:18 -080043 * http://support.amd.com/us/Processor_TechDocs/26094.PDF
Jean Delvarecebd7702008-08-15 10:58:05 +020044 * Table 74. VID Code Voltages
45 * This corresponds to an arbitrary VRM code of 24 in the functions below.
46 * These CPU models (K8 revision <= E) have 5 VID pins. See also:
47 * Revision Guide for AMD Athlon 64 and AMD Opteron Processors, AMD Publication 25759,
48 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25759.pdf
49 *
50 * AMD NPT Family 0Fh Processors, AMD Publication 32559,
Frank Myhr116d0482008-08-06 22:41:06 +020051 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf
52 * Table 71. VID Code Voltages
Jean Delvarecebd7702008-08-15 10:58:05 +020053 * This corresponds to an arbitrary VRM code of 25 in the functions below.
54 * These CPU models (K8 revision >= F) have 6 VID pins. See also:
55 * Revision Guide for AMD NPT Family 0Fh Processors, AMD Publication 33610,
56 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
Frank Myhr15872212008-08-06 22:41:06 +020057 *
Frank Myhr15872212008-08-06 22:41:06 +020058 * The 17 specification is in fact Intel Mobile Voltage Positioning -
59 * (IMVP-II). You can find more information in the datasheet of Max1718
60 * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2452
61 *
62 * The 13 specification corresponds to the Intel Pentium M series. There
63 * doesn't seem to be any named specification for these. The conversion
64 * tables are detailed directly in the various Pentium M datasheets:
65 * http://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm
66 *
67 * The 14 specification corresponds to Intel Core series. There
68 * doesn't seem to be any named specification for these. The conversion
69 * tables are detailed directly in the various Pentium Core datasheets:
70 * http://www.intel.com/design/mobile/datashts/309221.htm
71 *
72 * The 110 (VRM 11) specification corresponds to Intel Conroe based series.
73 * http://www.intel.com/design/processor/applnots/313214.htm
74 */
Jean Delvared0f28272005-08-01 22:50:08 +020075
Frank Myhr15872212008-08-06 22:41:06 +020076/*
77 * vrm is the VRM/VRD document version multiplied by 10.
78 * val is the 4-bit or more VID code.
79 * Returned value is in mV to avoid floating point in the kernel.
80 * Some VID have some bits in uV scale, this is rounded to mV.
81 */
Rudolf Marek734a12a2005-12-18 16:36:52 +010082int vid_from_reg(int val, u8 vrm)
Jean Delvared0f28272005-08-01 22:50:08 +020083{
84 int vid;
85
Guenter Roeckf352df62012-01-24 17:55:00 -080086 switch (vrm) {
Jean Delvared0f28272005-08-01 22:50:08 +020087
Guenter Roeckf352df62012-01-24 17:55:00 -080088 case 100: /* VRD 10.0 */
Rudolf Marek6af586d2006-06-12 22:00:53 +020089 /* compute in uV, round to mV */
Rudolf Marek177d1652006-04-25 14:24:46 +020090 val &= 0x3f;
Guenter Roeckf352df62012-01-24 17:55:00 -080091 if ((val & 0x1f) == 0x1f)
Jean Delvared0f28272005-08-01 22:50:08 +020092 return 0;
Guenter Roeckf352df62012-01-24 17:55:00 -080093 if ((val & 0x1f) <= 0x09 || val == 0x0a)
Rudolf Marek6af586d2006-06-12 22:00:53 +020094 vid = 1087500 - (val & 0x1f) * 25000;
Jean Delvared0f28272005-08-01 22:50:08 +020095 else
Rudolf Marek6af586d2006-06-12 22:00:53 +020096 vid = 1862500 - (val & 0x1f) * 25000;
Guenter Roeckf352df62012-01-24 17:55:00 -080097 if (val & 0x20)
Rudolf Marek6af586d2006-06-12 22:00:53 +020098 vid -= 12500;
Frans Meulenbroeks7fe83ad2012-01-05 19:50:18 +010099 return (vid + 500) / 1000;
Jean Delvared0f28272005-08-01 22:50:08 +0200100
Rudolf Marek6af586d2006-06-12 22:00:53 +0200101 case 110: /* Intel Conroe */
102 /* compute in uV, round to mV */
103 val &= 0xff;
Jean Delvare9fab2d8b2007-01-18 22:14:23 +0100104 if (val < 0x02 || val > 0xb2)
Rudolf Marek6af586d2006-06-12 22:00:53 +0200105 return 0;
Frans Meulenbroeks7fe83ad2012-01-05 19:50:18 +0100106 return (1600000 - (val - 2) * 6250 + 500) / 1000;
Frank Myhr116d0482008-08-06 22:41:06 +0200107
Jean Delvarecebd7702008-08-15 10:58:05 +0200108 case 24: /* Athlon64 & Opteron */
109 val &= 0x1f;
110 if (val == 0x1f)
111 return 0;
112 /* fall through */
113 case 25: /* AMD NPT 0Fh */
Frank Myhr116d0482008-08-06 22:41:06 +0200114 val &= 0x3f;
115 return (val < 32) ? 1550 - 25 * val
116 : 775 - (25 * (val - 31)) / 2;
Jean Delvared0f28272005-08-01 22:50:08 +0200117
Jean Delvarec8ecd272012-12-19 22:17:02 +0100118 case 26: /* AMD family 10h to 15h, serial VID */
119 val &= 0x7f;
120 if (val >= 0x7c)
121 return 0;
122 return DIV_ROUND_CLOSEST(15500 - 125 * val, 10);
123
Jean Delvared0f28272005-08-01 22:50:08 +0200124 case 91: /* VRM 9.1 */
125 case 90: /* VRM 9.0 */
Rudolf Marek177d1652006-04-25 14:24:46 +0200126 val &= 0x1f;
Frans Meulenbroeks7fe83ad2012-01-05 19:50:18 +0100127 return val == 0x1f ? 0 :
Guenter Roeckf352df62012-01-24 17:55:00 -0800128 1850 - val * 25;
Jean Delvared0f28272005-08-01 22:50:08 +0200129
130 case 85: /* VRM 8.5 */
Rudolf Marek177d1652006-04-25 14:24:46 +0200131 val &= 0x1f;
Frans Meulenbroeks7fe83ad2012-01-05 19:50:18 +0100132 return (val & 0x10 ? 25 : 0) +
Jean Delvared0f28272005-08-01 22:50:08 +0200133 ((val & 0x0f) > 0x04 ? 2050 : 1250) -
Frans Meulenbroeks7fe83ad2012-01-05 19:50:18 +0100134 ((val & 0x0f) * 50);
Jean Delvared0f28272005-08-01 22:50:08 +0200135
136 case 84: /* VRM 8.4 */
137 val &= 0x0f;
138 /* fall through */
Rudolf Marek734a12a2005-12-18 16:36:52 +0100139 case 82: /* VRM 8.2 */
Rudolf Marek177d1652006-04-25 14:24:46 +0200140 val &= 0x1f;
Frans Meulenbroeks7fe83ad2012-01-05 19:50:18 +0100141 return val == 0x1f ? 0 :
Jean Delvared0f28272005-08-01 22:50:08 +0200142 val & 0x10 ? 5100 - (val) * 100 :
Guenter Roeckf352df62012-01-24 17:55:00 -0800143 2050 - (val) * 50;
Rudolf Marek734a12a2005-12-18 16:36:52 +0100144 case 17: /* Intel IMVP-II */
Rudolf Marek177d1652006-04-25 14:24:46 +0200145 val &= 0x1f;
Frans Meulenbroeks7fe83ad2012-01-05 19:50:18 +0100146 return val & 0x10 ? 975 - (val & 0xF) * 25 :
147 1750 - val * 50;
Jean Delvare4c537fb2006-02-05 23:21:05 +0100148 case 13:
Jean Delvare0a88f4b2011-07-25 21:46:10 +0200149 case 131:
Rudolf Marek177d1652006-04-25 14:24:46 +0200150 val &= 0x3f;
Jean Delvare0a88f4b2011-07-25 21:46:10 +0200151 /* Exception for Eden ULV 500 MHz */
152 if (vrm == 131 && val == 0x3f)
153 val++;
Frans Meulenbroeks7fe83ad2012-01-05 19:50:18 +0100154 return 1708 - val * 16;
Rudolf Marek6af586d2006-06-12 22:00:53 +0200155 case 14: /* Intel Core */
156 /* compute in uV, round to mV */
157 val &= 0x7f;
Frans Meulenbroeks7fe83ad2012-01-05 19:50:18 +0100158 return val > 0x77 ? 0 : (1500000 - (val * 12500) + 500) / 1000;
Rudolf Marek734a12a2005-12-18 16:36:52 +0100159 default: /* report 0 for unknown */
Jean Delvare45f2acc2007-05-27 22:17:43 +0200160 if (vrm)
Joe Perches1f923c72010-10-20 06:51:36 +0000161 pr_warn("Requested unsupported VRM version (%u)\n",
162 (unsigned int)vrm);
Rudolf Marek734a12a2005-12-18 16:36:52 +0100163 return 0;
Jean Delvared0f28272005-08-01 22:50:08 +0200164 }
165}
Guenter Roeckf352df62012-01-24 17:55:00 -0800166EXPORT_SYMBOL(vid_from_reg);
Jean Delvared0f28272005-08-01 22:50:08 +0200167
168/*
Frank Myhr15872212008-08-06 22:41:06 +0200169 * After this point is the code to automatically determine which
170 * VRM/VRD specification should be used depending on the CPU.
171 */
Jean Delvared0f28272005-08-01 22:50:08 +0200172
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173struct vrm_model {
174 u8 vendor;
Guenter Roeck3230f702012-01-24 19:06:24 -0800175 u8 family;
176 u8 model_from;
177 u8 model_to;
178 u8 stepping_to;
Rudolf Marek734a12a2005-12-18 16:36:52 +0100179 u8 vrm_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180};
181
182#define ANY 0xFF
183
184#ifdef CONFIG_X86
185
Jean Delvarecebd7702008-08-15 10:58:05 +0200186/*
Guenter Roeck3230f702012-01-24 19:06:24 -0800187 * The stepping_to parameter is highest acceptable stepping for current line.
Jean Delvarecebd7702008-08-15 10:58:05 +0200188 * The model match must be exact for 4-bit values. For model values 0x10
189 * and above (extended model), all models below the parameter will match.
190 */
Rudolf Marek734a12a2005-12-18 16:36:52 +0100191
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192static struct vrm_model vrm_models[] = {
Guenter Roeck3230f702012-01-24 19:06:24 -0800193 {X86_VENDOR_AMD, 0x6, 0x0, ANY, ANY, 90}, /* Athlon Duron etc */
194 {X86_VENDOR_AMD, 0xF, 0x0, 0x3F, ANY, 24}, /* Athlon 64, Opteron */
Guenter Roeck86d566e2012-01-19 11:02:18 -0800195 /*
196 * In theory, all NPT family 0Fh processors have 6 VID pins and should
197 * thus use vrm 25, however in practice not all mainboards route the
198 * 6th VID pin because it is never needed. So we use the 5 VID pin
199 * variant (vrm 24) for the models which exist today.
200 */
Guenter Roeck3230f702012-01-24 19:06:24 -0800201 {X86_VENDOR_AMD, 0xF, 0x40, 0x7F, ANY, 24}, /* NPT family 0Fh */
202 {X86_VENDOR_AMD, 0xF, 0x80, ANY, ANY, 25}, /* future fam. 0Fh */
203 {X86_VENDOR_AMD, 0x10, 0x0, ANY, ANY, 25}, /* NPT family 10h */
Jean Delvarec8ecd272012-12-19 22:17:02 +0100204 {X86_VENDOR_AMD, 0x11, 0x0, ANY, ANY, 26}, /* family 11h */
205 {X86_VENDOR_AMD, 0x12, 0x0, ANY, ANY, 26}, /* family 12h */
206 {X86_VENDOR_AMD, 0x14, 0x0, ANY, ANY, 26}, /* family 14h */
207 {X86_VENDOR_AMD, 0x15, 0x0, ANY, ANY, 26}, /* family 15h */
Jean Delvare5bed13f2009-09-15 17:18:11 +0200208
Guenter Roeck3230f702012-01-24 19:06:24 -0800209 {X86_VENDOR_INTEL, 0x6, 0x0, 0x6, ANY, 82}, /* Pentium Pro,
210 * Pentium II, Xeon,
211 * Mobile Pentium,
212 * Celeron */
213 {X86_VENDOR_INTEL, 0x6, 0x7, 0x7, ANY, 84}, /* Pentium III, Xeon */
214 {X86_VENDOR_INTEL, 0x6, 0x8, 0x8, ANY, 82}, /* Pentium III, Xeon */
215 {X86_VENDOR_INTEL, 0x6, 0x9, 0x9, ANY, 13}, /* Pentium M (130 nm) */
216 {X86_VENDOR_INTEL, 0x6, 0xA, 0xA, ANY, 82}, /* Pentium III Xeon */
217 {X86_VENDOR_INTEL, 0x6, 0xB, 0xB, ANY, 85}, /* Tualatin */
218 {X86_VENDOR_INTEL, 0x6, 0xD, 0xD, ANY, 13}, /* Pentium M (90 nm) */
219 {X86_VENDOR_INTEL, 0x6, 0xE, 0xE, ANY, 14}, /* Intel Core (65 nm) */
220 {X86_VENDOR_INTEL, 0x6, 0xF, ANY, ANY, 110}, /* Intel Conroe and
221 * later */
222 {X86_VENDOR_INTEL, 0xF, 0x0, 0x0, ANY, 90}, /* P4 */
223 {X86_VENDOR_INTEL, 0xF, 0x1, 0x1, ANY, 90}, /* P4 Willamette */
224 {X86_VENDOR_INTEL, 0xF, 0x2, 0x2, ANY, 90}, /* P4 Northwood */
225 {X86_VENDOR_INTEL, 0xF, 0x3, ANY, ANY, 100}, /* Prescott and above
226 * assume VRD 10 */
Jean Delvare5bed13f2009-09-15 17:18:11 +0200227
Guenter Roeck3230f702012-01-24 19:06:24 -0800228 {X86_VENDOR_CENTAUR, 0x6, 0x7, 0x7, ANY, 85}, /* Eden ESP/Ezra */
229 {X86_VENDOR_CENTAUR, 0x6, 0x8, 0x8, 0x7, 85}, /* Ezra T */
230 {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, 0x7, 85}, /* Nehemiah */
231 {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, ANY, 17}, /* C3-M, Eden-N */
232 {X86_VENDOR_CENTAUR, 0x6, 0xA, 0xA, 0x7, 0}, /* No information */
233 {X86_VENDOR_CENTAUR, 0x6, 0xA, 0xA, ANY, 13}, /* C7-M, C7,
234 * Eden (Esther) */
235 {X86_VENDOR_CENTAUR, 0x6, 0xD, 0xD, ANY, 134}, /* C7-D, C7-M, C7,
236 * Eden (Esther) */
Jean Delvareda97a5a2005-07-31 21:54:28 +0200237};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238
Jean Delvare0a88f4b2011-07-25 21:46:10 +0200239/*
240 * Special case for VIA model D: there are two different possible
241 * VID tables, so we have to figure out first, which one must be
242 * used. This resolves temporary drm value 134 to 14 (Intel Core
243 * 7-bit VID), 13 (Pentium M 6-bit VID) or 131 (Pentium M 6-bit VID
244 * + quirk for Eden ULV 500 MHz).
245 * Note: something similar might be needed for model A, I'm not sure.
246 */
247static u8 get_via_model_d_vrm(void)
248{
Guenter Roeck98128de2013-09-08 19:31:59 -0700249 unsigned int vid, brand, __maybe_unused dummy;
Jean Delvare0a88f4b2011-07-25 21:46:10 +0200250 static const char *brands[4] = {
251 "C7-M", "C7", "Eden", "C7-D"
252 };
253
254 rdmsr(0x198, dummy, vid);
255 vid &= 0xff;
256
257 rdmsr(0x1154, brand, dummy);
258 brand = ((brand >> 4) ^ (brand >> 2)) & 0x03;
259
260 if (vid > 0x3f) {
261 pr_info("Using %d-bit VID table for VIA %s CPU\n",
262 7, brands[brand]);
263 return 14;
264 } else {
265 pr_info("Using %d-bit VID table for VIA %s CPU\n",
266 6, brands[brand]);
267 /* Enable quirk for Eden */
268 return brand == 2 ? 131 : 13;
269 }
270}
271
Guenter Roeck3230f702012-01-24 19:06:24 -0800272static u8 find_vrm(u8 family, u8 model, u8 stepping, u8 vendor)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273{
Guenter Roeck3230f702012-01-24 19:06:24 -0800274 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275
Guenter Roeck3230f702012-01-24 19:06:24 -0800276 for (i = 0; i < ARRAY_SIZE(vrm_models); i++) {
277 if (vendor == vrm_models[i].vendor &&
278 family == vrm_models[i].family &&
279 model >= vrm_models[i].model_from &&
280 model <= vrm_models[i].model_to &&
281 stepping <= vrm_models[i].stepping_to)
282 return vrm_models[i].vrm_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283 }
284
285 return 0;
286}
287
Rudolf Marek734a12a2005-12-18 16:36:52 +0100288u8 vid_which_vrm(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289{
Mike Travis92cb7612007-10-19 20:35:04 +0200290 struct cpuinfo_x86 *c = &cpu_data(0);
Guenter Roeck3230f702012-01-24 19:06:24 -0800291 u8 vrm_ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292
Jean Delvareda97a5a2005-07-31 21:54:28 +0200293 if (c->x86 < 6) /* Any CPU with family lower than 6 */
Guenter Roeck3230f702012-01-24 19:06:24 -0800294 return 0; /* doesn't have VID */
Jean Delvareda97a5a2005-07-31 21:54:28 +0200295
Guenter Roeck3230f702012-01-24 19:06:24 -0800296 vrm_ret = find_vrm(c->x86, c->x86_model, c->x86_mask, c->x86_vendor);
Jean Delvare0a88f4b2011-07-25 21:46:10 +0200297 if (vrm_ret == 134)
298 vrm_ret = get_via_model_d_vrm();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299 if (vrm_ret == 0)
Joe Perches1f923c72010-10-20 06:51:36 +0000300 pr_info("Unknown VRM version of your x86 CPU\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301 return vrm_ret;
302}
303
Rudolf Marek734a12a2005-12-18 16:36:52 +0100304/* and now for something completely different for the non-x86 world */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305#else
Rudolf Marek734a12a2005-12-18 16:36:52 +0100306u8 vid_which_vrm(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307{
Joe Perches1f923c72010-10-20 06:51:36 +0000308 pr_info("Unknown VRM version of your CPU\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309 return 0;
310}
311#endif
Jean Delvare303760b2005-07-31 21:52:01 +0200312EXPORT_SYMBOL(vid_which_vrm);
Jean Delvare96478ef2005-07-31 21:45:27 +0200313
Jean Delvare7188cc62006-12-12 18:18:30 +0100314MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
Jean Delvare96478ef2005-07-31 21:45:27 +0200315
Jean Delvare303760b2005-07-31 21:52:01 +0200316MODULE_DESCRIPTION("hwmon-vid driver");
Jean Delvare96478ef2005-07-31 21:45:27 +0200317MODULE_LICENSE("GPL");