blob: 28db6919c5262ba6b7007dbede97983d0697cbd6 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
4 *
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10005 * Right now, I am very wasteful with the buffers. I allocate memory
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * pages and then divide them into 2K frame buffers. This way I know I
7 * have buffers large enough to hold one frame within one buffer descriptor.
8 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
9 * will be much more memory efficient and will easily handle lots of
10 * small packets.
11 *
12 * Much better multiple PHY support by Magnus Damm.
13 * Copyright (c) 2000 Ericsson Radio Systems AB.
14 *
Greg Ungerer562d2f82005-11-07 14:09:50 +100015 * Support for FEC controller of ColdFire processors.
16 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +100017 *
18 * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
Philippe De Muyter677177c2006-06-27 13:05:33 +100019 * Copyright (c) 2004-2006 Macq Electronique SA.
Linus Torvalds1da177e2005-04-16 15:20:36 -070020 */
21
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/string.h>
25#include <linux/ptrace.h>
26#include <linux/errno.h>
27#include <linux/ioport.h>
28#include <linux/slab.h>
29#include <linux/interrupt.h>
30#include <linux/pci.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/netdevice.h>
34#include <linux/etherdevice.h>
35#include <linux/skbuff.h>
36#include <linux/spinlock.h>
37#include <linux/workqueue.h>
38#include <linux/bitops.h>
Sascha Hauer6f501b12009-01-28 23:03:05 +000039#include <linux/io.h>
40#include <linux/irq.h>
Sascha Hauer196719e2009-01-28 23:03:10 +000041#include <linux/clk.h>
Sascha Haueread73182009-01-28 23:03:11 +000042#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
Greg Ungerer080853a2007-07-30 16:28:46 +100044#include <asm/cacheflush.h>
Sascha Hauer196719e2009-01-28 23:03:10 +000045
46#ifndef CONFIG_ARCH_MXC
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <asm/coldfire.h>
48#include <asm/mcfsim.h>
Sascha Hauer196719e2009-01-28 23:03:10 +000049#endif
Sascha Hauer6f501b12009-01-28 23:03:05 +000050
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include "fec.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
Sascha Hauer196719e2009-01-28 23:03:10 +000053#ifdef CONFIG_ARCH_MXC
54#include <mach/hardware.h>
55#define FEC_ALIGNMENT 0xf
56#else
57#define FEC_ALIGNMENT 0x3
58#endif
59
Sascha Haueread73182009-01-28 23:03:11 +000060/*
61 * Define the fixed address of the FEC hardware.
62 */
Greg Ungerer87f4abb2008-06-06 15:55:36 +100063#if defined(CONFIG_M5272)
Sebastian Siewiorc1d96152008-05-01 14:04:02 +100064#define HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
66static unsigned char fec_mac_default[] = {
67 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
68};
69
70/*
71 * Some hardware gets it MAC address out of local flash memory.
72 * if this is non-zero then assume it is the address to get MAC from.
73 */
74#if defined(CONFIG_NETtel)
75#define FEC_FLASHMAC 0xf0006006
76#elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
77#define FEC_FLASHMAC 0xf0006000
Linus Torvalds1da177e2005-04-16 15:20:36 -070078#elif defined(CONFIG_CANCam)
79#define FEC_FLASHMAC 0xf0020000
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +100080#elif defined (CONFIG_M5272C3)
81#define FEC_FLASHMAC (0xffe04000 + 4)
82#elif defined(CONFIG_MOD5272)
83#define FEC_FLASHMAC 0xffc0406b
Linus Torvalds1da177e2005-04-16 15:20:36 -070084#else
85#define FEC_FLASHMAC 0
86#endif
Greg Ungerer43be6362009-02-26 22:42:51 -080087#endif /* CONFIG_M5272 */
Sascha Haueread73182009-01-28 23:03:11 +000088
Sascha Hauer22f6b862009-04-15 01:32:18 +000089/* Forward declarations of some structures to support different PHYs */
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
91typedef struct {
92 uint mii_data;
93 void (*funct)(uint mii_reg, struct net_device *dev);
94} phy_cmd_t;
95
96typedef struct {
97 uint id;
98 char *name;
99
100 const phy_cmd_t *config;
101 const phy_cmd_t *startup;
102 const phy_cmd_t *ack_int;
103 const phy_cmd_t *shutdown;
104} phy_info_t;
105
106/* The number of Tx and Rx buffers. These are allocated from the page
107 * pool. The code may assume these are power of two, so it it best
108 * to keep them that size.
109 * We don't need to allocate pages for the transmitter. We just use
110 * the skbuffer directly.
111 */
112#define FEC_ENET_RX_PAGES 8
113#define FEC_ENET_RX_FRSIZE 2048
114#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE)
115#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
116#define FEC_ENET_TX_FRSIZE 2048
117#define FEC_ENET_TX_FRPPG (PAGE_SIZE / FEC_ENET_TX_FRSIZE)
118#define TX_RING_SIZE 16 /* Must be power of two */
119#define TX_RING_MOD_MASK 15 /* for this to work */
120
Greg Ungerer562d2f82005-11-07 14:09:50 +1000121#if (((RX_RING_SIZE + TX_RING_SIZE) * 8) > PAGE_SIZE)
Matt Waddel6b265292006-06-27 13:10:56 +1000122#error "FEC: descriptor ring size constants too large"
Greg Ungerer562d2f82005-11-07 14:09:50 +1000123#endif
124
Sascha Hauer22f6b862009-04-15 01:32:18 +0000125/* Interrupt events/masks. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
127#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
128#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
129#define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
130#define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
131#define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
132#define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
133#define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
134#define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
135#define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
136
137/* The FEC stores dest/src/type, data, and checksum for receive packets.
138 */
139#define PKT_MAXBUF_SIZE 1518
140#define PKT_MINBUF_SIZE 64
141#define PKT_MAXBLR_SIZE 1520
142
143
144/*
Matt Waddel6b265292006-06-27 13:10:56 +1000145 * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 * size bits. Other FEC hardware does not, so we need to take that into
147 * account when setting it.
148 */
Greg Ungerer562d2f82005-11-07 14:09:50 +1000149#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
Sascha Hauer196719e2009-01-28 23:03:10 +0000150 defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARCH_MXC)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151#define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
152#else
153#define OPT_FRAME_SIZE 0
154#endif
155
156/* The FEC buffer descriptors track the ring buffers. The rx_bd_base and
157 * tx_bd_base always point to the base of the buffer descriptors. The
158 * cur_rx and cur_tx point to the currently available buffer.
159 * The dirty_tx tracks the current buffer that is being sent by the
160 * controller. The cur_tx and dirty_tx are equal under both completely
161 * empty and completely full conditions. The empty/ready indicator in
162 * the buffer descriptor determines the actual condition.
163 */
164struct fec_enet_private {
165 /* Hardware registers of the FEC device */
Sascha Hauerf44d6302009-04-15 03:11:30 +0000166 void __iomem *hwp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167
Greg Ungerercb84d6e2007-07-30 16:29:09 +1000168 struct net_device *netdev;
169
Sascha Haueread73182009-01-28 23:03:11 +0000170 struct clk *clk;
171
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
173 unsigned char *tx_bounce[TX_RING_SIZE];
174 struct sk_buff* tx_skbuff[TX_RING_SIZE];
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000175 struct sk_buff* rx_skbuff[RX_RING_SIZE];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 ushort skb_cur;
177 ushort skb_dirty;
178
Sascha Hauer22f6b862009-04-15 01:32:18 +0000179 /* CPM dual port RAM relative addresses */
Sascha Hauer4661e752009-01-28 23:03:07 +0000180 dma_addr_t bd_dma;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000181 /* Address of Rx and Tx buffers */
Sascha Hauer2e285322009-04-15 01:32:16 +0000182 struct bufdesc *rx_bd_base;
183 struct bufdesc *tx_bd_base;
184 /* The next free ring entry */
185 struct bufdesc *cur_rx, *cur_tx;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000186 /* The ring entries to be free()ed */
Sascha Hauer2e285322009-04-15 01:32:16 +0000187 struct bufdesc *dirty_tx;
188
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 uint tx_full;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000190 /* hold while accessing the HW like ringbuffer for tx/rx but not MAC */
191 spinlock_t hw_lock;
192 /* hold while accessing the mii_list_t() elements */
193 spinlock_t mii_lock;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194
195 uint phy_id;
196 uint phy_id_done;
197 uint phy_status;
198 uint phy_speed;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000199 phy_info_t const *phy;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200 struct work_struct phy_task;
201
202 uint sequence_done;
203 uint mii_phy_task_queued;
204
205 uint phy_addr;
206
207 int index;
208 int opened;
209 int link;
210 int old_link;
211 int full_duplex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212};
213
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214static void fec_enet_mii(struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100215static irqreturn_t fec_enet_interrupt(int irq, void * dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216static void fec_enet_tx(struct net_device *dev);
217static void fec_enet_rx(struct net_device *dev);
218static int fec_enet_close(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219static void fec_restart(struct net_device *dev, int duplex);
220static void fec_stop(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700221
222
223/* MII processing. We keep this as simple as possible. Requests are
224 * placed on the list (if there is room). When the request is finished
225 * by the MII, an optional function may be called.
226 */
227typedef struct mii_list {
228 uint mii_regval;
229 void (*mii_func)(uint val, struct net_device *dev);
230 struct mii_list *mii_next;
231} mii_list_t;
232
233#define NMII 20
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000234static mii_list_t mii_cmds[NMII];
235static mii_list_t *mii_free;
236static mii_list_t *mii_head;
237static mii_list_t *mii_tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400239static int mii_queue(struct net_device *dev, int request,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240 void (*func)(uint, struct net_device *));
241
Sascha Hauer22f6b862009-04-15 01:32:18 +0000242/* Make MII read/write commands for the FEC */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
244#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \
245 (VAL & 0xffff))
246#define mk_mii_end 0
247
Sascha Hauer22f6b862009-04-15 01:32:18 +0000248/* Transmitter timeout */
249#define TX_TIMEOUT (2 * HZ)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250
Sascha Hauer22f6b862009-04-15 01:32:18 +0000251/* Register definitions for the PHY */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700252
253#define MII_REG_CR 0 /* Control Register */
254#define MII_REG_SR 1 /* Status Register */
255#define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */
256#define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400257#define MII_REG_ANAR 4 /* A-N Advertisement Register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258#define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */
259#define MII_REG_ANER 6 /* A-N Expansion Register */
260#define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */
261#define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */
262
263/* values for phy_status */
264
265#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
266#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
267#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
268#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400269#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400271#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272
273#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
274#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
275#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
276#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
277#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400278#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400280#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281
282
283static int
284fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
285{
Sascha Hauerf44d6302009-04-15 03:11:30 +0000286 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauer2e285322009-04-15 01:32:16 +0000287 struct bufdesc *bdp;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000288 unsigned short status;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000289 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 if (!fep->link) {
292 /* Link is down or autonegotiation is in progress. */
293 return 1;
294 }
295
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000296 spin_lock_irqsave(&fep->hw_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297 /* Fill in a Tx ring entry */
298 bdp = fep->cur_tx;
299
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000300 status = bdp->cbd_sc;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000301
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000302 if (status & BD_ENET_TX_READY) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303 /* Ooops. All transmit buffers are full. Bail out.
304 * This should not happen, since dev->tbusy should be set.
305 */
306 printk("%s: tx queue full!.\n", dev->name);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000307 spin_unlock_irqrestore(&fep->hw_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308 return 1;
309 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310
Sascha Hauer22f6b862009-04-15 01:32:18 +0000311 /* Clear all of the status flags */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000312 status &= ~BD_ENET_TX_STATS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313
Sascha Hauer22f6b862009-04-15 01:32:18 +0000314 /* Set buffer length and buffer pointer */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315 bdp->cbd_bufaddr = __pa(skb->data);
316 bdp->cbd_datlen = skb->len;
317
318 /*
Sascha Hauer22f6b862009-04-15 01:32:18 +0000319 * On some FEC implementations data must be aligned on
320 * 4-byte boundaries. Use bounce buffers to copy data
321 * and get it aligned. Ugh.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322 */
Sascha Hauer196719e2009-01-28 23:03:10 +0000323 if (bdp->cbd_bufaddr & FEC_ALIGNMENT) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324 unsigned int index;
325 index = bdp - fep->tx_bd_base;
Sascha Hauer6989f512009-01-28 23:03:06 +0000326 memcpy(fep->tx_bounce[index], (void *)skb->data, skb->len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327 bdp->cbd_bufaddr = __pa(fep->tx_bounce[index]);
328 }
329
Sascha Hauer22f6b862009-04-15 01:32:18 +0000330 /* Save skb pointer */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 fep->tx_skbuff[fep->skb_cur] = skb;
332
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700333 dev->stats.tx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700334 fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400335
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336 /* Push the data cache so the CPM does not get stale memory
337 * data.
338 */
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000339 bdp->cbd_bufaddr = dma_map_single(&dev->dev, skb->data,
340 FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000342 /* Send it on its way. Tell FEC it's ready, interrupt when done,
343 * it's the last BD of the frame, and to put the CRC on the end.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000345 status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346 | BD_ENET_TX_LAST | BD_ENET_TX_TC);
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000347 bdp->cbd_sc = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348
349 dev->trans_start = jiffies;
350
351 /* Trigger transmission start */
Sascha Hauerf44d6302009-04-15 03:11:30 +0000352 writel(0, fep->hwp + FEC_X_DES_ACTIVE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353
Sascha Hauer22f6b862009-04-15 01:32:18 +0000354 /* If this was the last BD in the ring, start at the beginning again. */
355 if (status & BD_ENET_TX_WRAP)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356 bdp = fep->tx_bd_base;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000357 else
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 bdp++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359
360 if (bdp == fep->dirty_tx) {
361 fep->tx_full = 1;
362 netif_stop_queue(dev);
363 }
364
Sascha Hauer2e285322009-04-15 01:32:16 +0000365 fep->cur_tx = bdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700366
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000367 spin_unlock_irqrestore(&fep->hw_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368
369 return 0;
370}
371
372static void
373fec_timeout(struct net_device *dev)
374{
375 struct fec_enet_private *fep = netdev_priv(dev);
376
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700377 dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000379 fec_restart(dev, fep->full_duplex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380 netif_wake_queue(dev);
381}
382
Linus Torvalds1da177e2005-04-16 15:20:36 -0700383static irqreturn_t
David Howells7d12e782006-10-05 14:55:46 +0100384fec_enet_interrupt(int irq, void * dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385{
386 struct net_device *dev = dev_id;
Sascha Hauerf44d6302009-04-15 03:11:30 +0000387 struct fec_enet_private *fep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388 uint int_events;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000389 irqreturn_t ret = IRQ_NONE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000391 do {
Sascha Hauerf44d6302009-04-15 03:11:30 +0000392 int_events = readl(fep->hwp + FEC_IEVENT);
393 writel(int_events, fep->hwp + FEC_IEVENT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395 if (int_events & FEC_ENET_RXF) {
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000396 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397 fec_enet_rx(dev);
398 }
399
400 /* Transmit OK, or non-fatal error. Update the buffer
Sascha Hauerf44d6302009-04-15 03:11:30 +0000401 * descriptors. FEC handles all errors, we just discover
402 * them as part of the transmit process.
403 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700404 if (int_events & FEC_ENET_TXF) {
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000405 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700406 fec_enet_tx(dev);
407 }
408
409 if (int_events & FEC_ENET_MII) {
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000410 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411 fec_enet_mii(dev);
412 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400413
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000414 } while (int_events);
415
416 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417}
418
419
420static void
421fec_enet_tx(struct net_device *dev)
422{
423 struct fec_enet_private *fep;
Sascha Hauer2e285322009-04-15 01:32:16 +0000424 struct bufdesc *bdp;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000425 unsigned short status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426 struct sk_buff *skb;
427
428 fep = netdev_priv(dev);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000429 spin_lock_irq(&fep->hw_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430 bdp = fep->dirty_tx;
431
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000432 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000433 if (bdp == fep->cur_tx && fep->tx_full == 0)
434 break;
435
436 dma_unmap_single(&dev->dev, bdp->cbd_bufaddr, FEC_ENET_TX_FRSIZE, DMA_TO_DEVICE);
437 bdp->cbd_bufaddr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438
439 skb = fep->tx_skbuff[fep->skb_dirty];
440 /* Check for errors. */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000441 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442 BD_ENET_TX_RL | BD_ENET_TX_UN |
443 BD_ENET_TX_CSL)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700444 dev->stats.tx_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000445 if (status & BD_ENET_TX_HB) /* No heartbeat */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700446 dev->stats.tx_heartbeat_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000447 if (status & BD_ENET_TX_LC) /* Late collision */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700448 dev->stats.tx_window_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000449 if (status & BD_ENET_TX_RL) /* Retrans limit */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700450 dev->stats.tx_aborted_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000451 if (status & BD_ENET_TX_UN) /* Underrun */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700452 dev->stats.tx_fifo_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000453 if (status & BD_ENET_TX_CSL) /* Carrier lost */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700454 dev->stats.tx_carrier_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455 } else {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700456 dev->stats.tx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457 }
458
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000459 if (status & BD_ENET_TX_READY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460 printk("HEY! Enet xmit interrupt and TX_READY.\n");
Sascha Hauer22f6b862009-04-15 01:32:18 +0000461
Linus Torvalds1da177e2005-04-16 15:20:36 -0700462 /* Deferred means some collisions occurred during transmit,
463 * but we eventually sent the packet OK.
464 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000465 if (status & BD_ENET_TX_DEF)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700466 dev->stats.collisions++;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400467
Sascha Hauer22f6b862009-04-15 01:32:18 +0000468 /* Free the sk buffer associated with this last transmit */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469 dev_kfree_skb_any(skb);
470 fep->tx_skbuff[fep->skb_dirty] = NULL;
471 fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400472
Sascha Hauer22f6b862009-04-15 01:32:18 +0000473 /* Update pointer to next buffer descriptor to be transmitted */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000474 if (status & BD_ENET_TX_WRAP)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475 bdp = fep->tx_bd_base;
476 else
477 bdp++;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400478
Sascha Hauer22f6b862009-04-15 01:32:18 +0000479 /* Since we have freed up a buffer, the ring is no longer full
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480 */
481 if (fep->tx_full) {
482 fep->tx_full = 0;
483 if (netif_queue_stopped(dev))
484 netif_wake_queue(dev);
485 }
486 }
Sascha Hauer2e285322009-04-15 01:32:16 +0000487 fep->dirty_tx = bdp;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000488 spin_unlock_irq(&fep->hw_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489}
490
491
492/* During a receive, the cur_rx points to the current incoming buffer.
493 * When we update through the ring, if the next incoming buffer has
494 * not been given to the system, we just set the empty indicator,
495 * effectively tossing the packet.
496 */
497static void
498fec_enet_rx(struct net_device *dev)
499{
Sascha Hauerf44d6302009-04-15 03:11:30 +0000500 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauer2e285322009-04-15 01:32:16 +0000501 struct bufdesc *bdp;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000502 unsigned short status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503 struct sk_buff *skb;
504 ushort pkt_len;
505 __u8 *data;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400506
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000507#ifdef CONFIG_M532x
508 flush_cache_all();
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400509#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700510
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000511 spin_lock_irq(&fep->hw_lock);
512
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513 /* First, grab all of the stats for the incoming packet.
514 * These get messed up if we get called due to a busy condition.
515 */
516 bdp = fep->cur_rx;
517
Sascha Hauer22f6b862009-04-15 01:32:18 +0000518 while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700519
Sascha Hauer22f6b862009-04-15 01:32:18 +0000520 /* Since we have allocated space to hold a complete frame,
521 * the last indicator should be set.
522 */
523 if ((status & BD_ENET_RX_LAST) == 0)
524 printk("FEC ENET: rcv is not +last\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525
Sascha Hauer22f6b862009-04-15 01:32:18 +0000526 if (!fep->opened)
527 goto rx_processing_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700528
Sascha Hauer22f6b862009-04-15 01:32:18 +0000529 /* Check for errors. */
530 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700531 BD_ENET_RX_CR | BD_ENET_RX_OV)) {
Sascha Hauer22f6b862009-04-15 01:32:18 +0000532 dev->stats.rx_errors++;
533 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
534 /* Frame too long or too short. */
535 dev->stats.rx_length_errors++;
536 }
537 if (status & BD_ENET_RX_NO) /* Frame alignment */
538 dev->stats.rx_frame_errors++;
539 if (status & BD_ENET_RX_CR) /* CRC Error */
540 dev->stats.rx_crc_errors++;
541 if (status & BD_ENET_RX_OV) /* FIFO overrun */
542 dev->stats.rx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543 }
Sascha Hauer22f6b862009-04-15 01:32:18 +0000544
545 /* Report late collisions as a frame error.
546 * On this error, the BD is closed, but we don't know what we
547 * have in the buffer. So, just drop this frame on the floor.
548 */
549 if (status & BD_ENET_RX_CL) {
550 dev->stats.rx_errors++;
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700551 dev->stats.rx_frame_errors++;
Sascha Hauer22f6b862009-04-15 01:32:18 +0000552 goto rx_processing_done;
553 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700554
Sascha Hauer22f6b862009-04-15 01:32:18 +0000555 /* Process the incoming frame. */
556 dev->stats.rx_packets++;
557 pkt_len = bdp->cbd_datlen;
558 dev->stats.rx_bytes += pkt_len;
559 data = (__u8*)__va(bdp->cbd_bufaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000561 dma_unmap_single(NULL, bdp->cbd_bufaddr, bdp->cbd_datlen,
562 DMA_FROM_DEVICE);
Sascha Hauerccdc4f12009-01-28 23:03:09 +0000563
Sascha Hauer22f6b862009-04-15 01:32:18 +0000564 /* This does 16 byte alignment, exactly what we need.
565 * The packet length includes FCS, but we don't want to
566 * include that when passing upstream as it messes up
567 * bridging applications.
568 */
Sascha Hauer85498892009-04-15 01:32:21 +0000569 skb = dev_alloc_skb(pkt_len - 4 + NET_IP_ALIGN);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570
Sascha Hauer85498892009-04-15 01:32:21 +0000571 if (unlikely(!skb)) {
Sascha Hauer22f6b862009-04-15 01:32:18 +0000572 printk("%s: Memory squeeze, dropping packet.\n",
573 dev->name);
574 dev->stats.rx_dropped++;
575 } else {
Sascha Hauer85498892009-04-15 01:32:21 +0000576 skb_reserve(skb, NET_IP_ALIGN);
Sascha Hauer22f6b862009-04-15 01:32:18 +0000577 skb_put(skb, pkt_len - 4); /* Make room */
578 skb_copy_to_linear_data(skb, data, pkt_len - 4);
579 skb->protocol = eth_type_trans(skb, dev);
580 netif_rx(skb);
581 }
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +0000582
583 bdp->cbd_bufaddr = dma_map_single(NULL, data, bdp->cbd_datlen,
584 DMA_FROM_DEVICE);
Sascha Hauer22f6b862009-04-15 01:32:18 +0000585rx_processing_done:
586 /* Clear the status flags for this buffer */
587 status &= ~BD_ENET_RX_STATS;
588
589 /* Mark the buffer empty */
590 status |= BD_ENET_RX_EMPTY;
591 bdp->cbd_sc = status;
592
593 /* Update BD pointer to next entry */
594 if (status & BD_ENET_RX_WRAP)
595 bdp = fep->rx_bd_base;
596 else
597 bdp++;
598 /* Doing this here will keep the FEC running while we process
599 * incoming frames. On a heavily loaded network, we should be
600 * able to keep up at the expense of system resources.
601 */
602 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603 }
Sascha Hauer2e285322009-04-15 01:32:16 +0000604 fep->cur_rx = bdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000606 spin_unlock_irq(&fep->hw_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607}
608
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000609/* called from interrupt context */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610static void
611fec_enet_mii(struct net_device *dev)
612{
613 struct fec_enet_private *fep;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614 mii_list_t *mip;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615
616 fep = netdev_priv(dev);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000617 spin_lock_irq(&fep->mii_lock);
618
Linus Torvalds1da177e2005-04-16 15:20:36 -0700619 if ((mip = mii_head) == NULL) {
620 printk("MII and no head!\n");
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000621 goto unlock;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622 }
623
624 if (mip->mii_func != NULL)
Sascha Hauerf44d6302009-04-15 03:11:30 +0000625 (*(mip->mii_func))(readl(fep->hwp + FEC_MII_DATA), dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626
627 mii_head = mip->mii_next;
628 mip->mii_next = mii_free;
629 mii_free = mip;
630
631 if ((mip = mii_head) != NULL)
Sascha Hauerf44d6302009-04-15 03:11:30 +0000632 writel(mip->mii_regval, fep->hwp + FEC_MII_DATA);
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000633
634unlock:
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000635 spin_unlock_irq(&fep->mii_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700636}
637
638static int
639mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *))
640{
641 struct fec_enet_private *fep;
642 unsigned long flags;
643 mii_list_t *mip;
644 int retval;
645
Sascha Hauer22f6b862009-04-15 01:32:18 +0000646 /* Add PHY address to register command */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700647 fep = netdev_priv(dev);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000648 spin_lock_irqsave(&fep->mii_lock, flags);
649
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650 regval |= fep->phy_addr << 23;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651 retval = 0;
652
Linus Torvalds1da177e2005-04-16 15:20:36 -0700653 if ((mip = mii_free) != NULL) {
654 mii_free = mip->mii_next;
655 mip->mii_regval = regval;
656 mip->mii_func = func;
657 mip->mii_next = NULL;
658 if (mii_head) {
659 mii_tail->mii_next = mip;
660 mii_tail = mip;
Philippe De Muyterf909b1e2007-10-23 14:37:54 +1000661 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 mii_head = mii_tail = mip;
Sascha Hauerf44d6302009-04-15 03:11:30 +0000663 writel(regval, fep->hwp + FEC_MII_DATA);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664 }
Philippe De Muyterf909b1e2007-10-23 14:37:54 +1000665 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700666 retval = 1;
667 }
668
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000669 spin_unlock_irqrestore(&fep->mii_lock, flags);
670 return retval;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671}
672
673static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c)
674{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700675 if(!c)
676 return;
677
Philippe De Muyterbe6cb662007-10-23 14:37:54 +1000678 for (; c->mii_data != mk_mii_end; c++)
679 mii_queue(dev, c->mii_data, c->funct);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700680}
681
682static void mii_parse_sr(uint mii_reg, struct net_device *dev)
683{
684 struct fec_enet_private *fep = netdev_priv(dev);
685 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000686 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000688 status = *s & ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689
690 if (mii_reg & 0x0004)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000691 status |= PHY_STAT_LINK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700692 if (mii_reg & 0x0010)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000693 status |= PHY_STAT_FAULT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700694 if (mii_reg & 0x0020)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000695 status |= PHY_STAT_ANC;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000696 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700697}
698
699static void mii_parse_cr(uint mii_reg, struct net_device *dev)
700{
701 struct fec_enet_private *fep = netdev_priv(dev);
702 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000703 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000705 status = *s & ~(PHY_CONF_ANE | PHY_CONF_LOOP);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706
707 if (mii_reg & 0x1000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000708 status |= PHY_CONF_ANE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700709 if (mii_reg & 0x4000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000710 status |= PHY_CONF_LOOP;
711 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700712}
713
714static void mii_parse_anar(uint mii_reg, struct net_device *dev)
715{
716 struct fec_enet_private *fep = netdev_priv(dev);
717 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000718 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000720 status = *s & ~(PHY_CONF_SPMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700721
722 if (mii_reg & 0x0020)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000723 status |= PHY_CONF_10HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700724 if (mii_reg & 0x0040)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000725 status |= PHY_CONF_10FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700726 if (mii_reg & 0x0080)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000727 status |= PHY_CONF_100HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700728 if (mii_reg & 0x00100)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000729 status |= PHY_CONF_100FDX;
730 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731}
732
733/* ------------------------------------------------------------------------- */
734/* The Level one LXT970 is used by many boards */
735
736#define MII_LXT970_MIRROR 16 /* Mirror register */
737#define MII_LXT970_IER 17 /* Interrupt Enable Register */
738#define MII_LXT970_ISR 18 /* Interrupt Status Register */
739#define MII_LXT970_CONFIG 19 /* Configuration Register */
740#define MII_LXT970_CSR 20 /* Chip Status Register */
741
742static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev)
743{
744 struct fec_enet_private *fep = netdev_priv(dev);
745 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000746 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000748 status = *s & ~(PHY_STAT_SPMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700749 if (mii_reg & 0x0800) {
750 if (mii_reg & 0x1000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000751 status |= PHY_STAT_100FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000753 status |= PHY_STAT_100HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700754 } else {
755 if (mii_reg & 0x1000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000756 status |= PHY_STAT_10FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700757 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000758 status |= PHY_STAT_10HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700759 }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000760 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700761}
762
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000763static phy_cmd_t const phy_cmd_lxt970_config[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764 { mk_mii_read(MII_REG_CR), mii_parse_cr },
765 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
766 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000767 };
768static phy_cmd_t const phy_cmd_lxt970_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700769 { mk_mii_write(MII_LXT970_IER, 0x0002), NULL },
770 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
771 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000772 };
773static phy_cmd_t const phy_cmd_lxt970_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774 /* read SR and ISR to acknowledge */
775 { mk_mii_read(MII_REG_SR), mii_parse_sr },
776 { mk_mii_read(MII_LXT970_ISR), NULL },
777
778 /* find out the current status */
779 { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr },
780 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000781 };
782static phy_cmd_t const phy_cmd_lxt970_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700783 { mk_mii_write(MII_LXT970_IER, 0x0000), NULL },
784 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000785 };
786static phy_info_t const phy_info_lxt970 = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400787 .id = 0x07810000,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000788 .name = "LXT970",
789 .config = phy_cmd_lxt970_config,
790 .startup = phy_cmd_lxt970_startup,
791 .ack_int = phy_cmd_lxt970_ack_int,
792 .shutdown = phy_cmd_lxt970_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -0700793};
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400794
Linus Torvalds1da177e2005-04-16 15:20:36 -0700795/* ------------------------------------------------------------------------- */
796/* The Level one LXT971 is used on some of my custom boards */
797
798/* register definitions for the 971 */
799
800#define MII_LXT971_PCR 16 /* Port Control Register */
801#define MII_LXT971_SR2 17 /* Status Register 2 */
802#define MII_LXT971_IER 18 /* Interrupt Enable Register */
803#define MII_LXT971_ISR 19 /* Interrupt Status Register */
804#define MII_LXT971_LCR 20 /* LED Control Register */
805#define MII_LXT971_TCR 30 /* Transmit Control Register */
806
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400807/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700808 * I had some nice ideas of running the MDIO faster...
809 * The 971 should support 8MHz and I tried it, but things acted really
810 * weird, so 2.5 MHz ought to be enough for anyone...
811 */
812
813static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev)
814{
815 struct fec_enet_private *fep = netdev_priv(dev);
816 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000817 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700818
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000819 status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700820
821 if (mii_reg & 0x0400) {
822 fep->link = 1;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000823 status |= PHY_STAT_LINK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700824 } else {
825 fep->link = 0;
826 }
827 if (mii_reg & 0x0080)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000828 status |= PHY_STAT_ANC;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700829 if (mii_reg & 0x4000) {
830 if (mii_reg & 0x0200)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000831 status |= PHY_STAT_100FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000833 status |= PHY_STAT_100HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834 } else {
835 if (mii_reg & 0x0200)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000836 status |= PHY_STAT_10FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000838 status |= PHY_STAT_10HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700839 }
840 if (mii_reg & 0x0008)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000841 status |= PHY_STAT_FAULT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000843 *s = status;
844}
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400845
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000846static phy_cmd_t const phy_cmd_lxt971_config[] = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400847 /* limit to 10MBit because my prototype board
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848 * doesn't work with 100. */
849 { mk_mii_read(MII_REG_CR), mii_parse_cr },
850 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
851 { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
852 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000853 };
854static phy_cmd_t const phy_cmd_lxt971_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700855 { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL },
856 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
857 { mk_mii_write(MII_LXT971_LCR, 0xd422), NULL }, /* LED config */
858 /* Somehow does the 971 tell me that the link is down
859 * the first read after power-up.
860 * read here to get a valid value in ack_int */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400861 { mk_mii_read(MII_REG_SR), mii_parse_sr },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700862 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000863 };
864static phy_cmd_t const phy_cmd_lxt971_ack_int[] = {
865 /* acknowledge the int before reading status ! */
866 { mk_mii_read(MII_LXT971_ISR), NULL },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700867 /* find out the current status */
868 { mk_mii_read(MII_REG_SR), mii_parse_sr },
869 { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700870 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000871 };
872static phy_cmd_t const phy_cmd_lxt971_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873 { mk_mii_write(MII_LXT971_IER, 0x0000), NULL },
874 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000875 };
876static phy_info_t const phy_info_lxt971 = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400877 .id = 0x0001378e,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000878 .name = "LXT971",
879 .config = phy_cmd_lxt971_config,
880 .startup = phy_cmd_lxt971_startup,
881 .ack_int = phy_cmd_lxt971_ack_int,
882 .shutdown = phy_cmd_lxt971_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -0700883};
884
885/* ------------------------------------------------------------------------- */
886/* The Quality Semiconductor QS6612 is used on the RPX CLLF */
887
888/* register definitions */
889
890#define MII_QS6612_MCR 17 /* Mode Control Register */
891#define MII_QS6612_FTR 27 /* Factory Test Register */
892#define MII_QS6612_MCO 28 /* Misc. Control Register */
893#define MII_QS6612_ISR 29 /* Interrupt Source Register */
894#define MII_QS6612_IMR 30 /* Interrupt Mask Register */
895#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */
896
897static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev)
898{
899 struct fec_enet_private *fep = netdev_priv(dev);
900 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000901 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700902
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000903 status = *s & ~(PHY_STAT_SPMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700904
905 switch((mii_reg >> 2) & 7) {
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000906 case 1: status |= PHY_STAT_10HDX; break;
907 case 2: status |= PHY_STAT_100HDX; break;
908 case 5: status |= PHY_STAT_10FDX; break;
909 case 6: status |= PHY_STAT_100FDX; break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700910}
911
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000912 *s = status;
913}
914
915static phy_cmd_t const phy_cmd_qs6612_config[] = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400916 /* The PHY powers up isolated on the RPX,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700917 * so send a command to allow operation.
918 */
919 { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL },
920
921 /* parse cr and anar to get some info */
922 { mk_mii_read(MII_REG_CR), mii_parse_cr },
923 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
924 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000925 };
926static phy_cmd_t const phy_cmd_qs6612_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927 { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL },
928 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
929 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000930 };
931static phy_cmd_t const phy_cmd_qs6612_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700932 /* we need to read ISR, SR and ANER to acknowledge */
933 { mk_mii_read(MII_QS6612_ISR), NULL },
934 { mk_mii_read(MII_REG_SR), mii_parse_sr },
935 { mk_mii_read(MII_REG_ANER), NULL },
936
937 /* read pcr to get info */
938 { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr },
939 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000940 };
941static phy_cmd_t const phy_cmd_qs6612_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700942 { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL },
943 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000944 };
945static phy_info_t const phy_info_qs6612 = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400946 .id = 0x00181440,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000947 .name = "QS6612",
948 .config = phy_cmd_qs6612_config,
949 .startup = phy_cmd_qs6612_startup,
950 .ack_int = phy_cmd_qs6612_ack_int,
951 .shutdown = phy_cmd_qs6612_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -0700952};
953
954/* ------------------------------------------------------------------------- */
955/* AMD AM79C874 phy */
956
957/* register definitions for the 874 */
958
959#define MII_AM79C874_MFR 16 /* Miscellaneous Feature Register */
960#define MII_AM79C874_ICSR 17 /* Interrupt/Status Register */
961#define MII_AM79C874_DR 18 /* Diagnostic Register */
962#define MII_AM79C874_PMLR 19 /* Power and Loopback Register */
963#define MII_AM79C874_MCR 21 /* ModeControl Register */
964#define MII_AM79C874_DC 23 /* Disconnect Counter */
965#define MII_AM79C874_REC 24 /* Recieve Error Counter */
966
967static void mii_parse_am79c874_dr(uint mii_reg, struct net_device *dev)
968{
969 struct fec_enet_private *fep = netdev_priv(dev);
970 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000971 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000973 status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_ANC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700974
975 if (mii_reg & 0x0080)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000976 status |= PHY_STAT_ANC;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700977 if (mii_reg & 0x0400)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000978 status |= ((mii_reg & 0x0800) ? PHY_STAT_100FDX : PHY_STAT_100HDX);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700979 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000980 status |= ((mii_reg & 0x0800) ? PHY_STAT_10FDX : PHY_STAT_10HDX);
981
982 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983}
984
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000985static phy_cmd_t const phy_cmd_am79c874_config[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700986 { mk_mii_read(MII_REG_CR), mii_parse_cr },
987 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
988 { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr },
989 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000990 };
991static phy_cmd_t const phy_cmd_am79c874_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992 { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL },
993 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400994 { mk_mii_read(MII_REG_SR), mii_parse_sr },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700995 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000996 };
997static phy_cmd_t const phy_cmd_am79c874_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998 /* find out the current status */
999 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1000 { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr },
1001 /* we only need to read ISR to acknowledge */
1002 { mk_mii_read(MII_AM79C874_ICSR), NULL },
1003 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001004 };
1005static phy_cmd_t const phy_cmd_am79c874_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001006 { mk_mii_write(MII_AM79C874_ICSR, 0x0000), NULL },
1007 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001008 };
1009static phy_info_t const phy_info_am79c874 = {
1010 .id = 0x00022561,
1011 .name = "AM79C874",
1012 .config = phy_cmd_am79c874_config,
1013 .startup = phy_cmd_am79c874_startup,
1014 .ack_int = phy_cmd_am79c874_ack_int,
1015 .shutdown = phy_cmd_am79c874_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016};
1017
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001018
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019/* ------------------------------------------------------------------------- */
1020/* Kendin KS8721BL phy */
1021
1022/* register definitions for the 8721 */
1023
1024#define MII_KS8721BL_RXERCR 21
Sascha Hauer43268dc2009-01-28 23:03:08 +00001025#define MII_KS8721BL_ICSR 27
Linus Torvalds1da177e2005-04-16 15:20:36 -07001026#define MII_KS8721BL_PHYCR 31
1027
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001028static phy_cmd_t const phy_cmd_ks8721bl_config[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001029 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1030 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1031 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001032 };
1033static phy_cmd_t const phy_cmd_ks8721bl_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001034 { mk_mii_write(MII_KS8721BL_ICSR, 0xff00), NULL },
1035 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001036 { mk_mii_read(MII_REG_SR), mii_parse_sr },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001037 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001038 };
1039static phy_cmd_t const phy_cmd_ks8721bl_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040 /* find out the current status */
1041 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1042 /* we only need to read ISR to acknowledge */
1043 { mk_mii_read(MII_KS8721BL_ICSR), NULL },
1044 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001045 };
1046static phy_cmd_t const phy_cmd_ks8721bl_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001047 { mk_mii_write(MII_KS8721BL_ICSR, 0x0000), NULL },
1048 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001049 };
1050static phy_info_t const phy_info_ks8721bl = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001051 .id = 0x00022161,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001052 .name = "KS8721BL",
1053 .config = phy_cmd_ks8721bl_config,
1054 .startup = phy_cmd_ks8721bl_startup,
1055 .ack_int = phy_cmd_ks8721bl_ack_int,
1056 .shutdown = phy_cmd_ks8721bl_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -07001057};
1058
1059/* ------------------------------------------------------------------------- */
Greg Ungerer562d2f82005-11-07 14:09:50 +10001060/* register definitions for the DP83848 */
1061
1062#define MII_DP8384X_PHYSTST 16 /* PHY Status Register */
1063
1064static void mii_parse_dp8384x_sr2(uint mii_reg, struct net_device *dev)
1065{
Wang Chen4cf16532008-11-12 23:38:14 -08001066 struct fec_enet_private *fep = netdev_priv(dev);
Greg Ungerer562d2f82005-11-07 14:09:50 +10001067 volatile uint *s = &(fep->phy_status);
1068
1069 *s &= ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC);
1070
1071 /* Link up */
1072 if (mii_reg & 0x0001) {
1073 fep->link = 1;
1074 *s |= PHY_STAT_LINK;
1075 } else
1076 fep->link = 0;
1077 /* Status of link */
1078 if (mii_reg & 0x0010) /* Autonegotioation complete */
1079 *s |= PHY_STAT_ANC;
1080 if (mii_reg & 0x0002) { /* 10MBps? */
1081 if (mii_reg & 0x0004) /* Full Duplex? */
1082 *s |= PHY_STAT_10FDX;
1083 else
1084 *s |= PHY_STAT_10HDX;
1085 } else { /* 100 Mbps? */
1086 if (mii_reg & 0x0004) /* Full Duplex? */
1087 *s |= PHY_STAT_100FDX;
1088 else
1089 *s |= PHY_STAT_100HDX;
1090 }
1091 if (mii_reg & 0x0008)
1092 *s |= PHY_STAT_FAULT;
1093}
1094
1095static phy_info_t phy_info_dp83848= {
1096 0x020005c9,
1097 "DP83848",
1098
1099 (const phy_cmd_t []) { /* config */
1100 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1101 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1102 { mk_mii_read(MII_DP8384X_PHYSTST), mii_parse_dp8384x_sr2 },
1103 { mk_mii_end, }
1104 },
1105 (const phy_cmd_t []) { /* startup - enable interrupts */
1106 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
1107 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1108 { mk_mii_end, }
1109 },
1110 (const phy_cmd_t []) { /* ack_int - never happens, no interrupt */
1111 { mk_mii_end, }
1112 },
1113 (const phy_cmd_t []) { /* shutdown */
1114 { mk_mii_end, }
1115 },
1116};
1117
1118/* ------------------------------------------------------------------------- */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001119
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001120static phy_info_t const * const phy_info[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001121 &phy_info_lxt970,
1122 &phy_info_lxt971,
1123 &phy_info_qs6612,
1124 &phy_info_am79c874,
1125 &phy_info_ks8721bl,
Greg Ungerer562d2f82005-11-07 14:09:50 +10001126 &phy_info_dp83848,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001127 NULL
1128};
1129
1130/* ------------------------------------------------------------------------- */
Sebastian Siewiorc1d96152008-05-01 14:04:02 +10001131#ifdef HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001132static irqreturn_t
David Howells7d12e782006-10-05 14:55:46 +01001133mii_link_interrupt(int irq, void * dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001134
Linus Torvalds1da177e2005-04-16 15:20:36 -07001135/*
Greg Ungerer43be6362009-02-26 22:42:51 -08001136 * This is specific to the MII interrupt setup of the M5272EVB.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001137 */
Greg Ungerer43be6362009-02-26 22:42:51 -08001138static void __inline__ fec_request_mii_intr(struct net_device *dev)
1139{
1140 if (request_irq(66, mii_link_interrupt, IRQF_DISABLED, "fec(MII)", dev) != 0)
1141 printk("FEC: Could not allocate fec(MII) IRQ(66)!\n");
1142}
1143
1144static void __inline__ fec_disable_phy_intr(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001145{
1146 volatile unsigned long *icrp;
Greg Ungerer43be6362009-02-26 22:42:51 -08001147 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
1148 *icrp = 0x08000000;
1149}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001150
Greg Ungerer43be6362009-02-26 22:42:51 -08001151static void __inline__ fec_phy_ack_intr(void)
1152{
1153 volatile unsigned long *icrp;
1154 /* Acknowledge the interrupt */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001155 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
Greg Ungererf861d622007-07-30 16:29:16 +10001156 *icrp = 0x0d000000;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001157}
Sascha Hauerfb922b02009-04-08 15:44:45 -07001158#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001159
Greg Ungerer43be6362009-02-26 22:42:51 -08001160#ifdef CONFIG_M5272
Linus Torvalds1da177e2005-04-16 15:20:36 -07001161static void __inline__ fec_get_mac(struct net_device *dev)
1162{
1163 struct fec_enet_private *fep = netdev_priv(dev);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001164 unsigned char *iap, tmpaddr[ETH_ALEN];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001165
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001166 if (FEC_FLASHMAC) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167 /*
1168 * Get MAC address from FLASH.
1169 * If it is all 1's or 0's, use the default.
1170 */
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001171 iap = (unsigned char *)FEC_FLASHMAC;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001172 if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) &&
1173 (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0))
1174 iap = fec_mac_default;
1175 if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) &&
1176 (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff))
1177 iap = fec_mac_default;
1178 } else {
Sascha Hauerf44d6302009-04-15 03:11:30 +00001179 *((unsigned long *) &tmpaddr[0]) = readl(fep->hwp + FEC_ADDR_LOW);
1180 *((unsigned short *) &tmpaddr[4]) = (readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181 iap = &tmpaddr[0];
1182 }
1183
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001184 memcpy(dev->dev_addr, iap, ETH_ALEN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001185
1186 /* Adjust MAC if using default MAC address */
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001187 if (iap == fec_mac_default)
1188 dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001189}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001190#endif
1191
1192/* ------------------------------------------------------------------------- */
1193
1194static void mii_display_status(struct net_device *dev)
1195{
1196 struct fec_enet_private *fep = netdev_priv(dev);
1197 volatile uint *s = &(fep->phy_status);
1198
1199 if (!fep->link && !fep->old_link) {
1200 /* Link is still down - don't print anything */
1201 return;
1202 }
1203
1204 printk("%s: status: ", dev->name);
1205
1206 if (!fep->link) {
1207 printk("link down");
1208 } else {
1209 printk("link up");
1210
1211 switch(*s & PHY_STAT_SPMASK) {
1212 case PHY_STAT_100FDX: printk(", 100MBit Full Duplex"); break;
1213 case PHY_STAT_100HDX: printk(", 100MBit Half Duplex"); break;
1214 case PHY_STAT_10FDX: printk(", 10MBit Full Duplex"); break;
1215 case PHY_STAT_10HDX: printk(", 10MBit Half Duplex"); break;
1216 default:
1217 printk(", Unknown speed/duplex");
1218 }
1219
1220 if (*s & PHY_STAT_ANC)
1221 printk(", auto-negotiation complete");
1222 }
1223
1224 if (*s & PHY_STAT_FAULT)
1225 printk(", remote fault");
1226
1227 printk(".\n");
1228}
1229
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001230static void mii_display_config(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001231{
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001232 struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task);
1233 struct net_device *dev = fep->netdev;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001234 uint status = fep->phy_status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001235
1236 /*
1237 ** When we get here, phy_task is already removed from
1238 ** the workqueue. It is thus safe to allow to reuse it.
1239 */
1240 fep->mii_phy_task_queued = 0;
1241 printk("%s: config: auto-negotiation ", dev->name);
1242
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001243 if (status & PHY_CONF_ANE)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001244 printk("on");
1245 else
1246 printk("off");
1247
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001248 if (status & PHY_CONF_100FDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001249 printk(", 100FDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001250 if (status & PHY_CONF_100HDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001251 printk(", 100HDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001252 if (status & PHY_CONF_10FDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001253 printk(", 10FDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001254 if (status & PHY_CONF_10HDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001255 printk(", 10HDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001256 if (!(status & PHY_CONF_SPMASK))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001257 printk(", No speed/duplex selected?");
1258
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001259 if (status & PHY_CONF_LOOP)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001260 printk(", loopback enabled");
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001261
Linus Torvalds1da177e2005-04-16 15:20:36 -07001262 printk(".\n");
1263
1264 fep->sequence_done = 1;
1265}
1266
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001267static void mii_relink(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001268{
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001269 struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task);
1270 struct net_device *dev = fep->netdev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001271 int duplex;
1272
1273 /*
1274 ** When we get here, phy_task is already removed from
1275 ** the workqueue. It is thus safe to allow to reuse it.
1276 */
1277 fep->mii_phy_task_queued = 0;
1278 fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
1279 mii_display_status(dev);
1280 fep->old_link = fep->link;
1281
1282 if (fep->link) {
1283 duplex = 0;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001284 if (fep->phy_status
Linus Torvalds1da177e2005-04-16 15:20:36 -07001285 & (PHY_STAT_100FDX | PHY_STAT_10FDX))
1286 duplex = 1;
1287 fec_restart(dev, duplex);
Philippe De Muyterf909b1e2007-10-23 14:37:54 +10001288 } else
Linus Torvalds1da177e2005-04-16 15:20:36 -07001289 fec_stop(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001290}
1291
1292/* mii_queue_relink is called in interrupt context from mii_link_interrupt */
1293static void mii_queue_relink(uint mii_reg, struct net_device *dev)
1294{
1295 struct fec_enet_private *fep = netdev_priv(dev);
1296
1297 /*
Sascha Hauer22f6b862009-04-15 01:32:18 +00001298 * We cannot queue phy_task twice in the workqueue. It
1299 * would cause an endless loop in the workqueue.
1300 * Fortunately, if the last mii_relink entry has not yet been
1301 * executed now, it will do the job for the current interrupt,
1302 * which is just what we want.
1303 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001304 if (fep->mii_phy_task_queued)
1305 return;
1306
1307 fep->mii_phy_task_queued = 1;
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001308 INIT_WORK(&fep->phy_task, mii_relink);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001309 schedule_work(&fep->phy_task);
1310}
1311
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001312/* mii_queue_config is called in interrupt context from fec_enet_mii */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001313static void mii_queue_config(uint mii_reg, struct net_device *dev)
1314{
1315 struct fec_enet_private *fep = netdev_priv(dev);
1316
1317 if (fep->mii_phy_task_queued)
1318 return;
1319
1320 fep->mii_phy_task_queued = 1;
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001321 INIT_WORK(&fep->phy_task, mii_display_config);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001322 schedule_work(&fep->phy_task);
1323}
1324
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001325phy_cmd_t const phy_cmd_relink[] = {
1326 { mk_mii_read(MII_REG_CR), mii_queue_relink },
1327 { mk_mii_end, }
1328 };
1329phy_cmd_t const phy_cmd_config[] = {
1330 { mk_mii_read(MII_REG_CR), mii_queue_config },
1331 { mk_mii_end, }
1332 };
Linus Torvalds1da177e2005-04-16 15:20:36 -07001333
Sascha Hauer22f6b862009-04-15 01:32:18 +00001334/* Read remainder of PHY ID. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001335static void
1336mii_discover_phy3(uint mii_reg, struct net_device *dev)
1337{
1338 struct fec_enet_private *fep;
1339 int i;
1340
1341 fep = netdev_priv(dev);
1342 fep->phy_id |= (mii_reg & 0xffff);
1343 printk("fec: PHY @ 0x%x, ID 0x%08x", fep->phy_addr, fep->phy_id);
1344
1345 for(i = 0; phy_info[i]; i++) {
1346 if(phy_info[i]->id == (fep->phy_id >> 4))
1347 break;
1348 }
1349
1350 if (phy_info[i])
1351 printk(" -- %s\n", phy_info[i]->name);
1352 else
1353 printk(" -- unknown PHY!\n");
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001354
Linus Torvalds1da177e2005-04-16 15:20:36 -07001355 fep->phy = phy_info[i];
1356 fep->phy_id_done = 1;
1357}
1358
1359/* Scan all of the MII PHY addresses looking for someone to respond
1360 * with a valid ID. This usually happens quickly.
1361 */
1362static void
1363mii_discover_phy(uint mii_reg, struct net_device *dev)
1364{
1365 struct fec_enet_private *fep;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001366 uint phytype;
1367
1368 fep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001369
1370 if (fep->phy_addr < 32) {
1371 if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001372
Sascha Hauer22f6b862009-04-15 01:32:18 +00001373 /* Got first part of ID, now get remainder */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001374 fep->phy_id = phytype << 16;
1375 mii_queue(dev, mk_mii_read(MII_REG_PHYIR2),
1376 mii_discover_phy3);
Philippe De Muyterf909b1e2007-10-23 14:37:54 +10001377 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001378 fep->phy_addr++;
1379 mii_queue(dev, mk_mii_read(MII_REG_PHYIR1),
1380 mii_discover_phy);
1381 }
1382 } else {
1383 printk("FEC: No PHY device found.\n");
1384 /* Disable external MII interface */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001385 writel(0, fep->hwp + FEC_MII_SPEED);
1386 fep->phy_speed = 0;
Greg Ungerer43be6362009-02-26 22:42:51 -08001387#ifdef HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001388 fec_disable_phy_intr();
Sascha Haueread73182009-01-28 23:03:11 +00001389#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001390 }
1391}
1392
Sascha Hauer22f6b862009-04-15 01:32:18 +00001393/* This interrupt occurs when the PHY detects a link change */
Sebastian Siewiorc1d96152008-05-01 14:04:02 +10001394#ifdef HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001395static irqreturn_t
David Howells7d12e782006-10-05 14:55:46 +01001396mii_link_interrupt(int irq, void * dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001397{
1398 struct net_device *dev = dev_id;
1399 struct fec_enet_private *fep = netdev_priv(dev);
1400
1401 fec_phy_ack_intr();
1402
Linus Torvalds1da177e2005-04-16 15:20:36 -07001403 mii_do_cmd(dev, fep->phy->ack_int);
1404 mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */
1405
1406 return IRQ_HANDLED;
1407}
Sebastian Siewiorc1d96152008-05-01 14:04:02 +10001408#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001409
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001410static void fec_enet_free_buffers(struct net_device *dev)
1411{
1412 struct fec_enet_private *fep = netdev_priv(dev);
1413 int i;
1414 struct sk_buff *skb;
1415 struct bufdesc *bdp;
1416
1417 bdp = fep->rx_bd_base;
1418 for (i = 0; i < RX_RING_SIZE; i++) {
1419 skb = fep->rx_skbuff[i];
1420
1421 if (bdp->cbd_bufaddr)
1422 dma_unmap_single(&dev->dev, bdp->cbd_bufaddr,
1423 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1424 if (skb)
1425 dev_kfree_skb(skb);
1426 bdp++;
1427 }
1428
1429 bdp = fep->tx_bd_base;
1430 for (i = 0; i < TX_RING_SIZE; i++)
1431 kfree(fep->tx_bounce[i]);
1432}
1433
1434static int fec_enet_alloc_buffers(struct net_device *dev)
1435{
1436 struct fec_enet_private *fep = netdev_priv(dev);
1437 int i;
1438 struct sk_buff *skb;
1439 struct bufdesc *bdp;
1440
1441 bdp = fep->rx_bd_base;
1442 for (i = 0; i < RX_RING_SIZE; i++) {
1443 skb = dev_alloc_skb(FEC_ENET_RX_FRSIZE);
1444 if (!skb) {
1445 fec_enet_free_buffers(dev);
1446 return -ENOMEM;
1447 }
1448 fep->rx_skbuff[i] = skb;
1449
1450 bdp->cbd_bufaddr = dma_map_single(&dev->dev, skb->data,
1451 FEC_ENET_RX_FRSIZE, DMA_FROM_DEVICE);
1452 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1453 bdp++;
1454 }
1455
1456 /* Set the last buffer to wrap. */
1457 bdp--;
1458 bdp->cbd_sc |= BD_SC_WRAP;
1459
1460 bdp = fep->tx_bd_base;
1461 for (i = 0; i < TX_RING_SIZE; i++) {
1462 fep->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
1463
1464 bdp->cbd_sc = 0;
1465 bdp->cbd_bufaddr = 0;
1466 bdp++;
1467 }
1468
1469 /* Set the last buffer to wrap. */
1470 bdp--;
1471 bdp->cbd_sc |= BD_SC_WRAP;
1472
1473 return 0;
1474}
1475
Linus Torvalds1da177e2005-04-16 15:20:36 -07001476static int
1477fec_enet_open(struct net_device *dev)
1478{
1479 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001480 int ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001481
1482 /* I should reset the ring buffers here, but I don't yet know
1483 * a simple way to do that.
1484 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001485
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001486 ret = fec_enet_alloc_buffers(dev);
1487 if (ret)
1488 return ret;
1489
Linus Torvalds1da177e2005-04-16 15:20:36 -07001490 fep->sequence_done = 0;
1491 fep->link = 0;
1492
Sascha Hauerfe957c42009-04-15 01:32:25 +00001493 fec_restart(dev, 1);
1494
Linus Torvalds1da177e2005-04-16 15:20:36 -07001495 if (fep->phy) {
1496 mii_do_cmd(dev, fep->phy->ack_int);
1497 mii_do_cmd(dev, fep->phy->config);
1498 mii_do_cmd(dev, phy_cmd_config); /* display configuration */
1499
Matt Waddel6b265292006-06-27 13:10:56 +10001500 /* Poll until the PHY tells us its configuration
1501 * (not link state).
1502 * Request is initiated by mii_do_cmd above, but answer
1503 * comes by interrupt.
1504 * This should take about 25 usec per register at 2.5 MHz,
1505 * and we read approximately 5 registers.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001506 */
1507 while(!fep->sequence_done)
1508 schedule();
1509
1510 mii_do_cmd(dev, fep->phy->startup);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001511 }
1512
Sascha Hauerfe957c42009-04-15 01:32:25 +00001513 /* Set the initial link state to true. A lot of hardware
1514 * based on this device does not implement a PHY interrupt,
1515 * so we are never notified of link change.
1516 */
1517 fep->link = 1;
1518
Linus Torvalds1da177e2005-04-16 15:20:36 -07001519 netif_start_queue(dev);
1520 fep->opened = 1;
Sascha Hauer22f6b862009-04-15 01:32:18 +00001521 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001522}
1523
1524static int
1525fec_enet_close(struct net_device *dev)
1526{
1527 struct fec_enet_private *fep = netdev_priv(dev);
1528
Sascha Hauer22f6b862009-04-15 01:32:18 +00001529 /* Don't know what to do yet. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001530 fep->opened = 0;
1531 netif_stop_queue(dev);
1532 fec_stop(dev);
1533
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001534 fec_enet_free_buffers(dev);
1535
Linus Torvalds1da177e2005-04-16 15:20:36 -07001536 return 0;
1537}
1538
Linus Torvalds1da177e2005-04-16 15:20:36 -07001539/* Set or clear the multicast filter for this adaptor.
1540 * Skeleton taken from sunlance driver.
1541 * The CPM Ethernet implementation allows Multicast as well as individual
1542 * MAC address filtering. Some of the drivers check to make sure it is
1543 * a group multicast address, and discard those that are not. I guess I
1544 * will do the same for now, but just remove the test if you want
1545 * individual filtering as well (do the upper net layers want or support
1546 * this kind of feature?).
1547 */
1548
1549#define HASH_BITS 6 /* #bits in hash */
1550#define CRC32_POLY 0xEDB88320
1551
1552static void set_multicast_list(struct net_device *dev)
1553{
Sascha Hauerf44d6302009-04-15 03:11:30 +00001554 struct fec_enet_private *fep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001555 struct dev_mc_list *dmi;
Sascha Hauerf44d6302009-04-15 03:11:30 +00001556 unsigned int i, j, bit, data, crc, tmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001557 unsigned char hash;
1558
Sascha Hauer22f6b862009-04-15 01:32:18 +00001559 if (dev->flags & IFF_PROMISC) {
Sascha Hauerf44d6302009-04-15 03:11:30 +00001560 tmp = readl(fep->hwp + FEC_R_CNTRL);
1561 tmp |= 0x8;
1562 writel(tmp, fep->hwp + FEC_R_CNTRL);
Sascha Hauer4e831832009-04-15 01:32:19 +00001563 return;
1564 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001565
Sascha Hauer4e831832009-04-15 01:32:19 +00001566 tmp = readl(fep->hwp + FEC_R_CNTRL);
1567 tmp &= ~0x8;
1568 writel(tmp, fep->hwp + FEC_R_CNTRL);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001569
Sascha Hauer4e831832009-04-15 01:32:19 +00001570 if (dev->flags & IFF_ALLMULTI) {
1571 /* Catch all multicast addresses, so set the
1572 * filter to all 1's
1573 */
1574 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1575 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001576
Sascha Hauer4e831832009-04-15 01:32:19 +00001577 return;
1578 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001579
Sascha Hauer4e831832009-04-15 01:32:19 +00001580 /* Clear filter and add the addresses in hash register
1581 */
1582 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1583 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001584
Sascha Hauer4e831832009-04-15 01:32:19 +00001585 dmi = dev->mc_list;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001586
Sascha Hauer4e831832009-04-15 01:32:19 +00001587 for (j = 0; j < dev->mc_count; j++, dmi = dmi->next) {
1588 /* Only support group multicast for now */
1589 if (!(dmi->dmi_addr[0] & 1))
1590 continue;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001591
Sascha Hauer4e831832009-04-15 01:32:19 +00001592 /* calculate crc32 value of mac address */
1593 crc = 0xffffffff;
1594
1595 for (i = 0; i < dmi->dmi_addrlen; i++) {
1596 data = dmi->dmi_addr[i];
1597 for (bit = 0; bit < 8; bit++, data >>= 1) {
1598 crc = (crc >> 1) ^
1599 (((crc ^ data) & 1) ? CRC32_POLY : 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001600 }
1601 }
Sascha Hauer4e831832009-04-15 01:32:19 +00001602
1603 /* only upper 6 bits (HASH_BITS) are used
1604 * which point to specific bit in he hash registers
1605 */
1606 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
1607
1608 if (hash > 31) {
1609 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1610 tmp |= 1 << (hash - 32);
1611 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1612 } else {
1613 tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1614 tmp |= 1 << hash;
1615 writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
1616 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001617 }
1618}
1619
Sascha Hauer22f6b862009-04-15 01:32:18 +00001620/* Set a MAC change in hardware. */
Sascha Hauer009fda82009-04-15 01:32:23 +00001621static int
1622fec_set_mac_address(struct net_device *dev, void *p)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001623{
Sascha Hauerf44d6302009-04-15 03:11:30 +00001624 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauer009fda82009-04-15 01:32:23 +00001625 struct sockaddr *addr = p;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001626
Sascha Hauer009fda82009-04-15 01:32:23 +00001627 if (!is_valid_ether_addr(addr->sa_data))
1628 return -EADDRNOTAVAIL;
1629
1630 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1631
Sascha Hauerf44d6302009-04-15 03:11:30 +00001632 writel(dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
1633 (dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24),
1634 fep->hwp + FEC_ADDR_LOW);
1635 writel((dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24),
1636 fep + FEC_ADDR_HIGH);
Sascha Hauer009fda82009-04-15 01:32:23 +00001637 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001638}
1639
Sascha Hauer009fda82009-04-15 01:32:23 +00001640static const struct net_device_ops fec_netdev_ops = {
1641 .ndo_open = fec_enet_open,
1642 .ndo_stop = fec_enet_close,
1643 .ndo_start_xmit = fec_enet_start_xmit,
1644 .ndo_set_multicast_list = set_multicast_list,
1645 .ndo_validate_addr = eth_validate_addr,
1646 .ndo_tx_timeout = fec_timeout,
1647 .ndo_set_mac_address = fec_set_mac_address,
1648};
1649
Linus Torvalds1da177e2005-04-16 15:20:36 -07001650 /*
1651 * XXX: We need to clean up on failure exits here.
Sascha Haueread73182009-01-28 23:03:11 +00001652 *
1653 * index is only used in legacy code
Linus Torvalds1da177e2005-04-16 15:20:36 -07001654 */
Sascha Haueread73182009-01-28 23:03:11 +00001655int __init fec_enet_init(struct net_device *dev, int index)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001656{
1657 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauerf0b3fbe2009-04-15 01:32:24 +00001658 struct bufdesc *cbd_base;
1659 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001660
Sascha Hauer8d4dd5c2009-04-15 01:32:17 +00001661 /* Allocate memory for buffer descriptors. */
1662 cbd_base = dma_alloc_coherent(NULL, PAGE_SIZE, &fep->bd_dma,
1663 GFP_KERNEL);
1664 if (!cbd_base) {
Greg Ungerer562d2f82005-11-07 14:09:50 +10001665 printk("FEC: allocate descriptor memory failed?\n");
1666 return -ENOMEM;
1667 }
1668
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +10001669 spin_lock_init(&fep->hw_lock);
1670 spin_lock_init(&fep->mii_lock);
1671
Linus Torvalds1da177e2005-04-16 15:20:36 -07001672 fep->index = index;
Sascha Hauerf44d6302009-04-15 03:11:30 +00001673 fep->hwp = (void __iomem *)dev->base_addr;
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001674 fep->netdev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001675
Sascha Haueread73182009-01-28 23:03:11 +00001676 /* Set the Ethernet address */
Greg Ungerer43be6362009-02-26 22:42:51 -08001677#ifdef CONFIG_M5272
Linus Torvalds1da177e2005-04-16 15:20:36 -07001678 fec_get_mac(dev);
Sascha Haueread73182009-01-28 23:03:11 +00001679#else
1680 {
1681 unsigned long l;
Sascha Hauerf44d6302009-04-15 03:11:30 +00001682 l = readl(fep->hwp + FEC_ADDR_LOW);
Sascha Haueread73182009-01-28 23:03:11 +00001683 dev->dev_addr[0] = (unsigned char)((l & 0xFF000000) >> 24);
1684 dev->dev_addr[1] = (unsigned char)((l & 0x00FF0000) >> 16);
1685 dev->dev_addr[2] = (unsigned char)((l & 0x0000FF00) >> 8);
1686 dev->dev_addr[3] = (unsigned char)((l & 0x000000FF) >> 0);
Sascha Hauerf44d6302009-04-15 03:11:30 +00001687 l = readl(fep->hwp + FEC_ADDR_HIGH);
Sascha Haueread73182009-01-28 23:03:11 +00001688 dev->dev_addr[4] = (unsigned char)((l & 0xFF000000) >> 24);
1689 dev->dev_addr[5] = (unsigned char)((l & 0x00FF0000) >> 16);
1690 }
1691#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001692
Sascha Hauer8d4dd5c2009-04-15 01:32:17 +00001693 /* Set receive and transmit descriptor base. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001694 fep->rx_bd_base = cbd_base;
1695 fep->tx_bd_base = cbd_base + RX_RING_SIZE;
1696
Greg Ungerer43be6362009-02-26 22:42:51 -08001697#ifdef HAVE_mii_link_interrupt
1698 fec_request_mii_intr(dev);
Sascha Haueread73182009-01-28 23:03:11 +00001699#endif
Sascha Hauer22f6b862009-04-15 01:32:18 +00001700 /* The FEC Ethernet specific entries in the device structure */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001701 dev->watchdog_timeo = TX_TIMEOUT;
Sascha Hauer009fda82009-04-15 01:32:23 +00001702 dev->netdev_ops = &fec_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001703
1704 for (i=0; i<NMII-1; i++)
1705 mii_cmds[i].mii_next = &mii_cmds[i+1];
1706 mii_free = mii_cmds;
1707
Sascha Hauer22f6b862009-04-15 01:32:18 +00001708 /* Set MII speed to 2.5 MHz */
Sascha Haueread73182009-01-28 23:03:11 +00001709 fep->phy_speed = ((((clk_get_rate(fep->clk) / 2 + 4999999)
1710 / 2500000) / 2) & 0x3F) << 1;
Sascha Haueread73182009-01-28 23:03:11 +00001711 fec_restart(dev, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001712
Linus Torvalds1da177e2005-04-16 15:20:36 -07001713 /* Queue up command to detect the PHY and initialize the
1714 * remainder of the interface.
1715 */
1716 fep->phy_id_done = 0;
1717 fep->phy_addr = 0;
1718 mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy);
1719
Linus Torvalds1da177e2005-04-16 15:20:36 -07001720 return 0;
1721}
1722
1723/* This function is called to start or restart the FEC during a link
1724 * change. This only happens when switching between half and full
1725 * duplex.
1726 */
1727static void
1728fec_restart(struct net_device *dev, int duplex)
1729{
Sascha Hauerf44d6302009-04-15 03:11:30 +00001730 struct fec_enet_private *fep = netdev_priv(dev);
Sascha Hauer2e285322009-04-15 01:32:16 +00001731 struct bufdesc *bdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001732 int i;
1733
Sascha Hauerf44d6302009-04-15 03:11:30 +00001734 /* Whack a reset. We should wait for this. */
1735 writel(1, fep->hwp + FEC_ECNTRL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001736 udelay(10);
1737
Sascha Hauerf44d6302009-04-15 03:11:30 +00001738 /* Clear any outstanding interrupt. */
1739 writel(0xffc00000, fep->hwp + FEC_IEVENT);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001740
Sascha Hauerf44d6302009-04-15 03:11:30 +00001741 /* Reset all multicast. */
1742 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
1743 writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
Sascha Hauer4f1ceb42009-04-15 01:32:20 +00001744#ifndef CONFIG_M5272
1745 writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
1746 writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
1747#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001748
Sascha Hauerf44d6302009-04-15 03:11:30 +00001749 /* Set maximum receive buffer size. */
1750 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001751
Sascha Hauerf44d6302009-04-15 03:11:30 +00001752 /* Set receive and transmit descriptor base. */
1753 writel(fep->bd_dma, fep->hwp + FEC_R_DES_START);
Sascha Hauer2e285322009-04-15 01:32:16 +00001754 writel((unsigned long)fep->bd_dma + sizeof(struct bufdesc) * RX_RING_SIZE,
Sascha Hauerf44d6302009-04-15 03:11:30 +00001755 fep->hwp + FEC_X_DES_START);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001756
1757 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
1758 fep->cur_rx = fep->rx_bd_base;
1759
Sascha Hauerf44d6302009-04-15 03:11:30 +00001760 /* Reset SKB transmit buffers. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001761 fep->skb_cur = fep->skb_dirty = 0;
Sascha Hauer22f6b862009-04-15 01:32:18 +00001762 for (i = 0; i <= TX_RING_MOD_MASK; i++) {
1763 if (fep->tx_skbuff[i]) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001764 dev_kfree_skb_any(fep->tx_skbuff[i]);
1765 fep->tx_skbuff[i] = NULL;
1766 }
1767 }
1768
Sascha Hauerf44d6302009-04-15 03:11:30 +00001769 /* Initialize the receive buffer descriptors. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001770 bdp = fep->rx_bd_base;
Sascha Hauer22f6b862009-04-15 01:32:18 +00001771 for (i = 0; i < RX_RING_SIZE; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001772
Sascha Hauerf44d6302009-04-15 03:11:30 +00001773 /* Initialize the BD for every fragment in the page. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001774 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1775 bdp++;
1776 }
1777
Sascha Hauer22f6b862009-04-15 01:32:18 +00001778 /* Set the last buffer to wrap */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001779 bdp--;
1780 bdp->cbd_sc |= BD_SC_WRAP;
1781
Sascha Hauer22f6b862009-04-15 01:32:18 +00001782 /* ...and the same for transmit */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001783 bdp = fep->tx_bd_base;
Sascha Hauer22f6b862009-04-15 01:32:18 +00001784 for (i = 0; i < TX_RING_SIZE; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001785
Sascha Hauerf44d6302009-04-15 03:11:30 +00001786 /* Initialize the BD for every fragment in the page. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001787 bdp->cbd_sc = 0;
1788 bdp->cbd_bufaddr = 0;
1789 bdp++;
1790 }
1791
Sascha Hauer22f6b862009-04-15 01:32:18 +00001792 /* Set the last buffer to wrap */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001793 bdp--;
1794 bdp->cbd_sc |= BD_SC_WRAP;
1795
Sascha Hauer22f6b862009-04-15 01:32:18 +00001796 /* Enable MII mode */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001797 if (duplex) {
Sascha Hauerf44d6302009-04-15 03:11:30 +00001798 /* MII enable / FD enable */
1799 writel(OPT_FRAME_SIZE | 0x04, fep->hwp + FEC_R_CNTRL);
1800 writel(0x04, fep->hwp + FEC_X_CNTRL);
Philippe De Muyterf909b1e2007-10-23 14:37:54 +10001801 } else {
Sascha Hauerf44d6302009-04-15 03:11:30 +00001802 /* MII enable / No Rcv on Xmit */
1803 writel(OPT_FRAME_SIZE | 0x06, fep->hwp + FEC_R_CNTRL);
1804 writel(0x0, fep->hwp + FEC_X_CNTRL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001805 }
1806 fep->full_duplex = duplex;
1807
Sascha Hauer22f6b862009-04-15 01:32:18 +00001808 /* Set MII speed */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001809 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001810
Sascha Hauer22f6b862009-04-15 01:32:18 +00001811 /* And last, enable the transmit and receive processing */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001812 writel(2, fep->hwp + FEC_ECNTRL);
1813 writel(0, fep->hwp + FEC_R_DES_ACTIVE);
Matt Waddel6b265292006-06-27 13:10:56 +10001814
Sascha Hauer22f6b862009-04-15 01:32:18 +00001815 /* Enable interrupts we wish to service */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001816 writel(FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII,
1817 fep->hwp + FEC_IMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001818}
1819
1820static void
1821fec_stop(struct net_device *dev)
1822{
Sascha Hauerf44d6302009-04-15 03:11:30 +00001823 struct fec_enet_private *fep = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001824
Sascha Hauer22f6b862009-04-15 01:32:18 +00001825 /* We cannot expect a graceful transmit stop without link !!! */
Sascha Hauerf44d6302009-04-15 03:11:30 +00001826 if (fep->link) {
1827 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
Philippe De Muyter677177c2006-06-27 13:05:33 +10001828 udelay(10);
Sascha Hauerf44d6302009-04-15 03:11:30 +00001829 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
Philippe De Muyter677177c2006-06-27 13:05:33 +10001830 printk("fec_stop : Graceful transmit stop did not complete !\n");
Sascha Hauerf44d6302009-04-15 03:11:30 +00001831 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001832
Sascha Hauerf44d6302009-04-15 03:11:30 +00001833 /* Whack a reset. We should wait for this. */
1834 writel(1, fep->hwp + FEC_ECNTRL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001835 udelay(10);
1836
Sascha Hauerf44d6302009-04-15 03:11:30 +00001837 /* Clear outstanding MII command interrupts. */
1838 writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001839
Sascha Hauerf44d6302009-04-15 03:11:30 +00001840 writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
1841 writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001842}
1843
Sascha Haueread73182009-01-28 23:03:11 +00001844static int __devinit
1845fec_probe(struct platform_device *pdev)
1846{
1847 struct fec_enet_private *fep;
1848 struct net_device *ndev;
1849 int i, irq, ret = 0;
1850 struct resource *r;
1851
1852 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1853 if (!r)
1854 return -ENXIO;
1855
1856 r = request_mem_region(r->start, resource_size(r), pdev->name);
1857 if (!r)
1858 return -EBUSY;
1859
1860 /* Init network device */
1861 ndev = alloc_etherdev(sizeof(struct fec_enet_private));
1862 if (!ndev)
1863 return -ENOMEM;
1864
1865 SET_NETDEV_DEV(ndev, &pdev->dev);
1866
1867 /* setup board info structure */
1868 fep = netdev_priv(ndev);
1869 memset(fep, 0, sizeof(*fep));
1870
1871 ndev->base_addr = (unsigned long)ioremap(r->start, resource_size(r));
1872
1873 if (!ndev->base_addr) {
1874 ret = -ENOMEM;
1875 goto failed_ioremap;
1876 }
1877
1878 platform_set_drvdata(pdev, ndev);
1879
1880 /* This device has up to three irqs on some platforms */
1881 for (i = 0; i < 3; i++) {
1882 irq = platform_get_irq(pdev, i);
1883 if (i && irq < 0)
1884 break;
1885 ret = request_irq(irq, fec_enet_interrupt, IRQF_DISABLED, pdev->name, ndev);
1886 if (ret) {
1887 while (i >= 0) {
1888 irq = platform_get_irq(pdev, i);
1889 free_irq(irq, ndev);
1890 i--;
1891 }
1892 goto failed_irq;
1893 }
1894 }
1895
1896 fep->clk = clk_get(&pdev->dev, "fec_clk");
1897 if (IS_ERR(fep->clk)) {
1898 ret = PTR_ERR(fep->clk);
1899 goto failed_clk;
1900 }
1901 clk_enable(fep->clk);
1902
1903 ret = fec_enet_init(ndev, 0);
1904 if (ret)
1905 goto failed_init;
1906
1907 ret = register_netdev(ndev);
1908 if (ret)
1909 goto failed_register;
1910
1911 return 0;
1912
1913failed_register:
1914failed_init:
1915 clk_disable(fep->clk);
1916 clk_put(fep->clk);
1917failed_clk:
1918 for (i = 0; i < 3; i++) {
1919 irq = platform_get_irq(pdev, i);
1920 if (irq > 0)
1921 free_irq(irq, ndev);
1922 }
1923failed_irq:
1924 iounmap((void __iomem *)ndev->base_addr);
1925failed_ioremap:
1926 free_netdev(ndev);
1927
1928 return ret;
1929}
1930
1931static int __devexit
1932fec_drv_remove(struct platform_device *pdev)
1933{
1934 struct net_device *ndev = platform_get_drvdata(pdev);
1935 struct fec_enet_private *fep = netdev_priv(ndev);
1936
1937 platform_set_drvdata(pdev, NULL);
1938
1939 fec_stop(ndev);
1940 clk_disable(fep->clk);
1941 clk_put(fep->clk);
1942 iounmap((void __iomem *)ndev->base_addr);
1943 unregister_netdev(ndev);
1944 free_netdev(ndev);
1945 return 0;
1946}
1947
1948static int
1949fec_suspend(struct platform_device *dev, pm_message_t state)
1950{
1951 struct net_device *ndev = platform_get_drvdata(dev);
1952 struct fec_enet_private *fep;
1953
1954 if (ndev) {
1955 fep = netdev_priv(ndev);
1956 if (netif_running(ndev)) {
1957 netif_device_detach(ndev);
1958 fec_stop(ndev);
1959 }
1960 }
1961 return 0;
1962}
1963
1964static int
1965fec_resume(struct platform_device *dev)
1966{
1967 struct net_device *ndev = platform_get_drvdata(dev);
1968
1969 if (ndev) {
1970 if (netif_running(ndev)) {
1971 fec_enet_init(ndev, 0);
1972 netif_device_attach(ndev);
1973 }
1974 }
1975 return 0;
1976}
1977
1978static struct platform_driver fec_driver = {
1979 .driver = {
1980 .name = "fec",
1981 .owner = THIS_MODULE,
1982 },
1983 .probe = fec_probe,
1984 .remove = __devexit_p(fec_drv_remove),
1985 .suspend = fec_suspend,
1986 .resume = fec_resume,
1987};
1988
1989static int __init
1990fec_enet_module_init(void)
1991{
1992 printk(KERN_INFO "FEC Ethernet Driver\n");
1993
1994 return platform_driver_register(&fec_driver);
1995}
1996
1997static void __exit
1998fec_enet_cleanup(void)
1999{
2000 platform_driver_unregister(&fec_driver);
2001}
2002
2003module_exit(fec_enet_cleanup);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002004module_init(fec_enet_module_init);
2005
2006MODULE_LICENSE("GPL");