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Colin Crossce1e3262010-05-24 17:07:46 -07001/*
Colin Crossce1e3262010-05-24 17:07:46 -07002 * Copyright (c) 2010 Google, Inc
3 *
4 * Author:
5 * Colin Cross <ccross@google.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#ifndef _MACH_TEGRA_POWERGATE_H_
19#define _MACH_TEGRA_POWERGATE_H_
20
Stephen Warrena25186e2012-10-04 13:50:56 -060021struct clk;
22
Colin Crossce1e3262010-05-24 17:07:46 -070023#define TEGRA_POWERGATE_CPU 0
24#define TEGRA_POWERGATE_3D 1
25#define TEGRA_POWERGATE_VENC 2
26#define TEGRA_POWERGATE_PCIE 3
27#define TEGRA_POWERGATE_VDEC 4
28#define TEGRA_POWERGATE_L2 5
29#define TEGRA_POWERGATE_MPE 6
Peter De Schrijver6cafa972012-02-10 01:47:48 +020030#define TEGRA_POWERGATE_HEG 7
31#define TEGRA_POWERGATE_SATA 8
32#define TEGRA_POWERGATE_CPU1 9
33#define TEGRA_POWERGATE_CPU2 10
34#define TEGRA_POWERGATE_CPU3 11
35#define TEGRA_POWERGATE_CELP 12
36#define TEGRA_POWERGATE_3D1 13
Thierry Redingbd6a9dd2013-10-16 19:19:02 +020037#define TEGRA_POWERGATE_CPU0 14
38#define TEGRA_POWERGATE_C0NC 15
39#define TEGRA_POWERGATE_C1NC 16
40#define TEGRA_POWERGATE_DIS 18
41#define TEGRA_POWERGATE_DISB 19
42#define TEGRA_POWERGATE_XUSBA 20
43#define TEGRA_POWERGATE_XUSBB 21
44#define TEGRA_POWERGATE_XUSBC 22
Peter De Schrijver6cafa972012-02-10 01:47:48 +020045
Peter De Schrijver6cafa972012-02-10 01:47:48 +020046#define TEGRA_POWERGATE_3D0 TEGRA_POWERGATE_3D
Colin Crossce1e3262010-05-24 17:07:46 -070047
Thierry Reding9886e1f2013-11-25 11:49:47 -070048#ifdef CONFIG_ARCH_TEGRA
Peter De Schrijver6ac8cb52012-02-10 01:47:47 +020049int tegra_powergate_is_powered(int id);
Colin Crossce1e3262010-05-24 17:07:46 -070050int tegra_powergate_power_on(int id);
51int tegra_powergate_power_off(int id);
Colin Crossce1e3262010-05-24 17:07:46 -070052int tegra_powergate_remove_clamping(int id);
53
54/* Must be called with clk disabled, and returns with clk enabled */
55int tegra_powergate_sequence_power_up(int id, struct clk *clk);
Thierry Reding9886e1f2013-11-25 11:49:47 -070056#else
57static inline int tegra_powergate_is_powered(int id)
58{
59 return -ENOSYS;
60}
61
62static inline int tegra_powergate_power_on(int id)
63{
64 return -ENOSYS;
65}
66
67static inline int tegra_powergate_power_off(int id)
68{
69 return -ENOSYS;
70}
71
72static inline int tegra_powergate_remove_clamping(int id)
73{
74 return -ENOSYS;
75}
76
77static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk)
78{
79 return -ENOSYS;
80}
81#endif
Colin Crossce1e3262010-05-24 17:07:46 -070082
83#endif /* _MACH_TEGRA_POWERGATE_H_ */