blob: a0580afe1713a5f58db5e96da635028856200a08 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2** DINO manager
3**
4** (c) Copyright 1999 Red Hat Software
5** (c) Copyright 1999 SuSE GmbH
6** (c) Copyright 1999,2000 Hewlett-Packard Company
7** (c) Copyright 2000 Grant Grundler
Helge Deller5076c152006-03-27 12:52:15 -07008** (c) Copyright 2006 Helge Deller
Linus Torvalds1da177e2005-04-16 15:20:36 -07009**
10** This program is free software; you can redistribute it and/or modify
11** it under the terms of the GNU General Public License as published by
12** the Free Software Foundation; either version 2 of the License, or
13** (at your option) any later version.
14**
15** This module provides access to Dino PCI bus (config/IOport spaces)
16** and helps manage Dino IRQ lines.
17**
18** Dino interrupt handling is a bit complicated.
19** Dino always writes to the broadcast EIR via irr0 for now.
20** (BIG WARNING: using broadcast EIR is a really bad thing for SMP!)
21** Only one processor interrupt is used for the 11 IRQ line
22** inputs to dino.
23**
24** The different between Built-in Dino and Card-Mode
25** dino is in chip initialization and pci device initialization.
26**
27** Linux drivers can only use Card-Mode Dino if pci devices I/O port
28** BARs are configured and used by the driver. Programming MMIO address
29** requires substantial knowledge of available Host I/O address ranges
30** is currently not supported. Port/Config accessor functions are the
31** same. "BIOS" differences are handled within the existing routines.
32*/
33
34/* Changes :
35** 2001-06-14 : Clement Moyroud (moyroudc@esiee.fr)
36** - added support for the integrated RS232.
37*/
38
39/*
40** TODO: create a virtual address for each Dino HPA.
41** GSC code might be able to do this since IODC data tells us
42** how many pages are used. PCI subsystem could (must?) do this
43** for PCI drivers devices which implement/use MMIO registers.
44*/
45
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#include <linux/delay.h>
47#include <linux/types.h>
48#include <linux/kernel.h>
49#include <linux/pci.h>
50#include <linux/init.h>
51#include <linux/ioport.h>
52#include <linux/slab.h>
53#include <linux/interrupt.h> /* for struct irqaction */
54#include <linux/spinlock.h> /* for spinlock_t and prototypes */
55
56#include <asm/pdc.h>
57#include <asm/page.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070058#include <asm/io.h>
59#include <asm/hardware.h>
60
61#include "gsc.h"
62
63#undef DINO_DEBUG
64
65#ifdef DINO_DEBUG
66#define DBG(x...) printk(x)
67#else
68#define DBG(x...)
69#endif
70
71/*
72** Config accessor functions only pass in the 8-bit bus number
73** and not the 8-bit "PCI Segment" number. Each Dino will be
74** assigned a PCI bus number based on "when" it's discovered.
75**
76** The "secondary" bus number is set to this before calling
77** pci_scan_bus(). If any PPB's are present, the scan will
78** discover them and update the "secondary" and "subordinate"
79** fields in Dino's pci_bus structure.
80**
81** Changes in the configuration *will* result in a different
82** bus number for each dino.
83*/
84
Matthew Wilcoxf45adcf2006-01-10 20:48:06 -050085#define is_card_dino(id) ((id)->hw_type == HPHW_A_DMA)
86#define is_cujo(id) ((id)->hversion == 0x682)
Linus Torvalds1da177e2005-04-16 15:20:36 -070087
88#define DINO_IAR0 0x004
89#define DINO_IODC_ADDR 0x008
90#define DINO_IODC_DATA_0 0x008
91#define DINO_IODC_DATA_1 0x008
92#define DINO_IRR0 0x00C
93#define DINO_IAR1 0x010
94#define DINO_IRR1 0x014
95#define DINO_IMR 0x018
96#define DINO_IPR 0x01C
97#define DINO_TOC_ADDR 0x020
98#define DINO_ICR 0x024
99#define DINO_ILR 0x028
100#define DINO_IO_COMMAND 0x030
101#define DINO_IO_STATUS 0x034
102#define DINO_IO_CONTROL 0x038
103#define DINO_IO_GSC_ERR_RESP 0x040
104#define DINO_IO_ERR_INFO 0x044
105#define DINO_IO_PCI_ERR_RESP 0x048
106#define DINO_IO_FBB_EN 0x05c
107#define DINO_IO_ADDR_EN 0x060
108#define DINO_PCI_ADDR 0x064
109#define DINO_CONFIG_DATA 0x068
110#define DINO_IO_DATA 0x06c
111#define DINO_MEM_DATA 0x070 /* Dino 3.x only */
112#define DINO_GSC2X_CONFIG 0x7b4
113#define DINO_GMASK 0x800
114#define DINO_PAMR 0x804
115#define DINO_PAPR 0x808
116#define DINO_DAMODE 0x80c
117#define DINO_PCICMD 0x810
118#define DINO_PCISTS 0x814
119#define DINO_MLTIM 0x81c
120#define DINO_BRDG_FEAT 0x820
121#define DINO_PCIROR 0x824
122#define DINO_PCIWOR 0x828
123#define DINO_TLTIM 0x830
124
125#define DINO_IRQS 11 /* bits 0-10 are architected */
126#define DINO_IRR_MASK 0x5ff /* only 10 bits are implemented */
Helge Deller4d64c9f2006-01-10 20:47:54 -0500127#define DINO_LOCAL_IRQS (DINO_IRQS+1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128
129#define DINO_MASK_IRQ(x) (1<<(x))
130
131#define PCIINTA 0x001
132#define PCIINTB 0x002
133#define PCIINTC 0x004
134#define PCIINTD 0x008
135#define PCIINTE 0x010
136#define PCIINTF 0x020
137#define GSCEXTINT 0x040
138/* #define xxx 0x080 - bit 7 is "default" */
139/* #define xxx 0x100 - bit 8 not used */
140/* #define xxx 0x200 - bit 9 not used */
141#define RS232INT 0x400
142
143struct dino_device
144{
145 struct pci_hba_data hba; /* 'C' inheritance - must be first */
146 spinlock_t dinosaur_pen;
147 unsigned long txn_addr; /* EIR addr to generate interrupt */
148 u32 txn_data; /* EIR data assign to each dino */
149 u32 imr; /* IRQ's which are enabled */
Helge Deller4d64c9f2006-01-10 20:47:54 -0500150 int global_irq[DINO_LOCAL_IRQS]; /* map IMR bit to global irq */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151#ifdef DINO_DEBUG
152 unsigned int dino_irr0; /* save most recent IRQ line stat */
153#endif
154};
155
156/* Looks nice and keeps the compiler happy */
157#define DINO_DEV(d) ((struct dino_device *) d)
158
159
160/*
161 * Dino Configuration Space Accessor Functions
162 */
163
164#define DINO_CFG_TOK(bus,dfn,pos) ((u32) ((bus)<<16 | (dfn)<<8 | (pos)))
165
166/*
167 * keep the current highest bus count to assist in allocating busses. This
168 * tries to keep a global bus count total so that when we discover an
169 * entirely new bus, it can be given a unique bus number.
170 */
171static int dino_current_bus = 0;
172
173static int dino_cfg_read(struct pci_bus *bus, unsigned int devfn, int where,
174 int size, u32 *val)
175{
176 struct dino_device *d = DINO_DEV(parisc_walk_tree(bus->bridge));
Yinghai Lub918c622012-05-17 18:51:11 -0700177 u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3);
179 void __iomem *base_addr = d->hba.base_addr;
180 unsigned long flags;
181
Harvey Harrisona8043ec2008-05-14 16:21:56 -0700182 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where,
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400183 size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184 spin_lock_irqsave(&d->dinosaur_pen, flags);
185
186 /* tell HW which CFG address */
187 __raw_writel(v, base_addr + DINO_PCI_ADDR);
188
189 /* generate cfg read cycle */
190 if (size == 1) {
191 *val = readb(base_addr + DINO_CONFIG_DATA + (where & 3));
192 } else if (size == 2) {
193 *val = readw(base_addr + DINO_CONFIG_DATA + (where & 2));
194 } else if (size == 4) {
195 *val = readl(base_addr + DINO_CONFIG_DATA);
196 }
197
198 spin_unlock_irqrestore(&d->dinosaur_pen, flags);
199 return 0;
200}
201
202/*
203 * Dino address stepping "feature":
204 * When address stepping, Dino attempts to drive the bus one cycle too soon
205 * even though the type of cycle (config vs. MMIO) might be different.
206 * The read of Ven/Prod ID is harmless and avoids Dino's address stepping.
207 */
208static int dino_cfg_write(struct pci_bus *bus, unsigned int devfn, int where,
209 int size, u32 val)
210{
211 struct dino_device *d = DINO_DEV(parisc_walk_tree(bus->bridge));
Yinghai Lub918c622012-05-17 18:51:11 -0700212 u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3);
214 void __iomem *base_addr = d->hba.base_addr;
215 unsigned long flags;
216
Harvey Harrisona8043ec2008-05-14 16:21:56 -0700217 DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where,
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400218 size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219 spin_lock_irqsave(&d->dinosaur_pen, flags);
220
221 /* avoid address stepping feature */
222 __raw_writel(v & 0xffffff00, base_addr + DINO_PCI_ADDR);
223 __raw_readl(base_addr + DINO_CONFIG_DATA);
224
225 /* tell HW which CFG address */
226 __raw_writel(v, base_addr + DINO_PCI_ADDR);
227 /* generate cfg read cycle */
228 if (size == 1) {
229 writeb(val, base_addr + DINO_CONFIG_DATA + (where & 3));
230 } else if (size == 2) {
231 writew(val, base_addr + DINO_CONFIG_DATA + (where & 2));
232 } else if (size == 4) {
233 writel(val, base_addr + DINO_CONFIG_DATA);
234 }
235
236 spin_unlock_irqrestore(&d->dinosaur_pen, flags);
237 return 0;
238}
239
240static struct pci_ops dino_cfg_ops = {
241 .read = dino_cfg_read,
242 .write = dino_cfg_write,
243};
244
245
246/*
247 * Dino "I/O Port" Space Accessor Functions
248 *
249 * Many PCI devices don't require use of I/O port space (eg Tulip,
250 * NCR720) since they export the same registers to both MMIO and
251 * I/O port space. Performance is going to stink if drivers use
252 * I/O port instead of MMIO.
253 */
254
255#define DINO_PORT_IN(type, size, mask) \
256static u##size dino_in##size (struct pci_hba_data *d, u16 addr) \
257{ \
258 u##size v; \
259 unsigned long flags; \
260 spin_lock_irqsave(&(DINO_DEV(d)->dinosaur_pen), flags); \
261 /* tell HW which IO Port address */ \
262 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \
263 /* generate I/O PORT read cycle */ \
264 v = read##type(d->base_addr+DINO_IO_DATA+(addr&mask)); \
265 spin_unlock_irqrestore(&(DINO_DEV(d)->dinosaur_pen), flags); \
266 return v; \
267}
268
269DINO_PORT_IN(b, 8, 3)
270DINO_PORT_IN(w, 16, 2)
271DINO_PORT_IN(l, 32, 0)
272
273#define DINO_PORT_OUT(type, size, mask) \
274static void dino_out##size (struct pci_hba_data *d, u16 addr, u##size val) \
275{ \
276 unsigned long flags; \
277 spin_lock_irqsave(&(DINO_DEV(d)->dinosaur_pen), flags); \
278 /* tell HW which IO port address */ \
279 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \
280 /* generate cfg write cycle */ \
281 write##type(val, d->base_addr+DINO_IO_DATA+(addr&mask)); \
282 spin_unlock_irqrestore(&(DINO_DEV(d)->dinosaur_pen), flags); \
283}
284
285DINO_PORT_OUT(b, 8, 3)
286DINO_PORT_OUT(w, 16, 2)
287DINO_PORT_OUT(l, 32, 0)
288
Adrian Bunkdf8e5bc2008-12-02 03:28:16 +0000289static struct pci_port_ops dino_port_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290 .inb = dino_in8,
291 .inw = dino_in16,
292 .inl = dino_in32,
293 .outb = dino_out8,
294 .outw = dino_out16,
295 .outl = dino_out32
296};
297
Thomas Gleixner4c4231e2011-02-06 20:45:52 +0000298static void dino_mask_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299{
Thomas Gleixner4c4231e2011-02-06 20:45:52 +0000300 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
301 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700302
Thomas Gleixner4c4231e2011-02-06 20:45:52 +0000303 DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, d->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304
305 /* Clear the matching bit in the IMR register */
306 dino_dev->imr &= ~(DINO_MASK_IRQ(local_irq));
307 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
308}
309
Thomas Gleixner4c4231e2011-02-06 20:45:52 +0000310static void dino_unmask_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311{
Thomas Gleixner4c4231e2011-02-06 20:45:52 +0000312 struct dino_device *dino_dev = irq_data_get_irq_chip_data(d);
313 int local_irq = gsc_find_local_irq(d->irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314 u32 tmp;
315
Thomas Gleixner4c4231e2011-02-06 20:45:52 +0000316 DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, d->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317
318 /*
319 ** clear pending IRQ bits
320 **
321 ** This does NOT change ILR state!
322 ** See comment below for ILR usage.
323 */
324 __raw_readl(dino_dev->hba.base_addr+DINO_IPR);
325
326 /* set the matching bit in the IMR register */
327 dino_dev->imr |= DINO_MASK_IRQ(local_irq); /* used in dino_isr() */
328 __raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR);
329
330 /* Emulate "Level Triggered" Interrupt
331 ** Basically, a driver is blowing it if the IRQ line is asserted
332 ** while the IRQ is disabled. But tulip.c seems to do that....
333 ** Give 'em a kluge award and a nice round of applause!
334 **
335 ** The gsc_write will generate an interrupt which invokes dino_isr().
336 ** dino_isr() will read IPR and find nothing. But then catch this
337 ** when it also checks ILR.
338 */
339 tmp = __raw_readl(dino_dev->hba.base_addr+DINO_ILR);
340 if (tmp & DINO_MASK_IRQ(local_irq)) {
341 DBG(KERN_WARNING "%s(): IRQ asserted! (ILR 0x%x)\n",
Harvey Harrisona8043ec2008-05-14 16:21:56 -0700342 __func__, tmp);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343 gsc_writel(dino_dev->txn_data, dino_dev->txn_addr);
344 }
345}
346
Thomas Gleixnerdfe07562009-06-10 19:56:04 +0000347static struct irq_chip dino_interrupt_type = {
Thomas Gleixner4c4231e2011-02-06 20:45:52 +0000348 .name = "GSC-PCI",
349 .irq_unmask = dino_unmask_irq,
350 .irq_mask = dino_mask_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351};
352
353
354/*
355 * Handle a Processor interrupt generated by Dino.
356 *
357 * ilr_loop counter is a kluge to prevent a "stuck" IRQ line from
358 * wedging the CPU. Could be removed or made optional at some point.
359 */
David Howells7d12e782006-10-05 14:55:46 +0100360static irqreturn_t dino_isr(int irq, void *intr_dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361{
362 struct dino_device *dino_dev = intr_dev;
363 u32 mask;
364 int ilr_loop = 100;
365
366 /* read and acknowledge pending interrupts */
367#ifdef DINO_DEBUG
368 dino_dev->dino_irr0 =
369#endif
370 mask = __raw_readl(dino_dev->hba.base_addr+DINO_IRR0) & DINO_IRR_MASK;
371
372 if (mask == 0)
373 return IRQ_NONE;
374
375ilr_again:
376 do {
377 int local_irq = __ffs(mask);
378 int irq = dino_dev->global_irq[local_irq];
379 DBG(KERN_DEBUG "%s(%d, %p) mask 0x%x\n",
Harvey Harrisona8043ec2008-05-14 16:21:56 -0700380 __func__, irq, intr_dev, mask);
Kyle McMartinba200852010-10-13 21:00:55 -0400381 generic_handle_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382 mask &= ~(1 << local_irq);
383 } while (mask);
384
385 /* Support for level triggered IRQ lines.
386 **
387 ** Dropping this support would make this routine *much* faster.
388 ** But since PCI requires level triggered IRQ line to share lines...
389 ** device drivers may assume lines are level triggered (and not
390 ** edge triggered like EISA/ISA can be).
391 */
392 mask = __raw_readl(dino_dev->hba.base_addr+DINO_ILR) & dino_dev->imr;
393 if (mask) {
394 if (--ilr_loop > 0)
395 goto ilr_again;
396 printk(KERN_ERR "Dino 0x%p: stuck interrupt %d\n",
397 dino_dev->hba.base_addr, mask);
398 return IRQ_NONE;
399 }
400 return IRQ_HANDLED;
401}
402
403static void dino_assign_irq(struct dino_device *dino, int local_irq, int *irqp)
404{
405 int irq = gsc_assign_irq(&dino_interrupt_type, dino);
406 if (irq == NO_IRQ)
407 return;
408
409 *irqp = irq;
410 dino->global_irq[local_irq] = irq;
411}
412
413static void dino_choose_irq(struct parisc_device *dev, void *ctrl)
414{
415 int irq;
416 struct dino_device *dino = ctrl;
417
418 switch (dev->id.sversion) {
419 case 0x00084: irq = 8; break; /* PS/2 */
420 case 0x0008c: irq = 10; break; /* RS232 */
421 case 0x00096: irq = 8; break; /* PS/2 */
422 default: return; /* Unknown */
423 }
424
425 dino_assign_irq(dino, irq, &dev->irq);
426}
427
Helge Deller04d35d72006-01-10 20:47:50 -0500428
429/*
430 * Cirrus 6832 Cardbus reports wrong irq on RDI Tadpole PARISC Laptop (deller@gmx.de)
431 * (the irqs are off-by-one, not sure yet if this is a cirrus, dino-hardware or dino-driver problem...)
432 */
Greg Kroah-Hartman0fe763c2012-12-21 15:14:44 -0800433static void quirk_cirrus_cardbus(struct pci_dev *dev)
Helge Deller04d35d72006-01-10 20:47:50 -0500434{
435 u8 new_irq = dev->irq - 1;
436 printk(KERN_INFO "PCI: Cirrus Cardbus IRQ fixup for %s, from %d to %d\n",
437 pci_name(dev), dev->irq, new_irq);
438 dev->irq = new_irq;
439}
440DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_CIRRUS, PCI_DEVICE_ID_CIRRUS_6832, quirk_cirrus_cardbus );
441
442
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443static void __init
444dino_bios_init(void)
445{
446 DBG("dino_bios_init\n");
447}
448
449/*
450 * dino_card_setup - Set up the memory space for a Dino in card mode.
451 * @bus: the bus under this dino
452 *
453 * Claim an 8MB chunk of unused IO space and call the generic PCI routines
454 * to set up the addresses of the devices on this bus.
455 */
456#define _8MB 0x00800000UL
457static void __init
458dino_card_setup(struct pci_bus *bus, void __iomem *base_addr)
459{
460 int i;
461 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
462 struct resource *res;
463 char name[128];
464 int size;
465
466 res = &dino_dev->hba.lmmio_space;
467 res->flags = IORESOURCE_MEM;
468 size = scnprintf(name, sizeof(name), "Dino LMMIO (%s)",
Kay Sieversd4995242009-01-26 03:53:16 +0000469 dev_name(bus->bridge));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470 res->name = kmalloc(size+1, GFP_KERNEL);
471 if(res->name)
472 strcpy((char *)res->name, name);
473 else
474 res->name = dino_dev->hba.lmmio_space.name;
475
476
477 if (ccio_allocate_resource(dino_dev->hba.dev, res, _8MB,
478 F_EXTEND(0xf0000000UL) | _8MB,
479 F_EXTEND(0xffffffffUL) &~ _8MB, _8MB) < 0) {
Bjorn Helgaas0b79ca22012-08-16 16:45:02 -0600480 struct pci_dev *dev, *tmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481
482 printk(KERN_ERR "Dino: cannot attach bus %s\n",
Kay Sieversd4995242009-01-26 03:53:16 +0000483 dev_name(bus->bridge));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484 /* kill the bus, we can't do anything with it */
Bjorn Helgaas0b79ca22012-08-16 16:45:02 -0600485 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700486 list_del(&dev->bus_list);
487 }
488
489 return;
490 }
491 bus->resource[1] = res;
492 bus->resource[0] = &(dino_dev->hba.io_space);
493
494 /* Now tell dino what range it has */
495 for (i = 1; i < 31; i++) {
496 if (res->start == F_EXTEND(0xf0000000UL | (i * _8MB)))
497 break;
498 }
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400499 DBG("DINO GSC WRITE i=%d, start=%lx, dino addr = %p\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700500 i, res->start, base_addr + DINO_IO_ADDR_EN);
501 __raw_writel(1 << i, base_addr + DINO_IO_ADDR_EN);
502}
503
504static void __init
505dino_card_fixup(struct pci_dev *dev)
506{
507 u32 irq_pin;
508
509 /*
510 ** REVISIT: card-mode PCI-PCI expansion chassis do exist.
511 ** Not sure they were ever productized.
512 ** Die here since we'll die later in dino_inb() anyway.
513 */
514 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
515 panic("Card-Mode Dino: PCI-PCI Bridge not supported\n");
516 }
517
518 /*
519 ** Set Latency Timer to 0xff (not a shared bus)
520 ** Set CACHELINE_SIZE.
521 */
522 dino_cfg_write(dev->bus, dev->devfn,
523 PCI_CACHE_LINE_SIZE, 2, 0xff00 | L1_CACHE_BYTES/4);
524
525 /*
526 ** Program INT_LINE for card-mode devices.
527 ** The cards are hardwired according to this algorithm.
528 ** And it doesn't matter if PPB's are present or not since
529 ** the IRQ lines bypass the PPB.
530 **
531 ** "-1" converts INTA-D (1-4) to PCIINTA-D (0-3) range.
532 ** The additional "-1" adjusts for skewing the IRQ<->slot.
533 */
534 dino_cfg_read(dev->bus, dev->devfn, PCI_INTERRUPT_PIN, 1, &irq_pin);
Bjorn Helgaasf0e88af2008-12-09 16:12:22 -0700535 dev->irq = pci_swizzle_interrupt_pin(dev, irq_pin) - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536
537 /* Shouldn't really need to do this but it's in case someone tries
538 ** to bypass PCI services and look at the card themselves.
539 */
540 dino_cfg_write(dev->bus, dev->devfn, PCI_INTERRUPT_LINE, 1, dev->irq);
541}
542
543/* The alignment contraints for PCI bridges under dino */
544#define DINO_BRIDGE_ALIGN 0x100000
545
546
547static void __init
548dino_fixup_bus(struct pci_bus *bus)
549{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700550 struct pci_dev *dev;
551 struct dino_device *dino_dev = DINO_DEV(parisc_walk_tree(bus->bridge));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552
553 DBG(KERN_WARNING "%s(0x%p) bus %d platform_data 0x%p\n",
Yinghai Lub918c622012-05-17 18:51:11 -0700554 __func__, bus, bus->busn_res.start,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700555 bus->bridge->platform_data);
556
557 /* Firmware doesn't set up card-mode dino, so we have to */
558 if (is_card_dino(&dino_dev->hba.dev->id)) {
559 dino_card_setup(bus, dino_dev->hba.base_addr);
Grant Grundler9785d642009-01-28 22:30:55 -0700560 } else if (bus->parent) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561 int i;
562
563 pci_read_bridge_bases(bus);
564
565
566 for(i = PCI_BRIDGE_RESOURCES; i < PCI_NUM_RESOURCES; i++) {
567 if((bus->self->resource[i].flags &
568 (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
569 continue;
570
571 if(bus->self->resource[i].flags & IORESOURCE_MEM) {
572 /* There's a quirk to alignment of
573 * bridge memory resources: the start
574 * is the alignment and start-end is
575 * the size. However, firmware will
576 * have assigned start and end, so we
577 * need to take this into account */
578 bus->self->resource[i].end = bus->self->resource[i].end - bus->self->resource[i].start + DINO_BRIDGE_ALIGN;
579 bus->self->resource[i].start = DINO_BRIDGE_ALIGN;
580
581 }
582
Joe Perches3fad9b82010-11-12 21:38:00 +0000583 DBG("DEBUG %s assigning %d [%pR]\n",
Kay Sieversd4995242009-01-26 03:53:16 +0000584 dev_name(&bus->self->dev), i,
Joe Perches3fad9b82010-11-12 21:38:00 +0000585 &bus->self->resource[i]);
Helge Deller1e0deab2009-08-02 15:17:37 +0200586 WARN_ON(pci_assign_resource(bus->self, i));
Joe Perches3fad9b82010-11-12 21:38:00 +0000587 DBG("DEBUG %s after assign %d [%pR]\n",
Kay Sieversd4995242009-01-26 03:53:16 +0000588 dev_name(&bus->self->dev), i,
Joe Perches3fad9b82010-11-12 21:38:00 +0000589 &bus->self->resource[i]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700590 }
591 }
592
593
Bjorn Helgaas0b79ca22012-08-16 16:45:02 -0600594 list_for_each_entry(dev, &bus->devices, bus_list) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595 if (is_card_dino(&dino_dev->hba.dev->id))
596 dino_card_fixup(dev);
597
598 /*
599 ** P2PB's only have 2 BARs, no IRQs.
600 ** I'd like to just ignore them for now.
601 */
602 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
603 continue;
604
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 /* null out the ROM resource if there is one (we don't
606 * care about an expansion rom on parisc, since it
607 * usually contains (x86) bios code) */
608 dev->resource[PCI_ROM_RESOURCE].flags = 0;
609
610 if(dev->irq == 255) {
611
612#define DINO_FIX_UNASSIGNED_INTERRUPTS
613#ifdef DINO_FIX_UNASSIGNED_INTERRUPTS
614
615 /* This code tries to assign an unassigned
616 * interrupt. Leave it disabled unless you
617 * *really* know what you're doing since the
618 * pin<->interrupt line mapping varies by bus
619 * and machine */
620
621 u32 irq_pin;
622
623 dino_cfg_read(dev->bus, dev->devfn,
624 PCI_INTERRUPT_PIN, 1, &irq_pin);
Bjorn Helgaasf0e88af2008-12-09 16:12:22 -0700625 irq_pin = pci_swizzle_interrupt_pin(dev, irq_pin) - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626 printk(KERN_WARNING "Device %s has undefined IRQ, "
627 "setting to %d\n", pci_name(dev), irq_pin);
628 dino_cfg_write(dev->bus, dev->devfn,
629 PCI_INTERRUPT_LINE, 1, irq_pin);
630 dino_assign_irq(dino_dev, irq_pin, &dev->irq);
631#else
632 dev->irq = 65535;
633 printk(KERN_WARNING "Device %s has unassigned IRQ\n", pci_name(dev));
634#endif
635 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700636 /* Adjust INT_LINE for that busses region */
637 dino_assign_irq(dino_dev, dev->irq, &dev->irq);
638 }
639 }
640}
641
642
Adrian Bunkdf8e5bc2008-12-02 03:28:16 +0000643static struct pci_bios_ops dino_bios_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700644 .init = dino_bios_init,
645 .fixup_bus = dino_fixup_bus
646};
647
648
649/*
650 * Initialise a DINO controller chip
651 */
652static void __init
653dino_card_init(struct dino_device *dino_dev)
654{
655 u32 brdg_feat = 0x00784e05;
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400656 unsigned long status;
657
658 status = __raw_readl(dino_dev->hba.base_addr+DINO_IO_STATUS);
659 if (status & 0x0000ff80) {
660 __raw_writel(0x00000005,
661 dino_dev->hba.base_addr+DINO_IO_COMMAND);
662 udelay(1);
663 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664
665 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_GMASK);
666 __raw_writel(0x00000001, dino_dev->hba.base_addr+DINO_IO_FBB_EN);
667 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_ICR);
668
669#if 1
670/* REVISIT - should be a runtime check (eg if (CPU_IS_PCX_L) ...) */
671 /*
672 ** PCX-L processors don't support XQL like Dino wants it.
673 ** PCX-L2 ignore XQL signal and it doesn't matter.
674 */
675 brdg_feat &= ~0x4; /* UXQL */
676#endif
677 __raw_writel( brdg_feat, dino_dev->hba.base_addr+DINO_BRDG_FEAT);
678
679 /*
680 ** Don't enable address decoding until we know which I/O range
681 ** currently is available from the host. Only affects MMIO
682 ** and not I/O port space.
683 */
684 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_IO_ADDR_EN);
685
686 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_DAMODE);
687 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIROR);
688 __raw_writel(0x00222222, dino_dev->hba.base_addr+DINO_PCIWOR);
689
690 __raw_writel(0x00000040, dino_dev->hba.base_addr+DINO_MLTIM);
691 __raw_writel(0x00000080, dino_dev->hba.base_addr+DINO_IO_CONTROL);
692 __raw_writel(0x0000008c, dino_dev->hba.base_addr+DINO_TLTIM);
693
694 /* Disable PAMR before writing PAPR */
695 __raw_writel(0x0000007e, dino_dev->hba.base_addr+DINO_PAMR);
696 __raw_writel(0x0000007f, dino_dev->hba.base_addr+DINO_PAPR);
697 __raw_writel(0x00000000, dino_dev->hba.base_addr+DINO_PAMR);
698
699 /*
700 ** Dino ERS encourages enabling FBB (0x6f).
701 ** We can't until we know *all* devices below us can support it.
702 ** (Something in device configuration header tells us).
703 */
704 __raw_writel(0x0000004f, dino_dev->hba.base_addr+DINO_PCICMD);
705
706 /* Somewhere, the PCI spec says give devices 1 second
707 ** to recover from the #RESET being de-asserted.
708 ** Experience shows most devices only need 10ms.
709 ** This short-cut speeds up booting significantly.
710 */
711 mdelay(pci_post_reset_delay);
712}
713
714static int __init
715dino_bridge_init(struct dino_device *dino_dev, const char *name)
716{
717 unsigned long io_addr;
718 int result, i, count=0;
719 struct resource *res, *prevres = NULL;
720 /*
721 * Decoding IO_ADDR_EN only works for Built-in Dino
722 * since PDC has already initialized this.
723 */
724
725 io_addr = __raw_readl(dino_dev->hba.base_addr + DINO_IO_ADDR_EN);
726 if (io_addr == 0) {
727 printk(KERN_WARNING "%s: No PCI devices enabled.\n", name);
728 return -ENODEV;
729 }
730
731 res = &dino_dev->hba.lmmio_space;
732 for (i = 0; i < 32; i++) {
733 unsigned long start, end;
734
735 if((io_addr & (1 << i)) == 0)
736 continue;
737
Helge Deller5076c152006-03-27 12:52:15 -0700738 start = F_EXTEND(0xf0000000UL) | (i << 23);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739 end = start + 8 * 1024 * 1024 - 1;
740
741 DBG("DINO RANGE %d is at 0x%lx-0x%lx\n", count,
742 start, end);
743
744 if(prevres && prevres->end + 1 == start) {
745 prevres->end = end;
746 } else {
747 if(count >= DINO_MAX_LMMIO_RESOURCES) {
748 printk(KERN_ERR "%s is out of resource windows for range %d (0x%lx-0x%lx)\n", name, count, start, end);
749 break;
750 }
751 prevres = res;
752 res->start = start;
753 res->end = end;
754 res->flags = IORESOURCE_MEM;
755 res->name = kmalloc(64, GFP_KERNEL);
756 if(res->name)
757 snprintf((char *)res->name, 64, "%s LMMIO %d",
758 name, count);
759 res++;
760 count++;
761 }
762 }
763
764 res = &dino_dev->hba.lmmio_space;
765
766 for(i = 0; i < DINO_MAX_LMMIO_RESOURCES; i++) {
767 if(res[i].flags == 0)
768 break;
769
770 result = ccio_request_resource(dino_dev->hba.dev, &res[i]);
771 if (result < 0) {
Alexander Beregalovc18b4602009-03-19 10:54:07 +0000772 printk(KERN_ERR "%s: failed to claim PCI Bus address "
Joe Perches3fad9b82010-11-12 21:38:00 +0000773 "space %d (%pR)!\n", name, i, &res[i]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774 return result;
775 }
776 }
777 return 0;
778}
779
780static int __init dino_common_init(struct parisc_device *dev,
781 struct dino_device *dino_dev, const char *name)
782{
783 int status;
784 u32 eim;
785 struct gsc_irq gsc_irq;
786 struct resource *res;
787
788 pcibios_register_hba(&dino_dev->hba);
789
790 pci_bios = &dino_bios_ops; /* used by pci_scan_bus() */
791 pci_port = &dino_port_ops;
792
793 /*
794 ** Note: SMP systems can make use of IRR1/IAR1 registers
795 ** But it won't buy much performance except in very
796 ** specific applications/configurations. Note Dino
797 ** still only has 11 IRQ input lines - just map some of them
798 ** to a different processor.
799 */
800 dev->irq = gsc_alloc_irq(&gsc_irq);
801 dino_dev->txn_addr = gsc_irq.txn_addr;
802 dino_dev->txn_data = gsc_irq.txn_data;
803 eim = ((u32) gsc_irq.txn_addr) | gsc_irq.txn_data;
804
805 /*
806 ** Dino needs a PA "IRQ" to get a processor's attention.
807 ** arch/parisc/kernel/irq.c returns an EIRR bit.
808 */
809 if (dev->irq < 0) {
810 printk(KERN_WARNING "%s: gsc_alloc_irq() failed\n", name);
811 return 1;
812 }
813
814 status = request_irq(dev->irq, dino_isr, 0, name, dino_dev);
815 if (status) {
816 printk(KERN_WARNING "%s: request_irq() failed with %d\n",
817 name, status);
818 return 1;
819 }
820
821 /* Support the serial port which is sometimes attached on built-in
822 * Dino / Cujo chips.
823 */
824
825 gsc_fixup_irqs(dev, dino_dev, dino_choose_irq);
826
827 /*
828 ** This enables DINO to generate interrupts when it sees
829 ** any of its inputs *change*. Just asserting an IRQ
830 ** before it's enabled (ie unmasked) isn't good enough.
831 */
832 __raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0);
833
834 /*
835 ** Some platforms don't clear Dino's IRR0 register at boot time.
836 ** Reading will clear it now.
837 */
838 __raw_readl(dino_dev->hba.base_addr+DINO_IRR0);
839
840 /* allocate I/O Port resource region */
841 res = &dino_dev->hba.io_space;
Matthew Wilcoxf45adcf2006-01-10 20:48:06 -0500842 if (!is_cujo(&dev->id)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700843 res->name = "Dino I/O Port";
844 } else {
845 res->name = "Cujo I/O Port";
846 }
847 res->start = HBA_PORT_BASE(dino_dev->hba.hba_num);
848 res->end = res->start + (HBA_PORT_SPACE_SIZE - 1);
849 res->flags = IORESOURCE_IO; /* do not mark it busy ! */
850 if (request_resource(&ioport_resource, res) < 0) {
851 printk(KERN_ERR "%s: request I/O Port region failed "
852 "0x%lx/%lx (hpa 0x%p)\n",
Alexander Beregalovc18b4602009-03-19 10:54:07 +0000853 name, (unsigned long)res->start, (unsigned long)res->end,
854 dino_dev->hba.base_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700855 return 1;
856 }
857
858 return 0;
859}
860
861#define CUJO_RAVEN_ADDR F_EXTEND(0xf1000000UL)
862#define CUJO_FIREHAWK_ADDR F_EXTEND(0xf1604000UL)
863#define CUJO_RAVEN_BADPAGE 0x01003000UL
864#define CUJO_FIREHAWK_BADPAGE 0x01607000UL
865
866static const char *dino_vers[] = {
867 "2.0",
868 "2.1",
869 "3.0",
870 "3.1"
871};
872
873static const char *cujo_vers[] = {
874 "1.0",
875 "2.0"
876};
877
878void ccio_cujo20_fixup(struct parisc_device *dev, u32 iovp);
879
880/*
881** Determine if dino should claim this chip (return 0) or not (return 1).
882** If so, initialize the chip appropriately (card-mode vs bridge mode).
883** Much of the initialization is common though.
884*/
Matthew Wilcox53f01bb2005-10-21 22:36:40 -0400885static int __init dino_probe(struct parisc_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700886{
887 struct dino_device *dino_dev; // Dino specific control struct
888 const char *version = "unknown";
889 char *name;
890 int is_cujo = 0;
Bjorn Helgaas7590e502011-10-28 16:27:12 -0600891 LIST_HEAD(resources);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700892 struct pci_bus *bus;
Matthew Wilcox53f01bb2005-10-21 22:36:40 -0400893 unsigned long hpa = dev->hpa.start;
Yinghai Lu30aa80d2012-05-17 18:51:12 -0700894 int max;
Matthew Wilcox53f01bb2005-10-21 22:36:40 -0400895
Linus Torvalds1da177e2005-04-16 15:20:36 -0700896 name = "Dino";
897 if (is_card_dino(&dev->id)) {
898 version = "3.x (card mode)";
899 } else {
Matthew Wilcoxf45adcf2006-01-10 20:48:06 -0500900 if (!is_cujo(&dev->id)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700901 if (dev->id.hversion_rev < 4) {
902 version = dino_vers[dev->id.hversion_rev];
903 }
904 } else {
905 name = "Cujo";
906 is_cujo = 1;
907 if (dev->id.hversion_rev < 2) {
908 version = cujo_vers[dev->id.hversion_rev];
909 }
910 }
911 }
912
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400913 printk("%s version %s found at 0x%lx\n", name, version, hpa);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400915 if (!request_mem_region(hpa, PAGE_SIZE, name)) {
Hans Wennborg3335f752014-08-03 17:20:30 -0700916 printk(KERN_ERR "DINO: Hey! Someone took my MMIO space (0x%lx)!\n",
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400917 hpa);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700918 return 1;
919 }
920
921 /* Check for bugs */
922 if (is_cujo && dev->id.hversion_rev == 1) {
923#ifdef CONFIG_IOMMU_CCIO
924 printk(KERN_WARNING "Enabling Cujo 2.0 bug workaround\n");
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400925 if (hpa == (unsigned long)CUJO_RAVEN_ADDR) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926 ccio_cujo20_fixup(dev, CUJO_RAVEN_BADPAGE);
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400927 } else if (hpa == (unsigned long)CUJO_FIREHAWK_ADDR) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700928 ccio_cujo20_fixup(dev, CUJO_FIREHAWK_BADPAGE);
929 } else {
Matthew Wilcox92b919f2005-10-21 22:38:23 -0400930 printk("Don't recognise Cujo at address 0x%lx, not enabling workaround\n", hpa);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700931 }
932#endif
933 } else if (!is_cujo && !is_card_dino(&dev->id) &&
934 dev->id.hversion_rev < 3) {
935 printk(KERN_WARNING
936"The GSCtoPCI (Dino hrev %d) bus converter found may exhibit\n"
937"data corruption. See Service Note Numbers: A4190A-01, A4191A-01.\n"
938"Systems shipped after Aug 20, 1997 will not exhibit this problem.\n"
939"Models affected: C180, C160, C160L, B160L, and B132L workstations.\n\n",
940 dev->id.hversion_rev);
941/* REVISIT: why are C200/C240 listed in the README table but not
942** "Models affected"? Could be an omission in the original literature.
943*/
944 }
945
Helge Dellercb6fc182006-01-17 12:40:40 -0700946 dino_dev = kzalloc(sizeof(struct dino_device), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947 if (!dino_dev) {
948 printk("dino_init_chip - couldn't alloc dino_device\n");
949 return 1;
950 }
951
Linus Torvalds1da177e2005-04-16 15:20:36 -0700952 dino_dev->hba.dev = dev;
Helge Deller5076c152006-03-27 12:52:15 -0700953 dino_dev->hba.base_addr = ioremap_nocache(hpa, 4096);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700954 dino_dev->hba.lmmio_space_offset = 0; /* CPU addrs == bus addrs */
955 spin_lock_init(&dino_dev->dinosaur_pen);
956 dino_dev->hba.iommu = ccio_get_iommu(dev);
957
958 if (is_card_dino(&dev->id)) {
959 dino_card_init(dino_dev);
960 } else {
961 dino_bridge_init(dino_dev, name);
962 }
963
964 if (dino_common_init(dev, dino_dev, name))
965 return 1;
966
967 dev->dev.platform_data = dino_dev;
968
Bjorn Helgaas39c24622012-02-23 20:19:03 -0700969 pci_add_resource_offset(&resources, &dino_dev->hba.io_space,
970 HBA_PORT_BASE(dino_dev->hba.hba_num));
Bjorn Helgaas7590e502011-10-28 16:27:12 -0600971 if (dino_dev->hba.lmmio_space.flags)
Bjorn Helgaas39c24622012-02-23 20:19:03 -0700972 pci_add_resource_offset(&resources, &dino_dev->hba.lmmio_space,
973 dino_dev->hba.lmmio_space_offset);
Bjorn Helgaas7590e502011-10-28 16:27:12 -0600974 if (dino_dev->hba.elmmio_space.flags)
Bjorn Helgaas39c24622012-02-23 20:19:03 -0700975 pci_add_resource_offset(&resources, &dino_dev->hba.elmmio_space,
976 dino_dev->hba.lmmio_space_offset);
Bjorn Helgaas7590e502011-10-28 16:27:12 -0600977 if (dino_dev->hba.gmmio_space.flags)
978 pci_add_resource(&resources, &dino_dev->hba.gmmio_space);
979
Yinghai Lu30aa80d2012-05-17 18:51:12 -0700980 dino_dev->hba.bus_num.start = dino_current_bus;
981 dino_dev->hba.bus_num.end = 255;
982 dino_dev->hba.bus_num.flags = IORESOURCE_BUS;
983 pci_add_resource(&resources, &dino_dev->hba.bus_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700984 /*
985 ** It's not used to avoid chicken/egg problems
986 ** with configuration accessor functions.
987 */
Bjorn Helgaas7590e502011-10-28 16:27:12 -0600988 dino_dev->hba.hba_bus = bus = pci_create_root_bus(&dev->dev,
989 dino_current_bus, &dino_cfg_ops, NULL, &resources);
Bjorn Helgaasc4e06572011-10-28 16:27:07 -0600990 if (!bus) {
Grant Grundlerfed99b12009-04-20 04:28:22 +0000991 printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (duplicate bus number %d?)\n",
Kay Sieversd4995242009-01-26 03:53:16 +0000992 dev_name(&dev->dev), dino_current_bus);
Bjorn Helgaas7590e502011-10-28 16:27:12 -0600993 pci_free_resource_list(&resources);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700994 /* increment the bus number in case of duplicates */
995 dino_current_bus++;
Bjorn Helgaasc4e06572011-10-28 16:27:07 -0600996 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700997 }
Bjorn Helgaasc4e06572011-10-28 16:27:07 -0600998
Yinghai Lu30aa80d2012-05-17 18:51:12 -0700999 max = pci_scan_child_bus(bus);
1000 pci_bus_update_busn_res_end(bus, max);
Bjorn Helgaasc4e06572011-10-28 16:27:07 -06001001
1002 /* This code *depends* on scanning being single threaded
1003 * if it isn't, this global bus number count will fail
1004 */
Yinghai Lu30aa80d2012-05-17 18:51:12 -07001005 dino_current_bus = max + 1;
Bjorn Helgaasc4e06572011-10-28 16:27:07 -06001006 pci_bus_assign_resources(bus);
1007 pci_bus_add_devices(bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001008 return 0;
1009}
1010
1011/*
1012 * Normally, we would just test sversion. But the Elroy PCI adapter has
1013 * the same sversion as Dino, so we have to check hversion as well.
1014 * Unfortunately, the J2240 PDC reports the wrong hversion for the first
1015 * Dino, so we have to test for Dino, Cujo and Dino-in-a-J2240.
1016 * For card-mode Dino, most machines report an sversion of 9D. But 715
1017 * and 725 firmware misreport it as 0x08080 for no adequately explained
1018 * reason.
1019 */
1020static struct parisc_device_id dino_tbl[] = {
1021 { HPHW_A_DMA, HVERSION_REV_ANY_ID, 0x004, 0x0009D },/* Card-mode Dino */
1022 { HPHW_A_DMA, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x08080 }, /* XXX */
1023 { HPHW_BRIDGE, HVERSION_REV_ANY_ID, 0x680, 0xa }, /* Bridge-mode Dino */
1024 { HPHW_BRIDGE, HVERSION_REV_ANY_ID, 0x682, 0xa }, /* Bridge-mode Cujo */
1025 { HPHW_BRIDGE, HVERSION_REV_ANY_ID, 0x05d, 0xa }, /* Dino in a J2240 */
1026 { 0, }
1027};
1028
1029static struct parisc_driver dino_driver = {
Matthew Wilcoxbdad1f82005-10-21 22:36:23 -04001030 .name = "dino",
Linus Torvalds1da177e2005-04-16 15:20:36 -07001031 .id_table = dino_tbl,
Matthew Wilcoxbdad1f82005-10-21 22:36:23 -04001032 .probe = dino_probe,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001033};
1034
1035/*
1036 * One time initialization to let the world know Dino is here.
1037 * This is the only routine which is NOT static.
1038 * Must be called exactly once before pci_init().
1039 */
1040int __init dino_init(void)
1041{
1042 register_parisc_driver(&dino_driver);
1043 return 0;
1044}
1045