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Thomas Abraham30574f02012-09-07 06:07:19 +09001/*
2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
8 *
9 * Author: Thomas Abraham <thomas.ab@samsung.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 */
16
17#ifndef __PINCTRL_SAMSUNG_H
18#define __PINCTRL_SAMSUNG_H
19
20#include <linux/pinctrl/pinctrl.h>
21#include <linux/pinctrl/pinmux.h>
22#include <linux/pinctrl/pinconf.h>
23#include <linux/pinctrl/consumer.h>
24#include <linux/pinctrl/machine.h>
25
Tomasz Figad3a7b9e2012-10-11 10:11:17 +020026#include <linux/gpio.h>
27
Thomas Abraham30574f02012-09-07 06:07:19 +090028/* pinmux function number for pin as gpio output line */
Tomasz Figaf6a82492014-08-09 01:48:05 +020029#define FUNC_INPUT 0x0
Thomas Abraham30574f02012-09-07 06:07:19 +090030#define FUNC_OUTPUT 0x1
31
32/**
33 * enum pincfg_type - possible pin configuration types supported.
Tomasz Figa499147c2013-03-18 22:31:52 +010034 * @PINCFG_TYPE_FUNC: Function configuration.
35 * @PINCFG_TYPE_DAT: Pin value configuration.
Thomas Abraham30574f02012-09-07 06:07:19 +090036 * @PINCFG_TYPE_PUD: Pull up/down configuration.
37 * @PINCFG_TYPE_DRV: Drive strength configuration.
38 * @PINCFG_TYPE_CON_PDN: Pin function in power down mode.
39 * @PINCFG_TYPE_PUD_PDN: Pull up/down configuration in power down mode.
40 */
41enum pincfg_type {
Tomasz Figa499147c2013-03-18 22:31:52 +010042 PINCFG_TYPE_FUNC,
43 PINCFG_TYPE_DAT,
Thomas Abraham30574f02012-09-07 06:07:19 +090044 PINCFG_TYPE_PUD,
45 PINCFG_TYPE_DRV,
46 PINCFG_TYPE_CON_PDN,
47 PINCFG_TYPE_PUD_PDN,
Tomasz Figa499147c2013-03-18 22:31:52 +010048
49 PINCFG_TYPE_NUM
Thomas Abraham30574f02012-09-07 06:07:19 +090050};
51
52/*
53 * pin configuration (pull up/down and drive strength) type and its value are
54 * packed together into a 16-bits. The upper 8-bits represent the configuration
55 * type and the lower 8-bits hold the value of the configuration type.
56 */
57#define PINCFG_TYPE_MASK 0xFF
58#define PINCFG_VALUE_SHIFT 8
59#define PINCFG_VALUE_MASK (0xFF << PINCFG_VALUE_SHIFT)
60#define PINCFG_PACK(type, value) (((value) << PINCFG_VALUE_SHIFT) | type)
61#define PINCFG_UNPACK_TYPE(cfg) ((cfg) & PINCFG_TYPE_MASK)
62#define PINCFG_UNPACK_VALUE(cfg) (((cfg) & PINCFG_VALUE_MASK) >> \
63 PINCFG_VALUE_SHIFT)
64/**
65 * enum eint_type - possible external interrupt types.
66 * @EINT_TYPE_NONE: bank does not support external interrupts
67 * @EINT_TYPE_GPIO: bank supportes external gpio interrupts
68 * @EINT_TYPE_WKUP: bank supportes external wakeup interrupts
Tomasz Figaa04b07c2012-10-11 10:11:18 +020069 * @EINT_TYPE_WKUP_MUX: bank supports multiplexed external wakeup interrupts
Thomas Abraham30574f02012-09-07 06:07:19 +090070 *
71 * Samsung GPIO controller groups all the available pins into banks. The pins
72 * in a pin bank can support external gpio interrupts or external wakeup
73 * interrupts or no interrupts at all. From a software perspective, the only
74 * difference between external gpio and external wakeup interrupts is that
75 * the wakeup interrupts can additionally wakeup the system if it is in
76 * suspended state.
77 */
78enum eint_type {
79 EINT_TYPE_NONE,
80 EINT_TYPE_GPIO,
81 EINT_TYPE_WKUP,
Tomasz Figaa04b07c2012-10-11 10:11:18 +020082 EINT_TYPE_WKUP_MUX,
Thomas Abraham30574f02012-09-07 06:07:19 +090083};
84
85/* maximum length of a pin in pin descriptor (example: "gpa0-0") */
86#define PIN_NAME_LENGTH 10
87
88#define PIN_GROUP(n, p, f) \
89 { \
90 .name = n, \
91 .pins = p, \
92 .num_pins = ARRAY_SIZE(p), \
93 .func = f \
94 }
95
96#define PMX_FUNC(n, g) \
97 { \
98 .name = n, \
99 .groups = g, \
100 .num_groups = ARRAY_SIZE(g), \
101 }
102
103struct samsung_pinctrl_drv_data;
104
105/**
Tomasz Figa499147c2013-03-18 22:31:52 +0100106 * struct samsung_pin_bank_type: pin bank type description
107 * @fld_width: widths of configuration bitfields (0 if unavailable)
Tomasz Figa43fc9e72013-03-18 22:31:53 +0100108 * @reg_offset: offsets of configuration registers (don't care of width is 0)
Tomasz Figa499147c2013-03-18 22:31:52 +0100109 */
110struct samsung_pin_bank_type {
111 u8 fld_width[PINCFG_TYPE_NUM];
Tomasz Figa43fc9e72013-03-18 22:31:53 +0100112 u8 reg_offset[PINCFG_TYPE_NUM];
Tomasz Figa499147c2013-03-18 22:31:52 +0100113};
114
115/**
Thomas Abraham30574f02012-09-07 06:07:19 +0900116 * struct samsung_pin_bank: represent a controller pin-bank.
Tomasz Figa499147c2013-03-18 22:31:52 +0100117 * @type: type of the bank (register offsets and bitfield widths)
Sachin Kamat88f23242012-12-10 09:45:55 +0900118 * @pctl_offset: starting offset of the pin-bank registers.
Thomas Abraham30574f02012-09-07 06:07:19 +0900119 * @pin_base: starting pin number of the bank.
120 * @nr_pins: number of pins included in this bank.
Tomasz Figa61dd7262013-03-18 22:31:55 +0100121 * @eint_func: function to set in CON register to configure pin as EINT.
Thomas Abraham30574f02012-09-07 06:07:19 +0900122 * @eint_type: type of the external interrupt supported by the bank.
Tomasz Figa61dd7262013-03-18 22:31:55 +0100123 * @eint_mask: bit mask of pins which support EINT function.
Thomas Abraham30574f02012-09-07 06:07:19 +0900124 * @name: name to be prefixed for each pin in this pin bank.
Tomasz Figaab663782012-10-11 10:11:13 +0200125 * @of_node: OF node of the bank.
Tomasz Figa6defe9a2012-10-11 10:11:14 +0200126 * @drvdata: link to controller driver data
Tomasz Figa595be722012-10-11 10:11:16 +0200127 * @irq_domain: IRQ domain of the bank.
Tomasz Figad3a7b9e2012-10-11 10:11:17 +0200128 * @gpio_chip: GPIO chip of the bank.
129 * @grange: linux gpio pin range supported by this bank.
Tomasz Figa19846952013-03-18 22:31:50 +0100130 * @slock: spinlock protecting bank registers
Doug Andersond9f99862013-05-16 21:33:18 -0700131 * @pm_save: saved register values during suspend
Thomas Abraham30574f02012-09-07 06:07:19 +0900132 */
133struct samsung_pin_bank {
Tomasz Figa499147c2013-03-18 22:31:52 +0100134 struct samsung_pin_bank_type *type;
Thomas Abraham30574f02012-09-07 06:07:19 +0900135 u32 pctl_offset;
136 u32 pin_base;
137 u8 nr_pins;
Tomasz Figa61dd7262013-03-18 22:31:55 +0100138 u8 eint_func;
Thomas Abraham30574f02012-09-07 06:07:19 +0900139 enum eint_type eint_type;
Tomasz Figa61dd7262013-03-18 22:31:55 +0100140 u32 eint_mask;
Tomasz Figa1b6056d2012-10-11 10:11:15 +0200141 u32 eint_offset;
Thomas Abraham30574f02012-09-07 06:07:19 +0900142 char *name;
Tomasz Figa33854742013-05-17 18:24:31 +0200143 void *soc_priv;
Tomasz Figaab663782012-10-11 10:11:13 +0200144 struct device_node *of_node;
Tomasz Figa6defe9a2012-10-11 10:11:14 +0200145 struct samsung_pinctrl_drv_data *drvdata;
Tomasz Figa595be722012-10-11 10:11:16 +0200146 struct irq_domain *irq_domain;
Tomasz Figad3a7b9e2012-10-11 10:11:17 +0200147 struct gpio_chip gpio_chip;
148 struct pinctrl_gpio_range grange;
Tomasz Figa19846952013-03-18 22:31:50 +0100149 spinlock_t slock;
Doug Andersond9f99862013-05-16 21:33:18 -0700150
151 u32 pm_save[PINCFG_TYPE_NUM + 1]; /* +1 to handle double CON registers*/
Thomas Abraham30574f02012-09-07 06:07:19 +0900152};
153
154/**
155 * struct samsung_pin_ctrl: represent a pin controller.
156 * @pin_banks: list of pin banks included in this controller.
157 * @nr_banks: number of pin banks.
158 * @base: starting system wide pin number.
159 * @nr_pins: number of pins supported by the controller.
Thomas Abraham30574f02012-09-07 06:07:19 +0900160 * @eint_gpio_init: platform specific callback to setup the external gpio
161 * interrupts for the controller.
162 * @eint_wkup_init: platform specific callback to setup the external wakeup
163 * interrupts for the controller.
164 * @label: for debug information.
165 */
166struct samsung_pin_ctrl {
167 struct samsung_pin_bank *pin_banks;
168 u32 nr_banks;
169
170 u32 base;
171 u32 nr_pins;
Thomas Abraham30574f02012-09-07 06:07:19 +0900172
Thomas Abraham30574f02012-09-07 06:07:19 +0900173 int (*eint_gpio_init)(struct samsung_pinctrl_drv_data *);
174 int (*eint_wkup_init)(struct samsung_pinctrl_drv_data *);
Tomasz Figa21c21992013-05-17 18:24:30 +0200175 void (*suspend)(struct samsung_pinctrl_drv_data *);
176 void (*resume)(struct samsung_pinctrl_drv_data *);
177
Thomas Abraham30574f02012-09-07 06:07:19 +0900178 char *label;
179};
180
181/**
182 * struct samsung_pinctrl_drv_data: wrapper for holding driver data together.
Doug Andersond9f99862013-05-16 21:33:18 -0700183 * @node: global list node
Thomas Abraham30574f02012-09-07 06:07:19 +0900184 * @virt_base: register base address of the controller.
185 * @dev: device instance representing the controller.
186 * @irq: interrpt number used by the controller to notify gpio interrupts.
187 * @ctrl: pin controller instance managed by the driver.
188 * @pctl: pin controller descriptor registered with the pinctrl subsystem.
189 * @pctl_dev: cookie representing pinctrl device instance.
190 * @pin_groups: list of pin groups available to the driver.
191 * @nr_groups: number of such pin groups.
192 * @pmx_functions: list of pin functions available to the driver.
193 * @nr_function: number of such pin functions.
Thomas Abraham30574f02012-09-07 06:07:19 +0900194 */
195struct samsung_pinctrl_drv_data {
Doug Andersond9f99862013-05-16 21:33:18 -0700196 struct list_head node;
Thomas Abraham30574f02012-09-07 06:07:19 +0900197 void __iomem *virt_base;
198 struct device *dev;
199 int irq;
200
201 struct samsung_pin_ctrl *ctrl;
202 struct pinctrl_desc pctl;
203 struct pinctrl_dev *pctl_dev;
204
205 const struct samsung_pin_group *pin_groups;
206 unsigned int nr_groups;
207 const struct samsung_pmx_func *pmx_functions;
208 unsigned int nr_functions;
Thomas Abraham30574f02012-09-07 06:07:19 +0900209};
210
211/**
212 * struct samsung_pin_group: represent group of pins of a pinmux function.
213 * @name: name of the pin group, used to lookup the group.
214 * @pins: the pins included in this group.
215 * @num_pins: number of pins included in this group.
216 * @func: the function number to be programmed when selected.
217 */
218struct samsung_pin_group {
219 const char *name;
220 const unsigned int *pins;
221 u8 num_pins;
222 u8 func;
223};
224
225/**
226 * struct samsung_pmx_func: represent a pin function.
227 * @name: name of the pin function, used to lookup the function.
228 * @groups: one or more names of pin groups that provide this function.
229 * @num_groups: number of groups included in @groups.
230 */
231struct samsung_pmx_func {
232 const char *name;
233 const char **groups;
234 u8 num_groups;
Tomasz Figa9a2c1c32014-07-02 17:41:03 +0200235 u32 val;
Thomas Abraham30574f02012-09-07 06:07:19 +0900236};
237
238/* list of all exported SoC specific data */
Tomasz Figad97f5b92014-04-14 10:45:47 +0900239extern struct samsung_pin_ctrl exynos3250_pin_ctrl[];
Thomas Abraham30574f02012-09-07 06:07:19 +0900240extern struct samsung_pin_ctrl exynos4210_pin_ctrl[];
Tomasz Figa6edc7942012-11-07 08:44:59 +0900241extern struct samsung_pin_ctrl exynos4x12_pin_ctrl[];
Thomas Abrahamf67faf42012-12-28 10:37:27 -0800242extern struct samsung_pin_ctrl exynos5250_pin_ctrl[];
Young-Gun Jang9a8b6072014-02-05 11:51:28 +0530243extern struct samsung_pin_ctrl exynos5260_pin_ctrl[];
Leela Krishna Amudala983dbeb2013-06-19 22:16:26 +0900244extern struct samsung_pin_ctrl exynos5420_pin_ctrl[];
Tomasz Figa61dd7262013-03-18 22:31:55 +0100245extern struct samsung_pin_ctrl s3c64xx_pin_ctrl[];
Heiko Stuebneraf99a752013-05-21 00:56:13 +0900246extern struct samsung_pin_ctrl s3c2412_pin_ctrl[];
247extern struct samsung_pin_ctrl s3c2416_pin_ctrl[];
248extern struct samsung_pin_ctrl s3c2440_pin_ctrl[];
249extern struct samsung_pin_ctrl s3c2450_pin_ctrl[];
Mateusz Krawczuk608a26a2013-08-27 15:08:10 +0200250extern struct samsung_pin_ctrl s5pv210_pin_ctrl[];
Thomas Abraham30574f02012-09-07 06:07:19 +0900251
252#endif /* __PINCTRL_SAMSUNG_H */