Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 1 | /* |
| 2 | * File: drivers/pci/pcie/aspm.c |
| 3 | * Enabling PCIE link L0s/L1 state and Clock Power Management |
| 4 | * |
| 5 | * Copyright (C) 2007 Intel |
| 6 | * Copyright (C) Zhang Yanmin (yanmin.zhang@intel.com) |
| 7 | * Copyright (C) Shaohua Li (shaohua.li@intel.com) |
| 8 | */ |
| 9 | |
| 10 | #include <linux/kernel.h> |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/moduleparam.h> |
| 13 | #include <linux/pci.h> |
| 14 | #include <linux/pci_regs.h> |
| 15 | #include <linux/errno.h> |
| 16 | #include <linux/pm.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/slab.h> |
Thomas Renninger | 2a42d9d | 2008-12-09 13:05:09 +0100 | [diff] [blame] | 19 | #include <linux/jiffies.h> |
Andrew Patterson | 987a4c7 | 2009-01-05 16:21:04 -0700 | [diff] [blame] | 20 | #include <linux/delay.h> |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 21 | #include <linux/pci-aspm.h> |
| 22 | #include "../pci.h" |
| 23 | |
| 24 | #ifdef MODULE_PARAM_PREFIX |
| 25 | #undef MODULE_PARAM_PREFIX |
| 26 | #endif |
| 27 | #define MODULE_PARAM_PREFIX "pcie_aspm." |
| 28 | |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 29 | struct aspm_latency { |
| 30 | u32 l0s; /* L0s latency (nsec) */ |
| 31 | u32 l1; /* L1 latency (nsec) */ |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 32 | }; |
| 33 | |
| 34 | struct pcie_link_state { |
Kenji Kaneshige | 5cde89d | 2009-05-13 12:17:04 +0900 | [diff] [blame] | 35 | struct pci_dev *pdev; /* Upstream component of the Link */ |
| 36 | struct pcie_link_state *parent; /* pointer to the parent Link state */ |
| 37 | struct list_head sibling; /* node in link_list */ |
| 38 | struct list_head children; /* list of child link states */ |
| 39 | struct list_head link; /* node in parent's children list */ |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 40 | |
| 41 | /* ASPM state */ |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 42 | u32 aspm_support:2; /* Supported ASPM state */ |
| 43 | u32 aspm_enabled:2; /* Enabled ASPM state */ |
| 44 | u32 aspm_default:2; /* Default ASPM state by BIOS */ |
| 45 | |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 46 | /* Clock PM state */ |
| 47 | u32 clkpm_capable:1; /* Clock PM capable? */ |
| 48 | u32 clkpm_enabled:1; /* Current Clock PM state */ |
| 49 | u32 clkpm_default:1; /* Default Clock PM state by BIOS */ |
| 50 | |
Kenji Kaneshige | 5cde89d | 2009-05-13 12:17:04 +0900 | [diff] [blame] | 51 | u32 has_switch:1; /* Downstream has switches? */ |
| 52 | |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 53 | /* Latencies */ |
| 54 | struct aspm_latency latency; /* Exit latency */ |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 55 | /* |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 56 | * Endpoint acceptable latencies. A pcie downstream port only |
| 57 | * has one slot under it, so at most there are 8 functions. |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 58 | */ |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 59 | struct aspm_latency acceptable[8]; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 60 | }; |
| 61 | |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 62 | static int aspm_disabled, aspm_force; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 63 | static DEFINE_MUTEX(aspm_lock); |
| 64 | static LIST_HEAD(link_list); |
| 65 | |
| 66 | #define POLICY_DEFAULT 0 /* BIOS default setting */ |
| 67 | #define POLICY_PERFORMANCE 1 /* high performance */ |
| 68 | #define POLICY_POWERSAVE 2 /* high power saving */ |
| 69 | static int aspm_policy; |
| 70 | static const char *policy_str[] = { |
| 71 | [POLICY_DEFAULT] = "default", |
| 72 | [POLICY_PERFORMANCE] = "performance", |
| 73 | [POLICY_POWERSAVE] = "powersave" |
| 74 | }; |
| 75 | |
Andrew Patterson | 987a4c7 | 2009-01-05 16:21:04 -0700 | [diff] [blame] | 76 | #define LINK_RETRAIN_TIMEOUT HZ |
| 77 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 78 | static int policy_to_aspm_state(struct pcie_link_state *link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 79 | { |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 80 | switch (aspm_policy) { |
| 81 | case POLICY_PERFORMANCE: |
| 82 | /* Disable ASPM and Clock PM */ |
| 83 | return 0; |
| 84 | case POLICY_POWERSAVE: |
| 85 | /* Enable ASPM L0s/L1 */ |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 86 | return PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 87 | case POLICY_DEFAULT: |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 88 | return link->aspm_default; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 89 | } |
| 90 | return 0; |
| 91 | } |
| 92 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 93 | static int policy_to_clkpm_state(struct pcie_link_state *link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 94 | { |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 95 | switch (aspm_policy) { |
| 96 | case POLICY_PERFORMANCE: |
| 97 | /* Disable ASPM and Clock PM */ |
| 98 | return 0; |
| 99 | case POLICY_POWERSAVE: |
| 100 | /* Disable Clock PM */ |
| 101 | return 1; |
| 102 | case POLICY_DEFAULT: |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 103 | return link->clkpm_default; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 104 | } |
| 105 | return 0; |
| 106 | } |
| 107 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 108 | static void pcie_set_clock_pm(struct pcie_link_state *link, int enable) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 109 | { |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 110 | int pos; |
| 111 | u16 reg16; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 112 | struct pci_dev *child; |
| 113 | struct pci_bus *linkbus = link->pdev->subordinate; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 114 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 115 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
| 116 | pos = pci_find_capability(child, PCI_CAP_ID_EXP); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 117 | if (!pos) |
| 118 | return; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 119 | pci_read_config_word(child, pos + PCI_EXP_LNKCTL, ®16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 120 | if (enable) |
| 121 | reg16 |= PCI_EXP_LNKCTL_CLKREQ_EN; |
| 122 | else |
| 123 | reg16 &= ~PCI_EXP_LNKCTL_CLKREQ_EN; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 124 | pci_write_config_word(child, pos + PCI_EXP_LNKCTL, reg16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 125 | } |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 126 | link->clkpm_enabled = !!enable; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 127 | } |
| 128 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 129 | static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 130 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 131 | int pos, capable = 1, enabled = 1; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 132 | u32 reg32; |
| 133 | u16 reg16; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 134 | struct pci_dev *child; |
| 135 | struct pci_bus *linkbus = link->pdev->subordinate; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 136 | |
| 137 | /* All functions should have the same cap and state, take the worst */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 138 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
| 139 | pos = pci_find_capability(child, PCI_CAP_ID_EXP); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 140 | if (!pos) |
| 141 | return; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 142 | pci_read_config_dword(child, pos + PCI_EXP_LNKCAP, ®32); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 143 | if (!(reg32 & PCI_EXP_LNKCAP_CLKPM)) { |
| 144 | capable = 0; |
| 145 | enabled = 0; |
| 146 | break; |
| 147 | } |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 148 | pci_read_config_word(child, pos + PCI_EXP_LNKCTL, ®16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 149 | if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN)) |
| 150 | enabled = 0; |
| 151 | } |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 152 | link->clkpm_enabled = enabled; |
| 153 | link->clkpm_default = enabled; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 154 | link->clkpm_capable = (blacklist) ? 0 : capable; |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 155 | } |
| 156 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 157 | static bool pcie_aspm_downstream_has_switch(struct pcie_link_state *link) |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 158 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 159 | struct pci_dev *child; |
| 160 | struct pci_bus *linkbus = link->pdev->subordinate; |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 161 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 162 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
| 163 | if (child->pcie_type == PCI_EXP_TYPE_UPSTREAM) |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 164 | return true; |
| 165 | } |
| 166 | return false; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 167 | } |
| 168 | |
| 169 | /* |
| 170 | * pcie_aspm_configure_common_clock: check if the 2 ends of a link |
| 171 | * could use common clock. If they are, configure them to use the |
| 172 | * common clock. That will reduce the ASPM state exit latency. |
| 173 | */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 174 | static void pcie_aspm_configure_common_clock(struct pcie_link_state *link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 175 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 176 | int ppos, cpos, same_clock = 1; |
| 177 | u16 reg16, parent_reg, child_reg[8]; |
Thomas Renninger | 2a42d9d | 2008-12-09 13:05:09 +0100 | [diff] [blame] | 178 | unsigned long start_jiffies; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 179 | struct pci_dev *child, *parent = link->pdev; |
| 180 | struct pci_bus *linkbus = parent->subordinate; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 181 | /* |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 182 | * All functions of a slot should have the same Slot Clock |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 183 | * Configuration, so just check one function |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 184 | */ |
| 185 | child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); |
| 186 | BUG_ON(!child->is_pcie); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 187 | |
| 188 | /* Check downstream component if bit Slot Clock Configuration is 1 */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 189 | cpos = pci_find_capability(child, PCI_CAP_ID_EXP); |
| 190 | pci_read_config_word(child, cpos + PCI_EXP_LNKSTA, ®16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 191 | if (!(reg16 & PCI_EXP_LNKSTA_SLC)) |
| 192 | same_clock = 0; |
| 193 | |
| 194 | /* Check upstream component if bit Slot Clock Configuration is 1 */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 195 | ppos = pci_find_capability(parent, PCI_CAP_ID_EXP); |
| 196 | pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, ®16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 197 | if (!(reg16 & PCI_EXP_LNKSTA_SLC)) |
| 198 | same_clock = 0; |
| 199 | |
| 200 | /* Configure downstream component, all functions */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 201 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
| 202 | cpos = pci_find_capability(child, PCI_CAP_ID_EXP); |
| 203 | pci_read_config_word(child, cpos + PCI_EXP_LNKCTL, ®16); |
| 204 | child_reg[PCI_FUNC(child->devfn)] = reg16; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 205 | if (same_clock) |
| 206 | reg16 |= PCI_EXP_LNKCTL_CCC; |
| 207 | else |
| 208 | reg16 &= ~PCI_EXP_LNKCTL_CCC; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 209 | pci_write_config_word(child, cpos + PCI_EXP_LNKCTL, reg16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | /* Configure upstream component */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 213 | pci_read_config_word(parent, ppos + PCI_EXP_LNKCTL, ®16); |
Thomas Renninger | 2a42d9d | 2008-12-09 13:05:09 +0100 | [diff] [blame] | 214 | parent_reg = reg16; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 215 | if (same_clock) |
| 216 | reg16 |= PCI_EXP_LNKCTL_CCC; |
| 217 | else |
| 218 | reg16 &= ~PCI_EXP_LNKCTL_CCC; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 219 | pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 220 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 221 | /* Retrain link */ |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 222 | reg16 |= PCI_EXP_LNKCTL_RL; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 223 | pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, reg16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 224 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 225 | /* Wait for link training end. Break out after waiting for timeout */ |
Thomas Renninger | 2a42d9d | 2008-12-09 13:05:09 +0100 | [diff] [blame] | 226 | start_jiffies = jiffies; |
Andrew Patterson | 987a4c7 | 2009-01-05 16:21:04 -0700 | [diff] [blame] | 227 | for (;;) { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 228 | pci_read_config_word(parent, ppos + PCI_EXP_LNKSTA, ®16); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 229 | if (!(reg16 & PCI_EXP_LNKSTA_LT)) |
| 230 | break; |
Andrew Patterson | 987a4c7 | 2009-01-05 16:21:04 -0700 | [diff] [blame] | 231 | if (time_after(jiffies, start_jiffies + LINK_RETRAIN_TIMEOUT)) |
| 232 | break; |
| 233 | msleep(1); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 234 | } |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 235 | if (!(reg16 & PCI_EXP_LNKSTA_LT)) |
| 236 | return; |
| 237 | |
| 238 | /* Training failed. Restore common clock configurations */ |
| 239 | dev_printk(KERN_ERR, &parent->dev, |
| 240 | "ASPM: Could not configure common clock\n"); |
| 241 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
| 242 | cpos = pci_find_capability(child, PCI_CAP_ID_EXP); |
| 243 | pci_write_config_word(child, cpos + PCI_EXP_LNKCTL, |
| 244 | child_reg[PCI_FUNC(child->devfn)]); |
Thomas Renninger | 2a42d9d | 2008-12-09 13:05:09 +0100 | [diff] [blame] | 245 | } |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 246 | pci_write_config_word(parent, ppos + PCI_EXP_LNKCTL, parent_reg); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 247 | } |
| 248 | |
| 249 | /* |
| 250 | * calc_L0S_latency: Convert L0s latency encoding to ns |
| 251 | */ |
| 252 | static unsigned int calc_L0S_latency(unsigned int latency_encoding, int ac) |
| 253 | { |
| 254 | unsigned int ns = 64; |
| 255 | |
| 256 | if (latency_encoding == 0x7) { |
| 257 | if (ac) |
| 258 | ns = -1U; |
| 259 | else |
| 260 | ns = 5*1000; /* > 4us */ |
| 261 | } else |
| 262 | ns *= (1 << latency_encoding); |
| 263 | return ns; |
| 264 | } |
| 265 | |
| 266 | /* |
| 267 | * calc_L1_latency: Convert L1 latency encoding to ns |
| 268 | */ |
| 269 | static unsigned int calc_L1_latency(unsigned int latency_encoding, int ac) |
| 270 | { |
| 271 | unsigned int ns = 1000; |
| 272 | |
| 273 | if (latency_encoding == 0x7) { |
| 274 | if (ac) |
| 275 | ns = -1U; |
| 276 | else |
| 277 | ns = 65*1000; /* > 64us */ |
| 278 | } else |
| 279 | ns *= (1 << latency_encoding); |
| 280 | return ns; |
| 281 | } |
| 282 | |
| 283 | static void pcie_aspm_get_cap_device(struct pci_dev *pdev, u32 *state, |
| 284 | unsigned int *l0s, unsigned int *l1, unsigned int *enabled) |
| 285 | { |
| 286 | int pos; |
| 287 | u16 reg16; |
| 288 | u32 reg32; |
| 289 | unsigned int latency; |
| 290 | |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 291 | *l0s = *l1 = *enabled = 0; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 292 | pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); |
| 293 | pci_read_config_dword(pdev, pos + PCI_EXP_LNKCAP, ®32); |
| 294 | *state = (reg32 & PCI_EXP_LNKCAP_ASPMS) >> 10; |
| 295 | if (*state != PCIE_LINK_STATE_L0S && |
| 296 | *state != (PCIE_LINK_STATE_L1|PCIE_LINK_STATE_L0S)) |
| 297 | *state = 0; |
| 298 | if (*state == 0) |
| 299 | return; |
| 300 | |
| 301 | latency = (reg32 & PCI_EXP_LNKCAP_L0SEL) >> 12; |
| 302 | *l0s = calc_L0S_latency(latency, 0); |
| 303 | if (*state & PCIE_LINK_STATE_L1) { |
| 304 | latency = (reg32 & PCI_EXP_LNKCAP_L1EL) >> 15; |
| 305 | *l1 = calc_L1_latency(latency, 0); |
| 306 | } |
| 307 | pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16); |
| 308 | *enabled = reg16 & (PCIE_LINK_STATE_L0S|PCIE_LINK_STATE_L1); |
| 309 | } |
| 310 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 311 | static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 312 | { |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 313 | u32 support, l0s, l1, enabled; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 314 | struct pci_dev *child, *parent = link->pdev; |
| 315 | struct pci_bus *linkbus = parent->subordinate; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 316 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 317 | if (blacklist) { |
| 318 | /* Set support state to 0, so we will disable ASPM later */ |
| 319 | link->aspm_support = 0; |
| 320 | link->aspm_default = 0; |
| 321 | link->aspm_enabled = PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1; |
| 322 | return; |
| 323 | } |
| 324 | |
| 325 | /* Configure common clock before checking latencies */ |
| 326 | pcie_aspm_configure_common_clock(link); |
| 327 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 328 | /* upstream component states */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 329 | pcie_aspm_get_cap_device(parent, &support, &l0s, &l1, &enabled); |
| 330 | link->aspm_support = support; |
| 331 | link->latency.l0s = l0s; |
| 332 | link->latency.l1 = l1; |
| 333 | link->aspm_enabled = enabled; |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 334 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 335 | /* downstream component states, all functions have the same setting */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 336 | child = list_entry(linkbus->devices.next, struct pci_dev, bus_list); |
| 337 | pcie_aspm_get_cap_device(child, &support, &l0s, &l1, &enabled); |
| 338 | link->aspm_support &= support; |
| 339 | link->latency.l0s = max_t(u32, link->latency.l0s, l0s); |
| 340 | link->latency.l1 = max_t(u32, link->latency.l1, l1); |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 341 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 342 | if (!link->aspm_support) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 343 | return; |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 344 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 345 | link->aspm_enabled &= link->aspm_support; |
| 346 | link->aspm_default = link->aspm_enabled; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 347 | |
| 348 | /* ENDPOINT states*/ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 349 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 350 | int pos; |
| 351 | u32 reg32; |
| 352 | unsigned int latency; |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 353 | struct aspm_latency *acceptable = |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 354 | &link->acceptable[PCI_FUNC(child->devfn)]; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 355 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 356 | if (child->pcie_type != PCI_EXP_TYPE_ENDPOINT && |
| 357 | child->pcie_type != PCI_EXP_TYPE_LEG_END) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 358 | continue; |
| 359 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 360 | pos = pci_find_capability(child, PCI_CAP_ID_EXP); |
| 361 | pci_read_config_dword(child, pos + PCI_EXP_DEVCAP, ®32); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 362 | latency = (reg32 & PCI_EXP_DEVCAP_L0S) >> 6; |
| 363 | latency = calc_L0S_latency(latency, 1); |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 364 | acceptable->l0s = latency; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 365 | if (link->aspm_support & PCIE_LINK_STATE_L1) { |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 366 | latency = (reg32 & PCI_EXP_DEVCAP_L1) >> 9; |
| 367 | latency = calc_L1_latency(latency, 1); |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 368 | acceptable->l1 = latency; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 369 | } |
| 370 | } |
| 371 | } |
| 372 | |
| 373 | static unsigned int __pcie_aspm_check_state_one(struct pci_dev *pdev, |
| 374 | unsigned int state) |
| 375 | { |
| 376 | struct pci_dev *parent_dev, *tmp_dev; |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 377 | unsigned int l1_latency = 0; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 378 | struct pcie_link_state *link_state; |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 379 | struct aspm_latency *acceptable; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 380 | |
| 381 | parent_dev = pdev->bus->self; |
| 382 | link_state = parent_dev->link_state; |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 383 | state &= link_state->aspm_support; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 384 | if (state == 0) |
| 385 | return 0; |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 386 | acceptable = &link_state->acceptable[PCI_FUNC(pdev->devfn)]; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 387 | |
| 388 | /* |
| 389 | * Check latency for endpoint device. |
| 390 | * TBD: The latency from the endpoint to root complex vary per |
| 391 | * switch's upstream link state above the device. Here we just do a |
| 392 | * simple check which assumes all links above the device can be in L1 |
| 393 | * state, that is we just consider the worst case. If switch's upstream |
| 394 | * link can't be put into L0S/L1, then our check is too strictly. |
| 395 | */ |
| 396 | tmp_dev = pdev; |
| 397 | while (state & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) { |
| 398 | parent_dev = tmp_dev->bus->self; |
| 399 | link_state = parent_dev->link_state; |
Kenji Kaneshige | b6c2e54 | 2009-05-13 12:14:58 +0900 | [diff] [blame] | 400 | if ((state & PCIE_LINK_STATE_L0S) && |
| 401 | (link_state->latency.l0s > acceptable->l0s)) |
| 402 | state &= ~PCIE_LINK_STATE_L0S; |
| 403 | |
| 404 | if ((state & PCIE_LINK_STATE_L1) && |
| 405 | (link_state->latency.l1 + l1_latency > acceptable->l1)) |
| 406 | state &= ~PCIE_LINK_STATE_L1; |
| 407 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 408 | if (!parent_dev->bus->self) /* parent_dev is a root port */ |
| 409 | break; |
| 410 | else { |
| 411 | /* |
| 412 | * parent_dev is the downstream port of a switch, make |
| 413 | * tmp_dev the upstream port of the switch |
| 414 | */ |
| 415 | tmp_dev = parent_dev->bus->self; |
| 416 | /* |
| 417 | * every switch on the path to root complex need 1 more |
| 418 | * microsecond for L1. Spec doesn't mention L0S. |
| 419 | */ |
| 420 | if (state & PCIE_LINK_STATE_L1) |
| 421 | l1_latency += 1000; |
| 422 | } |
| 423 | } |
| 424 | return state; |
| 425 | } |
| 426 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 427 | static u32 pcie_aspm_check_state(struct pcie_link_state *link, u32 state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 428 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 429 | pci_power_t power_state; |
| 430 | struct pci_dev *child; |
| 431 | struct pci_bus *linkbus = link->pdev->subordinate; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 432 | |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 433 | /* If no child, ignore the link */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 434 | if (list_empty(&linkbus->devices)) |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 435 | return state; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 436 | |
| 437 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
| 438 | /* |
| 439 | * If downstream component of a link is pci bridge, we |
| 440 | * disable ASPM for now for the link |
| 441 | */ |
| 442 | if (child->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) |
| 443 | return 0; |
| 444 | |
| 445 | if ((child->pcie_type != PCI_EXP_TYPE_ENDPOINT && |
| 446 | child->pcie_type != PCI_EXP_TYPE_LEG_END)) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 447 | continue; |
| 448 | /* Device not in D0 doesn't need check latency */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 449 | power_state = child->current_state; |
| 450 | if (power_state == PCI_D1 || power_state == PCI_D2 || |
| 451 | power_state == PCI_D3hot || power_state == PCI_D3cold) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 452 | continue; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 453 | state = __pcie_aspm_check_state_one(child, state); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 454 | } |
| 455 | return state; |
| 456 | } |
| 457 | |
| 458 | static void __pcie_aspm_config_one_dev(struct pci_dev *pdev, unsigned int state) |
| 459 | { |
| 460 | u16 reg16; |
| 461 | int pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); |
| 462 | |
| 463 | pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16); |
| 464 | reg16 &= ~0x3; |
| 465 | reg16 |= state; |
| 466 | pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16); |
| 467 | } |
| 468 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 469 | static void __pcie_aspm_config_link(struct pcie_link_state *link, u32 state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 470 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 471 | struct pci_dev *child, *parent = link->pdev; |
| 472 | struct pci_bus *linkbus = parent->subordinate; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 473 | |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 474 | /* If no child, disable the link */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 475 | if (list_empty(&linkbus->devices)) |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 476 | state = 0; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 477 | /* |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 478 | * If the downstream component has pci bridge function, don't |
| 479 | * do ASPM now. |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 480 | */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 481 | list_for_each_entry(child, &linkbus->devices, bus_list) { |
| 482 | if (child->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) |
| 483 | return; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 484 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 485 | /* |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 486 | * Spec 2.0 suggests all functions should be configured the |
| 487 | * same setting for ASPM. Enabling ASPM L1 should be done in |
| 488 | * upstream component first and then downstream, and vice |
| 489 | * versa for disabling ASPM L1. Spec doesn't mention L0S. |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 490 | */ |
| 491 | if (state & PCIE_LINK_STATE_L1) |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 492 | __pcie_aspm_config_one_dev(parent, state); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 493 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 494 | list_for_each_entry(child, &linkbus->devices, bus_list) |
| 495 | __pcie_aspm_config_one_dev(child, state); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 496 | |
| 497 | if (!(state & PCIE_LINK_STATE_L1)) |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 498 | __pcie_aspm_config_one_dev(parent, state); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 499 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 500 | link->aspm_enabled = state; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 501 | } |
| 502 | |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 503 | static struct pcie_link_state *get_root_port_link(struct pcie_link_state *link) |
| 504 | { |
| 505 | struct pcie_link_state *root_port_link = link; |
| 506 | while (root_port_link->parent) |
| 507 | root_port_link = root_port_link->parent; |
| 508 | return root_port_link; |
| 509 | } |
| 510 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 511 | /* Check the whole hierarchy, and configure each link in the hierarchy */ |
| 512 | static void __pcie_aspm_configure_link_state(struct pcie_link_state *link, |
| 513 | u32 state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 514 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 515 | struct pcie_link_state *leaf, *root = get_root_port_link(link); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 516 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 517 | state &= (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 518 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 519 | /* Check all links who have specific root port link */ |
Kenji Kaneshige | dc64cd1 | 2009-05-13 12:11:33 +0900 | [diff] [blame] | 520 | list_for_each_entry(leaf, &link_list, sibling) { |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 521 | if (!list_empty(&leaf->children) || |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 522 | get_root_port_link(leaf) != root) |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 523 | continue; |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 524 | state = pcie_aspm_check_state(leaf, state); |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 525 | } |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 526 | /* Check root port link too in case it hasn't children */ |
| 527 | state = pcie_aspm_check_state(root, state); |
| 528 | if (link->aspm_enabled == state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 529 | return; |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 530 | /* |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 531 | * We must change the hierarchy. See comments in |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 532 | * __pcie_aspm_config_link for the order |
| 533 | **/ |
| 534 | if (state & PCIE_LINK_STATE_L1) { |
Kenji Kaneshige | dc64cd1 | 2009-05-13 12:11:33 +0900 | [diff] [blame] | 535 | list_for_each_entry(leaf, &link_list, sibling) { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 536 | if (get_root_port_link(leaf) == root) |
| 537 | __pcie_aspm_config_link(leaf, state); |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 538 | } |
| 539 | } else { |
Kenji Kaneshige | dc64cd1 | 2009-05-13 12:11:33 +0900 | [diff] [blame] | 540 | list_for_each_entry_reverse(leaf, &link_list, sibling) { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 541 | if (get_root_port_link(leaf) == root) |
| 542 | __pcie_aspm_config_link(leaf, state); |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 543 | } |
| 544 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 545 | } |
| 546 | |
| 547 | /* |
| 548 | * pcie_aspm_configure_link_state: enable/disable PCI express link state |
| 549 | * @pdev: the root port or switch downstream port |
| 550 | */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 551 | static void pcie_aspm_configure_link_state(struct pcie_link_state *link, |
| 552 | u32 state) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 553 | { |
| 554 | down_read(&pci_bus_sem); |
| 555 | mutex_lock(&aspm_lock); |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 556 | __pcie_aspm_configure_link_state(link, state); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 557 | mutex_unlock(&aspm_lock); |
| 558 | up_read(&pci_bus_sem); |
| 559 | } |
| 560 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 561 | static void free_link_state(struct pcie_link_state *link) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 562 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 563 | link->pdev->link_state = NULL; |
| 564 | kfree(link); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 565 | } |
| 566 | |
Shaohua Li | ddc9753 | 2008-05-21 16:58:40 +0800 | [diff] [blame] | 567 | static int pcie_aspm_sanity_check(struct pci_dev *pdev) |
| 568 | { |
| 569 | struct pci_dev *child_dev; |
| 570 | int child_pos; |
Shaohua Li | 149e163 | 2008-07-23 10:32:31 +0800 | [diff] [blame] | 571 | u32 reg32; |
Shaohua Li | ddc9753 | 2008-05-21 16:58:40 +0800 | [diff] [blame] | 572 | |
| 573 | /* |
| 574 | * Some functions in a slot might not all be PCIE functions, very |
| 575 | * strange. Disable ASPM for the whole slot |
| 576 | */ |
| 577 | list_for_each_entry(child_dev, &pdev->subordinate->devices, bus_list) { |
| 578 | child_pos = pci_find_capability(child_dev, PCI_CAP_ID_EXP); |
| 579 | if (!child_pos) |
| 580 | return -EINVAL; |
Shaohua Li | 149e163 | 2008-07-23 10:32:31 +0800 | [diff] [blame] | 581 | |
| 582 | /* |
| 583 | * Disable ASPM for pre-1.1 PCIe device, we follow MS to use |
| 584 | * RBER bit to determine if a function is 1.1 version device |
| 585 | */ |
| 586 | pci_read_config_dword(child_dev, child_pos + PCI_EXP_DEVCAP, |
| 587 | ®32); |
Sitsofe Wheeler | e1f4f59 | 2008-09-16 14:27:13 +0100 | [diff] [blame] | 588 | if (!(reg32 & PCI_EXP_DEVCAP_RBER) && !aspm_force) { |
Vincent Legoll | f393d9b | 2008-10-12 12:26:12 +0200 | [diff] [blame] | 589 | dev_printk(KERN_INFO, &child_dev->dev, "disabling ASPM" |
| 590 | " on pre-1.1 PCIe device. You can enable it" |
| 591 | " with 'pcie_aspm=force'\n"); |
Shaohua Li | 149e163 | 2008-07-23 10:32:31 +0800 | [diff] [blame] | 592 | return -EINVAL; |
| 593 | } |
Shaohua Li | ddc9753 | 2008-05-21 16:58:40 +0800 | [diff] [blame] | 594 | } |
| 595 | return 0; |
| 596 | } |
| 597 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 598 | static struct pcie_link_state *pcie_aspm_setup_link_state(struct pci_dev *pdev) |
| 599 | { |
| 600 | struct pcie_link_state *link; |
| 601 | int blacklist = !!pcie_aspm_sanity_check(pdev); |
| 602 | |
| 603 | link = kzalloc(sizeof(*link), GFP_KERNEL); |
| 604 | if (!link) |
| 605 | return NULL; |
| 606 | INIT_LIST_HEAD(&link->sibling); |
| 607 | INIT_LIST_HEAD(&link->children); |
| 608 | INIT_LIST_HEAD(&link->link); |
| 609 | link->pdev = pdev; |
| 610 | link->has_switch = pcie_aspm_downstream_has_switch(link); |
| 611 | if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) { |
| 612 | struct pcie_link_state *parent; |
| 613 | parent = pdev->bus->parent->self->link_state; |
| 614 | if (!parent) { |
| 615 | kfree(link); |
| 616 | return NULL; |
| 617 | } |
| 618 | link->parent = parent; |
| 619 | list_add(&link->link, &parent->children); |
| 620 | } |
| 621 | list_add(&link->sibling, &link_list); |
| 622 | |
| 623 | pdev->link_state = link; |
| 624 | |
| 625 | /* Check ASPM capability */ |
| 626 | pcie_aspm_cap_init(link, blacklist); |
| 627 | |
| 628 | /* Check Clock PM capability */ |
| 629 | pcie_clkpm_cap_init(link, blacklist); |
| 630 | |
| 631 | return link; |
| 632 | } |
| 633 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 634 | /* |
| 635 | * pcie_aspm_init_link_state: Initiate PCI express link state. |
| 636 | * It is called after the pcie and its children devices are scaned. |
| 637 | * @pdev: the root port or switch downstream port |
| 638 | */ |
| 639 | void pcie_aspm_init_link_state(struct pci_dev *pdev) |
| 640 | { |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 641 | u32 state; |
| 642 | struct pcie_link_state *link; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 643 | |
| 644 | if (aspm_disabled || !pdev->is_pcie || pdev->link_state) |
| 645 | return; |
| 646 | if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 647 | pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 648 | return; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 649 | |
Shaohua Li | 8e822df | 2009-06-08 09:27:25 +0800 | [diff] [blame] | 650 | /* VIA has a strange chipset, root port is under a bridge */ |
| 651 | if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT && |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 652 | pdev->bus->self) |
Shaohua Li | 8e822df | 2009-06-08 09:27:25 +0800 | [diff] [blame] | 653 | return; |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 654 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 655 | down_read(&pci_bus_sem); |
| 656 | if (list_empty(&pdev->subordinate->devices)) |
| 657 | goto out; |
| 658 | |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 659 | mutex_lock(&aspm_lock); |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 660 | link = pcie_aspm_setup_link_state(pdev); |
| 661 | if (!link) |
| 662 | goto unlock; |
| 663 | /* |
| 664 | * Setup initial ASPM state |
| 665 | * |
| 666 | * If link has switch, delay the link config. The leaf link |
| 667 | * initialization will config the whole hierarchy. But we must |
| 668 | * make sure BIOS doesn't set unsupported link state. |
| 669 | */ |
| 670 | if (link->has_switch) { |
| 671 | state = pcie_aspm_check_state(link, link->aspm_default); |
| 672 | __pcie_aspm_config_link(link, state); |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 673 | } else { |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 674 | state = policy_to_aspm_state(link); |
| 675 | __pcie_aspm_configure_link_state(link, state); |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 676 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 677 | |
Kenji Kaneshige | 8d349ac | 2009-05-13 12:18:22 +0900 | [diff] [blame^] | 678 | /* Setup initial Clock PM state */ |
| 679 | state = (link->clkpm_capable) ? policy_to_clkpm_state(link) : 0; |
| 680 | pcie_set_clock_pm(link, state); |
| 681 | unlock: |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 682 | mutex_unlock(&aspm_lock); |
| 683 | out: |
| 684 | up_read(&pci_bus_sem); |
| 685 | } |
| 686 | |
| 687 | /* @pdev: the endpoint device */ |
| 688 | void pcie_aspm_exit_link_state(struct pci_dev *pdev) |
| 689 | { |
| 690 | struct pci_dev *parent = pdev->bus->self; |
| 691 | struct pcie_link_state *link_state = parent->link_state; |
| 692 | |
| 693 | if (aspm_disabled || !pdev->is_pcie || !parent || !link_state) |
| 694 | return; |
| 695 | if (parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT && |
| 696 | parent->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) |
| 697 | return; |
| 698 | down_read(&pci_bus_sem); |
| 699 | mutex_lock(&aspm_lock); |
| 700 | |
| 701 | /* |
| 702 | * All PCIe functions are in one slot, remove one function will remove |
Alex Chiang | 3419c75 | 2009-01-28 14:59:18 -0700 | [diff] [blame] | 703 | * the whole slot, so just wait until we are the last function left. |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 704 | */ |
Alex Chiang | 3419c75 | 2009-01-28 14:59:18 -0700 | [diff] [blame] | 705 | if (!list_is_last(&pdev->bus_list, &parent->subordinate->devices)) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 706 | goto out; |
| 707 | |
| 708 | /* All functions are removed, so just disable ASPM for the link */ |
| 709 | __pcie_aspm_config_one_dev(parent, 0); |
Kenji Kaneshige | dc64cd1 | 2009-05-13 12:11:33 +0900 | [diff] [blame] | 710 | list_del(&link_state->sibling); |
Shaohua Li | 46bbdfa | 2008-12-19 09:27:42 +0800 | [diff] [blame] | 711 | list_del(&link_state->link); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 712 | /* Clock PM is for endpoint device */ |
| 713 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 714 | free_link_state(link_state); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 715 | out: |
| 716 | mutex_unlock(&aspm_lock); |
| 717 | up_read(&pci_bus_sem); |
| 718 | } |
| 719 | |
| 720 | /* @pdev: the root port or switch downstream port */ |
| 721 | void pcie_aspm_pm_state_change(struct pci_dev *pdev) |
| 722 | { |
| 723 | struct pcie_link_state *link_state = pdev->link_state; |
| 724 | |
| 725 | if (aspm_disabled || !pdev->is_pcie || !pdev->link_state) |
| 726 | return; |
| 727 | if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && |
| 728 | pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) |
| 729 | return; |
| 730 | /* |
| 731 | * devices changed PM state, we should recheck if latency meets all |
| 732 | * functions' requirement |
| 733 | */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 734 | pcie_aspm_configure_link_state(link_state, link_state->aspm_enabled); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 735 | } |
| 736 | |
| 737 | /* |
| 738 | * pci_disable_link_state - disable pci device's link state, so the link will |
| 739 | * never enter specific states |
| 740 | */ |
| 741 | void pci_disable_link_state(struct pci_dev *pdev, int state) |
| 742 | { |
| 743 | struct pci_dev *parent = pdev->bus->self; |
| 744 | struct pcie_link_state *link_state; |
| 745 | |
| 746 | if (aspm_disabled || !pdev->is_pcie) |
| 747 | return; |
| 748 | if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT || |
| 749 | pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) |
| 750 | parent = pdev; |
| 751 | if (!parent || !parent->link_state) |
| 752 | return; |
| 753 | |
| 754 | down_read(&pci_bus_sem); |
| 755 | mutex_lock(&aspm_lock); |
| 756 | link_state = parent->link_state; |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 757 | link_state->aspm_support &= ~state; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 758 | if (state & PCIE_LINK_STATE_CLKPM) |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 759 | link_state->clkpm_capable = 0; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 760 | |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 761 | __pcie_aspm_configure_link_state(link_state, link_state->aspm_enabled); |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 762 | if (!link_state->clkpm_capable && link_state->clkpm_enabled) |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 763 | pcie_set_clock_pm(link_state, 0); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 764 | mutex_unlock(&aspm_lock); |
| 765 | up_read(&pci_bus_sem); |
| 766 | } |
| 767 | EXPORT_SYMBOL(pci_disable_link_state); |
| 768 | |
| 769 | static int pcie_aspm_set_policy(const char *val, struct kernel_param *kp) |
| 770 | { |
| 771 | int i; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 772 | struct pcie_link_state *link_state; |
| 773 | |
| 774 | for (i = 0; i < ARRAY_SIZE(policy_str); i++) |
| 775 | if (!strncmp(val, policy_str[i], strlen(policy_str[i]))) |
| 776 | break; |
| 777 | if (i >= ARRAY_SIZE(policy_str)) |
| 778 | return -EINVAL; |
| 779 | if (i == aspm_policy) |
| 780 | return 0; |
| 781 | |
| 782 | down_read(&pci_bus_sem); |
| 783 | mutex_lock(&aspm_lock); |
| 784 | aspm_policy = i; |
Kenji Kaneshige | dc64cd1 | 2009-05-13 12:11:33 +0900 | [diff] [blame] | 785 | list_for_each_entry(link_state, &link_list, sibling) { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 786 | __pcie_aspm_configure_link_state(link_state, |
| 787 | policy_to_aspm_state(link_state)); |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 788 | if (link_state->clkpm_capable && |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 789 | link_state->clkpm_enabled != policy_to_clkpm_state(link_state)) |
| 790 | pcie_set_clock_pm(link_state, |
| 791 | policy_to_clkpm_state(link_state)); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 792 | |
| 793 | } |
| 794 | mutex_unlock(&aspm_lock); |
| 795 | up_read(&pci_bus_sem); |
| 796 | return 0; |
| 797 | } |
| 798 | |
| 799 | static int pcie_aspm_get_policy(char *buffer, struct kernel_param *kp) |
| 800 | { |
| 801 | int i, cnt = 0; |
| 802 | for (i = 0; i < ARRAY_SIZE(policy_str); i++) |
| 803 | if (i == aspm_policy) |
| 804 | cnt += sprintf(buffer + cnt, "[%s] ", policy_str[i]); |
| 805 | else |
| 806 | cnt += sprintf(buffer + cnt, "%s ", policy_str[i]); |
| 807 | return cnt; |
| 808 | } |
| 809 | |
| 810 | module_param_call(policy, pcie_aspm_set_policy, pcie_aspm_get_policy, |
| 811 | NULL, 0644); |
| 812 | |
| 813 | #ifdef CONFIG_PCIEASPM_DEBUG |
| 814 | static ssize_t link_state_show(struct device *dev, |
| 815 | struct device_attribute *attr, |
| 816 | char *buf) |
| 817 | { |
| 818 | struct pci_dev *pci_device = to_pci_dev(dev); |
| 819 | struct pcie_link_state *link_state = pci_device->link_state; |
| 820 | |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 821 | return sprintf(buf, "%d\n", link_state->aspm_enabled); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 822 | } |
| 823 | |
| 824 | static ssize_t link_state_store(struct device *dev, |
| 825 | struct device_attribute *attr, |
| 826 | const char *buf, |
| 827 | size_t n) |
| 828 | { |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 829 | struct pci_dev *pdev = to_pci_dev(dev); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 830 | int state; |
| 831 | |
| 832 | if (n < 1) |
| 833 | return -EINVAL; |
| 834 | state = buf[0]-'0'; |
| 835 | if (state >= 0 && state <= 3) { |
| 836 | /* setup link aspm state */ |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 837 | pcie_aspm_configure_link_state(pdev->link_state, state); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 838 | return n; |
| 839 | } |
| 840 | |
| 841 | return -EINVAL; |
| 842 | } |
| 843 | |
| 844 | static ssize_t clk_ctl_show(struct device *dev, |
| 845 | struct device_attribute *attr, |
| 846 | char *buf) |
| 847 | { |
| 848 | struct pci_dev *pci_device = to_pci_dev(dev); |
| 849 | struct pcie_link_state *link_state = pci_device->link_state; |
| 850 | |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 851 | return sprintf(buf, "%d\n", link_state->clkpm_enabled); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 852 | } |
| 853 | |
| 854 | static ssize_t clk_ctl_store(struct device *dev, |
| 855 | struct device_attribute *attr, |
| 856 | const char *buf, |
| 857 | size_t n) |
| 858 | { |
| 859 | struct pci_dev *pci_device = to_pci_dev(dev); |
| 860 | int state; |
| 861 | |
| 862 | if (n < 1) |
| 863 | return -EINVAL; |
| 864 | state = buf[0]-'0'; |
| 865 | |
| 866 | down_read(&pci_bus_sem); |
| 867 | mutex_lock(&aspm_lock); |
Kenji Kaneshige | 5aa6358 | 2009-05-13 12:17:44 +0900 | [diff] [blame] | 868 | pcie_set_clock_pm(pci_device->link_state, !!state); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 869 | mutex_unlock(&aspm_lock); |
| 870 | up_read(&pci_bus_sem); |
| 871 | |
| 872 | return n; |
| 873 | } |
| 874 | |
| 875 | static DEVICE_ATTR(link_state, 0644, link_state_show, link_state_store); |
| 876 | static DEVICE_ATTR(clk_ctl, 0644, clk_ctl_show, clk_ctl_store); |
| 877 | |
| 878 | static char power_group[] = "power"; |
| 879 | void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev) |
| 880 | { |
| 881 | struct pcie_link_state *link_state = pdev->link_state; |
| 882 | |
| 883 | if (!pdev->is_pcie || (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && |
| 884 | pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state) |
| 885 | return; |
| 886 | |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 887 | if (link_state->aspm_support) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 888 | sysfs_add_file_to_group(&pdev->dev.kobj, |
| 889 | &dev_attr_link_state.attr, power_group); |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 890 | if (link_state->clkpm_capable) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 891 | sysfs_add_file_to_group(&pdev->dev.kobj, |
| 892 | &dev_attr_clk_ctl.attr, power_group); |
| 893 | } |
| 894 | |
| 895 | void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev) |
| 896 | { |
| 897 | struct pcie_link_state *link_state = pdev->link_state; |
| 898 | |
| 899 | if (!pdev->is_pcie || (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && |
| 900 | pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state) |
| 901 | return; |
| 902 | |
Kenji Kaneshige | 80bfdbe | 2009-05-13 12:12:43 +0900 | [diff] [blame] | 903 | if (link_state->aspm_support) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 904 | sysfs_remove_file_from_group(&pdev->dev.kobj, |
| 905 | &dev_attr_link_state.attr, power_group); |
Kenji Kaneshige | 4d246e4 | 2009-05-13 12:15:38 +0900 | [diff] [blame] | 906 | if (link_state->clkpm_capable) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 907 | sysfs_remove_file_from_group(&pdev->dev.kobj, |
| 908 | &dev_attr_clk_ctl.attr, power_group); |
| 909 | } |
| 910 | #endif |
| 911 | |
| 912 | static int __init pcie_aspm_disable(char *str) |
| 913 | { |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 914 | if (!strcmp(str, "off")) { |
| 915 | aspm_disabled = 1; |
| 916 | printk(KERN_INFO "PCIe ASPM is disabled\n"); |
| 917 | } else if (!strcmp(str, "force")) { |
| 918 | aspm_force = 1; |
| 919 | printk(KERN_INFO "PCIe ASPM is forcedly enabled\n"); |
| 920 | } |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 921 | return 1; |
| 922 | } |
| 923 | |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 924 | __setup("pcie_aspm=", pcie_aspm_disable); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 925 | |
Shaohua Li | 5fde244 | 2008-07-23 10:32:24 +0800 | [diff] [blame] | 926 | void pcie_no_aspm(void) |
| 927 | { |
Shaohua Li | d6d3857 | 2008-07-23 10:32:42 +0800 | [diff] [blame] | 928 | if (!aspm_force) |
| 929 | aspm_disabled = 1; |
Shaohua Li | 5fde244 | 2008-07-23 10:32:24 +0800 | [diff] [blame] | 930 | } |
| 931 | |
Andrew Patterson | 3e1b160 | 2008-11-10 15:30:55 -0700 | [diff] [blame] | 932 | /** |
| 933 | * pcie_aspm_enabled - is PCIe ASPM enabled? |
| 934 | * |
| 935 | * Returns true if ASPM has not been disabled by the command-line option |
| 936 | * pcie_aspm=off. |
| 937 | **/ |
| 938 | int pcie_aspm_enabled(void) |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 939 | { |
Andrew Patterson | 3e1b160 | 2008-11-10 15:30:55 -0700 | [diff] [blame] | 940 | return !aspm_disabled; |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 941 | } |
Andrew Patterson | 3e1b160 | 2008-11-10 15:30:55 -0700 | [diff] [blame] | 942 | EXPORT_SYMBOL(pcie_aspm_enabled); |
Shaohua Li | 7d715a6 | 2008-02-25 09:46:41 +0800 | [diff] [blame] | 943 | |