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FUJITA Tomonori216bf582010-03-10 15:23:42 -08001 Dynamic DMA mapping Guide
2 =========================
Linus Torvalds1da177e2005-04-16 15:20:36 -07003
4 David S. Miller <davem@redhat.com>
5 Richard Henderson <rth@cygnus.com>
6 Jakub Jelinek <jakub@redhat.com>
7
FUJITA Tomonori216bf582010-03-10 15:23:42 -08008This is a guide to device driver writers on how to use the DMA API
9with example pseudo-code. For a concise description of the API, see
Linus Torvalds1da177e2005-04-16 15:20:36 -070010DMA-API.txt.
11
12Most of the 64bit platforms have special hardware that translates bus
13addresses (DMA addresses) into physical addresses. This is similar to
14how page tables and/or a TLB translates virtual addresses to physical
15addresses on a CPU. This is needed so that e.g. PCI devices can
16access with a Single Address Cycle (32bit DMA address) any page in the
1764bit physical address space. Previously in Linux those 64bit
18platforms had to set artificial limits on the maximum RAM size in the
19system, so that the virt_to_bus() static scheme works (the DMA address
20translation tables were simply filled on bootup to map each bus
21address to the physical page __pa(bus_to_virt())).
22
23So that Linux can use the dynamic DMA mapping, it needs some help from the
24drivers, namely it has to take into account that DMA addresses should be
25mapped only for the time they are actually used and unmapped after the DMA
26transfer.
27
28The following API will work of course even on platforms where no such
FUJITA Tomonori216bf582010-03-10 15:23:42 -080029hardware exists.
30
31Note that the DMA API works with any bus independent of the underlying
32microprocessor architecture. You should use the DMA API rather than
33the bus specific DMA API (e.g. pci_dma_*).
Linus Torvalds1da177e2005-04-16 15:20:36 -070034
35First of all, you should make sure
36
FUJITA Tomonori216bf582010-03-10 15:23:42 -080037#include <linux/dma-mapping.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
39is in your driver. This file will obtain for you the definition of the
40dma_addr_t (which can hold any valid DMA address for the platform)
41type which should be used everywhere you hold a DMA (bus) address
42returned from the DMA mapping functions.
43
44 What memory is DMA'able?
45
46The first piece of information you must know is what kernel memory can
47be used with the DMA mapping facilities. There has been an unwritten
48set of rules regarding this, and this text is an attempt to finally
49write them down.
50
51If you acquired your memory via the page allocator
52(i.e. __get_free_page*()) or the generic memory allocators
53(i.e. kmalloc() or kmem_cache_alloc()) then you may DMA to/from
54that memory using the addresses returned from those routines.
55
56This means specifically that you may _not_ use the memory/addresses
57returned from vmalloc() for DMA. It is possible to DMA to the
58_underlying_ memory mapped into a vmalloc() area, but this requires
59walking page tables to get the physical addresses, and then
60translating each of those pages back to a kernel address using
61something like __va(). [ EDIT: Update this when we integrate
62Gerd Knorr's generic code which does this. ]
63
David Brownell21440d32006-04-01 10:21:52 -080064This rule also means that you may use neither kernel image addresses
65(items in data/text/bss segments), nor module image addresses, nor
66stack addresses for DMA. These could all be mapped somewhere entirely
67different than the rest of physical memory. Even if those classes of
68memory could physically work with DMA, you'd need to ensure the I/O
69buffers were cacheline-aligned. Without that, you'd see cacheline
70sharing problems (data corruption) on CPUs with DMA-incoherent caches.
71(The CPU could write to one word, DMA would write to a different one
72in the same cache line, and one of them could be overwritten.)
Linus Torvalds1da177e2005-04-16 15:20:36 -070073
74Also, this means that you cannot take the return of a kmap()
75call and DMA to/from that. This is similar to vmalloc().
76
77What about block I/O and networking buffers? The block I/O and
78networking subsystems make sure that the buffers they use are valid
79for you to DMA from/to.
80
81 DMA addressing limitations
82
83Does your device have any DMA addressing limitations? For example, is
FUJITA Tomonori216bf582010-03-10 15:23:42 -080084your device only capable of driving the low order 24-bits of address?
85If so, you need to inform the kernel of this fact.
Linus Torvalds1da177e2005-04-16 15:20:36 -070086
87By default, the kernel assumes that your device can address the full
FUJITA Tomonori216bf582010-03-10 15:23:42 -08008832-bits. For a 64-bit capable device, this needs to be increased.
89And for a device with limitations, as discussed in the previous
90paragraph, it needs to be decreased.
Linus Torvalds1da177e2005-04-16 15:20:36 -070091
FUJITA Tomonori216bf582010-03-10 15:23:42 -080092Special note about PCI: PCI-X specification requires PCI-X devices to
93support 64-bit addressing (DAC) for all transactions. And at least
94one platform (SGI SN2) requires 64-bit consistent allocations to
95operate correctly when the IO bus is in PCI-X mode.
Linus Torvalds1da177e2005-04-16 15:20:36 -070096
FUJITA Tomonori216bf582010-03-10 15:23:42 -080097For correct operation, you must interrogate the kernel in your device
98probe routine to see if the DMA controller on the machine can properly
99support the DMA addressing limitation your device has. It is good
100style to do this even if your device holds the default setting,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101because this shows that you did think about these issues wrt. your
102device.
103
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800104The query is performed via a call to dma_set_mask():
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800106 int dma_set_mask(struct device *dev, u64 mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107
Paolo Ornati670e9f32006-10-03 22:57:56 +0200108The query for consistent allocations is performed via a call to
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800109dma_set_coherent_mask():
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800111 int dma_set_coherent_mask(struct device *dev, u64 mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800113Here, dev is a pointer to the device struct of your device, and mask
114is a bit mask describing which bits of an address your device
115supports. It returns zero if your card can perform DMA properly on
116the machine given the address mask you provided. In general, the
117device struct of your device is embedded in the bus specific device
118struct of your device. For example, a pointer to the device struct of
119your PCI device is pdev->dev (pdev is a pointer to the PCI device
120struct of your device).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121
Matt LaPlante84eb8d02006-10-03 22:53:09 +0200122If it returns non-zero, your device cannot perform DMA properly on
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123this platform, and attempting to do so will result in undefined
124behavior. You must either use a different mask, or not use DMA.
125
126This means that in the failure case, you have three options:
127
1281) Use another DMA mask, if possible (see below).
1292) Use some non-DMA mode for data transfer, if possible.
1303) Ignore this device and do not initialize it.
131
132It is recommended that your driver print a kernel KERN_WARNING message
133when you end up performing either #2 or #3. In this manner, if a user
134of your driver reports that performance is bad or that the device is not
135even detected, you can ask them for the kernel messages to find out
136exactly why.
137
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800138The standard 32-bit addressing device would do something like this:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800140 if (dma_set_mask(dev, DMA_BIT_MASK(32))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 printk(KERN_WARNING
142 "mydev: No suitable DMA available.\n");
143 goto ignore_this_device;
144 }
145
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800146Another common scenario is a 64-bit capable device. The approach here
147is to try for 64-bit addressing, but back down to a 32-bit mask that
148should not fail. The kernel may fail the 64-bit mask not because the
149platform is not capable of 64-bit addressing. Rather, it may fail in
150this case simply because 32-bit addressing is done more efficiently
151than 64-bit addressing. For example, Sparc64 PCI SAC addressing is
152more efficient than DAC addressing.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153
154Here is how you would handle a 64-bit capable device which can drive
155all 64-bits when accessing streaming DMA:
156
157 int using_dac;
158
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800159 if (!dma_set_mask(dev, DMA_BIT_MASK(64))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 using_dac = 1;
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800161 } else if (!dma_set_mask(dev, DMA_BIT_MASK(32))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 using_dac = 0;
163 } else {
164 printk(KERN_WARNING
165 "mydev: No suitable DMA available.\n");
166 goto ignore_this_device;
167 }
168
169If a card is capable of using 64-bit consistent allocations as well,
170the case would look like this:
171
172 int using_dac, consistent_using_dac;
173
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800174 if (!dma_set_mask(dev, DMA_BIT_MASK(64))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175 using_dac = 1;
176 consistent_using_dac = 1;
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800177 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
178 } else if (!dma_set_mask(dev, DMA_BIT_MASK(32))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 using_dac = 0;
180 consistent_using_dac = 0;
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800181 dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 } else {
183 printk(KERN_WARNING
184 "mydev: No suitable DMA available.\n");
185 goto ignore_this_device;
186 }
187
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800188dma_set_coherent_mask() will always be able to set the same or a
189smaller mask as dma_set_mask(). However for the rare case that a
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190device driver only uses consistent allocations, one would have to
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800191check the return value from dma_set_coherent_mask().
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193Finally, if your device can only drive the low 24-bits of
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800194address you might do something like:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800196 if (dma_set_mask(dev, DMA_BIT_MASK(24))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 printk(KERN_WARNING
198 "mydev: 24-bit DMA addressing not available.\n");
199 goto ignore_this_device;
200 }
201
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800202When dma_set_mask() is successful, and returns zero, the kernel saves
203away this mask you have provided. The kernel will use this
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204information later when you make DMA mappings.
205
206There is a case which we are aware of at this time, which is worth
207mentioning in this documentation. If your device supports multiple
208functions (for example a sound card provides playback and record
209functions) and the various different functions have _different_
210DMA addressing limitations, you may wish to probe each mask and
211only provide the functionality which the machine can handle. It
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800212is important that the last call to dma_set_mask() be for the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213most specific mask.
214
215Here is pseudo-code showing how this might be done:
216
Yang Hongyang2c5510d2009-04-06 19:01:19 -0700217 #define PLAYBACK_ADDRESS_BITS DMA_BIT_MASK(32)
Marin Mitov038f7d02009-12-06 18:30:44 -0800218 #define RECORD_ADDRESS_BITS DMA_BIT_MASK(24)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219
220 struct my_sound_card *card;
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800221 struct device *dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222
223 ...
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800224 if (!dma_set_mask(dev, PLAYBACK_ADDRESS_BITS)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225 card->playback_enabled = 1;
226 } else {
227 card->playback_enabled = 0;
Randy Dunlap472c0642009-12-06 18:30:44 -0800228 printk(KERN_WARNING "%s: Playback disabled due to DMA limitations.\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229 card->name);
230 }
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800231 if (!dma_set_mask(dev, RECORD_ADDRESS_BITS)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232 card->record_enabled = 1;
233 } else {
234 card->record_enabled = 0;
Randy Dunlap472c0642009-12-06 18:30:44 -0800235 printk(KERN_WARNING "%s: Record disabled due to DMA limitations.\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 card->name);
237 }
238
239A sound card was used as an example here because this genre of PCI
240devices seems to be littered with ISA chips given a PCI front end,
241and thus retaining the 16MB DMA addressing limitations of ISA.
242
243 Types of DMA mappings
244
245There are two types of DMA mappings:
246
247- Consistent DMA mappings which are usually mapped at driver
248 initialization, unmapped at the end and for which the hardware should
249 guarantee that the device and the CPU can access the data
250 in parallel and will see updates made by each other without any
251 explicit software flushing.
252
253 Think of "consistent" as "synchronous" or "coherent".
254
255 The current default is to return consistent memory in the low 32
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800256 bits of the bus space. However, for future compatibility you should
257 set the consistent mask even if this default is fine for your
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258 driver.
259
260 Good examples of what to use consistent mappings for are:
261
262 - Network card DMA ring descriptors.
263 - SCSI adapter mailbox command data structures.
264 - Device firmware microcode executed out of
265 main memory.
266
267 The invariant these examples all require is that any CPU store
268 to memory is immediately visible to the device, and vice
269 versa. Consistent mappings guarantee this.
270
271 IMPORTANT: Consistent DMA memory does not preclude the usage of
272 proper memory barriers. The CPU may reorder stores to
273 consistent memory just as it may normal memory. Example:
274 if it is important for the device to see the first word
275 of a descriptor updated before the second, you must do
276 something like:
277
278 desc->word0 = address;
279 wmb();
280 desc->word1 = DESC_VALID;
281
282 in order to get correct behavior on all platforms.
283
David Brownell21440d32006-04-01 10:21:52 -0800284 Also, on some platforms your driver may need to flush CPU write
285 buffers in much the same way as it needs to flush write buffers
286 found in PCI bridges (such as by reading a register's value
287 after writing it).
288
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800289- Streaming DMA mappings which are usually mapped for one DMA
290 transfer, unmapped right after it (unless you use dma_sync_* below)
291 and for which hardware can optimize for sequential accesses.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292
293 This of "streaming" as "asynchronous" or "outside the coherency
294 domain".
295
296 Good examples of what to use streaming mappings for are:
297
298 - Networking buffers transmitted/received by a device.
299 - Filesystem buffers written/read by a SCSI device.
300
301 The interfaces for using this type of mapping were designed in
302 such a way that an implementation can make whatever performance
303 optimizations the hardware allows. To this end, when using
304 such mappings you must be explicit about what you want to happen.
305
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800306Neither type of DMA mapping has alignment restrictions that come from
307the underlying bus, although some devices may have such restrictions.
David Brownell21440d32006-04-01 10:21:52 -0800308Also, systems with caches that aren't DMA-coherent will work better
309when the underlying buffers don't share cache lines with other data.
310
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311
312 Using Consistent DMA mappings.
313
314To allocate and map large (PAGE_SIZE or so) consistent DMA regions,
315you should do:
316
317 dma_addr_t dma_handle;
318
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800319 cpu_addr = dma_alloc_coherent(dev, size, &dma_handle, gfp);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800321where device is a struct device *. This may be called in interrupt
322context with the GFP_ATOMIC flag.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323
324Size is the length of the region you want to allocate, in bytes.
325
326This routine will allocate RAM for that region, so it acts similarly to
327__get_free_pages (but takes size instead of a page order). If your
328driver needs regions sized smaller than a page, you may prefer using
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800329the dma_pool interface, described below.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800331The consistent DMA mapping interfaces, for non-NULL dev, will by
332default return a DMA address which is 32-bit addressable. Even if the
333device indicates (via DMA mask) that it may address the upper 32-bits,
334consistent allocation will only return > 32-bit addresses for DMA if
335the consistent DMA mask has been explicitly changed via
336dma_set_coherent_mask(). This is true of the dma_pool interface as
337well.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800339dma_alloc_coherent returns two values: the virtual address which you
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340can use to access it from the CPU and dma_handle which you pass to the
341card.
342
343The cpu return address and the DMA bus master address are both
344guaranteed to be aligned to the smallest PAGE_SIZE order which
345is greater than or equal to the requested size. This invariant
346exists (for example) to guarantee that if you allocate a chunk
347which is smaller than or equal to 64 kilobytes, the extent of the
348buffer you receive will not cross a 64K boundary.
349
350To unmap and free such a DMA region, you call:
351
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800352 dma_free_coherent(dev, size, cpu_addr, dma_handle);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800354where dev, size are the same as in the above call and cpu_addr and
355dma_handle are the values dma_alloc_coherent returned to you.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356This function may not be called in interrupt context.
357
358If your driver needs lots of smaller memory regions, you can write
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800359custom code to subdivide pages returned by dma_alloc_coherent,
360or you can use the dma_pool API to do that. A dma_pool is like
361a kmem_cache, but it uses dma_alloc_coherent not __get_free_pages.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362Also, it understands common hardware constraints for alignment,
363like queue heads needing to be aligned on N byte boundaries.
364
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800365Create a dma_pool like this:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700366
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800367 struct dma_pool *pool;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800369 pool = dma_pool_create(name, dev, size, align, alloc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800371The "name" is for diagnostics (like a kmem_cache name); dev and size
Linus Torvalds1da177e2005-04-16 15:20:36 -0700372are as above. The device's hardware alignment requirement for this
373type of data is "align" (which is expressed in bytes, and must be a
374power of two). If your device has no boundary crossing restrictions,
375pass 0 for alloc; passing 4096 says memory allocated from this pool
376must not cross 4KByte boundaries (but at that time it may be better to
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800377go for dma_alloc_coherent directly instead).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800379Allocate memory from a dma pool like this:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800381 cpu_addr = dma_pool_alloc(pool, flags, &dma_handle);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700382
383flags are SLAB_KERNEL if blocking is permitted (not in_interrupt nor
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800384holding SMP locks), SLAB_ATOMIC otherwise. Like dma_alloc_coherent,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385this returns two values, cpu_addr and dma_handle.
386
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800387Free memory that was allocated from a dma_pool like this:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800389 dma_pool_free(pool, cpu_addr, dma_handle);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800391where pool is what you passed to dma_pool_alloc, and cpu_addr and
392dma_handle are the values dma_pool_alloc returned. This function
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393may be called in interrupt context.
394
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800395Destroy a dma_pool by calling:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800397 dma_pool_destroy(pool);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800399Make sure you've called dma_pool_free for all memory allocated
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400from a pool before you destroy the pool. This function may not
401be called in interrupt context.
402
403 DMA Direction
404
405The interfaces described in subsequent portions of this document
406take a DMA direction argument, which is an integer and takes on
407one of the following values:
408
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800409 DMA_BIDIRECTIONAL
410 DMA_TO_DEVICE
411 DMA_FROM_DEVICE
412 DMA_NONE
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413
414One should provide the exact DMA direction if you know it.
415
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800416DMA_TO_DEVICE means "from main memory to the device"
417DMA_FROM_DEVICE means "from the device to main memory"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418It is the direction in which the data moves during the DMA
419transfer.
420
421You are _strongly_ encouraged to specify this as precisely
422as you possibly can.
423
424If you absolutely cannot know the direction of the DMA transfer,
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800425specify DMA_BIDIRECTIONAL. It means that the DMA can go in
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426either direction. The platform guarantees that you may legally
427specify this, and that it will work, but this may be at the
428cost of performance for example.
429
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800430The value DMA_NONE is to be used for debugging. One can
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431hold this in a data structure before you come to know the
432precise direction, and this will help catch cases where your
433direction tracking logic has failed to set things up properly.
434
435Another advantage of specifying this value precisely (outside of
436potential platform-specific optimizations of such) is for debugging.
437Some platforms actually have a write permission boolean which DMA
438mappings can be marked with, much like page protections in the user
439program address space. Such platforms can and do report errors in the
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800440kernel logs when the DMA controller hardware detects violation of the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441permission setting.
442
443Only streaming mappings specify a direction, consistent mappings
444implicitly have a direction attribute setting of
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800445DMA_BIDIRECTIONAL.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446
be7db052005-04-17 15:26:13 -0500447The SCSI subsystem tells you the direction to use in the
448'sc_data_direction' member of the SCSI command your driver is
449working on.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700450
451For Networking drivers, it's a rather simple affair. For transmit
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800452packets, map/unmap them with the DMA_TO_DEVICE direction
Linus Torvalds1da177e2005-04-16 15:20:36 -0700453specifier. For receive packets, just the opposite, map/unmap them
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800454with the DMA_FROM_DEVICE direction specifier.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455
456 Using Streaming DMA mappings
457
458The streaming DMA mapping routines can be called from interrupt
459context. There are two versions of each map/unmap, one which will
460map/unmap a single memory region, and one which will map/unmap a
461scatterlist.
462
463To map a single region, you do:
464
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800465 struct device *dev = &my_dev->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466 dma_addr_t dma_handle;
467 void *addr = buffer->ptr;
468 size_t size = buffer->len;
469
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800470 dma_handle = dma_map_single(dev, addr, size, direction);
Shuah Khan8d7f62e2012-10-18 14:00:58 -0600471 if (dma_mapping_error(dma_handle)) {
472 /*
473 * reduce current DMA mapping usage,
474 * delay and try again later or
475 * reset driver.
476 */
477 goto map_error_handling;
478 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479
480and to unmap it:
481
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800482 dma_unmap_single(dev, dma_handle, size, direction);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483
Shuah Khan8d7f62e2012-10-18 14:00:58 -0600484You should call dma_mapping_error() as dma_map_single() could fail and return
485error. Not all dma implementations support dma_mapping_error() interface.
486However, it is a good practice to call dma_mapping_error() interface, which
487will invoke the generic mapping error check interface. Doing so will ensure
488that the mapping code will work correctly on all dma implementations without
489any dependency on the specifics of the underlying implementation. Using the
490returned address without checking for errors could result in failures ranging
491from panics to silent data corruption. Couple of example of incorrect ways to
492check for errors that make assumptions about the underlying dma implementation
493are as follows and these are applicable to dma_map_page() as well.
494
495Incorrect example 1:
496 dma_addr_t dma_handle;
497
498 dma_handle = dma_map_single(dev, addr, size, direction);
499 if ((dma_handle & 0xffff != 0) || (dma_handle >= 0x1000000)) {
500 goto map_error;
501 }
502
503Incorrect example 2:
504 dma_addr_t dma_handle;
505
506 dma_handle = dma_map_single(dev, addr, size, direction);
507 if (dma_handle == DMA_ERROR_CODE) {
508 goto map_error;
509 }
510
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800511You should call dma_unmap_single when the DMA activity is finished, e.g.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700512from the interrupt which told you that the DMA transfer is done.
513
514Using cpu pointers like this for single mappings has a disadvantage,
515you cannot reference HIGHMEM memory in this way. Thus, there is a
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800516map/unmap interface pair akin to dma_{map,unmap}_single. These
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517interfaces deal with page/offset pairs instead of cpu pointers.
518Specifically:
519
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800520 struct device *dev = &my_dev->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521 dma_addr_t dma_handle;
522 struct page *page = buffer->page;
523 unsigned long offset = buffer->offset;
524 size_t size = buffer->len;
525
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800526 dma_handle = dma_map_page(dev, page, offset, size, direction);
Shuah Khan8d7f62e2012-10-18 14:00:58 -0600527 if (dma_mapping_error(dma_handle)) {
528 /*
529 * reduce current DMA mapping usage,
530 * delay and try again later or
531 * reset driver.
532 */
533 goto map_error_handling;
534 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535
536 ...
537
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800538 dma_unmap_page(dev, dma_handle, size, direction);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700539
540Here, "offset" means byte offset within the given page.
541
Shuah Khan8d7f62e2012-10-18 14:00:58 -0600542You should call dma_mapping_error() as dma_map_page() could fail and return
543error as outlined under the dma_map_single() discussion.
544
545You should call dma_unmap_page when the DMA activity is finished, e.g.
546from the interrupt which told you that the DMA transfer is done.
547
Linus Torvalds1da177e2005-04-16 15:20:36 -0700548With scatterlists, you map a region gathered from several regions by:
549
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800550 int i, count = dma_map_sg(dev, sglist, nents, direction);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 struct scatterlist *sg;
552
saeed bishara4c2f6d42007-08-08 13:09:00 +0200553 for_each_sg(sglist, sg, count, i) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700554 hw_address[i] = sg_dma_address(sg);
555 hw_len[i] = sg_dma_len(sg);
556 }
557
558where nents is the number of entries in the sglist.
559
560The implementation is free to merge several consecutive sglist entries
561into one (e.g. if DMA mapping is done with PAGE_SIZE granularity, any
562consecutive sglist entries can be merged into one provided the first one
563ends and the second one starts on a page boundary - in fact this is a huge
564advantage for cards which either cannot do scatter-gather or have very
565limited number of scatter-gather entries) and returns the actual number
566of sg entries it mapped them to. On failure 0 is returned.
567
568Then you should loop count times (note: this can be less than nents times)
569and use sg_dma_address() and sg_dma_len() macros where you previously
570accessed sg->address and sg->length as shown above.
571
572To unmap a scatterlist, just call:
573
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800574 dma_unmap_sg(dev, sglist, nents, direction);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700575
576Again, make sure DMA activity has already finished.
577
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800578PLEASE NOTE: The 'nents' argument to the dma_unmap_sg call must be
579 the _same_ one you passed into the dma_map_sg call,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580 it should _NOT_ be the 'count' value _returned_ from the
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800581 dma_map_sg call.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800583Every dma_map_{single,sg} call should have its dma_unmap_{single,sg}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700584counterpart, because the bus address space is a shared resource (although
585in some ports the mapping is per each BUS so less devices contend for the
586same bus address space) and you could render the machine unusable by eating
587all bus addresses.
588
589If you need to use the same streaming DMA region multiple times and touch
590the data in between the DMA transfers, the buffer needs to be synced
591properly in order for the cpu and device to see the most uptodate and
592correct copy of the DMA buffer.
593
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800594So, firstly, just map it with dma_map_{single,sg}, and after each DMA
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595transfer call either:
596
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800597 dma_sync_single_for_cpu(dev, dma_handle, size, direction);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598
599or:
600
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800601 dma_sync_sg_for_cpu(dev, sglist, nents, direction);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602
603as appropriate.
604
605Then, if you wish to let the device get at the DMA area again,
606finish accessing the data with the cpu, and then before actually
607giving the buffer to the hardware call either:
608
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800609 dma_sync_single_for_device(dev, dma_handle, size, direction);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610
611or:
612
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800613 dma_sync_sg_for_device(dev, sglist, nents, direction);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614
615as appropriate.
616
617After the last DMA transfer call one of the DMA unmap routines
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800618dma_unmap_{single,sg}. If you don't touch the data from the first dma_map_*
619call till dma_unmap_*, then you don't have to call the dma_sync_*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620routines at all.
621
622Here is pseudo code which shows a situation in which you would need
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800623to use the dma_sync_*() interfaces.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624
625 my_card_setup_receive_buffer(struct my_card *cp, char *buffer, int len)
626 {
627 dma_addr_t mapping;
628
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800629 mapping = dma_map_single(cp->dev, buffer, len, DMA_FROM_DEVICE);
Shuah Khan8d7f62e2012-10-18 14:00:58 -0600630 if (dma_mapping_error(dma_handle)) {
631 /*
632 * reduce current DMA mapping usage,
633 * delay and try again later or
634 * reset driver.
635 */
636 goto map_error_handling;
637 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700638
639 cp->rx_buf = buffer;
640 cp->rx_len = len;
641 cp->rx_dma = mapping;
642
643 give_rx_buf_to_card(cp);
644 }
645
646 ...
647
648 my_card_interrupt_handler(int irq, void *devid, struct pt_regs *regs)
649 {
650 struct my_card *cp = devid;
651
652 ...
653 if (read_card_status(cp) == RX_BUF_TRANSFERRED) {
654 struct my_card_header *hp;
655
656 /* Examine the header to see if we wish
657 * to accept the data. But synchronize
658 * the DMA transfer with the CPU first
659 * so that we see updated contents.
660 */
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800661 dma_sync_single_for_cpu(&cp->dev, cp->rx_dma,
662 cp->rx_len,
663 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664
665 /* Now it is safe to examine the buffer. */
666 hp = (struct my_card_header *) cp->rx_buf;
667 if (header_is_ok(hp)) {
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800668 dma_unmap_single(&cp->dev, cp->rx_dma, cp->rx_len,
669 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670 pass_to_upper_layers(cp->rx_buf);
671 make_and_setup_new_rx_buf(cp);
672 } else {
Michal Miroslaw3f0fb4e2011-07-26 16:08:51 -0700673 /* CPU should not write to
674 * DMA_FROM_DEVICE-mapped area,
675 * so dma_sync_single_for_device() is
676 * not needed here. It would be required
677 * for DMA_BIDIRECTIONAL mapping if
678 * the memory was modified.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700679 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700680 give_rx_buf_to_card(cp);
681 }
682 }
683 }
684
685Drivers converted fully to this interface should not use virt_to_bus any
686longer, nor should they use bus_to_virt. Some drivers have to be changed a
687little bit, because there is no longer an equivalent to bus_to_virt in the
688dynamic DMA mapping scheme - you have to always store the DMA addresses
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800689returned by the dma_alloc_coherent, dma_pool_alloc, and dma_map_single
690calls (dma_map_sg stores them in the scatterlist itself if the platform
Linus Torvalds1da177e2005-04-16 15:20:36 -0700691supports dynamic DMA mapping in hardware) in your driver structures and/or
692in the card registers.
693
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800694All drivers should be using these interfaces with no exceptions. It
695is planned to completely remove virt_to_bus() and bus_to_virt() as
Linus Torvalds1da177e2005-04-16 15:20:36 -0700696they are entirely deprecated. Some ports already do not provide these
697as it is impossible to correctly support them.
698
FUJITA Tomonori4ae9ca82010-05-26 14:44:22 -0700699 Handling Errors
700
701DMA address space is limited on some architectures and an allocation
702failure can be determined by:
703
704- checking if dma_alloc_coherent returns NULL or dma_map_sg returns 0
705
706- checking the returned dma_addr_t of dma_map_single and dma_map_page
707 by using dma_mapping_error():
708
709 dma_addr_t dma_handle;
710
711 dma_handle = dma_map_single(dev, addr, size, direction);
712 if (dma_mapping_error(dev, dma_handle)) {
713 /*
714 * reduce current DMA mapping usage,
715 * delay and try again later or
716 * reset driver.
717 */
Shuah Khan8d7f62e2012-10-18 14:00:58 -0600718 goto map_error_handling;
719 }
720
721- unmap pages that are already mapped, when mapping error occurs in the middle
722 of a multiple page mapping attempt. These example are applicable to
723 dma_map_page() as well.
724
725Example 1:
726 dma_addr_t dma_handle1;
727 dma_addr_t dma_handle2;
728
729 dma_handle1 = dma_map_single(dev, addr, size, direction);
730 if (dma_mapping_error(dev, dma_handle1)) {
731 /*
732 * reduce current DMA mapping usage,
733 * delay and try again later or
734 * reset driver.
735 */
736 goto map_error_handling1;
737 }
738 dma_handle2 = dma_map_single(dev, addr, size, direction);
739 if (dma_mapping_error(dev, dma_handle2)) {
740 /*
741 * reduce current DMA mapping usage,
742 * delay and try again later or
743 * reset driver.
744 */
745 goto map_error_handling2;
746 }
747
748 ...
749
750 map_error_handling2:
751 dma_unmap_single(dma_handle1);
752 map_error_handling1:
753
754Example 2: (if buffers are allocated a loop, unmap all mapped buffers when
755 mapping error is detected in the middle)
756
757 dma_addr_t dma_addr;
758 dma_addr_t array[DMA_BUFFERS];
759 int save_index = 0;
760
761 for (i = 0; i < DMA_BUFFERS; i++) {
762
763 ...
764
765 dma_addr = dma_map_single(dev, addr, size, direction);
766 if (dma_mapping_error(dev, dma_addr)) {
767 /*
768 * reduce current DMA mapping usage,
769 * delay and try again later or
770 * reset driver.
771 */
772 goto map_error_handling;
773 }
774 array[i].dma_addr = dma_addr;
775 save_index++;
776 }
777
778 ...
779
780 map_error_handling:
781
782 for (i = 0; i < save_index; i++) {
783
784 ...
785
786 dma_unmap_single(array[i].dma_addr);
FUJITA Tomonori4ae9ca82010-05-26 14:44:22 -0700787 }
788
789Networking drivers must call dev_kfree_skb to free the socket buffer
790and return NETDEV_TX_OK if the DMA mapping fails on the transmit hook
791(ndo_start_xmit). This means that the socket buffer is just dropped in
792the failure case.
793
794SCSI drivers must return SCSI_MLQUEUE_HOST_BUSY if the DMA mapping
795fails in the queuecommand hook. This means that the SCSI subsystem
796passes the command to the driver again later.
797
Linus Torvalds1da177e2005-04-16 15:20:36 -0700798 Optimizing Unmap State Space Consumption
799
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800800On many platforms, dma_unmap_{single,page}() is simply a nop.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801Therefore, keeping track of the mapping address and length is a waste
802of space. Instead of filling your drivers up with ifdefs and the like
803to "work around" this (which would defeat the whole purpose of a
804portable API) the following facilities are provided.
805
806Actually, instead of describing the macros one by one, we'll
807transform some example code.
808
FUJITA Tomonori216bf582010-03-10 15:23:42 -08008091) Use DEFINE_DMA_UNMAP_{ADDR,LEN} in state saving structures.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700810 Example, before:
811
812 struct ring_state {
813 struct sk_buff *skb;
814 dma_addr_t mapping;
815 __u32 len;
816 };
817
818 after:
819
820 struct ring_state {
821 struct sk_buff *skb;
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800822 DEFINE_DMA_UNMAP_ADDR(mapping);
823 DEFINE_DMA_UNMAP_LEN(len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700824 };
825
FUJITA Tomonori216bf582010-03-10 15:23:42 -08008262) Use dma_unmap_{addr,len}_set to set these values.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700827 Example, before:
828
829 ringp->mapping = FOO;
830 ringp->len = BAR;
831
832 after:
833
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800834 dma_unmap_addr_set(ringp, mapping, FOO);
835 dma_unmap_len_set(ringp, len, BAR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836
FUJITA Tomonori216bf582010-03-10 15:23:42 -08008373) Use dma_unmap_{addr,len} to access these values.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838 Example, before:
839
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800840 dma_unmap_single(dev, ringp->mapping, ringp->len,
841 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842
843 after:
844
FUJITA Tomonori216bf582010-03-10 15:23:42 -0800845 dma_unmap_single(dev,
846 dma_unmap_addr(ringp, mapping),
847 dma_unmap_len(ringp, len),
848 DMA_FROM_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700849
850It really should be self-explanatory. We treat the ADDR and LEN
851separately, because it is possible for an implementation to only
852need the address in order to perform the unmap operation.
853
854 Platform Issues
855
856If you are just writing drivers for Linux and do not maintain
857an architecture port for the kernel, you can safely skip down
858to "Closing".
859
8601) Struct scatterlist requirements.
861
FUJITA Tomonorib02de872010-05-26 14:44:21 -0700862 Don't invent the architecture specific struct scatterlist; just use
863 <asm-generic/scatterlist.h>. You need to enable
864 CONFIG_NEED_SG_DMA_LENGTH if the architecture supports IOMMUs
865 (including software IOMMU).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700866
FUJITA Tomonorice00f7f2010-08-14 16:36:17 +09008672) ARCH_DMA_MINALIGN
FUJITA Tomonori2fd74e22010-05-26 14:44:23 -0700868
869 Architectures must ensure that kmalloc'ed buffer is
870 DMA-safe. Drivers and subsystems depend on it. If an architecture
871 isn't fully DMA-coherent (i.e. hardware doesn't ensure that data in
872 the CPU cache is identical to data in main memory),
FUJITA Tomonorice00f7f2010-08-14 16:36:17 +0900873 ARCH_DMA_MINALIGN must be set so that the memory allocator
FUJITA Tomonori2fd74e22010-05-26 14:44:23 -0700874 makes sure that kmalloc'ed buffer doesn't share a cache line with
875 the others. See arch/arm/include/asm/cache.h as an example.
876
FUJITA Tomonorice00f7f2010-08-14 16:36:17 +0900877 Note that ARCH_DMA_MINALIGN is about DMA memory alignment
FUJITA Tomonori2fd74e22010-05-26 14:44:23 -0700878 constraints. You don't need to worry about the architecture data
879 alignment constraints (e.g. the alignment constraints about 64-bit
880 objects).
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881
FUJITA Tomonoric31e74c2010-08-10 18:03:25 -07008823) Supporting multiple types of IOMMUs
883
884 If your architecture needs to support multiple types of IOMMUs, you
885 can use include/linux/asm-generic/dma-mapping-common.h. It's a
886 library to support the DMA API with multiple types of IOMMUs. Lots
887 of architectures (x86, powerpc, sh, alpha, ia64, microblaze and
888 sparc) use it. Choose one to see how it can be used. If you need to
889 support multiple types of IOMMUs in a single system, the example of
890 x86 or powerpc helps.
891
Linus Torvalds1da177e2005-04-16 15:20:36 -0700892 Closing
893
Francis Galieguea33f3222010-04-23 00:08:02 +0200894This document, and the API itself, would not be in its current
Linus Torvalds1da177e2005-04-16 15:20:36 -0700895form without the feedback and suggestions from numerous individuals.
896We would like to specifically mention, in no particular order, the
897following people:
898
899 Russell King <rmk@arm.linux.org.uk>
900 Leo Dagum <dagum@barrel.engr.sgi.com>
901 Ralf Baechle <ralf@oss.sgi.com>
902 Grant Grundler <grundler@cup.hp.com>
903 Jay Estabrook <Jay.Estabrook@compaq.com>
904 Thomas Sailer <sailer@ife.ee.ethz.ch>
905 Andrea Arcangeli <andrea@suse.de>
Rob Landley26bbb292007-10-15 11:42:52 +0200906 Jens Axboe <jens.axboe@oracle.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700907 David Mosberger-Tang <davidm@hpl.hp.com>