David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1 | /* |
| 2 | * drivers/net/ibm_newemac/core.c |
| 3 | * |
| 4 | * Driver for PowerPC 4xx on-chip ethernet controller. |
| 5 | * |
Benjamin Herrenschmidt | 17cf803 | 2007-12-05 11:14:33 +1100 | [diff] [blame] | 6 | * Copyright 2007 Benjamin Herrenschmidt, IBM Corp. |
| 7 | * <benh@kernel.crashing.org> |
| 8 | * |
| 9 | * Based on the arch/ppc version of the driver: |
| 10 | * |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 11 | * Copyright (c) 2004, 2005 Zultys Technologies. |
| 12 | * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> |
| 13 | * |
| 14 | * Based on original work by |
| 15 | * Matt Porter <mporter@kernel.crashing.org> |
| 16 | * (c) 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org> |
| 17 | * Armin Kuster <akuster@mvista.com> |
| 18 | * Johnnie Peters <jpeters@mvista.com> |
| 19 | * |
| 20 | * This program is free software; you can redistribute it and/or modify it |
| 21 | * under the terms of the GNU General Public License as published by the |
| 22 | * Free Software Foundation; either version 2 of the License, or (at your |
| 23 | * option) any later version. |
| 24 | * |
| 25 | */ |
| 26 | |
Anton Vorontsov | e72701a | 2009-10-14 14:54:52 -0700 | [diff] [blame] | 27 | #include <linux/module.h> |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 28 | #include <linux/sched.h> |
| 29 | #include <linux/string.h> |
| 30 | #include <linux/errno.h> |
| 31 | #include <linux/delay.h> |
| 32 | #include <linux/types.h> |
| 33 | #include <linux/pci.h> |
| 34 | #include <linux/etherdevice.h> |
| 35 | #include <linux/skbuff.h> |
| 36 | #include <linux/crc32.h> |
| 37 | #include <linux/ethtool.h> |
| 38 | #include <linux/mii.h> |
| 39 | #include <linux/bitops.h> |
| 40 | #include <linux/workqueue.h> |
Grant Likely | 283029d | 2008-01-09 06:20:40 +1100 | [diff] [blame] | 41 | #include <linux/of.h> |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 42 | |
| 43 | #include <asm/processor.h> |
| 44 | #include <asm/io.h> |
| 45 | #include <asm/dma.h> |
| 46 | #include <asm/uaccess.h> |
Valentine Barshak | 0925ab5 | 2008-04-22 10:46:46 +1000 | [diff] [blame] | 47 | #include <asm/dcr.h> |
| 48 | #include <asm/dcr-regs.h> |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 49 | |
| 50 | #include "core.h" |
| 51 | |
| 52 | /* |
| 53 | * Lack of dma_unmap_???? calls is intentional. |
| 54 | * |
| 55 | * API-correct usage requires additional support state information to be |
| 56 | * maintained for every RX and TX buffer descriptor (BD). Unfortunately, due to |
| 57 | * EMAC design (e.g. TX buffer passed from network stack can be split into |
| 58 | * several BDs, dma_map_single/dma_map_page can be used to map particular BD), |
| 59 | * maintaining such information will add additional overhead. |
| 60 | * Current DMA API implementation for 4xx processors only ensures cache coherency |
| 61 | * and dma_unmap_???? routines are empty and are likely to stay this way. |
| 62 | * I decided to omit dma_unmap_??? calls because I don't want to add additional |
| 63 | * complexity just for the sake of following some abstract API, when it doesn't |
| 64 | * add any real benefit to the driver. I understand that this decision maybe |
| 65 | * controversial, but I really tried to make code API-correct and efficient |
| 66 | * at the same time and didn't come up with code I liked :(. --ebs |
| 67 | */ |
| 68 | |
| 69 | #define DRV_NAME "emac" |
| 70 | #define DRV_VERSION "3.54" |
| 71 | #define DRV_DESC "PPC 4xx OCP EMAC driver" |
| 72 | |
| 73 | MODULE_DESCRIPTION(DRV_DESC); |
| 74 | MODULE_AUTHOR |
| 75 | ("Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>"); |
| 76 | MODULE_LICENSE("GPL"); |
| 77 | |
| 78 | /* |
| 79 | * PPC64 doesn't (yet) have a cacheable_memcpy |
| 80 | */ |
| 81 | #ifdef CONFIG_PPC64 |
| 82 | #define cacheable_memcpy(d,s,n) memcpy((d),(s),(n)) |
| 83 | #endif |
| 84 | |
| 85 | /* minimum number of free TX descriptors required to wake up TX process */ |
| 86 | #define EMAC_TX_WAKEUP_THRESH (NUM_TX_BUFF / 4) |
| 87 | |
| 88 | /* If packet size is less than this number, we allocate small skb and copy packet |
| 89 | * contents into it instead of just sending original big skb up |
| 90 | */ |
| 91 | #define EMAC_RX_COPY_THRESH CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD |
| 92 | |
| 93 | /* Since multiple EMACs share MDIO lines in various ways, we need |
| 94 | * to avoid re-using the same PHY ID in cases where the arch didn't |
| 95 | * setup precise phy_map entries |
| 96 | * |
| 97 | * XXX This is something that needs to be reworked as we can have multiple |
| 98 | * EMAC "sets" (multiple ASICs containing several EMACs) though we can |
| 99 | * probably require in that case to have explicit PHY IDs in the device-tree |
| 100 | */ |
| 101 | static u32 busy_phy_map; |
| 102 | static DEFINE_MUTEX(emac_phy_map_lock); |
| 103 | |
| 104 | /* This is the wait queue used to wait on any event related to probe, that |
| 105 | * is discovery of MALs, other EMACs, ZMII/RGMIIs, etc... |
| 106 | */ |
| 107 | static DECLARE_WAIT_QUEUE_HEAD(emac_probe_wait); |
| 108 | |
| 109 | /* Having stable interface names is a doomed idea. However, it would be nice |
| 110 | * if we didn't have completely random interface names at boot too :-) It's |
| 111 | * just a matter of making everybody's life easier. Since we are doing |
| 112 | * threaded probing, it's a bit harder though. The base idea here is that |
| 113 | * we make up a list of all emacs in the device-tree before we register the |
| 114 | * driver. Every emac will then wait for the previous one in the list to |
| 115 | * initialize before itself. We should also keep that list ordered by |
| 116 | * cell_index. |
| 117 | * That list is only 4 entries long, meaning that additional EMACs don't |
| 118 | * get ordering guarantees unless EMAC_BOOT_LIST_SIZE is increased. |
| 119 | */ |
| 120 | |
| 121 | #define EMAC_BOOT_LIST_SIZE 4 |
| 122 | static struct device_node *emac_boot_list[EMAC_BOOT_LIST_SIZE]; |
| 123 | |
| 124 | /* How long should I wait for dependent devices ? */ |
| 125 | #define EMAC_PROBE_DEP_TIMEOUT (HZ * 5) |
| 126 | |
| 127 | /* I don't want to litter system log with timeout errors |
| 128 | * when we have brain-damaged PHY. |
| 129 | */ |
| 130 | static inline void emac_report_timeout_error(struct emac_instance *dev, |
| 131 | const char *error) |
| 132 | { |
Valentine Barshak | 11121e3 | 2008-04-22 10:46:48 +1000 | [diff] [blame] | 133 | if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX | |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 134 | EMAC_FTR_460EX_PHY_CLK_FIX | |
Valentine Barshak | 11121e3 | 2008-04-22 10:46:48 +1000 | [diff] [blame] | 135 | EMAC_FTR_440EP_PHY_CLK_FIX)) |
| 136 | DBG(dev, "%s" NL, error); |
| 137 | else if (net_ratelimit()) |
Mikhail Zolotaryov | 62f0c33 | 2009-03-19 22:28:02 +0000 | [diff] [blame] | 138 | printk(KERN_ERR "%s: %s\n", dev->ofdev->node->full_name, error); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 139 | } |
| 140 | |
Valentine Barshak | 11121e3 | 2008-04-22 10:46:48 +1000 | [diff] [blame] | 141 | /* EMAC PHY clock workaround: |
| 142 | * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX, |
| 143 | * which allows controlling each EMAC clock |
| 144 | */ |
| 145 | static inline void emac_rx_clk_tx(struct emac_instance *dev) |
| 146 | { |
| 147 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 148 | if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX)) |
| 149 | dcri_clrset(SDR0, SDR0_MFR, |
| 150 | 0, SDR0_MFR_ECS >> dev->cell_index); |
| 151 | #endif |
| 152 | } |
| 153 | |
| 154 | static inline void emac_rx_clk_default(struct emac_instance *dev) |
| 155 | { |
| 156 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 157 | if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX)) |
| 158 | dcri_clrset(SDR0, SDR0_MFR, |
| 159 | SDR0_MFR_ECS >> dev->cell_index, 0); |
| 160 | #endif |
| 161 | } |
| 162 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 163 | /* PHY polling intervals */ |
| 164 | #define PHY_POLL_LINK_ON HZ |
| 165 | #define PHY_POLL_LINK_OFF (HZ / 5) |
| 166 | |
| 167 | /* Graceful stop timeouts in us. |
| 168 | * We should allow up to 1 frame time (full-duplex, ignoring collisions) |
| 169 | */ |
| 170 | #define STOP_TIMEOUT_10 1230 |
| 171 | #define STOP_TIMEOUT_100 124 |
| 172 | #define STOP_TIMEOUT_1000 13 |
| 173 | #define STOP_TIMEOUT_1000_JUMBO 73 |
| 174 | |
Pravin M. Bathija | 4373c93 | 2008-03-14 10:52:28 +0100 | [diff] [blame] | 175 | static unsigned char default_mcast_addr[] = { |
| 176 | 0x01, 0x80, 0xC2, 0x00, 0x00, 0x01 |
| 177 | }; |
| 178 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 179 | /* Please, keep in sync with struct ibm_emac_stats/ibm_emac_error_stats */ |
| 180 | static const char emac_stats_keys[EMAC_ETHTOOL_STATS_COUNT][ETH_GSTRING_LEN] = { |
| 181 | "rx_packets", "rx_bytes", "tx_packets", "tx_bytes", "rx_packets_csum", |
| 182 | "tx_packets_csum", "tx_undo", "rx_dropped_stack", "rx_dropped_oom", |
| 183 | "rx_dropped_error", "rx_dropped_resize", "rx_dropped_mtu", |
| 184 | "rx_stopped", "rx_bd_errors", "rx_bd_overrun", "rx_bd_bad_packet", |
| 185 | "rx_bd_runt_packet", "rx_bd_short_event", "rx_bd_alignment_error", |
| 186 | "rx_bd_bad_fcs", "rx_bd_packet_too_long", "rx_bd_out_of_range", |
| 187 | "rx_bd_in_range", "rx_parity", "rx_fifo_overrun", "rx_overrun", |
| 188 | "rx_bad_packet", "rx_runt_packet", "rx_short_event", |
| 189 | "rx_alignment_error", "rx_bad_fcs", "rx_packet_too_long", |
| 190 | "rx_out_of_range", "rx_in_range", "tx_dropped", "tx_bd_errors", |
| 191 | "tx_bd_bad_fcs", "tx_bd_carrier_loss", "tx_bd_excessive_deferral", |
| 192 | "tx_bd_excessive_collisions", "tx_bd_late_collision", |
| 193 | "tx_bd_multple_collisions", "tx_bd_single_collision", |
| 194 | "tx_bd_underrun", "tx_bd_sqe", "tx_parity", "tx_underrun", "tx_sqe", |
| 195 | "tx_errors" |
| 196 | }; |
| 197 | |
| 198 | static irqreturn_t emac_irq(int irq, void *dev_instance); |
| 199 | static void emac_clean_tx_ring(struct emac_instance *dev); |
| 200 | static void __emac_set_multicast_list(struct emac_instance *dev); |
| 201 | |
| 202 | static inline int emac_phy_supports_gige(int phy_mode) |
| 203 | { |
| 204 | return phy_mode == PHY_MODE_GMII || |
| 205 | phy_mode == PHY_MODE_RGMII || |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 206 | phy_mode == PHY_MODE_SGMII || |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 207 | phy_mode == PHY_MODE_TBI || |
| 208 | phy_mode == PHY_MODE_RTBI; |
| 209 | } |
| 210 | |
| 211 | static inline int emac_phy_gpcs(int phy_mode) |
| 212 | { |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 213 | return phy_mode == PHY_MODE_SGMII || |
| 214 | phy_mode == PHY_MODE_TBI || |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 215 | phy_mode == PHY_MODE_RTBI; |
| 216 | } |
| 217 | |
| 218 | static inline void emac_tx_enable(struct emac_instance *dev) |
| 219 | { |
| 220 | struct emac_regs __iomem *p = dev->emacp; |
| 221 | u32 r; |
| 222 | |
| 223 | DBG(dev, "tx_enable" NL); |
| 224 | |
| 225 | r = in_be32(&p->mr0); |
| 226 | if (!(r & EMAC_MR0_TXE)) |
| 227 | out_be32(&p->mr0, r | EMAC_MR0_TXE); |
| 228 | } |
| 229 | |
| 230 | static void emac_tx_disable(struct emac_instance *dev) |
| 231 | { |
| 232 | struct emac_regs __iomem *p = dev->emacp; |
| 233 | u32 r; |
| 234 | |
| 235 | DBG(dev, "tx_disable" NL); |
| 236 | |
| 237 | r = in_be32(&p->mr0); |
| 238 | if (r & EMAC_MR0_TXE) { |
| 239 | int n = dev->stop_timeout; |
| 240 | out_be32(&p->mr0, r & ~EMAC_MR0_TXE); |
| 241 | while (!(in_be32(&p->mr0) & EMAC_MR0_TXI) && n) { |
| 242 | udelay(1); |
| 243 | --n; |
| 244 | } |
| 245 | if (unlikely(!n)) |
| 246 | emac_report_timeout_error(dev, "TX disable timeout"); |
| 247 | } |
| 248 | } |
| 249 | |
| 250 | static void emac_rx_enable(struct emac_instance *dev) |
| 251 | { |
| 252 | struct emac_regs __iomem *p = dev->emacp; |
| 253 | u32 r; |
| 254 | |
| 255 | if (unlikely(test_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags))) |
| 256 | goto out; |
| 257 | |
| 258 | DBG(dev, "rx_enable" NL); |
| 259 | |
| 260 | r = in_be32(&p->mr0); |
| 261 | if (!(r & EMAC_MR0_RXE)) { |
| 262 | if (unlikely(!(r & EMAC_MR0_RXI))) { |
| 263 | /* Wait if previous async disable is still in progress */ |
| 264 | int n = dev->stop_timeout; |
| 265 | while (!(r = in_be32(&p->mr0) & EMAC_MR0_RXI) && n) { |
| 266 | udelay(1); |
| 267 | --n; |
| 268 | } |
| 269 | if (unlikely(!n)) |
| 270 | emac_report_timeout_error(dev, |
| 271 | "RX disable timeout"); |
| 272 | } |
| 273 | out_be32(&p->mr0, r | EMAC_MR0_RXE); |
| 274 | } |
| 275 | out: |
| 276 | ; |
| 277 | } |
| 278 | |
| 279 | static void emac_rx_disable(struct emac_instance *dev) |
| 280 | { |
| 281 | struct emac_regs __iomem *p = dev->emacp; |
| 282 | u32 r; |
| 283 | |
| 284 | DBG(dev, "rx_disable" NL); |
| 285 | |
| 286 | r = in_be32(&p->mr0); |
| 287 | if (r & EMAC_MR0_RXE) { |
| 288 | int n = dev->stop_timeout; |
| 289 | out_be32(&p->mr0, r & ~EMAC_MR0_RXE); |
| 290 | while (!(in_be32(&p->mr0) & EMAC_MR0_RXI) && n) { |
| 291 | udelay(1); |
| 292 | --n; |
| 293 | } |
| 294 | if (unlikely(!n)) |
| 295 | emac_report_timeout_error(dev, "RX disable timeout"); |
| 296 | } |
| 297 | } |
| 298 | |
| 299 | static inline void emac_netif_stop(struct emac_instance *dev) |
| 300 | { |
| 301 | netif_tx_lock_bh(dev->ndev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 302 | netif_addr_lock(dev->ndev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 303 | dev->no_mcast = 1; |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 304 | netif_addr_unlock(dev->ndev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 305 | netif_tx_unlock_bh(dev->ndev); |
| 306 | dev->ndev->trans_start = jiffies; /* prevent tx timeout */ |
| 307 | mal_poll_disable(dev->mal, &dev->commac); |
| 308 | netif_tx_disable(dev->ndev); |
| 309 | } |
| 310 | |
| 311 | static inline void emac_netif_start(struct emac_instance *dev) |
| 312 | { |
| 313 | netif_tx_lock_bh(dev->ndev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 314 | netif_addr_lock(dev->ndev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 315 | dev->no_mcast = 0; |
| 316 | if (dev->mcast_pending && netif_running(dev->ndev)) |
| 317 | __emac_set_multicast_list(dev); |
David S. Miller | e308a5d | 2008-07-15 00:13:44 -0700 | [diff] [blame] | 318 | netif_addr_unlock(dev->ndev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 319 | netif_tx_unlock_bh(dev->ndev); |
| 320 | |
| 321 | netif_wake_queue(dev->ndev); |
| 322 | |
| 323 | /* NOTE: unconditional netif_wake_queue is only appropriate |
| 324 | * so long as all callers are assured to have free tx slots |
| 325 | * (taken from tg3... though the case where that is wrong is |
| 326 | * not terribly harmful) |
| 327 | */ |
| 328 | mal_poll_enable(dev->mal, &dev->commac); |
| 329 | } |
| 330 | |
| 331 | static inline void emac_rx_disable_async(struct emac_instance *dev) |
| 332 | { |
| 333 | struct emac_regs __iomem *p = dev->emacp; |
| 334 | u32 r; |
| 335 | |
| 336 | DBG(dev, "rx_disable_async" NL); |
| 337 | |
| 338 | r = in_be32(&p->mr0); |
| 339 | if (r & EMAC_MR0_RXE) |
| 340 | out_be32(&p->mr0, r & ~EMAC_MR0_RXE); |
| 341 | } |
| 342 | |
| 343 | static int emac_reset(struct emac_instance *dev) |
| 344 | { |
| 345 | struct emac_regs __iomem *p = dev->emacp; |
| 346 | int n = 20; |
| 347 | |
| 348 | DBG(dev, "reset" NL); |
| 349 | |
| 350 | if (!dev->reset_failed) { |
| 351 | /* 40x erratum suggests stopping RX channel before reset, |
| 352 | * we stop TX as well |
| 353 | */ |
| 354 | emac_rx_disable(dev); |
| 355 | emac_tx_disable(dev); |
| 356 | } |
| 357 | |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 358 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 359 | /* Enable internal clock source */ |
| 360 | if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) |
| 361 | dcri_clrset(SDR0, SDR0_ETH_CFG, |
| 362 | 0, SDR0_ETH_CFG_ECS << dev->cell_index); |
| 363 | #endif |
| 364 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 365 | out_be32(&p->mr0, EMAC_MR0_SRST); |
| 366 | while ((in_be32(&p->mr0) & EMAC_MR0_SRST) && n) |
| 367 | --n; |
| 368 | |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 369 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 370 | /* Enable external clock source */ |
| 371 | if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) |
| 372 | dcri_clrset(SDR0, SDR0_ETH_CFG, |
| 373 | SDR0_ETH_CFG_ECS << dev->cell_index, 0); |
| 374 | #endif |
| 375 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 376 | if (n) { |
| 377 | dev->reset_failed = 0; |
| 378 | return 0; |
| 379 | } else { |
| 380 | emac_report_timeout_error(dev, "reset timeout"); |
| 381 | dev->reset_failed = 1; |
| 382 | return -ETIMEDOUT; |
| 383 | } |
| 384 | } |
| 385 | |
| 386 | static void emac_hash_mc(struct emac_instance *dev) |
| 387 | { |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 388 | const int regs = EMAC_XAHT_REGS(dev); |
| 389 | u32 *gaht_base = emac_gaht_base(dev); |
| 390 | u32 gaht_temp[regs]; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 391 | struct dev_mc_list *dmi; |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 392 | int i; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 393 | |
| 394 | DBG(dev, "hash_mc %d" NL, dev->ndev->mc_count); |
| 395 | |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 396 | memset(gaht_temp, 0, sizeof (gaht_temp)); |
| 397 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 398 | for (dmi = dev->ndev->mc_list; dmi; dmi = dmi->next) { |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 399 | int slot, reg, mask; |
Johannes Berg | 7c510e4 | 2008-10-27 17:47:26 -0700 | [diff] [blame] | 400 | DBG2(dev, "mc %pM" NL, dmi->dmi_addr); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 401 | |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 402 | slot = EMAC_XAHT_CRC_TO_SLOT(dev, ether_crc(ETH_ALEN, dmi->dmi_addr)); |
| 403 | reg = EMAC_XAHT_SLOT_TO_REG(dev, slot); |
| 404 | mask = EMAC_XAHT_SLOT_TO_MASK(dev, slot); |
| 405 | |
| 406 | gaht_temp[reg] |= mask; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 407 | } |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 408 | |
| 409 | for (i = 0; i < regs; i++) |
| 410 | out_be32(gaht_base + i, gaht_temp[i]); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 411 | } |
| 412 | |
| 413 | static inline u32 emac_iff2rmr(struct net_device *ndev) |
| 414 | { |
| 415 | struct emac_instance *dev = netdev_priv(ndev); |
| 416 | u32 r; |
| 417 | |
| 418 | r = EMAC_RMR_SP | EMAC_RMR_SFCS | EMAC_RMR_IAE | EMAC_RMR_BAE; |
| 419 | |
| 420 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
| 421 | r |= EMAC4_RMR_BASE; |
| 422 | else |
| 423 | r |= EMAC_RMR_BASE; |
| 424 | |
| 425 | if (ndev->flags & IFF_PROMISC) |
| 426 | r |= EMAC_RMR_PME; |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 427 | else if (ndev->flags & IFF_ALLMULTI || |
| 428 | (ndev->mc_count > EMAC_XAHT_SLOTS(dev))) |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 429 | r |= EMAC_RMR_PMME; |
| 430 | else if (ndev->mc_count > 0) |
| 431 | r |= EMAC_RMR_MAE; |
| 432 | |
| 433 | return r; |
| 434 | } |
| 435 | |
| 436 | static u32 __emac_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size) |
| 437 | { |
| 438 | u32 ret = EMAC_MR1_VLE | EMAC_MR1_IST | EMAC_MR1_TR0_MULT; |
| 439 | |
| 440 | DBG2(dev, "__emac_calc_base_mr1" NL); |
| 441 | |
| 442 | switch(tx_size) { |
| 443 | case 2048: |
| 444 | ret |= EMAC_MR1_TFS_2K; |
| 445 | break; |
| 446 | default: |
Dave Mitchell | 3201fce | 2009-10-08 06:32:21 +0000 | [diff] [blame] | 447 | printk(KERN_WARNING "%s: Unknown Tx FIFO size %d\n", |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 448 | dev->ndev->name, tx_size); |
| 449 | } |
| 450 | |
| 451 | switch(rx_size) { |
| 452 | case 16384: |
| 453 | ret |= EMAC_MR1_RFS_16K; |
| 454 | break; |
| 455 | case 4096: |
| 456 | ret |= EMAC_MR1_RFS_4K; |
| 457 | break; |
| 458 | default: |
| 459 | printk(KERN_WARNING "%s: Unknown Rx FIFO size %d\n", |
| 460 | dev->ndev->name, rx_size); |
| 461 | } |
| 462 | |
| 463 | return ret; |
| 464 | } |
| 465 | |
| 466 | static u32 __emac4_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size) |
| 467 | { |
| 468 | u32 ret = EMAC_MR1_VLE | EMAC_MR1_IST | EMAC4_MR1_TR | |
Valentine Barshak | 4696c3c | 2007-12-05 11:14:31 +1100 | [diff] [blame] | 469 | EMAC4_MR1_OBCI(dev->opb_bus_freq / 1000000); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 470 | |
| 471 | DBG2(dev, "__emac4_calc_base_mr1" NL); |
| 472 | |
| 473 | switch(tx_size) { |
Dave Mitchell | 3201fce | 2009-10-08 06:32:21 +0000 | [diff] [blame] | 474 | case 16384: |
| 475 | ret |= EMAC4_MR1_TFS_16K; |
| 476 | break; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 477 | case 4096: |
| 478 | ret |= EMAC4_MR1_TFS_4K; |
| 479 | break; |
| 480 | case 2048: |
| 481 | ret |= EMAC4_MR1_TFS_2K; |
| 482 | break; |
| 483 | default: |
Dave Mitchell | 3201fce | 2009-10-08 06:32:21 +0000 | [diff] [blame] | 484 | printk(KERN_WARNING "%s: Unknown Tx FIFO size %d\n", |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 485 | dev->ndev->name, tx_size); |
| 486 | } |
| 487 | |
| 488 | switch(rx_size) { |
| 489 | case 16384: |
| 490 | ret |= EMAC4_MR1_RFS_16K; |
| 491 | break; |
| 492 | case 4096: |
| 493 | ret |= EMAC4_MR1_RFS_4K; |
| 494 | break; |
| 495 | case 2048: |
| 496 | ret |= EMAC4_MR1_RFS_2K; |
| 497 | break; |
| 498 | default: |
| 499 | printk(KERN_WARNING "%s: Unknown Rx FIFO size %d\n", |
| 500 | dev->ndev->name, rx_size); |
| 501 | } |
| 502 | |
| 503 | return ret; |
| 504 | } |
| 505 | |
| 506 | static u32 emac_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size) |
| 507 | { |
| 508 | return emac_has_feature(dev, EMAC_FTR_EMAC4) ? |
| 509 | __emac4_calc_base_mr1(dev, tx_size, rx_size) : |
| 510 | __emac_calc_base_mr1(dev, tx_size, rx_size); |
| 511 | } |
| 512 | |
| 513 | static inline u32 emac_calc_trtr(struct emac_instance *dev, unsigned int size) |
| 514 | { |
| 515 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
| 516 | return ((size >> 6) - 1) << EMAC_TRTR_SHIFT_EMAC4; |
| 517 | else |
| 518 | return ((size >> 6) - 1) << EMAC_TRTR_SHIFT; |
| 519 | } |
| 520 | |
| 521 | static inline u32 emac_calc_rwmr(struct emac_instance *dev, |
| 522 | unsigned int low, unsigned int high) |
| 523 | { |
| 524 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
| 525 | return (low << 22) | ( (high & 0x3ff) << 6); |
| 526 | else |
| 527 | return (low << 23) | ( (high & 0x1ff) << 7); |
| 528 | } |
| 529 | |
| 530 | static int emac_configure(struct emac_instance *dev) |
| 531 | { |
| 532 | struct emac_regs __iomem *p = dev->emacp; |
| 533 | struct net_device *ndev = dev->ndev; |
Benjamin Herrenschmidt | 911b237 | 2007-12-05 11:14:27 +1100 | [diff] [blame] | 534 | int tx_size, rx_size, link = netif_carrier_ok(dev->ndev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 535 | u32 r, mr1 = 0; |
| 536 | |
| 537 | DBG(dev, "configure" NL); |
| 538 | |
Benjamin Herrenschmidt | 911b237 | 2007-12-05 11:14:27 +1100 | [diff] [blame] | 539 | if (!link) { |
| 540 | out_be32(&p->mr1, in_be32(&p->mr1) |
| 541 | | EMAC_MR1_FDE | EMAC_MR1_ILE); |
| 542 | udelay(100); |
| 543 | } else if (emac_reset(dev) < 0) |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 544 | return -ETIMEDOUT; |
| 545 | |
| 546 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) |
| 547 | tah_reset(dev->tah_dev); |
| 548 | |
Benjamin Herrenschmidt | 911b237 | 2007-12-05 11:14:27 +1100 | [diff] [blame] | 549 | DBG(dev, " link = %d duplex = %d, pause = %d, asym_pause = %d\n", |
| 550 | link, dev->phy.duplex, dev->phy.pause, dev->phy.asym_pause); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 551 | |
| 552 | /* Default fifo sizes */ |
| 553 | tx_size = dev->tx_fifo_size; |
| 554 | rx_size = dev->rx_fifo_size; |
| 555 | |
Benjamin Herrenschmidt | 911b237 | 2007-12-05 11:14:27 +1100 | [diff] [blame] | 556 | /* No link, force loopback */ |
| 557 | if (!link) |
| 558 | mr1 = EMAC_MR1_FDE | EMAC_MR1_ILE; |
| 559 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 560 | /* Check for full duplex */ |
Benjamin Herrenschmidt | 911b237 | 2007-12-05 11:14:27 +1100 | [diff] [blame] | 561 | else if (dev->phy.duplex == DUPLEX_FULL) |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 562 | mr1 |= EMAC_MR1_FDE | EMAC_MR1_MWSW_001; |
| 563 | |
| 564 | /* Adjust fifo sizes, mr1 and timeouts based on link speed */ |
| 565 | dev->stop_timeout = STOP_TIMEOUT_10; |
| 566 | switch (dev->phy.speed) { |
| 567 | case SPEED_1000: |
| 568 | if (emac_phy_gpcs(dev->phy.mode)) { |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 569 | mr1 |= EMAC_MR1_MF_1000GPCS | EMAC_MR1_MF_IPPA( |
| 570 | (dev->phy.gpcs_address != 0xffffffff) ? |
| 571 | dev->phy.gpcs_address : dev->phy.address); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 572 | |
| 573 | /* Put some arbitrary OUI, Manuf & Rev IDs so we can |
| 574 | * identify this GPCS PHY later. |
| 575 | */ |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 576 | out_be32(&p->u1.emac4.ipcr, 0xdeadbeef); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 577 | } else |
| 578 | mr1 |= EMAC_MR1_MF_1000; |
| 579 | |
| 580 | /* Extended fifo sizes */ |
| 581 | tx_size = dev->tx_fifo_size_gige; |
| 582 | rx_size = dev->rx_fifo_size_gige; |
| 583 | |
| 584 | if (dev->ndev->mtu > ETH_DATA_LEN) { |
Stefan Roese | f34ebab | 2008-04-22 10:46:42 +1000 | [diff] [blame] | 585 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
| 586 | mr1 |= EMAC4_MR1_JPSM; |
| 587 | else |
| 588 | mr1 |= EMAC_MR1_JPSM; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 589 | dev->stop_timeout = STOP_TIMEOUT_1000_JUMBO; |
| 590 | } else |
| 591 | dev->stop_timeout = STOP_TIMEOUT_1000; |
| 592 | break; |
| 593 | case SPEED_100: |
| 594 | mr1 |= EMAC_MR1_MF_100; |
| 595 | dev->stop_timeout = STOP_TIMEOUT_100; |
| 596 | break; |
| 597 | default: /* make gcc happy */ |
| 598 | break; |
| 599 | } |
| 600 | |
| 601 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) |
| 602 | rgmii_set_speed(dev->rgmii_dev, dev->rgmii_port, |
| 603 | dev->phy.speed); |
| 604 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) |
| 605 | zmii_set_speed(dev->zmii_dev, dev->zmii_port, dev->phy.speed); |
| 606 | |
| 607 | /* on 40x erratum forces us to NOT use integrated flow control, |
| 608 | * let's hope it works on 44x ;) |
| 609 | */ |
| 610 | if (!emac_has_feature(dev, EMAC_FTR_NO_FLOW_CONTROL_40x) && |
| 611 | dev->phy.duplex == DUPLEX_FULL) { |
| 612 | if (dev->phy.pause) |
| 613 | mr1 |= EMAC_MR1_EIFC | EMAC_MR1_APP; |
| 614 | else if (dev->phy.asym_pause) |
| 615 | mr1 |= EMAC_MR1_APP; |
| 616 | } |
| 617 | |
| 618 | /* Add base settings & fifo sizes & program MR1 */ |
| 619 | mr1 |= emac_calc_base_mr1(dev, tx_size, rx_size); |
| 620 | out_be32(&p->mr1, mr1); |
| 621 | |
| 622 | /* Set individual MAC address */ |
| 623 | out_be32(&p->iahr, (ndev->dev_addr[0] << 8) | ndev->dev_addr[1]); |
| 624 | out_be32(&p->ialr, (ndev->dev_addr[2] << 24) | |
| 625 | (ndev->dev_addr[3] << 16) | (ndev->dev_addr[4] << 8) | |
| 626 | ndev->dev_addr[5]); |
| 627 | |
| 628 | /* VLAN Tag Protocol ID */ |
| 629 | out_be32(&p->vtpid, 0x8100); |
| 630 | |
| 631 | /* Receive mode register */ |
| 632 | r = emac_iff2rmr(ndev); |
| 633 | if (r & EMAC_RMR_MAE) |
| 634 | emac_hash_mc(dev); |
| 635 | out_be32(&p->rmr, r); |
| 636 | |
| 637 | /* FIFOs thresholds */ |
| 638 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
| 639 | r = EMAC4_TMR1((dev->mal_burst_size / dev->fifo_entry_size) + 1, |
| 640 | tx_size / 2 / dev->fifo_entry_size); |
| 641 | else |
| 642 | r = EMAC_TMR1((dev->mal_burst_size / dev->fifo_entry_size) + 1, |
| 643 | tx_size / 2 / dev->fifo_entry_size); |
| 644 | out_be32(&p->tmr1, r); |
| 645 | out_be32(&p->trtr, emac_calc_trtr(dev, tx_size / 2)); |
| 646 | |
| 647 | /* PAUSE frame is sent when RX FIFO reaches its high-water mark, |
| 648 | there should be still enough space in FIFO to allow the our link |
| 649 | partner time to process this frame and also time to send PAUSE |
| 650 | frame itself. |
| 651 | |
| 652 | Here is the worst case scenario for the RX FIFO "headroom" |
| 653 | (from "The Switch Book") (100Mbps, without preamble, inter-frame gap): |
| 654 | |
| 655 | 1) One maximum-length frame on TX 1522 bytes |
| 656 | 2) One PAUSE frame time 64 bytes |
| 657 | 3) PAUSE frame decode time allowance 64 bytes |
| 658 | 4) One maximum-length frame on RX 1522 bytes |
| 659 | 5) Round-trip propagation delay of the link (100Mb) 15 bytes |
| 660 | ---------- |
| 661 | 3187 bytes |
| 662 | |
| 663 | I chose to set high-water mark to RX_FIFO_SIZE / 4 (1024 bytes) |
| 664 | low-water mark to RX_FIFO_SIZE / 8 (512 bytes) |
| 665 | */ |
| 666 | r = emac_calc_rwmr(dev, rx_size / 8 / dev->fifo_entry_size, |
| 667 | rx_size / 4 / dev->fifo_entry_size); |
| 668 | out_be32(&p->rwmr, r); |
| 669 | |
| 670 | /* Set PAUSE timer to the maximum */ |
| 671 | out_be32(&p->ptr, 0xffff); |
| 672 | |
| 673 | /* IRQ sources */ |
| 674 | r = EMAC_ISR_OVR | EMAC_ISR_BP | EMAC_ISR_SE | |
| 675 | EMAC_ISR_ALE | EMAC_ISR_BFCS | EMAC_ISR_PTLE | EMAC_ISR_ORE | |
| 676 | EMAC_ISR_IRE | EMAC_ISR_TE; |
| 677 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
| 678 | r |= EMAC4_ISR_TXPE | EMAC4_ISR_RXPE /* | EMAC4_ISR_TXUE | |
| 679 | EMAC4_ISR_RXOE | */; |
| 680 | out_be32(&p->iser, r); |
| 681 | |
| 682 | /* We need to take GPCS PHY out of isolate mode after EMAC reset */ |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 683 | if (emac_phy_gpcs(dev->phy.mode)) { |
| 684 | if (dev->phy.gpcs_address != 0xffffffff) |
| 685 | emac_mii_reset_gpcs(&dev->phy); |
| 686 | else |
| 687 | emac_mii_reset_phy(&dev->phy); |
| 688 | } |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 689 | |
| 690 | return 0; |
| 691 | } |
| 692 | |
| 693 | static void emac_reinitialize(struct emac_instance *dev) |
| 694 | { |
| 695 | DBG(dev, "reinitialize" NL); |
| 696 | |
| 697 | emac_netif_stop(dev); |
| 698 | if (!emac_configure(dev)) { |
| 699 | emac_tx_enable(dev); |
| 700 | emac_rx_enable(dev); |
| 701 | } |
| 702 | emac_netif_start(dev); |
| 703 | } |
| 704 | |
| 705 | static void emac_full_tx_reset(struct emac_instance *dev) |
| 706 | { |
| 707 | DBG(dev, "full_tx_reset" NL); |
| 708 | |
| 709 | emac_tx_disable(dev); |
| 710 | mal_disable_tx_channel(dev->mal, dev->mal_tx_chan); |
| 711 | emac_clean_tx_ring(dev); |
| 712 | dev->tx_cnt = dev->tx_slot = dev->ack_slot = 0; |
| 713 | |
| 714 | emac_configure(dev); |
| 715 | |
| 716 | mal_enable_tx_channel(dev->mal, dev->mal_tx_chan); |
| 717 | emac_tx_enable(dev); |
| 718 | emac_rx_enable(dev); |
| 719 | } |
| 720 | |
| 721 | static void emac_reset_work(struct work_struct *work) |
| 722 | { |
| 723 | struct emac_instance *dev = container_of(work, struct emac_instance, reset_work); |
| 724 | |
| 725 | DBG(dev, "reset_work" NL); |
| 726 | |
| 727 | mutex_lock(&dev->link_lock); |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 728 | if (dev->opened) { |
| 729 | emac_netif_stop(dev); |
| 730 | emac_full_tx_reset(dev); |
| 731 | emac_netif_start(dev); |
| 732 | } |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 733 | mutex_unlock(&dev->link_lock); |
| 734 | } |
| 735 | |
| 736 | static void emac_tx_timeout(struct net_device *ndev) |
| 737 | { |
| 738 | struct emac_instance *dev = netdev_priv(ndev); |
| 739 | |
| 740 | DBG(dev, "tx_timeout" NL); |
| 741 | |
| 742 | schedule_work(&dev->reset_work); |
| 743 | } |
| 744 | |
| 745 | |
| 746 | static inline int emac_phy_done(struct emac_instance *dev, u32 stacr) |
| 747 | { |
| 748 | int done = !!(stacr & EMAC_STACR_OC); |
| 749 | |
| 750 | if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) |
| 751 | done = !done; |
| 752 | |
| 753 | return done; |
| 754 | }; |
| 755 | |
| 756 | static int __emac_mdio_read(struct emac_instance *dev, u8 id, u8 reg) |
| 757 | { |
| 758 | struct emac_regs __iomem *p = dev->emacp; |
| 759 | u32 r = 0; |
| 760 | int n, err = -ETIMEDOUT; |
| 761 | |
| 762 | mutex_lock(&dev->mdio_lock); |
| 763 | |
| 764 | DBG2(dev, "mdio_read(%02x,%02x)" NL, id, reg); |
| 765 | |
| 766 | /* Enable proper MDIO port */ |
| 767 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) |
| 768 | zmii_get_mdio(dev->zmii_dev, dev->zmii_port); |
| 769 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) |
| 770 | rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port); |
| 771 | |
| 772 | /* Wait for management interface to become idle */ |
Benjamin Herrenschmidt | cca87c1 | 2008-04-23 15:17:14 +1000 | [diff] [blame] | 773 | n = 20; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 774 | while (!emac_phy_done(dev, in_be32(&p->stacr))) { |
| 775 | udelay(1); |
| 776 | if (!--n) { |
| 777 | DBG2(dev, " -> timeout wait idle\n"); |
| 778 | goto bail; |
| 779 | } |
| 780 | } |
| 781 | |
| 782 | /* Issue read command */ |
| 783 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
| 784 | r = EMAC4_STACR_BASE(dev->opb_bus_freq); |
| 785 | else |
| 786 | r = EMAC_STACR_BASE(dev->opb_bus_freq); |
| 787 | if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) |
| 788 | r |= EMAC_STACR_OC; |
Benjamin Herrenschmidt | bff713b | 2007-12-05 11:14:29 +1100 | [diff] [blame] | 789 | if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR)) |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 790 | r |= EMACX_STACR_STAC_READ; |
| 791 | else |
| 792 | r |= EMAC_STACR_STAC_READ; |
| 793 | r |= (reg & EMAC_STACR_PRA_MASK) |
| 794 | | ((id & EMAC_STACR_PCDA_MASK) << EMAC_STACR_PCDA_SHIFT); |
| 795 | out_be32(&p->stacr, r); |
| 796 | |
| 797 | /* Wait for read to complete */ |
Benjamin Herrenschmidt | cca87c1 | 2008-04-23 15:17:14 +1000 | [diff] [blame] | 798 | n = 200; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 799 | while (!emac_phy_done(dev, (r = in_be32(&p->stacr)))) { |
| 800 | udelay(1); |
| 801 | if (!--n) { |
| 802 | DBG2(dev, " -> timeout wait complete\n"); |
| 803 | goto bail; |
| 804 | } |
| 805 | } |
| 806 | |
| 807 | if (unlikely(r & EMAC_STACR_PHYE)) { |
| 808 | DBG(dev, "mdio_read(%02x, %02x) failed" NL, id, reg); |
| 809 | err = -EREMOTEIO; |
| 810 | goto bail; |
| 811 | } |
| 812 | |
| 813 | r = ((r >> EMAC_STACR_PHYD_SHIFT) & EMAC_STACR_PHYD_MASK); |
| 814 | |
| 815 | DBG2(dev, "mdio_read -> %04x" NL, r); |
| 816 | err = 0; |
| 817 | bail: |
| 818 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) |
| 819 | rgmii_put_mdio(dev->rgmii_dev, dev->rgmii_port); |
| 820 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) |
| 821 | zmii_put_mdio(dev->zmii_dev, dev->zmii_port); |
| 822 | mutex_unlock(&dev->mdio_lock); |
| 823 | |
| 824 | return err == 0 ? r : err; |
| 825 | } |
| 826 | |
| 827 | static void __emac_mdio_write(struct emac_instance *dev, u8 id, u8 reg, |
| 828 | u16 val) |
| 829 | { |
| 830 | struct emac_regs __iomem *p = dev->emacp; |
| 831 | u32 r = 0; |
| 832 | int n, err = -ETIMEDOUT; |
| 833 | |
| 834 | mutex_lock(&dev->mdio_lock); |
| 835 | |
| 836 | DBG2(dev, "mdio_write(%02x,%02x,%04x)" NL, id, reg, val); |
| 837 | |
| 838 | /* Enable proper MDIO port */ |
| 839 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) |
| 840 | zmii_get_mdio(dev->zmii_dev, dev->zmii_port); |
| 841 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) |
| 842 | rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port); |
| 843 | |
| 844 | /* Wait for management interface to be idle */ |
Benjamin Herrenschmidt | cca87c1 | 2008-04-23 15:17:14 +1000 | [diff] [blame] | 845 | n = 20; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 846 | while (!emac_phy_done(dev, in_be32(&p->stacr))) { |
| 847 | udelay(1); |
| 848 | if (!--n) { |
| 849 | DBG2(dev, " -> timeout wait idle\n"); |
| 850 | goto bail; |
| 851 | } |
| 852 | } |
| 853 | |
| 854 | /* Issue write command */ |
| 855 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
| 856 | r = EMAC4_STACR_BASE(dev->opb_bus_freq); |
| 857 | else |
| 858 | r = EMAC_STACR_BASE(dev->opb_bus_freq); |
| 859 | if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) |
| 860 | r |= EMAC_STACR_OC; |
Benjamin Herrenschmidt | bff713b | 2007-12-05 11:14:29 +1100 | [diff] [blame] | 861 | if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR)) |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 862 | r |= EMACX_STACR_STAC_WRITE; |
| 863 | else |
| 864 | r |= EMAC_STACR_STAC_WRITE; |
| 865 | r |= (reg & EMAC_STACR_PRA_MASK) | |
| 866 | ((id & EMAC_STACR_PCDA_MASK) << EMAC_STACR_PCDA_SHIFT) | |
| 867 | (val << EMAC_STACR_PHYD_SHIFT); |
| 868 | out_be32(&p->stacr, r); |
| 869 | |
| 870 | /* Wait for write to complete */ |
Benjamin Herrenschmidt | cca87c1 | 2008-04-23 15:17:14 +1000 | [diff] [blame] | 871 | n = 200; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 872 | while (!emac_phy_done(dev, in_be32(&p->stacr))) { |
| 873 | udelay(1); |
| 874 | if (!--n) { |
| 875 | DBG2(dev, " -> timeout wait complete\n"); |
| 876 | goto bail; |
| 877 | } |
| 878 | } |
| 879 | err = 0; |
| 880 | bail: |
| 881 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) |
| 882 | rgmii_put_mdio(dev->rgmii_dev, dev->rgmii_port); |
| 883 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) |
| 884 | zmii_put_mdio(dev->zmii_dev, dev->zmii_port); |
| 885 | mutex_unlock(&dev->mdio_lock); |
| 886 | } |
| 887 | |
| 888 | static int emac_mdio_read(struct net_device *ndev, int id, int reg) |
| 889 | { |
| 890 | struct emac_instance *dev = netdev_priv(ndev); |
| 891 | int res; |
| 892 | |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 893 | res = __emac_mdio_read((dev->mdio_instance && |
| 894 | dev->phy.gpcs_address != id) ? |
| 895 | dev->mdio_instance : dev, |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 896 | (u8) id, (u8) reg); |
| 897 | return res; |
| 898 | } |
| 899 | |
| 900 | static void emac_mdio_write(struct net_device *ndev, int id, int reg, int val) |
| 901 | { |
| 902 | struct emac_instance *dev = netdev_priv(ndev); |
| 903 | |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 904 | __emac_mdio_write((dev->mdio_instance && |
| 905 | dev->phy.gpcs_address != id) ? |
| 906 | dev->mdio_instance : dev, |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 907 | (u8) id, (u8) reg, (u16) val); |
| 908 | } |
| 909 | |
| 910 | /* Tx lock BH */ |
| 911 | static void __emac_set_multicast_list(struct emac_instance *dev) |
| 912 | { |
| 913 | struct emac_regs __iomem *p = dev->emacp; |
| 914 | u32 rmr = emac_iff2rmr(dev->ndev); |
| 915 | |
| 916 | DBG(dev, "__multicast %08x" NL, rmr); |
| 917 | |
| 918 | /* I decided to relax register access rules here to avoid |
| 919 | * full EMAC reset. |
| 920 | * |
| 921 | * There is a real problem with EMAC4 core if we use MWSW_001 bit |
| 922 | * in MR1 register and do a full EMAC reset. |
| 923 | * One TX BD status update is delayed and, after EMAC reset, it |
| 924 | * never happens, resulting in TX hung (it'll be recovered by TX |
| 925 | * timeout handler eventually, but this is just gross). |
| 926 | * So we either have to do full TX reset or try to cheat here :) |
| 927 | * |
| 928 | * The only required change is to RX mode register, so I *think* all |
| 929 | * we need is just to stop RX channel. This seems to work on all |
| 930 | * tested SoCs. --ebs |
| 931 | * |
| 932 | * If we need the full reset, we might just trigger the workqueue |
| 933 | * and do it async... a bit nasty but should work --BenH |
| 934 | */ |
| 935 | dev->mcast_pending = 0; |
| 936 | emac_rx_disable(dev); |
| 937 | if (rmr & EMAC_RMR_MAE) |
| 938 | emac_hash_mc(dev); |
| 939 | out_be32(&p->rmr, rmr); |
| 940 | emac_rx_enable(dev); |
| 941 | } |
| 942 | |
| 943 | /* Tx lock BH */ |
| 944 | static void emac_set_multicast_list(struct net_device *ndev) |
| 945 | { |
| 946 | struct emac_instance *dev = netdev_priv(ndev); |
| 947 | |
| 948 | DBG(dev, "multicast" NL); |
| 949 | |
| 950 | BUG_ON(!netif_running(dev->ndev)); |
| 951 | |
| 952 | if (dev->no_mcast) { |
| 953 | dev->mcast_pending = 1; |
| 954 | return; |
| 955 | } |
| 956 | __emac_set_multicast_list(dev); |
| 957 | } |
| 958 | |
| 959 | static int emac_resize_rx_ring(struct emac_instance *dev, int new_mtu) |
| 960 | { |
| 961 | int rx_sync_size = emac_rx_sync_size(new_mtu); |
| 962 | int rx_skb_size = emac_rx_skb_size(new_mtu); |
| 963 | int i, ret = 0; |
| 964 | |
| 965 | mutex_lock(&dev->link_lock); |
| 966 | emac_netif_stop(dev); |
| 967 | emac_rx_disable(dev); |
| 968 | mal_disable_rx_channel(dev->mal, dev->mal_rx_chan); |
| 969 | |
| 970 | if (dev->rx_sg_skb) { |
| 971 | ++dev->estats.rx_dropped_resize; |
| 972 | dev_kfree_skb(dev->rx_sg_skb); |
| 973 | dev->rx_sg_skb = NULL; |
| 974 | } |
| 975 | |
| 976 | /* Make a first pass over RX ring and mark BDs ready, dropping |
| 977 | * non-processed packets on the way. We need this as a separate pass |
| 978 | * to simplify error recovery in the case of allocation failure later. |
| 979 | */ |
| 980 | for (i = 0; i < NUM_RX_BUFF; ++i) { |
| 981 | if (dev->rx_desc[i].ctrl & MAL_RX_CTRL_FIRST) |
| 982 | ++dev->estats.rx_dropped_resize; |
| 983 | |
| 984 | dev->rx_desc[i].data_len = 0; |
| 985 | dev->rx_desc[i].ctrl = MAL_RX_CTRL_EMPTY | |
| 986 | (i == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0); |
| 987 | } |
| 988 | |
| 989 | /* Reallocate RX ring only if bigger skb buffers are required */ |
| 990 | if (rx_skb_size <= dev->rx_skb_size) |
| 991 | goto skip; |
| 992 | |
| 993 | /* Second pass, allocate new skbs */ |
| 994 | for (i = 0; i < NUM_RX_BUFF; ++i) { |
| 995 | struct sk_buff *skb = alloc_skb(rx_skb_size, GFP_ATOMIC); |
| 996 | if (!skb) { |
| 997 | ret = -ENOMEM; |
| 998 | goto oom; |
| 999 | } |
| 1000 | |
| 1001 | BUG_ON(!dev->rx_skb[i]); |
| 1002 | dev_kfree_skb(dev->rx_skb[i]); |
| 1003 | |
| 1004 | skb_reserve(skb, EMAC_RX_SKB_HEADROOM + 2); |
| 1005 | dev->rx_desc[i].data_ptr = |
| 1006 | dma_map_single(&dev->ofdev->dev, skb->data - 2, rx_sync_size, |
| 1007 | DMA_FROM_DEVICE) + 2; |
| 1008 | dev->rx_skb[i] = skb; |
| 1009 | } |
| 1010 | skip: |
| 1011 | /* Check if we need to change "Jumbo" bit in MR1 */ |
| 1012 | if ((new_mtu > ETH_DATA_LEN) ^ (dev->ndev->mtu > ETH_DATA_LEN)) { |
| 1013 | /* This is to prevent starting RX channel in emac_rx_enable() */ |
| 1014 | set_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags); |
| 1015 | |
| 1016 | dev->ndev->mtu = new_mtu; |
| 1017 | emac_full_tx_reset(dev); |
| 1018 | } |
| 1019 | |
| 1020 | mal_set_rcbs(dev->mal, dev->mal_rx_chan, emac_rx_size(new_mtu)); |
| 1021 | oom: |
| 1022 | /* Restart RX */ |
| 1023 | clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags); |
| 1024 | dev->rx_slot = 0; |
| 1025 | mal_enable_rx_channel(dev->mal, dev->mal_rx_chan); |
| 1026 | emac_rx_enable(dev); |
| 1027 | emac_netif_start(dev); |
| 1028 | mutex_unlock(&dev->link_lock); |
| 1029 | |
| 1030 | return ret; |
| 1031 | } |
| 1032 | |
| 1033 | /* Process ctx, rtnl_lock semaphore */ |
| 1034 | static int emac_change_mtu(struct net_device *ndev, int new_mtu) |
| 1035 | { |
| 1036 | struct emac_instance *dev = netdev_priv(ndev); |
| 1037 | int ret = 0; |
| 1038 | |
| 1039 | if (new_mtu < EMAC_MIN_MTU || new_mtu > dev->max_mtu) |
| 1040 | return -EINVAL; |
| 1041 | |
| 1042 | DBG(dev, "change_mtu(%d)" NL, new_mtu); |
| 1043 | |
| 1044 | if (netif_running(ndev)) { |
| 1045 | /* Check if we really need to reinitalize RX ring */ |
| 1046 | if (emac_rx_skb_size(ndev->mtu) != emac_rx_skb_size(new_mtu)) |
| 1047 | ret = emac_resize_rx_ring(dev, new_mtu); |
| 1048 | } |
| 1049 | |
| 1050 | if (!ret) { |
| 1051 | ndev->mtu = new_mtu; |
| 1052 | dev->rx_skb_size = emac_rx_skb_size(new_mtu); |
| 1053 | dev->rx_sync_size = emac_rx_sync_size(new_mtu); |
| 1054 | } |
| 1055 | |
| 1056 | return ret; |
| 1057 | } |
| 1058 | |
| 1059 | static void emac_clean_tx_ring(struct emac_instance *dev) |
| 1060 | { |
| 1061 | int i; |
| 1062 | |
| 1063 | for (i = 0; i < NUM_TX_BUFF; ++i) { |
| 1064 | if (dev->tx_skb[i]) { |
| 1065 | dev_kfree_skb(dev->tx_skb[i]); |
| 1066 | dev->tx_skb[i] = NULL; |
| 1067 | if (dev->tx_desc[i].ctrl & MAL_TX_CTRL_READY) |
| 1068 | ++dev->estats.tx_dropped; |
| 1069 | } |
| 1070 | dev->tx_desc[i].ctrl = 0; |
| 1071 | dev->tx_desc[i].data_ptr = 0; |
| 1072 | } |
| 1073 | } |
| 1074 | |
| 1075 | static void emac_clean_rx_ring(struct emac_instance *dev) |
| 1076 | { |
| 1077 | int i; |
| 1078 | |
| 1079 | for (i = 0; i < NUM_RX_BUFF; ++i) |
| 1080 | if (dev->rx_skb[i]) { |
| 1081 | dev->rx_desc[i].ctrl = 0; |
| 1082 | dev_kfree_skb(dev->rx_skb[i]); |
| 1083 | dev->rx_skb[i] = NULL; |
| 1084 | dev->rx_desc[i].data_ptr = 0; |
| 1085 | } |
| 1086 | |
| 1087 | if (dev->rx_sg_skb) { |
| 1088 | dev_kfree_skb(dev->rx_sg_skb); |
| 1089 | dev->rx_sg_skb = NULL; |
| 1090 | } |
| 1091 | } |
| 1092 | |
| 1093 | static inline int emac_alloc_rx_skb(struct emac_instance *dev, int slot, |
| 1094 | gfp_t flags) |
| 1095 | { |
| 1096 | struct sk_buff *skb = alloc_skb(dev->rx_skb_size, flags); |
| 1097 | if (unlikely(!skb)) |
| 1098 | return -ENOMEM; |
| 1099 | |
| 1100 | dev->rx_skb[slot] = skb; |
| 1101 | dev->rx_desc[slot].data_len = 0; |
| 1102 | |
| 1103 | skb_reserve(skb, EMAC_RX_SKB_HEADROOM + 2); |
| 1104 | dev->rx_desc[slot].data_ptr = |
| 1105 | dma_map_single(&dev->ofdev->dev, skb->data - 2, dev->rx_sync_size, |
| 1106 | DMA_FROM_DEVICE) + 2; |
| 1107 | wmb(); |
| 1108 | dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY | |
| 1109 | (slot == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0); |
| 1110 | |
| 1111 | return 0; |
| 1112 | } |
| 1113 | |
| 1114 | static void emac_print_link_status(struct emac_instance *dev) |
| 1115 | { |
| 1116 | if (netif_carrier_ok(dev->ndev)) |
| 1117 | printk(KERN_INFO "%s: link is up, %d %s%s\n", |
| 1118 | dev->ndev->name, dev->phy.speed, |
| 1119 | dev->phy.duplex == DUPLEX_FULL ? "FDX" : "HDX", |
| 1120 | dev->phy.pause ? ", pause enabled" : |
| 1121 | dev->phy.asym_pause ? ", asymmetric pause enabled" : ""); |
| 1122 | else |
| 1123 | printk(KERN_INFO "%s: link is down\n", dev->ndev->name); |
| 1124 | } |
| 1125 | |
| 1126 | /* Process ctx, rtnl_lock semaphore */ |
| 1127 | static int emac_open(struct net_device *ndev) |
| 1128 | { |
| 1129 | struct emac_instance *dev = netdev_priv(ndev); |
| 1130 | int err, i; |
| 1131 | |
| 1132 | DBG(dev, "open" NL); |
| 1133 | |
| 1134 | /* Setup error IRQ handler */ |
| 1135 | err = request_irq(dev->emac_irq, emac_irq, 0, "EMAC", dev); |
| 1136 | if (err) { |
| 1137 | printk(KERN_ERR "%s: failed to request IRQ %d\n", |
| 1138 | ndev->name, dev->emac_irq); |
| 1139 | return err; |
| 1140 | } |
| 1141 | |
| 1142 | /* Allocate RX ring */ |
| 1143 | for (i = 0; i < NUM_RX_BUFF; ++i) |
| 1144 | if (emac_alloc_rx_skb(dev, i, GFP_KERNEL)) { |
| 1145 | printk(KERN_ERR "%s: failed to allocate RX ring\n", |
| 1146 | ndev->name); |
| 1147 | goto oom; |
| 1148 | } |
| 1149 | |
| 1150 | dev->tx_cnt = dev->tx_slot = dev->ack_slot = dev->rx_slot = 0; |
| 1151 | clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags); |
| 1152 | dev->rx_sg_skb = NULL; |
| 1153 | |
| 1154 | mutex_lock(&dev->link_lock); |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 1155 | dev->opened = 1; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1156 | |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 1157 | /* Start PHY polling now. |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1158 | */ |
| 1159 | if (dev->phy.address >= 0) { |
| 1160 | int link_poll_interval; |
| 1161 | if (dev->phy.def->ops->poll_link(&dev->phy)) { |
| 1162 | dev->phy.def->ops->read_link(&dev->phy); |
Valentine Barshak | 11121e3 | 2008-04-22 10:46:48 +1000 | [diff] [blame] | 1163 | emac_rx_clk_default(dev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1164 | netif_carrier_on(dev->ndev); |
| 1165 | link_poll_interval = PHY_POLL_LINK_ON; |
| 1166 | } else { |
Valentine Barshak | 11121e3 | 2008-04-22 10:46:48 +1000 | [diff] [blame] | 1167 | emac_rx_clk_tx(dev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1168 | netif_carrier_off(dev->ndev); |
| 1169 | link_poll_interval = PHY_POLL_LINK_OFF; |
| 1170 | } |
| 1171 | dev->link_polling = 1; |
| 1172 | wmb(); |
| 1173 | schedule_delayed_work(&dev->link_work, link_poll_interval); |
| 1174 | emac_print_link_status(dev); |
| 1175 | } else |
| 1176 | netif_carrier_on(dev->ndev); |
| 1177 | |
Benjamin Herrenschmidt | e829658 | 2008-08-18 07:29:23 +1000 | [diff] [blame] | 1178 | /* Required for Pause packet support in EMAC */ |
| 1179 | dev_mc_add(ndev, default_mcast_addr, sizeof(default_mcast_addr), 1); |
| 1180 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1181 | emac_configure(dev); |
| 1182 | mal_poll_add(dev->mal, &dev->commac); |
| 1183 | mal_enable_tx_channel(dev->mal, dev->mal_tx_chan); |
| 1184 | mal_set_rcbs(dev->mal, dev->mal_rx_chan, emac_rx_size(ndev->mtu)); |
| 1185 | mal_enable_rx_channel(dev->mal, dev->mal_rx_chan); |
| 1186 | emac_tx_enable(dev); |
| 1187 | emac_rx_enable(dev); |
| 1188 | emac_netif_start(dev); |
| 1189 | |
| 1190 | mutex_unlock(&dev->link_lock); |
| 1191 | |
| 1192 | return 0; |
| 1193 | oom: |
| 1194 | emac_clean_rx_ring(dev); |
| 1195 | free_irq(dev->emac_irq, dev); |
| 1196 | |
| 1197 | return -ENOMEM; |
| 1198 | } |
| 1199 | |
| 1200 | /* BHs disabled */ |
| 1201 | #if 0 |
| 1202 | static int emac_link_differs(struct emac_instance *dev) |
| 1203 | { |
| 1204 | u32 r = in_be32(&dev->emacp->mr1); |
| 1205 | |
| 1206 | int duplex = r & EMAC_MR1_FDE ? DUPLEX_FULL : DUPLEX_HALF; |
| 1207 | int speed, pause, asym_pause; |
| 1208 | |
| 1209 | if (r & EMAC_MR1_MF_1000) |
| 1210 | speed = SPEED_1000; |
| 1211 | else if (r & EMAC_MR1_MF_100) |
| 1212 | speed = SPEED_100; |
| 1213 | else |
| 1214 | speed = SPEED_10; |
| 1215 | |
| 1216 | switch (r & (EMAC_MR1_EIFC | EMAC_MR1_APP)) { |
| 1217 | case (EMAC_MR1_EIFC | EMAC_MR1_APP): |
| 1218 | pause = 1; |
| 1219 | asym_pause = 0; |
| 1220 | break; |
| 1221 | case EMAC_MR1_APP: |
| 1222 | pause = 0; |
| 1223 | asym_pause = 1; |
| 1224 | break; |
| 1225 | default: |
| 1226 | pause = asym_pause = 0; |
| 1227 | } |
| 1228 | return speed != dev->phy.speed || duplex != dev->phy.duplex || |
| 1229 | pause != dev->phy.pause || asym_pause != dev->phy.asym_pause; |
| 1230 | } |
| 1231 | #endif |
| 1232 | |
| 1233 | static void emac_link_timer(struct work_struct *work) |
| 1234 | { |
| 1235 | struct emac_instance *dev = |
Jean Delvare | 10fd9d7 | 2009-04-06 02:27:10 +0000 | [diff] [blame] | 1236 | container_of(to_delayed_work(work), |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1237 | struct emac_instance, link_work); |
| 1238 | int link_poll_interval; |
| 1239 | |
| 1240 | mutex_lock(&dev->link_lock); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1241 | DBG2(dev, "link timer" NL); |
| 1242 | |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 1243 | if (!dev->opened) |
| 1244 | goto bail; |
| 1245 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1246 | if (dev->phy.def->ops->poll_link(&dev->phy)) { |
| 1247 | if (!netif_carrier_ok(dev->ndev)) { |
Valentine Barshak | 11121e3 | 2008-04-22 10:46:48 +1000 | [diff] [blame] | 1248 | emac_rx_clk_default(dev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1249 | /* Get new link parameters */ |
| 1250 | dev->phy.def->ops->read_link(&dev->phy); |
| 1251 | |
| 1252 | netif_carrier_on(dev->ndev); |
| 1253 | emac_netif_stop(dev); |
| 1254 | emac_full_tx_reset(dev); |
| 1255 | emac_netif_start(dev); |
| 1256 | emac_print_link_status(dev); |
| 1257 | } |
| 1258 | link_poll_interval = PHY_POLL_LINK_ON; |
| 1259 | } else { |
| 1260 | if (netif_carrier_ok(dev->ndev)) { |
Valentine Barshak | 11121e3 | 2008-04-22 10:46:48 +1000 | [diff] [blame] | 1261 | emac_rx_clk_tx(dev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1262 | netif_carrier_off(dev->ndev); |
| 1263 | netif_tx_disable(dev->ndev); |
Benjamin Herrenschmidt | 911b237 | 2007-12-05 11:14:27 +1100 | [diff] [blame] | 1264 | emac_reinitialize(dev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1265 | emac_print_link_status(dev); |
| 1266 | } |
| 1267 | link_poll_interval = PHY_POLL_LINK_OFF; |
| 1268 | } |
| 1269 | schedule_delayed_work(&dev->link_work, link_poll_interval); |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 1270 | bail: |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1271 | mutex_unlock(&dev->link_lock); |
| 1272 | } |
| 1273 | |
| 1274 | static void emac_force_link_update(struct emac_instance *dev) |
| 1275 | { |
| 1276 | netif_carrier_off(dev->ndev); |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 1277 | smp_rmb(); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1278 | if (dev->link_polling) { |
| 1279 | cancel_rearming_delayed_work(&dev->link_work); |
| 1280 | if (dev->link_polling) |
| 1281 | schedule_delayed_work(&dev->link_work, PHY_POLL_LINK_OFF); |
| 1282 | } |
| 1283 | } |
| 1284 | |
| 1285 | /* Process ctx, rtnl_lock semaphore */ |
| 1286 | static int emac_close(struct net_device *ndev) |
| 1287 | { |
| 1288 | struct emac_instance *dev = netdev_priv(ndev); |
| 1289 | |
| 1290 | DBG(dev, "close" NL); |
| 1291 | |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 1292 | if (dev->phy.address >= 0) { |
| 1293 | dev->link_polling = 0; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1294 | cancel_rearming_delayed_work(&dev->link_work); |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 1295 | } |
| 1296 | mutex_lock(&dev->link_lock); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1297 | emac_netif_stop(dev); |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 1298 | dev->opened = 0; |
| 1299 | mutex_unlock(&dev->link_lock); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1300 | |
| 1301 | emac_rx_disable(dev); |
| 1302 | emac_tx_disable(dev); |
| 1303 | mal_disable_rx_channel(dev->mal, dev->mal_rx_chan); |
| 1304 | mal_disable_tx_channel(dev->mal, dev->mal_tx_chan); |
| 1305 | mal_poll_del(dev->mal, &dev->commac); |
| 1306 | |
| 1307 | emac_clean_tx_ring(dev); |
| 1308 | emac_clean_rx_ring(dev); |
| 1309 | |
| 1310 | free_irq(dev->emac_irq, dev); |
| 1311 | |
Petri Gynther | d3b325f | 2009-08-20 02:21:27 -0700 | [diff] [blame] | 1312 | netif_carrier_off(ndev); |
| 1313 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1314 | return 0; |
| 1315 | } |
| 1316 | |
| 1317 | static inline u16 emac_tx_csum(struct emac_instance *dev, |
| 1318 | struct sk_buff *skb) |
| 1319 | { |
Valentine Barshak | e66f416 | 2008-03-27 17:43:57 +0300 | [diff] [blame] | 1320 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH) && |
| 1321 | (skb->ip_summed == CHECKSUM_PARTIAL)) { |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1322 | ++dev->stats.tx_packets_csum; |
| 1323 | return EMAC_TX_CTRL_TAH_CSUM; |
| 1324 | } |
| 1325 | return 0; |
| 1326 | } |
| 1327 | |
| 1328 | static inline int emac_xmit_finish(struct emac_instance *dev, int len) |
| 1329 | { |
| 1330 | struct emac_regs __iomem *p = dev->emacp; |
| 1331 | struct net_device *ndev = dev->ndev; |
| 1332 | |
| 1333 | /* Send the packet out. If the if makes a significant perf |
| 1334 | * difference, then we can store the TMR0 value in "dev" |
| 1335 | * instead |
| 1336 | */ |
| 1337 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1338 | out_be32(&p->tmr0, EMAC4_TMR0_XMIT); |
vbarshak@ru.mvista.com | 07c2c76 | 2007-10-02 16:01:07 +0400 | [diff] [blame] | 1339 | else |
| 1340 | out_be32(&p->tmr0, EMAC_TMR0_XMIT); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1341 | |
| 1342 | if (unlikely(++dev->tx_cnt == NUM_TX_BUFF)) { |
| 1343 | netif_stop_queue(ndev); |
| 1344 | DBG2(dev, "stopped TX queue" NL); |
| 1345 | } |
| 1346 | |
| 1347 | ndev->trans_start = jiffies; |
| 1348 | ++dev->stats.tx_packets; |
| 1349 | dev->stats.tx_bytes += len; |
| 1350 | |
Patrick McHardy | ec634fe | 2009-07-05 19:23:38 -0700 | [diff] [blame] | 1351 | return NETDEV_TX_OK; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1352 | } |
| 1353 | |
| 1354 | /* Tx lock BH */ |
| 1355 | static int emac_start_xmit(struct sk_buff *skb, struct net_device *ndev) |
| 1356 | { |
| 1357 | struct emac_instance *dev = netdev_priv(ndev); |
| 1358 | unsigned int len = skb->len; |
| 1359 | int slot; |
| 1360 | |
| 1361 | u16 ctrl = EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP | MAL_TX_CTRL_READY | |
| 1362 | MAL_TX_CTRL_LAST | emac_tx_csum(dev, skb); |
| 1363 | |
| 1364 | slot = dev->tx_slot++; |
| 1365 | if (dev->tx_slot == NUM_TX_BUFF) { |
| 1366 | dev->tx_slot = 0; |
| 1367 | ctrl |= MAL_TX_CTRL_WRAP; |
| 1368 | } |
| 1369 | |
| 1370 | DBG2(dev, "xmit(%u) %d" NL, len, slot); |
| 1371 | |
| 1372 | dev->tx_skb[slot] = skb; |
| 1373 | dev->tx_desc[slot].data_ptr = dma_map_single(&dev->ofdev->dev, |
| 1374 | skb->data, len, |
| 1375 | DMA_TO_DEVICE); |
| 1376 | dev->tx_desc[slot].data_len = (u16) len; |
| 1377 | wmb(); |
| 1378 | dev->tx_desc[slot].ctrl = ctrl; |
| 1379 | |
| 1380 | return emac_xmit_finish(dev, len); |
| 1381 | } |
| 1382 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1383 | static inline int emac_xmit_split(struct emac_instance *dev, int slot, |
| 1384 | u32 pd, int len, int last, u16 base_ctrl) |
| 1385 | { |
| 1386 | while (1) { |
| 1387 | u16 ctrl = base_ctrl; |
| 1388 | int chunk = min(len, MAL_MAX_TX_SIZE); |
| 1389 | len -= chunk; |
| 1390 | |
| 1391 | slot = (slot + 1) % NUM_TX_BUFF; |
| 1392 | |
| 1393 | if (last && !len) |
| 1394 | ctrl |= MAL_TX_CTRL_LAST; |
| 1395 | if (slot == NUM_TX_BUFF - 1) |
| 1396 | ctrl |= MAL_TX_CTRL_WRAP; |
| 1397 | |
| 1398 | dev->tx_skb[slot] = NULL; |
| 1399 | dev->tx_desc[slot].data_ptr = pd; |
| 1400 | dev->tx_desc[slot].data_len = (u16) chunk; |
| 1401 | dev->tx_desc[slot].ctrl = ctrl; |
| 1402 | ++dev->tx_cnt; |
| 1403 | |
| 1404 | if (!len) |
| 1405 | break; |
| 1406 | |
| 1407 | pd += chunk; |
| 1408 | } |
| 1409 | return slot; |
| 1410 | } |
| 1411 | |
| 1412 | /* Tx lock BH disabled (SG version for TAH equipped EMACs) */ |
| 1413 | static int emac_start_xmit_sg(struct sk_buff *skb, struct net_device *ndev) |
| 1414 | { |
| 1415 | struct emac_instance *dev = netdev_priv(ndev); |
| 1416 | int nr_frags = skb_shinfo(skb)->nr_frags; |
| 1417 | int len = skb->len, chunk; |
| 1418 | int slot, i; |
| 1419 | u16 ctrl; |
| 1420 | u32 pd; |
| 1421 | |
| 1422 | /* This is common "fast" path */ |
| 1423 | if (likely(!nr_frags && len <= MAL_MAX_TX_SIZE)) |
| 1424 | return emac_start_xmit(skb, ndev); |
| 1425 | |
| 1426 | len -= skb->data_len; |
| 1427 | |
| 1428 | /* Note, this is only an *estimation*, we can still run out of empty |
| 1429 | * slots because of the additional fragmentation into |
| 1430 | * MAL_MAX_TX_SIZE-sized chunks |
| 1431 | */ |
| 1432 | if (unlikely(dev->tx_cnt + nr_frags + mal_tx_chunks(len) > NUM_TX_BUFF)) |
| 1433 | goto stop_queue; |
| 1434 | |
| 1435 | ctrl = EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP | MAL_TX_CTRL_READY | |
| 1436 | emac_tx_csum(dev, skb); |
| 1437 | slot = dev->tx_slot; |
| 1438 | |
| 1439 | /* skb data */ |
| 1440 | dev->tx_skb[slot] = NULL; |
| 1441 | chunk = min(len, MAL_MAX_TX_SIZE); |
| 1442 | dev->tx_desc[slot].data_ptr = pd = |
| 1443 | dma_map_single(&dev->ofdev->dev, skb->data, len, DMA_TO_DEVICE); |
| 1444 | dev->tx_desc[slot].data_len = (u16) chunk; |
| 1445 | len -= chunk; |
| 1446 | if (unlikely(len)) |
| 1447 | slot = emac_xmit_split(dev, slot, pd + chunk, len, !nr_frags, |
| 1448 | ctrl); |
| 1449 | /* skb fragments */ |
| 1450 | for (i = 0; i < nr_frags; ++i) { |
| 1451 | struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; |
| 1452 | len = frag->size; |
| 1453 | |
| 1454 | if (unlikely(dev->tx_cnt + mal_tx_chunks(len) >= NUM_TX_BUFF)) |
| 1455 | goto undo_frame; |
| 1456 | |
| 1457 | pd = dma_map_page(&dev->ofdev->dev, frag->page, frag->page_offset, len, |
| 1458 | DMA_TO_DEVICE); |
| 1459 | |
| 1460 | slot = emac_xmit_split(dev, slot, pd, len, i == nr_frags - 1, |
| 1461 | ctrl); |
| 1462 | } |
| 1463 | |
| 1464 | DBG2(dev, "xmit_sg(%u) %d - %d" NL, skb->len, dev->tx_slot, slot); |
| 1465 | |
| 1466 | /* Attach skb to the last slot so we don't release it too early */ |
| 1467 | dev->tx_skb[slot] = skb; |
| 1468 | |
| 1469 | /* Send the packet out */ |
| 1470 | if (dev->tx_slot == NUM_TX_BUFF - 1) |
| 1471 | ctrl |= MAL_TX_CTRL_WRAP; |
| 1472 | wmb(); |
| 1473 | dev->tx_desc[dev->tx_slot].ctrl = ctrl; |
| 1474 | dev->tx_slot = (slot + 1) % NUM_TX_BUFF; |
| 1475 | |
| 1476 | return emac_xmit_finish(dev, skb->len); |
| 1477 | |
| 1478 | undo_frame: |
| 1479 | /* Well, too bad. Our previous estimation was overly optimistic. |
| 1480 | * Undo everything. |
| 1481 | */ |
| 1482 | while (slot != dev->tx_slot) { |
| 1483 | dev->tx_desc[slot].ctrl = 0; |
| 1484 | --dev->tx_cnt; |
| 1485 | if (--slot < 0) |
| 1486 | slot = NUM_TX_BUFF - 1; |
| 1487 | } |
| 1488 | ++dev->estats.tx_undo; |
| 1489 | |
| 1490 | stop_queue: |
| 1491 | netif_stop_queue(ndev); |
| 1492 | DBG2(dev, "stopped TX queue" NL); |
Patrick McHardy | 5b54814 | 2009-06-12 06:22:29 +0000 | [diff] [blame] | 1493 | return NETDEV_TX_BUSY; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1494 | } |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1495 | |
| 1496 | /* Tx lock BHs */ |
| 1497 | static void emac_parse_tx_error(struct emac_instance *dev, u16 ctrl) |
| 1498 | { |
| 1499 | struct emac_error_stats *st = &dev->estats; |
| 1500 | |
| 1501 | DBG(dev, "BD TX error %04x" NL, ctrl); |
| 1502 | |
| 1503 | ++st->tx_bd_errors; |
| 1504 | if (ctrl & EMAC_TX_ST_BFCS) |
| 1505 | ++st->tx_bd_bad_fcs; |
| 1506 | if (ctrl & EMAC_TX_ST_LCS) |
| 1507 | ++st->tx_bd_carrier_loss; |
| 1508 | if (ctrl & EMAC_TX_ST_ED) |
| 1509 | ++st->tx_bd_excessive_deferral; |
| 1510 | if (ctrl & EMAC_TX_ST_EC) |
| 1511 | ++st->tx_bd_excessive_collisions; |
| 1512 | if (ctrl & EMAC_TX_ST_LC) |
| 1513 | ++st->tx_bd_late_collision; |
| 1514 | if (ctrl & EMAC_TX_ST_MC) |
| 1515 | ++st->tx_bd_multple_collisions; |
| 1516 | if (ctrl & EMAC_TX_ST_SC) |
| 1517 | ++st->tx_bd_single_collision; |
| 1518 | if (ctrl & EMAC_TX_ST_UR) |
| 1519 | ++st->tx_bd_underrun; |
| 1520 | if (ctrl & EMAC_TX_ST_SQE) |
| 1521 | ++st->tx_bd_sqe; |
| 1522 | } |
| 1523 | |
| 1524 | static void emac_poll_tx(void *param) |
| 1525 | { |
| 1526 | struct emac_instance *dev = param; |
| 1527 | u32 bad_mask; |
| 1528 | |
| 1529 | DBG2(dev, "poll_tx, %d %d" NL, dev->tx_cnt, dev->ack_slot); |
| 1530 | |
| 1531 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) |
| 1532 | bad_mask = EMAC_IS_BAD_TX_TAH; |
| 1533 | else |
| 1534 | bad_mask = EMAC_IS_BAD_TX; |
| 1535 | |
| 1536 | netif_tx_lock_bh(dev->ndev); |
| 1537 | if (dev->tx_cnt) { |
| 1538 | u16 ctrl; |
| 1539 | int slot = dev->ack_slot, n = 0; |
| 1540 | again: |
| 1541 | ctrl = dev->tx_desc[slot].ctrl; |
| 1542 | if (!(ctrl & MAL_TX_CTRL_READY)) { |
| 1543 | struct sk_buff *skb = dev->tx_skb[slot]; |
| 1544 | ++n; |
| 1545 | |
| 1546 | if (skb) { |
| 1547 | dev_kfree_skb(skb); |
| 1548 | dev->tx_skb[slot] = NULL; |
| 1549 | } |
| 1550 | slot = (slot + 1) % NUM_TX_BUFF; |
| 1551 | |
| 1552 | if (unlikely(ctrl & bad_mask)) |
| 1553 | emac_parse_tx_error(dev, ctrl); |
| 1554 | |
| 1555 | if (--dev->tx_cnt) |
| 1556 | goto again; |
| 1557 | } |
| 1558 | if (n) { |
| 1559 | dev->ack_slot = slot; |
| 1560 | if (netif_queue_stopped(dev->ndev) && |
| 1561 | dev->tx_cnt < EMAC_TX_WAKEUP_THRESH) |
| 1562 | netif_wake_queue(dev->ndev); |
| 1563 | |
| 1564 | DBG2(dev, "tx %d pkts" NL, n); |
| 1565 | } |
| 1566 | } |
| 1567 | netif_tx_unlock_bh(dev->ndev); |
| 1568 | } |
| 1569 | |
| 1570 | static inline void emac_recycle_rx_skb(struct emac_instance *dev, int slot, |
| 1571 | int len) |
| 1572 | { |
| 1573 | struct sk_buff *skb = dev->rx_skb[slot]; |
| 1574 | |
| 1575 | DBG2(dev, "recycle %d %d" NL, slot, len); |
| 1576 | |
| 1577 | if (len) |
| 1578 | dma_map_single(&dev->ofdev->dev, skb->data - 2, |
| 1579 | EMAC_DMA_ALIGN(len + 2), DMA_FROM_DEVICE); |
| 1580 | |
| 1581 | dev->rx_desc[slot].data_len = 0; |
| 1582 | wmb(); |
| 1583 | dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY | |
| 1584 | (slot == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0); |
| 1585 | } |
| 1586 | |
| 1587 | static void emac_parse_rx_error(struct emac_instance *dev, u16 ctrl) |
| 1588 | { |
| 1589 | struct emac_error_stats *st = &dev->estats; |
| 1590 | |
| 1591 | DBG(dev, "BD RX error %04x" NL, ctrl); |
| 1592 | |
| 1593 | ++st->rx_bd_errors; |
| 1594 | if (ctrl & EMAC_RX_ST_OE) |
| 1595 | ++st->rx_bd_overrun; |
| 1596 | if (ctrl & EMAC_RX_ST_BP) |
| 1597 | ++st->rx_bd_bad_packet; |
| 1598 | if (ctrl & EMAC_RX_ST_RP) |
| 1599 | ++st->rx_bd_runt_packet; |
| 1600 | if (ctrl & EMAC_RX_ST_SE) |
| 1601 | ++st->rx_bd_short_event; |
| 1602 | if (ctrl & EMAC_RX_ST_AE) |
| 1603 | ++st->rx_bd_alignment_error; |
| 1604 | if (ctrl & EMAC_RX_ST_BFCS) |
| 1605 | ++st->rx_bd_bad_fcs; |
| 1606 | if (ctrl & EMAC_RX_ST_PTL) |
| 1607 | ++st->rx_bd_packet_too_long; |
| 1608 | if (ctrl & EMAC_RX_ST_ORE) |
| 1609 | ++st->rx_bd_out_of_range; |
| 1610 | if (ctrl & EMAC_RX_ST_IRE) |
| 1611 | ++st->rx_bd_in_range; |
| 1612 | } |
| 1613 | |
| 1614 | static inline void emac_rx_csum(struct emac_instance *dev, |
| 1615 | struct sk_buff *skb, u16 ctrl) |
| 1616 | { |
| 1617 | #ifdef CONFIG_IBM_NEW_EMAC_TAH |
| 1618 | if (!ctrl && dev->tah_dev) { |
| 1619 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1620 | ++dev->stats.rx_packets_csum; |
| 1621 | } |
| 1622 | #endif |
| 1623 | } |
| 1624 | |
| 1625 | static inline int emac_rx_sg_append(struct emac_instance *dev, int slot) |
| 1626 | { |
| 1627 | if (likely(dev->rx_sg_skb != NULL)) { |
| 1628 | int len = dev->rx_desc[slot].data_len; |
| 1629 | int tot_len = dev->rx_sg_skb->len + len; |
| 1630 | |
| 1631 | if (unlikely(tot_len + 2 > dev->rx_skb_size)) { |
| 1632 | ++dev->estats.rx_dropped_mtu; |
| 1633 | dev_kfree_skb(dev->rx_sg_skb); |
| 1634 | dev->rx_sg_skb = NULL; |
| 1635 | } else { |
Al Viro | bef1bc9 | 2007-10-14 19:20:30 +0100 | [diff] [blame] | 1636 | cacheable_memcpy(skb_tail_pointer(dev->rx_sg_skb), |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1637 | dev->rx_skb[slot]->data, len); |
| 1638 | skb_put(dev->rx_sg_skb, len); |
| 1639 | emac_recycle_rx_skb(dev, slot, len); |
| 1640 | return 0; |
| 1641 | } |
| 1642 | } |
| 1643 | emac_recycle_rx_skb(dev, slot, 0); |
| 1644 | return -1; |
| 1645 | } |
| 1646 | |
| 1647 | /* NAPI poll context */ |
| 1648 | static int emac_poll_rx(void *param, int budget) |
| 1649 | { |
| 1650 | struct emac_instance *dev = param; |
| 1651 | int slot = dev->rx_slot, received = 0; |
| 1652 | |
| 1653 | DBG2(dev, "poll_rx(%d)" NL, budget); |
| 1654 | |
| 1655 | again: |
| 1656 | while (budget > 0) { |
| 1657 | int len; |
| 1658 | struct sk_buff *skb; |
| 1659 | u16 ctrl = dev->rx_desc[slot].ctrl; |
| 1660 | |
| 1661 | if (ctrl & MAL_RX_CTRL_EMPTY) |
| 1662 | break; |
| 1663 | |
| 1664 | skb = dev->rx_skb[slot]; |
| 1665 | mb(); |
| 1666 | len = dev->rx_desc[slot].data_len; |
| 1667 | |
| 1668 | if (unlikely(!MAL_IS_SINGLE_RX(ctrl))) |
| 1669 | goto sg; |
| 1670 | |
| 1671 | ctrl &= EMAC_BAD_RX_MASK; |
| 1672 | if (unlikely(ctrl && ctrl != EMAC_RX_TAH_BAD_CSUM)) { |
| 1673 | emac_parse_rx_error(dev, ctrl); |
| 1674 | ++dev->estats.rx_dropped_error; |
| 1675 | emac_recycle_rx_skb(dev, slot, 0); |
| 1676 | len = 0; |
| 1677 | goto next; |
| 1678 | } |
| 1679 | |
Sathya Narayanan | 6c688f4 | 2008-07-01 10:58:19 +0200 | [diff] [blame] | 1680 | if (len < ETH_HLEN) { |
| 1681 | ++dev->estats.rx_dropped_stack; |
| 1682 | emac_recycle_rx_skb(dev, slot, len); |
| 1683 | goto next; |
| 1684 | } |
| 1685 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 1686 | if (len && len < EMAC_RX_COPY_THRESH) { |
| 1687 | struct sk_buff *copy_skb = |
| 1688 | alloc_skb(len + EMAC_RX_SKB_HEADROOM + 2, GFP_ATOMIC); |
| 1689 | if (unlikely(!copy_skb)) |
| 1690 | goto oom; |
| 1691 | |
| 1692 | skb_reserve(copy_skb, EMAC_RX_SKB_HEADROOM + 2); |
| 1693 | cacheable_memcpy(copy_skb->data - 2, skb->data - 2, |
| 1694 | len + 2); |
| 1695 | emac_recycle_rx_skb(dev, slot, len); |
| 1696 | skb = copy_skb; |
| 1697 | } else if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC))) |
| 1698 | goto oom; |
| 1699 | |
| 1700 | skb_put(skb, len); |
| 1701 | push_packet: |
| 1702 | skb->dev = dev->ndev; |
| 1703 | skb->protocol = eth_type_trans(skb, dev->ndev); |
| 1704 | emac_rx_csum(dev, skb, ctrl); |
| 1705 | |
| 1706 | if (unlikely(netif_receive_skb(skb) == NET_RX_DROP)) |
| 1707 | ++dev->estats.rx_dropped_stack; |
| 1708 | next: |
| 1709 | ++dev->stats.rx_packets; |
| 1710 | skip: |
| 1711 | dev->stats.rx_bytes += len; |
| 1712 | slot = (slot + 1) % NUM_RX_BUFF; |
| 1713 | --budget; |
| 1714 | ++received; |
| 1715 | continue; |
| 1716 | sg: |
| 1717 | if (ctrl & MAL_RX_CTRL_FIRST) { |
| 1718 | BUG_ON(dev->rx_sg_skb); |
| 1719 | if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC))) { |
| 1720 | DBG(dev, "rx OOM %d" NL, slot); |
| 1721 | ++dev->estats.rx_dropped_oom; |
| 1722 | emac_recycle_rx_skb(dev, slot, 0); |
| 1723 | } else { |
| 1724 | dev->rx_sg_skb = skb; |
| 1725 | skb_put(skb, len); |
| 1726 | } |
| 1727 | } else if (!emac_rx_sg_append(dev, slot) && |
| 1728 | (ctrl & MAL_RX_CTRL_LAST)) { |
| 1729 | |
| 1730 | skb = dev->rx_sg_skb; |
| 1731 | dev->rx_sg_skb = NULL; |
| 1732 | |
| 1733 | ctrl &= EMAC_BAD_RX_MASK; |
| 1734 | if (unlikely(ctrl && ctrl != EMAC_RX_TAH_BAD_CSUM)) { |
| 1735 | emac_parse_rx_error(dev, ctrl); |
| 1736 | ++dev->estats.rx_dropped_error; |
| 1737 | dev_kfree_skb(skb); |
| 1738 | len = 0; |
| 1739 | } else |
| 1740 | goto push_packet; |
| 1741 | } |
| 1742 | goto skip; |
| 1743 | oom: |
| 1744 | DBG(dev, "rx OOM %d" NL, slot); |
| 1745 | /* Drop the packet and recycle skb */ |
| 1746 | ++dev->estats.rx_dropped_oom; |
| 1747 | emac_recycle_rx_skb(dev, slot, 0); |
| 1748 | goto next; |
| 1749 | } |
| 1750 | |
| 1751 | if (received) { |
| 1752 | DBG2(dev, "rx %d BDs" NL, received); |
| 1753 | dev->rx_slot = slot; |
| 1754 | } |
| 1755 | |
| 1756 | if (unlikely(budget && test_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags))) { |
| 1757 | mb(); |
| 1758 | if (!(dev->rx_desc[slot].ctrl & MAL_RX_CTRL_EMPTY)) { |
| 1759 | DBG2(dev, "rx restart" NL); |
| 1760 | received = 0; |
| 1761 | goto again; |
| 1762 | } |
| 1763 | |
| 1764 | if (dev->rx_sg_skb) { |
| 1765 | DBG2(dev, "dropping partial rx packet" NL); |
| 1766 | ++dev->estats.rx_dropped_error; |
| 1767 | dev_kfree_skb(dev->rx_sg_skb); |
| 1768 | dev->rx_sg_skb = NULL; |
| 1769 | } |
| 1770 | |
| 1771 | clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags); |
| 1772 | mal_enable_rx_channel(dev->mal, dev->mal_rx_chan); |
| 1773 | emac_rx_enable(dev); |
| 1774 | dev->rx_slot = 0; |
| 1775 | } |
| 1776 | return received; |
| 1777 | } |
| 1778 | |
| 1779 | /* NAPI poll context */ |
| 1780 | static int emac_peek_rx(void *param) |
| 1781 | { |
| 1782 | struct emac_instance *dev = param; |
| 1783 | |
| 1784 | return !(dev->rx_desc[dev->rx_slot].ctrl & MAL_RX_CTRL_EMPTY); |
| 1785 | } |
| 1786 | |
| 1787 | /* NAPI poll context */ |
| 1788 | static int emac_peek_rx_sg(void *param) |
| 1789 | { |
| 1790 | struct emac_instance *dev = param; |
| 1791 | |
| 1792 | int slot = dev->rx_slot; |
| 1793 | while (1) { |
| 1794 | u16 ctrl = dev->rx_desc[slot].ctrl; |
| 1795 | if (ctrl & MAL_RX_CTRL_EMPTY) |
| 1796 | return 0; |
| 1797 | else if (ctrl & MAL_RX_CTRL_LAST) |
| 1798 | return 1; |
| 1799 | |
| 1800 | slot = (slot + 1) % NUM_RX_BUFF; |
| 1801 | |
| 1802 | /* I'm just being paranoid here :) */ |
| 1803 | if (unlikely(slot == dev->rx_slot)) |
| 1804 | return 0; |
| 1805 | } |
| 1806 | } |
| 1807 | |
| 1808 | /* Hard IRQ */ |
| 1809 | static void emac_rxde(void *param) |
| 1810 | { |
| 1811 | struct emac_instance *dev = param; |
| 1812 | |
| 1813 | ++dev->estats.rx_stopped; |
| 1814 | emac_rx_disable_async(dev); |
| 1815 | } |
| 1816 | |
| 1817 | /* Hard IRQ */ |
| 1818 | static irqreturn_t emac_irq(int irq, void *dev_instance) |
| 1819 | { |
| 1820 | struct emac_instance *dev = dev_instance; |
| 1821 | struct emac_regs __iomem *p = dev->emacp; |
| 1822 | struct emac_error_stats *st = &dev->estats; |
| 1823 | u32 isr; |
| 1824 | |
| 1825 | spin_lock(&dev->lock); |
| 1826 | |
| 1827 | isr = in_be32(&p->isr); |
| 1828 | out_be32(&p->isr, isr); |
| 1829 | |
| 1830 | DBG(dev, "isr = %08x" NL, isr); |
| 1831 | |
| 1832 | if (isr & EMAC4_ISR_TXPE) |
| 1833 | ++st->tx_parity; |
| 1834 | if (isr & EMAC4_ISR_RXPE) |
| 1835 | ++st->rx_parity; |
| 1836 | if (isr & EMAC4_ISR_TXUE) |
| 1837 | ++st->tx_underrun; |
| 1838 | if (isr & EMAC4_ISR_RXOE) |
| 1839 | ++st->rx_fifo_overrun; |
| 1840 | if (isr & EMAC_ISR_OVR) |
| 1841 | ++st->rx_overrun; |
| 1842 | if (isr & EMAC_ISR_BP) |
| 1843 | ++st->rx_bad_packet; |
| 1844 | if (isr & EMAC_ISR_RP) |
| 1845 | ++st->rx_runt_packet; |
| 1846 | if (isr & EMAC_ISR_SE) |
| 1847 | ++st->rx_short_event; |
| 1848 | if (isr & EMAC_ISR_ALE) |
| 1849 | ++st->rx_alignment_error; |
| 1850 | if (isr & EMAC_ISR_BFCS) |
| 1851 | ++st->rx_bad_fcs; |
| 1852 | if (isr & EMAC_ISR_PTLE) |
| 1853 | ++st->rx_packet_too_long; |
| 1854 | if (isr & EMAC_ISR_ORE) |
| 1855 | ++st->rx_out_of_range; |
| 1856 | if (isr & EMAC_ISR_IRE) |
| 1857 | ++st->rx_in_range; |
| 1858 | if (isr & EMAC_ISR_SQE) |
| 1859 | ++st->tx_sqe; |
| 1860 | if (isr & EMAC_ISR_TE) |
| 1861 | ++st->tx_errors; |
| 1862 | |
| 1863 | spin_unlock(&dev->lock); |
| 1864 | |
| 1865 | return IRQ_HANDLED; |
| 1866 | } |
| 1867 | |
| 1868 | static struct net_device_stats *emac_stats(struct net_device *ndev) |
| 1869 | { |
| 1870 | struct emac_instance *dev = netdev_priv(ndev); |
| 1871 | struct emac_stats *st = &dev->stats; |
| 1872 | struct emac_error_stats *est = &dev->estats; |
| 1873 | struct net_device_stats *nst = &dev->nstats; |
| 1874 | unsigned long flags; |
| 1875 | |
| 1876 | DBG2(dev, "stats" NL); |
| 1877 | |
| 1878 | /* Compute "legacy" statistics */ |
| 1879 | spin_lock_irqsave(&dev->lock, flags); |
| 1880 | nst->rx_packets = (unsigned long)st->rx_packets; |
| 1881 | nst->rx_bytes = (unsigned long)st->rx_bytes; |
| 1882 | nst->tx_packets = (unsigned long)st->tx_packets; |
| 1883 | nst->tx_bytes = (unsigned long)st->tx_bytes; |
| 1884 | nst->rx_dropped = (unsigned long)(est->rx_dropped_oom + |
| 1885 | est->rx_dropped_error + |
| 1886 | est->rx_dropped_resize + |
| 1887 | est->rx_dropped_mtu); |
| 1888 | nst->tx_dropped = (unsigned long)est->tx_dropped; |
| 1889 | |
| 1890 | nst->rx_errors = (unsigned long)est->rx_bd_errors; |
| 1891 | nst->rx_fifo_errors = (unsigned long)(est->rx_bd_overrun + |
| 1892 | est->rx_fifo_overrun + |
| 1893 | est->rx_overrun); |
| 1894 | nst->rx_frame_errors = (unsigned long)(est->rx_bd_alignment_error + |
| 1895 | est->rx_alignment_error); |
| 1896 | nst->rx_crc_errors = (unsigned long)(est->rx_bd_bad_fcs + |
| 1897 | est->rx_bad_fcs); |
| 1898 | nst->rx_length_errors = (unsigned long)(est->rx_bd_runt_packet + |
| 1899 | est->rx_bd_short_event + |
| 1900 | est->rx_bd_packet_too_long + |
| 1901 | est->rx_bd_out_of_range + |
| 1902 | est->rx_bd_in_range + |
| 1903 | est->rx_runt_packet + |
| 1904 | est->rx_short_event + |
| 1905 | est->rx_packet_too_long + |
| 1906 | est->rx_out_of_range + |
| 1907 | est->rx_in_range); |
| 1908 | |
| 1909 | nst->tx_errors = (unsigned long)(est->tx_bd_errors + est->tx_errors); |
| 1910 | nst->tx_fifo_errors = (unsigned long)(est->tx_bd_underrun + |
| 1911 | est->tx_underrun); |
| 1912 | nst->tx_carrier_errors = (unsigned long)est->tx_bd_carrier_loss; |
| 1913 | nst->collisions = (unsigned long)(est->tx_bd_excessive_deferral + |
| 1914 | est->tx_bd_excessive_collisions + |
| 1915 | est->tx_bd_late_collision + |
| 1916 | est->tx_bd_multple_collisions); |
| 1917 | spin_unlock_irqrestore(&dev->lock, flags); |
| 1918 | return nst; |
| 1919 | } |
| 1920 | |
| 1921 | static struct mal_commac_ops emac_commac_ops = { |
| 1922 | .poll_tx = &emac_poll_tx, |
| 1923 | .poll_rx = &emac_poll_rx, |
| 1924 | .peek_rx = &emac_peek_rx, |
| 1925 | .rxde = &emac_rxde, |
| 1926 | }; |
| 1927 | |
| 1928 | static struct mal_commac_ops emac_commac_sg_ops = { |
| 1929 | .poll_tx = &emac_poll_tx, |
| 1930 | .poll_rx = &emac_poll_rx, |
| 1931 | .peek_rx = &emac_peek_rx_sg, |
| 1932 | .rxde = &emac_rxde, |
| 1933 | }; |
| 1934 | |
| 1935 | /* Ethtool support */ |
| 1936 | static int emac_ethtool_get_settings(struct net_device *ndev, |
| 1937 | struct ethtool_cmd *cmd) |
| 1938 | { |
| 1939 | struct emac_instance *dev = netdev_priv(ndev); |
| 1940 | |
| 1941 | cmd->supported = dev->phy.features; |
| 1942 | cmd->port = PORT_MII; |
| 1943 | cmd->phy_address = dev->phy.address; |
| 1944 | cmd->transceiver = |
| 1945 | dev->phy.address >= 0 ? XCVR_EXTERNAL : XCVR_INTERNAL; |
| 1946 | |
| 1947 | mutex_lock(&dev->link_lock); |
| 1948 | cmd->advertising = dev->phy.advertising; |
| 1949 | cmd->autoneg = dev->phy.autoneg; |
| 1950 | cmd->speed = dev->phy.speed; |
| 1951 | cmd->duplex = dev->phy.duplex; |
| 1952 | mutex_unlock(&dev->link_lock); |
| 1953 | |
| 1954 | return 0; |
| 1955 | } |
| 1956 | |
| 1957 | static int emac_ethtool_set_settings(struct net_device *ndev, |
| 1958 | struct ethtool_cmd *cmd) |
| 1959 | { |
| 1960 | struct emac_instance *dev = netdev_priv(ndev); |
| 1961 | u32 f = dev->phy.features; |
| 1962 | |
| 1963 | DBG(dev, "set_settings(%d, %d, %d, 0x%08x)" NL, |
| 1964 | cmd->autoneg, cmd->speed, cmd->duplex, cmd->advertising); |
| 1965 | |
| 1966 | /* Basic sanity checks */ |
| 1967 | if (dev->phy.address < 0) |
| 1968 | return -EOPNOTSUPP; |
| 1969 | if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE) |
| 1970 | return -EINVAL; |
| 1971 | if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0) |
| 1972 | return -EINVAL; |
| 1973 | if (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) |
| 1974 | return -EINVAL; |
| 1975 | |
| 1976 | if (cmd->autoneg == AUTONEG_DISABLE) { |
| 1977 | switch (cmd->speed) { |
| 1978 | case SPEED_10: |
| 1979 | if (cmd->duplex == DUPLEX_HALF |
| 1980 | && !(f & SUPPORTED_10baseT_Half)) |
| 1981 | return -EINVAL; |
| 1982 | if (cmd->duplex == DUPLEX_FULL |
| 1983 | && !(f & SUPPORTED_10baseT_Full)) |
| 1984 | return -EINVAL; |
| 1985 | break; |
| 1986 | case SPEED_100: |
| 1987 | if (cmd->duplex == DUPLEX_HALF |
| 1988 | && !(f & SUPPORTED_100baseT_Half)) |
| 1989 | return -EINVAL; |
| 1990 | if (cmd->duplex == DUPLEX_FULL |
| 1991 | && !(f & SUPPORTED_100baseT_Full)) |
| 1992 | return -EINVAL; |
| 1993 | break; |
| 1994 | case SPEED_1000: |
| 1995 | if (cmd->duplex == DUPLEX_HALF |
| 1996 | && !(f & SUPPORTED_1000baseT_Half)) |
| 1997 | return -EINVAL; |
| 1998 | if (cmd->duplex == DUPLEX_FULL |
| 1999 | && !(f & SUPPORTED_1000baseT_Full)) |
| 2000 | return -EINVAL; |
| 2001 | break; |
| 2002 | default: |
| 2003 | return -EINVAL; |
| 2004 | } |
| 2005 | |
| 2006 | mutex_lock(&dev->link_lock); |
| 2007 | dev->phy.def->ops->setup_forced(&dev->phy, cmd->speed, |
| 2008 | cmd->duplex); |
| 2009 | mutex_unlock(&dev->link_lock); |
| 2010 | |
| 2011 | } else { |
| 2012 | if (!(f & SUPPORTED_Autoneg)) |
| 2013 | return -EINVAL; |
| 2014 | |
| 2015 | mutex_lock(&dev->link_lock); |
| 2016 | dev->phy.def->ops->setup_aneg(&dev->phy, |
| 2017 | (cmd->advertising & f) | |
| 2018 | (dev->phy.advertising & |
| 2019 | (ADVERTISED_Pause | |
| 2020 | ADVERTISED_Asym_Pause))); |
| 2021 | mutex_unlock(&dev->link_lock); |
| 2022 | } |
| 2023 | emac_force_link_update(dev); |
| 2024 | |
| 2025 | return 0; |
| 2026 | } |
| 2027 | |
| 2028 | static void emac_ethtool_get_ringparam(struct net_device *ndev, |
| 2029 | struct ethtool_ringparam *rp) |
| 2030 | { |
| 2031 | rp->rx_max_pending = rp->rx_pending = NUM_RX_BUFF; |
| 2032 | rp->tx_max_pending = rp->tx_pending = NUM_TX_BUFF; |
| 2033 | } |
| 2034 | |
| 2035 | static void emac_ethtool_get_pauseparam(struct net_device *ndev, |
| 2036 | struct ethtool_pauseparam *pp) |
| 2037 | { |
| 2038 | struct emac_instance *dev = netdev_priv(ndev); |
| 2039 | |
| 2040 | mutex_lock(&dev->link_lock); |
| 2041 | if ((dev->phy.features & SUPPORTED_Autoneg) && |
| 2042 | (dev->phy.advertising & (ADVERTISED_Pause | ADVERTISED_Asym_Pause))) |
| 2043 | pp->autoneg = 1; |
| 2044 | |
| 2045 | if (dev->phy.duplex == DUPLEX_FULL) { |
| 2046 | if (dev->phy.pause) |
| 2047 | pp->rx_pause = pp->tx_pause = 1; |
| 2048 | else if (dev->phy.asym_pause) |
| 2049 | pp->tx_pause = 1; |
| 2050 | } |
| 2051 | mutex_unlock(&dev->link_lock); |
| 2052 | } |
| 2053 | |
| 2054 | static u32 emac_ethtool_get_rx_csum(struct net_device *ndev) |
| 2055 | { |
| 2056 | struct emac_instance *dev = netdev_priv(ndev); |
| 2057 | |
Al Viro | eb4d84f | 2007-10-14 19:36:10 +0100 | [diff] [blame] | 2058 | return dev->tah_dev != NULL; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2059 | } |
| 2060 | |
| 2061 | static int emac_get_regs_len(struct emac_instance *dev) |
| 2062 | { |
| 2063 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) |
| 2064 | return sizeof(struct emac_ethtool_regs_subhdr) + |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 2065 | EMAC4_ETHTOOL_REGS_SIZE(dev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2066 | else |
| 2067 | return sizeof(struct emac_ethtool_regs_subhdr) + |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 2068 | EMAC_ETHTOOL_REGS_SIZE(dev); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2069 | } |
| 2070 | |
| 2071 | static int emac_ethtool_get_regs_len(struct net_device *ndev) |
| 2072 | { |
| 2073 | struct emac_instance *dev = netdev_priv(ndev); |
| 2074 | int size; |
| 2075 | |
| 2076 | size = sizeof(struct emac_ethtool_regs_hdr) + |
| 2077 | emac_get_regs_len(dev) + mal_get_regs_len(dev->mal); |
| 2078 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) |
| 2079 | size += zmii_get_regs_len(dev->zmii_dev); |
| 2080 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) |
| 2081 | size += rgmii_get_regs_len(dev->rgmii_dev); |
| 2082 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) |
| 2083 | size += tah_get_regs_len(dev->tah_dev); |
| 2084 | |
| 2085 | return size; |
| 2086 | } |
| 2087 | |
| 2088 | static void *emac_dump_regs(struct emac_instance *dev, void *buf) |
| 2089 | { |
| 2090 | struct emac_ethtool_regs_subhdr *hdr = buf; |
| 2091 | |
| 2092 | hdr->index = dev->cell_index; |
| 2093 | if (emac_has_feature(dev, EMAC_FTR_EMAC4)) { |
| 2094 | hdr->version = EMAC4_ETHTOOL_REGS_VER; |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 2095 | memcpy_fromio(hdr + 1, dev->emacp, EMAC4_ETHTOOL_REGS_SIZE(dev)); |
| 2096 | return ((void *)(hdr + 1) + EMAC4_ETHTOOL_REGS_SIZE(dev)); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2097 | } else { |
| 2098 | hdr->version = EMAC_ETHTOOL_REGS_VER; |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 2099 | memcpy_fromio(hdr + 1, dev->emacp, EMAC_ETHTOOL_REGS_SIZE(dev)); |
| 2100 | return ((void *)(hdr + 1) + EMAC_ETHTOOL_REGS_SIZE(dev)); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2101 | } |
| 2102 | } |
| 2103 | |
| 2104 | static void emac_ethtool_get_regs(struct net_device *ndev, |
| 2105 | struct ethtool_regs *regs, void *buf) |
| 2106 | { |
| 2107 | struct emac_instance *dev = netdev_priv(ndev); |
| 2108 | struct emac_ethtool_regs_hdr *hdr = buf; |
| 2109 | |
| 2110 | hdr->components = 0; |
| 2111 | buf = hdr + 1; |
| 2112 | |
| 2113 | buf = mal_dump_regs(dev->mal, buf); |
| 2114 | buf = emac_dump_regs(dev, buf); |
| 2115 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) { |
| 2116 | hdr->components |= EMAC_ETHTOOL_REGS_ZMII; |
| 2117 | buf = zmii_dump_regs(dev->zmii_dev, buf); |
| 2118 | } |
| 2119 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) { |
| 2120 | hdr->components |= EMAC_ETHTOOL_REGS_RGMII; |
| 2121 | buf = rgmii_dump_regs(dev->rgmii_dev, buf); |
| 2122 | } |
| 2123 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) { |
| 2124 | hdr->components |= EMAC_ETHTOOL_REGS_TAH; |
| 2125 | buf = tah_dump_regs(dev->tah_dev, buf); |
| 2126 | } |
| 2127 | } |
| 2128 | |
| 2129 | static int emac_ethtool_nway_reset(struct net_device *ndev) |
| 2130 | { |
| 2131 | struct emac_instance *dev = netdev_priv(ndev); |
| 2132 | int res = 0; |
| 2133 | |
| 2134 | DBG(dev, "nway_reset" NL); |
| 2135 | |
| 2136 | if (dev->phy.address < 0) |
| 2137 | return -EOPNOTSUPP; |
| 2138 | |
| 2139 | mutex_lock(&dev->link_lock); |
| 2140 | if (!dev->phy.autoneg) { |
| 2141 | res = -EINVAL; |
| 2142 | goto out; |
| 2143 | } |
| 2144 | |
| 2145 | dev->phy.def->ops->setup_aneg(&dev->phy, dev->phy.advertising); |
| 2146 | out: |
| 2147 | mutex_unlock(&dev->link_lock); |
| 2148 | emac_force_link_update(dev); |
| 2149 | return res; |
| 2150 | } |
| 2151 | |
Ben Hutchings | 15f0a39 | 2009-10-01 11:58:24 +0000 | [diff] [blame] | 2152 | static int emac_ethtool_get_sset_count(struct net_device *ndev, int stringset) |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2153 | { |
Ben Hutchings | 15f0a39 | 2009-10-01 11:58:24 +0000 | [diff] [blame] | 2154 | if (stringset == ETH_SS_STATS) |
| 2155 | return EMAC_ETHTOOL_STATS_COUNT; |
| 2156 | else |
| 2157 | return -EINVAL; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2158 | } |
| 2159 | |
| 2160 | static void emac_ethtool_get_strings(struct net_device *ndev, u32 stringset, |
| 2161 | u8 * buf) |
| 2162 | { |
| 2163 | if (stringset == ETH_SS_STATS) |
| 2164 | memcpy(buf, &emac_stats_keys, sizeof(emac_stats_keys)); |
| 2165 | } |
| 2166 | |
| 2167 | static void emac_ethtool_get_ethtool_stats(struct net_device *ndev, |
| 2168 | struct ethtool_stats *estats, |
| 2169 | u64 * tmp_stats) |
| 2170 | { |
| 2171 | struct emac_instance *dev = netdev_priv(ndev); |
| 2172 | |
| 2173 | memcpy(tmp_stats, &dev->stats, sizeof(dev->stats)); |
| 2174 | tmp_stats += sizeof(dev->stats) / sizeof(u64); |
| 2175 | memcpy(tmp_stats, &dev->estats, sizeof(dev->estats)); |
| 2176 | } |
| 2177 | |
| 2178 | static void emac_ethtool_get_drvinfo(struct net_device *ndev, |
| 2179 | struct ethtool_drvinfo *info) |
| 2180 | { |
| 2181 | struct emac_instance *dev = netdev_priv(ndev); |
| 2182 | |
| 2183 | strcpy(info->driver, "ibm_emac"); |
| 2184 | strcpy(info->version, DRV_VERSION); |
| 2185 | info->fw_version[0] = '\0'; |
| 2186 | sprintf(info->bus_info, "PPC 4xx EMAC-%d %s", |
| 2187 | dev->cell_index, dev->ofdev->node->full_name); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2188 | info->regdump_len = emac_ethtool_get_regs_len(ndev); |
| 2189 | } |
| 2190 | |
| 2191 | static const struct ethtool_ops emac_ethtool_ops = { |
| 2192 | .get_settings = emac_ethtool_get_settings, |
| 2193 | .set_settings = emac_ethtool_set_settings, |
| 2194 | .get_drvinfo = emac_ethtool_get_drvinfo, |
| 2195 | |
| 2196 | .get_regs_len = emac_ethtool_get_regs_len, |
| 2197 | .get_regs = emac_ethtool_get_regs, |
| 2198 | |
| 2199 | .nway_reset = emac_ethtool_nway_reset, |
| 2200 | |
| 2201 | .get_ringparam = emac_ethtool_get_ringparam, |
| 2202 | .get_pauseparam = emac_ethtool_get_pauseparam, |
| 2203 | |
| 2204 | .get_rx_csum = emac_ethtool_get_rx_csum, |
| 2205 | |
| 2206 | .get_strings = emac_ethtool_get_strings, |
Ben Hutchings | 15f0a39 | 2009-10-01 11:58:24 +0000 | [diff] [blame] | 2207 | .get_sset_count = emac_ethtool_get_sset_count, |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2208 | .get_ethtool_stats = emac_ethtool_get_ethtool_stats, |
| 2209 | |
| 2210 | .get_link = ethtool_op_get_link, |
| 2211 | .get_tx_csum = ethtool_op_get_tx_csum, |
| 2212 | .get_sg = ethtool_op_get_sg, |
| 2213 | }; |
| 2214 | |
| 2215 | static int emac_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) |
| 2216 | { |
| 2217 | struct emac_instance *dev = netdev_priv(ndev); |
Ben Hutchings | 0fa0ee05 | 2009-09-03 10:41:17 +0000 | [diff] [blame] | 2218 | struct mii_ioctl_data *data = if_mii(rq); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2219 | |
| 2220 | DBG(dev, "ioctl %08x" NL, cmd); |
| 2221 | |
| 2222 | if (dev->phy.address < 0) |
| 2223 | return -EOPNOTSUPP; |
| 2224 | |
| 2225 | switch (cmd) { |
| 2226 | case SIOCGMIIPHY: |
Ben Hutchings | 0fa0ee05 | 2009-09-03 10:41:17 +0000 | [diff] [blame] | 2227 | data->phy_id = dev->phy.address; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2228 | /* Fall through */ |
| 2229 | case SIOCGMIIREG: |
Ben Hutchings | 0fa0ee05 | 2009-09-03 10:41:17 +0000 | [diff] [blame] | 2230 | data->val_out = emac_mdio_read(ndev, dev->phy.address, |
| 2231 | data->reg_num); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2232 | return 0; |
| 2233 | |
| 2234 | case SIOCSMIIREG: |
Ben Hutchings | 0fa0ee05 | 2009-09-03 10:41:17 +0000 | [diff] [blame] | 2235 | emac_mdio_write(ndev, dev->phy.address, data->reg_num, |
| 2236 | data->val_in); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2237 | return 0; |
| 2238 | default: |
| 2239 | return -EOPNOTSUPP; |
| 2240 | } |
| 2241 | } |
| 2242 | |
| 2243 | struct emac_depentry { |
| 2244 | u32 phandle; |
| 2245 | struct device_node *node; |
| 2246 | struct of_device *ofdev; |
| 2247 | void *drvdata; |
| 2248 | }; |
| 2249 | |
| 2250 | #define EMAC_DEP_MAL_IDX 0 |
| 2251 | #define EMAC_DEP_ZMII_IDX 1 |
| 2252 | #define EMAC_DEP_RGMII_IDX 2 |
| 2253 | #define EMAC_DEP_TAH_IDX 3 |
| 2254 | #define EMAC_DEP_MDIO_IDX 4 |
| 2255 | #define EMAC_DEP_PREV_IDX 5 |
| 2256 | #define EMAC_DEP_COUNT 6 |
| 2257 | |
| 2258 | static int __devinit emac_check_deps(struct emac_instance *dev, |
| 2259 | struct emac_depentry *deps) |
| 2260 | { |
| 2261 | int i, there = 0; |
| 2262 | struct device_node *np; |
| 2263 | |
| 2264 | for (i = 0; i < EMAC_DEP_COUNT; i++) { |
| 2265 | /* no dependency on that item, allright */ |
| 2266 | if (deps[i].phandle == 0) { |
| 2267 | there++; |
| 2268 | continue; |
| 2269 | } |
| 2270 | /* special case for blist as the dependency might go away */ |
| 2271 | if (i == EMAC_DEP_PREV_IDX) { |
| 2272 | np = *(dev->blist - 1); |
| 2273 | if (np == NULL) { |
| 2274 | deps[i].phandle = 0; |
| 2275 | there++; |
| 2276 | continue; |
| 2277 | } |
| 2278 | if (deps[i].node == NULL) |
| 2279 | deps[i].node = of_node_get(np); |
| 2280 | } |
| 2281 | if (deps[i].node == NULL) |
| 2282 | deps[i].node = of_find_node_by_phandle(deps[i].phandle); |
| 2283 | if (deps[i].node == NULL) |
| 2284 | continue; |
| 2285 | if (deps[i].ofdev == NULL) |
| 2286 | deps[i].ofdev = of_find_device_by_node(deps[i].node); |
| 2287 | if (deps[i].ofdev == NULL) |
| 2288 | continue; |
| 2289 | if (deps[i].drvdata == NULL) |
| 2290 | deps[i].drvdata = dev_get_drvdata(&deps[i].ofdev->dev); |
| 2291 | if (deps[i].drvdata != NULL) |
| 2292 | there++; |
| 2293 | } |
| 2294 | return (there == EMAC_DEP_COUNT); |
| 2295 | } |
| 2296 | |
| 2297 | static void emac_put_deps(struct emac_instance *dev) |
| 2298 | { |
| 2299 | if (dev->mal_dev) |
| 2300 | of_dev_put(dev->mal_dev); |
| 2301 | if (dev->zmii_dev) |
| 2302 | of_dev_put(dev->zmii_dev); |
| 2303 | if (dev->rgmii_dev) |
| 2304 | of_dev_put(dev->rgmii_dev); |
| 2305 | if (dev->mdio_dev) |
| 2306 | of_dev_put(dev->mdio_dev); |
| 2307 | if (dev->tah_dev) |
| 2308 | of_dev_put(dev->tah_dev); |
| 2309 | } |
| 2310 | |
| 2311 | static int __devinit emac_of_bus_notify(struct notifier_block *nb, |
| 2312 | unsigned long action, void *data) |
| 2313 | { |
| 2314 | /* We are only intereted in device addition */ |
| 2315 | if (action == BUS_NOTIFY_BOUND_DRIVER) |
| 2316 | wake_up_all(&emac_probe_wait); |
| 2317 | return 0; |
| 2318 | } |
| 2319 | |
Josh Boyer | 51d4a1c | 2008-04-22 10:46:43 +1000 | [diff] [blame] | 2320 | static struct notifier_block emac_of_bus_notifier __devinitdata = { |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2321 | .notifier_call = emac_of_bus_notify |
| 2322 | }; |
| 2323 | |
| 2324 | static int __devinit emac_wait_deps(struct emac_instance *dev) |
| 2325 | { |
| 2326 | struct emac_depentry deps[EMAC_DEP_COUNT]; |
| 2327 | int i, err; |
| 2328 | |
| 2329 | memset(&deps, 0, sizeof(deps)); |
| 2330 | |
| 2331 | deps[EMAC_DEP_MAL_IDX].phandle = dev->mal_ph; |
| 2332 | deps[EMAC_DEP_ZMII_IDX].phandle = dev->zmii_ph; |
| 2333 | deps[EMAC_DEP_RGMII_IDX].phandle = dev->rgmii_ph; |
| 2334 | if (dev->tah_ph) |
| 2335 | deps[EMAC_DEP_TAH_IDX].phandle = dev->tah_ph; |
| 2336 | if (dev->mdio_ph) |
| 2337 | deps[EMAC_DEP_MDIO_IDX].phandle = dev->mdio_ph; |
| 2338 | if (dev->blist && dev->blist > emac_boot_list) |
| 2339 | deps[EMAC_DEP_PREV_IDX].phandle = 0xffffffffu; |
| 2340 | bus_register_notifier(&of_platform_bus_type, &emac_of_bus_notifier); |
| 2341 | wait_event_timeout(emac_probe_wait, |
| 2342 | emac_check_deps(dev, deps), |
| 2343 | EMAC_PROBE_DEP_TIMEOUT); |
| 2344 | bus_unregister_notifier(&of_platform_bus_type, &emac_of_bus_notifier); |
| 2345 | err = emac_check_deps(dev, deps) ? 0 : -ENODEV; |
| 2346 | for (i = 0; i < EMAC_DEP_COUNT; i++) { |
| 2347 | if (deps[i].node) |
| 2348 | of_node_put(deps[i].node); |
| 2349 | if (err && deps[i].ofdev) |
| 2350 | of_dev_put(deps[i].ofdev); |
| 2351 | } |
| 2352 | if (err == 0) { |
| 2353 | dev->mal_dev = deps[EMAC_DEP_MAL_IDX].ofdev; |
| 2354 | dev->zmii_dev = deps[EMAC_DEP_ZMII_IDX].ofdev; |
| 2355 | dev->rgmii_dev = deps[EMAC_DEP_RGMII_IDX].ofdev; |
| 2356 | dev->tah_dev = deps[EMAC_DEP_TAH_IDX].ofdev; |
| 2357 | dev->mdio_dev = deps[EMAC_DEP_MDIO_IDX].ofdev; |
| 2358 | } |
| 2359 | if (deps[EMAC_DEP_PREV_IDX].ofdev) |
| 2360 | of_dev_put(deps[EMAC_DEP_PREV_IDX].ofdev); |
| 2361 | return err; |
| 2362 | } |
| 2363 | |
| 2364 | static int __devinit emac_read_uint_prop(struct device_node *np, const char *name, |
| 2365 | u32 *val, int fatal) |
| 2366 | { |
| 2367 | int len; |
| 2368 | const u32 *prop = of_get_property(np, name, &len); |
| 2369 | if (prop == NULL || len < sizeof(u32)) { |
| 2370 | if (fatal) |
| 2371 | printk(KERN_ERR "%s: missing %s property\n", |
| 2372 | np->full_name, name); |
| 2373 | return -ENODEV; |
| 2374 | } |
| 2375 | *val = *prop; |
| 2376 | return 0; |
| 2377 | } |
| 2378 | |
| 2379 | static int __devinit emac_init_phy(struct emac_instance *dev) |
| 2380 | { |
| 2381 | struct device_node *np = dev->ofdev->node; |
| 2382 | struct net_device *ndev = dev->ndev; |
| 2383 | u32 phy_map, adv; |
| 2384 | int i; |
| 2385 | |
| 2386 | dev->phy.dev = ndev; |
| 2387 | dev->phy.mode = dev->phy_mode; |
| 2388 | |
| 2389 | /* PHY-less configuration. |
| 2390 | * XXX I probably should move these settings to the dev tree |
| 2391 | */ |
| 2392 | if (dev->phy_address == 0xffffffff && dev->phy_map == 0xffffffff) { |
| 2393 | emac_reset(dev); |
| 2394 | |
| 2395 | /* PHY-less configuration. |
| 2396 | * XXX I probably should move these settings to the dev tree |
| 2397 | */ |
| 2398 | dev->phy.address = -1; |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 2399 | dev->phy.features = SUPPORTED_MII; |
| 2400 | if (emac_phy_supports_gige(dev->phy_mode)) |
| 2401 | dev->phy.features |= SUPPORTED_1000baseT_Full; |
| 2402 | else |
| 2403 | dev->phy.features |= SUPPORTED_100baseT_Full; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2404 | dev->phy.pause = 1; |
| 2405 | |
| 2406 | return 0; |
| 2407 | } |
| 2408 | |
| 2409 | mutex_lock(&emac_phy_map_lock); |
| 2410 | phy_map = dev->phy_map | busy_phy_map; |
| 2411 | |
| 2412 | DBG(dev, "PHY maps %08x %08x" NL, dev->phy_map, busy_phy_map); |
| 2413 | |
| 2414 | dev->phy.mdio_read = emac_mdio_read; |
| 2415 | dev->phy.mdio_write = emac_mdio_write; |
| 2416 | |
Valentine Barshak | 0925ab5 | 2008-04-22 10:46:46 +1000 | [diff] [blame] | 2417 | /* Enable internal clock source */ |
| 2418 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 2419 | if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) |
| 2420 | dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS); |
| 2421 | #endif |
Valentine Barshak | 11121e3 | 2008-04-22 10:46:48 +1000 | [diff] [blame] | 2422 | /* PHY clock workaround */ |
| 2423 | emac_rx_clk_tx(dev); |
| 2424 | |
| 2425 | /* Enable internal clock source on 440GX*/ |
| 2426 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 2427 | if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) |
| 2428 | dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS); |
| 2429 | #endif |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2430 | /* Configure EMAC with defaults so we can at least use MDIO |
| 2431 | * This is needed mostly for 440GX |
| 2432 | */ |
| 2433 | if (emac_phy_gpcs(dev->phy.mode)) { |
| 2434 | /* XXX |
| 2435 | * Make GPCS PHY address equal to EMAC index. |
| 2436 | * We probably should take into account busy_phy_map |
| 2437 | * and/or phy_map here. |
| 2438 | * |
| 2439 | * Note that the busy_phy_map is currently global |
| 2440 | * while it should probably be per-ASIC... |
| 2441 | */ |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 2442 | dev->phy.gpcs_address = dev->gpcs_address; |
| 2443 | if (dev->phy.gpcs_address == 0xffffffff) |
| 2444 | dev->phy.address = dev->cell_index; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2445 | } |
| 2446 | |
| 2447 | emac_configure(dev); |
| 2448 | |
| 2449 | if (dev->phy_address != 0xffffffff) |
| 2450 | phy_map = ~(1 << dev->phy_address); |
| 2451 | |
| 2452 | for (i = 0; i < 0x20; phy_map >>= 1, ++i) |
| 2453 | if (!(phy_map & 1)) { |
| 2454 | int r; |
| 2455 | busy_phy_map |= 1 << i; |
| 2456 | |
| 2457 | /* Quick check if there is a PHY at the address */ |
| 2458 | r = emac_mdio_read(dev->ndev, i, MII_BMCR); |
| 2459 | if (r == 0xffff || r < 0) |
| 2460 | continue; |
| 2461 | if (!emac_mii_phy_probe(&dev->phy, i)) |
| 2462 | break; |
| 2463 | } |
Valentine Barshak | 0925ab5 | 2008-04-22 10:46:46 +1000 | [diff] [blame] | 2464 | |
| 2465 | /* Enable external clock source */ |
| 2466 | #ifdef CONFIG_PPC_DCR_NATIVE |
| 2467 | if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) |
| 2468 | dcri_clrset(SDR0, SDR0_MFR, SDR0_MFR_ECS, 0); |
| 2469 | #endif |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2470 | mutex_unlock(&emac_phy_map_lock); |
| 2471 | if (i == 0x20) { |
| 2472 | printk(KERN_WARNING "%s: can't find PHY!\n", np->full_name); |
| 2473 | return -ENXIO; |
| 2474 | } |
| 2475 | |
| 2476 | /* Init PHY */ |
| 2477 | if (dev->phy.def->ops->init) |
| 2478 | dev->phy.def->ops->init(&dev->phy); |
| 2479 | |
| 2480 | /* Disable any PHY features not supported by the platform */ |
| 2481 | dev->phy.def->features &= ~dev->phy_feat_exc; |
| 2482 | |
| 2483 | /* Setup initial link parameters */ |
| 2484 | if (dev->phy.features & SUPPORTED_Autoneg) { |
| 2485 | adv = dev->phy.features; |
| 2486 | if (!emac_has_feature(dev, EMAC_FTR_NO_FLOW_CONTROL_40x)) |
| 2487 | adv |= ADVERTISED_Pause | ADVERTISED_Asym_Pause; |
| 2488 | /* Restart autonegotiation */ |
| 2489 | dev->phy.def->ops->setup_aneg(&dev->phy, adv); |
| 2490 | } else { |
| 2491 | u32 f = dev->phy.def->features; |
| 2492 | int speed = SPEED_10, fd = DUPLEX_HALF; |
| 2493 | |
| 2494 | /* Select highest supported speed/duplex */ |
| 2495 | if (f & SUPPORTED_1000baseT_Full) { |
| 2496 | speed = SPEED_1000; |
| 2497 | fd = DUPLEX_FULL; |
| 2498 | } else if (f & SUPPORTED_1000baseT_Half) |
| 2499 | speed = SPEED_1000; |
| 2500 | else if (f & SUPPORTED_100baseT_Full) { |
| 2501 | speed = SPEED_100; |
| 2502 | fd = DUPLEX_FULL; |
| 2503 | } else if (f & SUPPORTED_100baseT_Half) |
| 2504 | speed = SPEED_100; |
| 2505 | else if (f & SUPPORTED_10baseT_Full) |
| 2506 | fd = DUPLEX_FULL; |
| 2507 | |
| 2508 | /* Force link parameters */ |
| 2509 | dev->phy.def->ops->setup_forced(&dev->phy, speed, fd); |
| 2510 | } |
| 2511 | return 0; |
| 2512 | } |
| 2513 | |
| 2514 | static int __devinit emac_init_config(struct emac_instance *dev) |
| 2515 | { |
| 2516 | struct device_node *np = dev->ofdev->node; |
| 2517 | const void *p; |
| 2518 | unsigned int plen; |
| 2519 | const char *pm, *phy_modes[] = { |
| 2520 | [PHY_MODE_NA] = "", |
| 2521 | [PHY_MODE_MII] = "mii", |
| 2522 | [PHY_MODE_RMII] = "rmii", |
| 2523 | [PHY_MODE_SMII] = "smii", |
| 2524 | [PHY_MODE_RGMII] = "rgmii", |
| 2525 | [PHY_MODE_TBI] = "tbi", |
| 2526 | [PHY_MODE_GMII] = "gmii", |
| 2527 | [PHY_MODE_RTBI] = "rtbi", |
| 2528 | [PHY_MODE_SGMII] = "sgmii", |
| 2529 | }; |
| 2530 | |
| 2531 | /* Read config from device-tree */ |
| 2532 | if (emac_read_uint_prop(np, "mal-device", &dev->mal_ph, 1)) |
| 2533 | return -ENXIO; |
| 2534 | if (emac_read_uint_prop(np, "mal-tx-channel", &dev->mal_tx_chan, 1)) |
| 2535 | return -ENXIO; |
| 2536 | if (emac_read_uint_prop(np, "mal-rx-channel", &dev->mal_rx_chan, 1)) |
| 2537 | return -ENXIO; |
| 2538 | if (emac_read_uint_prop(np, "cell-index", &dev->cell_index, 1)) |
| 2539 | return -ENXIO; |
| 2540 | if (emac_read_uint_prop(np, "max-frame-size", &dev->max_mtu, 0)) |
| 2541 | dev->max_mtu = 1500; |
| 2542 | if (emac_read_uint_prop(np, "rx-fifo-size", &dev->rx_fifo_size, 0)) |
| 2543 | dev->rx_fifo_size = 2048; |
| 2544 | if (emac_read_uint_prop(np, "tx-fifo-size", &dev->tx_fifo_size, 0)) |
| 2545 | dev->tx_fifo_size = 2048; |
| 2546 | if (emac_read_uint_prop(np, "rx-fifo-size-gige", &dev->rx_fifo_size_gige, 0)) |
| 2547 | dev->rx_fifo_size_gige = dev->rx_fifo_size; |
| 2548 | if (emac_read_uint_prop(np, "tx-fifo-size-gige", &dev->tx_fifo_size_gige, 0)) |
| 2549 | dev->tx_fifo_size_gige = dev->tx_fifo_size; |
| 2550 | if (emac_read_uint_prop(np, "phy-address", &dev->phy_address, 0)) |
| 2551 | dev->phy_address = 0xffffffff; |
| 2552 | if (emac_read_uint_prop(np, "phy-map", &dev->phy_map, 0)) |
| 2553 | dev->phy_map = 0xffffffff; |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 2554 | if (emac_read_uint_prop(np, "gpcs-address", &dev->gpcs_address, 0)) |
| 2555 | dev->gpcs_address = 0xffffffff; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2556 | if (emac_read_uint_prop(np->parent, "clock-frequency", &dev->opb_bus_freq, 1)) |
| 2557 | return -ENXIO; |
| 2558 | if (emac_read_uint_prop(np, "tah-device", &dev->tah_ph, 0)) |
| 2559 | dev->tah_ph = 0; |
| 2560 | if (emac_read_uint_prop(np, "tah-channel", &dev->tah_port, 0)) |
Valentine Barshak | 63b6cad | 2007-12-05 11:14:31 +1100 | [diff] [blame] | 2561 | dev->tah_port = 0; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2562 | if (emac_read_uint_prop(np, "mdio-device", &dev->mdio_ph, 0)) |
| 2563 | dev->mdio_ph = 0; |
| 2564 | if (emac_read_uint_prop(np, "zmii-device", &dev->zmii_ph, 0)) |
Joe Perches | a419aef | 2009-08-18 11:18:35 -0700 | [diff] [blame] | 2565 | dev->zmii_ph = 0; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2566 | if (emac_read_uint_prop(np, "zmii-channel", &dev->zmii_port, 0)) |
Joe Perches | a419aef | 2009-08-18 11:18:35 -0700 | [diff] [blame] | 2567 | dev->zmii_port = 0xffffffff; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2568 | if (emac_read_uint_prop(np, "rgmii-device", &dev->rgmii_ph, 0)) |
Joe Perches | a419aef | 2009-08-18 11:18:35 -0700 | [diff] [blame] | 2569 | dev->rgmii_ph = 0; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2570 | if (emac_read_uint_prop(np, "rgmii-channel", &dev->rgmii_port, 0)) |
Joe Perches | a419aef | 2009-08-18 11:18:35 -0700 | [diff] [blame] | 2571 | dev->rgmii_port = 0xffffffff; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2572 | if (emac_read_uint_prop(np, "fifo-entry-size", &dev->fifo_entry_size, 0)) |
| 2573 | dev->fifo_entry_size = 16; |
| 2574 | if (emac_read_uint_prop(np, "mal-burst-size", &dev->mal_burst_size, 0)) |
| 2575 | dev->mal_burst_size = 256; |
| 2576 | |
| 2577 | /* PHY mode needs some decoding */ |
| 2578 | dev->phy_mode = PHY_MODE_NA; |
| 2579 | pm = of_get_property(np, "phy-mode", &plen); |
| 2580 | if (pm != NULL) { |
| 2581 | int i; |
| 2582 | for (i = 0; i < ARRAY_SIZE(phy_modes); i++) |
| 2583 | if (!strcasecmp(pm, phy_modes[i])) { |
| 2584 | dev->phy_mode = i; |
| 2585 | break; |
| 2586 | } |
| 2587 | } |
| 2588 | |
| 2589 | /* Backward compat with non-final DT */ |
| 2590 | if (dev->phy_mode == PHY_MODE_NA && pm != NULL && plen == 4) { |
| 2591 | u32 nmode = *(const u32 *)pm; |
| 2592 | if (nmode > PHY_MODE_NA && nmode <= PHY_MODE_SGMII) |
| 2593 | dev->phy_mode = nmode; |
| 2594 | } |
| 2595 | |
| 2596 | /* Check EMAC version */ |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 2597 | if (of_device_is_compatible(np, "ibm,emac4sync")) { |
| 2598 | dev->features |= (EMAC_FTR_EMAC4 | EMAC_FTR_EMAC4SYNC); |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 2599 | if (of_device_is_compatible(np, "ibm,emac-460ex") || |
| 2600 | of_device_is_compatible(np, "ibm,emac-460gt")) |
| 2601 | dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX; |
Benjamin Herrenschmidt | 9616a75 | 2009-03-13 13:48:46 -0700 | [diff] [blame] | 2602 | if (of_device_is_compatible(np, "ibm,emac-405ex") || |
| 2603 | of_device_is_compatible(np, "ibm,emac-405exr")) |
| 2604 | dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX; |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 2605 | } else if (of_device_is_compatible(np, "ibm,emac4")) { |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2606 | dev->features |= EMAC_FTR_EMAC4; |
Valentine Barshak | 0925ab5 | 2008-04-22 10:46:46 +1000 | [diff] [blame] | 2607 | if (of_device_is_compatible(np, "ibm,emac-440gx")) |
| 2608 | dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX; |
Valentine Barshak | 11121e3 | 2008-04-22 10:46:48 +1000 | [diff] [blame] | 2609 | } else { |
| 2610 | if (of_device_is_compatible(np, "ibm,emac-440ep") || |
| 2611 | of_device_is_compatible(np, "ibm,emac-440gr")) |
| 2612 | dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX; |
Josh Boyer | 1ff0fcf | 2008-10-16 04:38:40 +0000 | [diff] [blame] | 2613 | if (of_device_is_compatible(np, "ibm,emac-405ez")) { |
Josh Boyer | c778e11 | 2008-10-24 09:53:14 -0400 | [diff] [blame] | 2614 | #ifdef CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL |
Josh Boyer | b68d185 | 2008-09-04 02:57:57 +0000 | [diff] [blame] | 2615 | dev->features |= EMAC_FTR_NO_FLOW_CONTROL_40x; |
Josh Boyer | 1ff0fcf | 2008-10-16 04:38:40 +0000 | [diff] [blame] | 2616 | #else |
| 2617 | printk(KERN_ERR "%s: Flow control not disabled!\n", |
| 2618 | np->full_name); |
| 2619 | return -ENXIO; |
| 2620 | #endif |
| 2621 | } |
| 2622 | |
Valentine Barshak | 0925ab5 | 2008-04-22 10:46:46 +1000 | [diff] [blame] | 2623 | } |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2624 | |
Benjamin Herrenschmidt | bff713b | 2007-12-05 11:14:29 +1100 | [diff] [blame] | 2625 | /* Fixup some feature bits based on the device tree */ |
| 2626 | if (of_get_property(np, "has-inverted-stacr-oc", NULL)) |
| 2627 | dev->features |= EMAC_FTR_STACR_OC_INVERT; |
| 2628 | if (of_get_property(np, "has-new-stacr-staopc", NULL)) |
| 2629 | dev->features |= EMAC_FTR_HAS_NEW_STACR; |
| 2630 | |
| 2631 | /* CAB lacks the appropriate properties */ |
| 2632 | if (of_device_is_compatible(np, "ibm,emac-axon")) |
| 2633 | dev->features |= EMAC_FTR_HAS_NEW_STACR | |
| 2634 | EMAC_FTR_STACR_OC_INVERT; |
| 2635 | |
| 2636 | /* Enable TAH/ZMII/RGMII features as found */ |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2637 | if (dev->tah_ph != 0) { |
| 2638 | #ifdef CONFIG_IBM_NEW_EMAC_TAH |
| 2639 | dev->features |= EMAC_FTR_HAS_TAH; |
| 2640 | #else |
| 2641 | printk(KERN_ERR "%s: TAH support not enabled !\n", |
| 2642 | np->full_name); |
| 2643 | return -ENXIO; |
| 2644 | #endif |
| 2645 | } |
| 2646 | |
| 2647 | if (dev->zmii_ph != 0) { |
| 2648 | #ifdef CONFIG_IBM_NEW_EMAC_ZMII |
| 2649 | dev->features |= EMAC_FTR_HAS_ZMII; |
| 2650 | #else |
| 2651 | printk(KERN_ERR "%s: ZMII support not enabled !\n", |
| 2652 | np->full_name); |
| 2653 | return -ENXIO; |
| 2654 | #endif |
| 2655 | } |
| 2656 | |
| 2657 | if (dev->rgmii_ph != 0) { |
| 2658 | #ifdef CONFIG_IBM_NEW_EMAC_RGMII |
| 2659 | dev->features |= EMAC_FTR_HAS_RGMII; |
| 2660 | #else |
| 2661 | printk(KERN_ERR "%s: RGMII support not enabled !\n", |
| 2662 | np->full_name); |
| 2663 | return -ENXIO; |
| 2664 | #endif |
| 2665 | } |
| 2666 | |
| 2667 | /* Read MAC-address */ |
| 2668 | p = of_get_property(np, "local-mac-address", NULL); |
| 2669 | if (p == NULL) { |
| 2670 | printk(KERN_ERR "%s: Can't find local-mac-address property\n", |
| 2671 | np->full_name); |
| 2672 | return -ENXIO; |
| 2673 | } |
| 2674 | memcpy(dev->ndev->dev_addr, p, 6); |
| 2675 | |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 2676 | /* IAHT and GAHT filter parameterization */ |
| 2677 | if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC)) { |
| 2678 | dev->xaht_slots_shift = EMAC4SYNC_XAHT_SLOTS_SHIFT; |
| 2679 | dev->xaht_width_shift = EMAC4SYNC_XAHT_WIDTH_SHIFT; |
| 2680 | } else { |
| 2681 | dev->xaht_slots_shift = EMAC4_XAHT_SLOTS_SHIFT; |
| 2682 | dev->xaht_width_shift = EMAC4_XAHT_WIDTH_SHIFT; |
| 2683 | } |
| 2684 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2685 | DBG(dev, "features : 0x%08x / 0x%08x\n", dev->features, EMAC_FTRS_POSSIBLE); |
| 2686 | DBG(dev, "tx_fifo_size : %d (%d gige)\n", dev->tx_fifo_size, dev->tx_fifo_size_gige); |
| 2687 | DBG(dev, "rx_fifo_size : %d (%d gige)\n", dev->rx_fifo_size, dev->rx_fifo_size_gige); |
| 2688 | DBG(dev, "max_mtu : %d\n", dev->max_mtu); |
| 2689 | DBG(dev, "OPB freq : %d\n", dev->opb_bus_freq); |
| 2690 | |
| 2691 | return 0; |
| 2692 | } |
| 2693 | |
Alexander Beregalov | 15efc02 | 2009-04-09 15:56:14 +0000 | [diff] [blame] | 2694 | static const struct net_device_ops emac_netdev_ops = { |
| 2695 | .ndo_open = emac_open, |
| 2696 | .ndo_stop = emac_close, |
| 2697 | .ndo_get_stats = emac_stats, |
| 2698 | .ndo_set_multicast_list = emac_set_multicast_list, |
| 2699 | .ndo_do_ioctl = emac_ioctl, |
| 2700 | .ndo_tx_timeout = emac_tx_timeout, |
| 2701 | .ndo_validate_addr = eth_validate_addr, |
| 2702 | .ndo_set_mac_address = eth_mac_addr, |
| 2703 | .ndo_start_xmit = emac_start_xmit, |
| 2704 | .ndo_change_mtu = eth_change_mtu, |
| 2705 | }; |
| 2706 | |
| 2707 | static const struct net_device_ops emac_gige_netdev_ops = { |
| 2708 | .ndo_open = emac_open, |
| 2709 | .ndo_stop = emac_close, |
| 2710 | .ndo_get_stats = emac_stats, |
| 2711 | .ndo_set_multicast_list = emac_set_multicast_list, |
| 2712 | .ndo_do_ioctl = emac_ioctl, |
| 2713 | .ndo_tx_timeout = emac_tx_timeout, |
| 2714 | .ndo_validate_addr = eth_validate_addr, |
| 2715 | .ndo_set_mac_address = eth_mac_addr, |
| 2716 | .ndo_start_xmit = emac_start_xmit_sg, |
| 2717 | .ndo_change_mtu = emac_change_mtu, |
| 2718 | }; |
| 2719 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2720 | static int __devinit emac_probe(struct of_device *ofdev, |
| 2721 | const struct of_device_id *match) |
| 2722 | { |
| 2723 | struct net_device *ndev; |
| 2724 | struct emac_instance *dev; |
| 2725 | struct device_node *np = ofdev->node; |
| 2726 | struct device_node **blist = NULL; |
| 2727 | int err, i; |
| 2728 | |
Josh Boyer | be63c09 | 2008-04-22 10:46:44 +1000 | [diff] [blame] | 2729 | /* Skip unused/unwired EMACS. We leave the check for an unused |
| 2730 | * property here for now, but new flat device trees should set a |
| 2731 | * status property to "disabled" instead. |
| 2732 | */ |
| 2733 | if (of_get_property(np, "unused", NULL) || !of_device_is_available(np)) |
Hugh Blemings | 3d72256 | 2007-12-05 11:14:30 +1100 | [diff] [blame] | 2734 | return -ENODEV; |
| 2735 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2736 | /* Find ourselves in the bootlist if we are there */ |
| 2737 | for (i = 0; i < EMAC_BOOT_LIST_SIZE; i++) |
| 2738 | if (emac_boot_list[i] == np) |
| 2739 | blist = &emac_boot_list[i]; |
| 2740 | |
| 2741 | /* Allocate our net_device structure */ |
| 2742 | err = -ENOMEM; |
| 2743 | ndev = alloc_etherdev(sizeof(struct emac_instance)); |
| 2744 | if (!ndev) { |
| 2745 | printk(KERN_ERR "%s: could not allocate ethernet device!\n", |
| 2746 | np->full_name); |
| 2747 | goto err_gone; |
| 2748 | } |
| 2749 | dev = netdev_priv(ndev); |
| 2750 | dev->ndev = ndev; |
| 2751 | dev->ofdev = ofdev; |
| 2752 | dev->blist = blist; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2753 | SET_NETDEV_DEV(ndev, &ofdev->dev); |
| 2754 | |
| 2755 | /* Initialize some embedded data structures */ |
| 2756 | mutex_init(&dev->mdio_lock); |
| 2757 | mutex_init(&dev->link_lock); |
| 2758 | spin_lock_init(&dev->lock); |
| 2759 | INIT_WORK(&dev->reset_work, emac_reset_work); |
| 2760 | |
| 2761 | /* Init various config data based on device-tree */ |
| 2762 | err = emac_init_config(dev); |
| 2763 | if (err != 0) |
| 2764 | goto err_free; |
| 2765 | |
| 2766 | /* Get interrupts. EMAC irq is mandatory, WOL irq is optional */ |
| 2767 | dev->emac_irq = irq_of_parse_and_map(np, 0); |
| 2768 | dev->wol_irq = irq_of_parse_and_map(np, 1); |
| 2769 | if (dev->emac_irq == NO_IRQ) { |
| 2770 | printk(KERN_ERR "%s: Can't map main interrupt\n", np->full_name); |
| 2771 | goto err_free; |
| 2772 | } |
| 2773 | ndev->irq = dev->emac_irq; |
| 2774 | |
| 2775 | /* Map EMAC regs */ |
| 2776 | if (of_address_to_resource(np, 0, &dev->rsrc_regs)) { |
| 2777 | printk(KERN_ERR "%s: Can't get registers address\n", |
| 2778 | np->full_name); |
| 2779 | goto err_irq_unmap; |
| 2780 | } |
| 2781 | // TODO : request_mem_region |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 2782 | dev->emacp = ioremap(dev->rsrc_regs.start, |
| 2783 | dev->rsrc_regs.end - dev->rsrc_regs.start + 1); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2784 | if (dev->emacp == NULL) { |
| 2785 | printk(KERN_ERR "%s: Can't map device registers!\n", |
| 2786 | np->full_name); |
| 2787 | err = -ENOMEM; |
| 2788 | goto err_irq_unmap; |
| 2789 | } |
| 2790 | |
| 2791 | /* Wait for dependent devices */ |
| 2792 | err = emac_wait_deps(dev); |
| 2793 | if (err) { |
| 2794 | printk(KERN_ERR |
| 2795 | "%s: Timeout waiting for dependent devices\n", |
| 2796 | np->full_name); |
| 2797 | /* display more info about what's missing ? */ |
| 2798 | goto err_reg_unmap; |
| 2799 | } |
| 2800 | dev->mal = dev_get_drvdata(&dev->mal_dev->dev); |
| 2801 | if (dev->mdio_dev != NULL) |
| 2802 | dev->mdio_instance = dev_get_drvdata(&dev->mdio_dev->dev); |
| 2803 | |
| 2804 | /* Register with MAL */ |
| 2805 | dev->commac.ops = &emac_commac_ops; |
| 2806 | dev->commac.dev = dev; |
| 2807 | dev->commac.tx_chan_mask = MAL_CHAN_MASK(dev->mal_tx_chan); |
| 2808 | dev->commac.rx_chan_mask = MAL_CHAN_MASK(dev->mal_rx_chan); |
| 2809 | err = mal_register_commac(dev->mal, &dev->commac); |
| 2810 | if (err) { |
| 2811 | printk(KERN_ERR "%s: failed to register with mal %s!\n", |
| 2812 | np->full_name, dev->mal_dev->node->full_name); |
| 2813 | goto err_rel_deps; |
| 2814 | } |
| 2815 | dev->rx_skb_size = emac_rx_skb_size(ndev->mtu); |
| 2816 | dev->rx_sync_size = emac_rx_sync_size(ndev->mtu); |
| 2817 | |
| 2818 | /* Get pointers to BD rings */ |
| 2819 | dev->tx_desc = |
| 2820 | dev->mal->bd_virt + mal_tx_bd_offset(dev->mal, dev->mal_tx_chan); |
| 2821 | dev->rx_desc = |
| 2822 | dev->mal->bd_virt + mal_rx_bd_offset(dev->mal, dev->mal_rx_chan); |
| 2823 | |
| 2824 | DBG(dev, "tx_desc %p" NL, dev->tx_desc); |
| 2825 | DBG(dev, "rx_desc %p" NL, dev->rx_desc); |
| 2826 | |
| 2827 | /* Clean rings */ |
| 2828 | memset(dev->tx_desc, 0, NUM_TX_BUFF * sizeof(struct mal_descriptor)); |
| 2829 | memset(dev->rx_desc, 0, NUM_RX_BUFF * sizeof(struct mal_descriptor)); |
Sathya Narayanan | ab9b30c | 2008-07-01 10:58:05 +0200 | [diff] [blame] | 2830 | memset(dev->tx_skb, 0, NUM_TX_BUFF * sizeof(struct sk_buff *)); |
| 2831 | memset(dev->rx_skb, 0, NUM_RX_BUFF * sizeof(struct sk_buff *)); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2832 | |
| 2833 | /* Attach to ZMII, if needed */ |
| 2834 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII) && |
| 2835 | (err = zmii_attach(dev->zmii_dev, dev->zmii_port, &dev->phy_mode)) != 0) |
| 2836 | goto err_unreg_commac; |
| 2837 | |
| 2838 | /* Attach to RGMII, if needed */ |
| 2839 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII) && |
| 2840 | (err = rgmii_attach(dev->rgmii_dev, dev->rgmii_port, dev->phy_mode)) != 0) |
| 2841 | goto err_detach_zmii; |
| 2842 | |
| 2843 | /* Attach to TAH, if needed */ |
| 2844 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH) && |
| 2845 | (err = tah_attach(dev->tah_dev, dev->tah_port)) != 0) |
| 2846 | goto err_detach_rgmii; |
| 2847 | |
| 2848 | /* Set some link defaults before we can find out real parameters */ |
| 2849 | dev->phy.speed = SPEED_100; |
| 2850 | dev->phy.duplex = DUPLEX_FULL; |
| 2851 | dev->phy.autoneg = AUTONEG_DISABLE; |
| 2852 | dev->phy.pause = dev->phy.asym_pause = 0; |
| 2853 | dev->stop_timeout = STOP_TIMEOUT_100; |
| 2854 | INIT_DELAYED_WORK(&dev->link_work, emac_link_timer); |
| 2855 | |
| 2856 | /* Find PHY if any */ |
| 2857 | err = emac_init_phy(dev); |
| 2858 | if (err != 0) |
| 2859 | goto err_detach_tah; |
| 2860 | |
Stefan Roese | ee63d22 | 2008-01-16 08:11:15 +0100 | [diff] [blame] | 2861 | if (dev->tah_dev) |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2862 | ndev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2863 | ndev->watchdog_timeo = 5 * HZ; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2864 | if (emac_phy_supports_gige(dev->phy_mode)) { |
Alexander Beregalov | 15efc02 | 2009-04-09 15:56:14 +0000 | [diff] [blame] | 2865 | ndev->netdev_ops = &emac_gige_netdev_ops; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2866 | dev->commac.ops = &emac_commac_sg_ops; |
Alexander Beregalov | 15efc02 | 2009-04-09 15:56:14 +0000 | [diff] [blame] | 2867 | } else |
| 2868 | ndev->netdev_ops = &emac_netdev_ops; |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2869 | SET_ETHTOOL_OPS(ndev, &emac_ethtool_ops); |
| 2870 | |
| 2871 | netif_carrier_off(ndev); |
| 2872 | netif_stop_queue(ndev); |
| 2873 | |
| 2874 | err = register_netdev(ndev); |
| 2875 | if (err) { |
| 2876 | printk(KERN_ERR "%s: failed to register net device (%d)!\n", |
| 2877 | np->full_name, err); |
| 2878 | goto err_detach_tah; |
| 2879 | } |
| 2880 | |
| 2881 | /* Set our drvdata last as we don't want them visible until we are |
| 2882 | * fully initialized |
| 2883 | */ |
| 2884 | wmb(); |
| 2885 | dev_set_drvdata(&ofdev->dev, dev); |
| 2886 | |
| 2887 | /* There's a new kid in town ! Let's tell everybody */ |
| 2888 | wake_up_all(&emac_probe_wait); |
| 2889 | |
| 2890 | |
Johannes Berg | 7c510e4 | 2008-10-27 17:47:26 -0700 | [diff] [blame] | 2891 | printk(KERN_INFO "%s: EMAC-%d %s, MAC %pM\n", |
| 2892 | ndev->name, dev->cell_index, np->full_name, ndev->dev_addr); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2893 | |
Victor Gallardo | 9e3cb29 | 2008-10-01 23:37:57 -0700 | [diff] [blame] | 2894 | if (dev->phy_mode == PHY_MODE_SGMII) |
| 2895 | printk(KERN_NOTICE "%s: in SGMII mode\n", ndev->name); |
| 2896 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2897 | if (dev->phy.address >= 0) |
| 2898 | printk("%s: found %s PHY (0x%02x)\n", ndev->name, |
| 2899 | dev->phy.def->name, dev->phy.address); |
| 2900 | |
| 2901 | emac_dbg_register(dev); |
| 2902 | |
| 2903 | /* Life is good */ |
| 2904 | return 0; |
| 2905 | |
| 2906 | /* I have a bad feeling about this ... */ |
| 2907 | |
| 2908 | err_detach_tah: |
| 2909 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) |
| 2910 | tah_detach(dev->tah_dev, dev->tah_port); |
| 2911 | err_detach_rgmii: |
| 2912 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) |
| 2913 | rgmii_detach(dev->rgmii_dev, dev->rgmii_port); |
| 2914 | err_detach_zmii: |
| 2915 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) |
| 2916 | zmii_detach(dev->zmii_dev, dev->zmii_port); |
| 2917 | err_unreg_commac: |
| 2918 | mal_unregister_commac(dev->mal, &dev->commac); |
| 2919 | err_rel_deps: |
| 2920 | emac_put_deps(dev); |
| 2921 | err_reg_unmap: |
| 2922 | iounmap(dev->emacp); |
| 2923 | err_irq_unmap: |
| 2924 | if (dev->wol_irq != NO_IRQ) |
| 2925 | irq_dispose_mapping(dev->wol_irq); |
| 2926 | if (dev->emac_irq != NO_IRQ) |
| 2927 | irq_dispose_mapping(dev->emac_irq); |
| 2928 | err_free: |
| 2929 | kfree(ndev); |
| 2930 | err_gone: |
| 2931 | /* if we were on the bootlist, remove us as we won't show up and |
| 2932 | * wake up all waiters to notify them in case they were waiting |
| 2933 | * on us |
| 2934 | */ |
| 2935 | if (blist) { |
| 2936 | *blist = NULL; |
| 2937 | wake_up_all(&emac_probe_wait); |
| 2938 | } |
| 2939 | return err; |
| 2940 | } |
| 2941 | |
| 2942 | static int __devexit emac_remove(struct of_device *ofdev) |
| 2943 | { |
| 2944 | struct emac_instance *dev = dev_get_drvdata(&ofdev->dev); |
| 2945 | |
| 2946 | DBG(dev, "remove" NL); |
| 2947 | |
| 2948 | dev_set_drvdata(&ofdev->dev, NULL); |
| 2949 | |
| 2950 | unregister_netdev(dev->ndev); |
| 2951 | |
Benjamin Herrenschmidt | 61dbcec | 2007-11-20 14:50:46 +1100 | [diff] [blame] | 2952 | flush_scheduled_work(); |
| 2953 | |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2954 | if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) |
| 2955 | tah_detach(dev->tah_dev, dev->tah_port); |
| 2956 | if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) |
| 2957 | rgmii_detach(dev->rgmii_dev, dev->rgmii_port); |
| 2958 | if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) |
| 2959 | zmii_detach(dev->zmii_dev, dev->zmii_port); |
| 2960 | |
| 2961 | mal_unregister_commac(dev->mal, &dev->commac); |
| 2962 | emac_put_deps(dev); |
| 2963 | |
| 2964 | emac_dbg_unregister(dev); |
| 2965 | iounmap(dev->emacp); |
| 2966 | |
| 2967 | if (dev->wol_irq != NO_IRQ) |
| 2968 | irq_dispose_mapping(dev->wol_irq); |
| 2969 | if (dev->emac_irq != NO_IRQ) |
| 2970 | irq_dispose_mapping(dev->emac_irq); |
| 2971 | |
| 2972 | kfree(dev->ndev); |
| 2973 | |
| 2974 | return 0; |
| 2975 | } |
| 2976 | |
| 2977 | /* XXX Features in here should be replaced by properties... */ |
| 2978 | static struct of_device_id emac_match[] = |
| 2979 | { |
| 2980 | { |
| 2981 | .type = "network", |
| 2982 | .compatible = "ibm,emac", |
| 2983 | }, |
| 2984 | { |
| 2985 | .type = "network", |
| 2986 | .compatible = "ibm,emac4", |
| 2987 | }, |
Grant Erickson | 05781cc | 2008-07-08 08:03:11 +1000 | [diff] [blame] | 2988 | { |
| 2989 | .type = "network", |
| 2990 | .compatible = "ibm,emac4sync", |
| 2991 | }, |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2992 | {}, |
| 2993 | }; |
Anton Vorontsov | e72701a | 2009-10-14 14:54:52 -0700 | [diff] [blame] | 2994 | MODULE_DEVICE_TABLE(of, emac_match); |
David Gibson | 1d3bb99 | 2007-08-23 13:56:01 +1000 | [diff] [blame] | 2995 | |
| 2996 | static struct of_platform_driver emac_driver = { |
| 2997 | .name = "emac", |
| 2998 | .match_table = emac_match, |
| 2999 | |
| 3000 | .probe = emac_probe, |
| 3001 | .remove = emac_remove, |
| 3002 | }; |
| 3003 | |
| 3004 | static void __init emac_make_bootlist(void) |
| 3005 | { |
| 3006 | struct device_node *np = NULL; |
| 3007 | int j, max, i = 0, k; |
| 3008 | int cell_indices[EMAC_BOOT_LIST_SIZE]; |
| 3009 | |
| 3010 | /* Collect EMACs */ |
| 3011 | while((np = of_find_all_nodes(np)) != NULL) { |
| 3012 | const u32 *idx; |
| 3013 | |
| 3014 | if (of_match_node(emac_match, np) == NULL) |
| 3015 | continue; |
| 3016 | if (of_get_property(np, "unused", NULL)) |
| 3017 | continue; |
| 3018 | idx = of_get_property(np, "cell-index", NULL); |
| 3019 | if (idx == NULL) |
| 3020 | continue; |
| 3021 | cell_indices[i] = *idx; |
| 3022 | emac_boot_list[i++] = of_node_get(np); |
| 3023 | if (i >= EMAC_BOOT_LIST_SIZE) { |
| 3024 | of_node_put(np); |
| 3025 | break; |
| 3026 | } |
| 3027 | } |
| 3028 | max = i; |
| 3029 | |
| 3030 | /* Bubble sort them (doh, what a creative algorithm :-) */ |
| 3031 | for (i = 0; max > 1 && (i < (max - 1)); i++) |
| 3032 | for (j = i; j < max; j++) { |
| 3033 | if (cell_indices[i] > cell_indices[j]) { |
| 3034 | np = emac_boot_list[i]; |
| 3035 | emac_boot_list[i] = emac_boot_list[j]; |
| 3036 | emac_boot_list[j] = np; |
| 3037 | k = cell_indices[i]; |
| 3038 | cell_indices[i] = cell_indices[j]; |
| 3039 | cell_indices[j] = k; |
| 3040 | } |
| 3041 | } |
| 3042 | } |
| 3043 | |
| 3044 | static int __init emac_init(void) |
| 3045 | { |
| 3046 | int rc; |
| 3047 | |
| 3048 | printk(KERN_INFO DRV_DESC ", version " DRV_VERSION "\n"); |
| 3049 | |
| 3050 | /* Init debug stuff */ |
| 3051 | emac_init_debug(); |
| 3052 | |
| 3053 | /* Build EMAC boot list */ |
| 3054 | emac_make_bootlist(); |
| 3055 | |
| 3056 | /* Init submodules */ |
| 3057 | rc = mal_init(); |
| 3058 | if (rc) |
| 3059 | goto err; |
| 3060 | rc = zmii_init(); |
| 3061 | if (rc) |
| 3062 | goto err_mal; |
| 3063 | rc = rgmii_init(); |
| 3064 | if (rc) |
| 3065 | goto err_zmii; |
| 3066 | rc = tah_init(); |
| 3067 | if (rc) |
| 3068 | goto err_rgmii; |
| 3069 | rc = of_register_platform_driver(&emac_driver); |
| 3070 | if (rc) |
| 3071 | goto err_tah; |
| 3072 | |
| 3073 | return 0; |
| 3074 | |
| 3075 | err_tah: |
| 3076 | tah_exit(); |
| 3077 | err_rgmii: |
| 3078 | rgmii_exit(); |
| 3079 | err_zmii: |
| 3080 | zmii_exit(); |
| 3081 | err_mal: |
| 3082 | mal_exit(); |
| 3083 | err: |
| 3084 | return rc; |
| 3085 | } |
| 3086 | |
| 3087 | static void __exit emac_exit(void) |
| 3088 | { |
| 3089 | int i; |
| 3090 | |
| 3091 | of_unregister_platform_driver(&emac_driver); |
| 3092 | |
| 3093 | tah_exit(); |
| 3094 | rgmii_exit(); |
| 3095 | zmii_exit(); |
| 3096 | mal_exit(); |
| 3097 | emac_fini_debug(); |
| 3098 | |
| 3099 | /* Destroy EMAC boot list */ |
| 3100 | for (i = 0; i < EMAC_BOOT_LIST_SIZE; i++) |
| 3101 | if (emac_boot_list[i]) |
| 3102 | of_node_put(emac_boot_list[i]); |
| 3103 | } |
| 3104 | |
| 3105 | module_init(emac_init); |
| 3106 | module_exit(emac_exit); |