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Ben Hutchings8ceee662008-04-27 12:55:59 +01001/****************************************************************************
Ben Hutchingsf7a6d2c2013-08-29 23:32:48 +01002 * Driver for Solarflare network controllers and boards
Ben Hutchings8ceee662008-04-27 12:55:59 +01003 * Copyright 2005-2006 Fen Systems Ltd.
Ben Hutchingsf7a6d2c2013-08-29 23:32:48 +01004 * Copyright 2005-2013 Solarflare Communications Inc.
Ben Hutchings8ceee662008-04-27 12:55:59 +01005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11/* Common definitions for all Efx net driver code */
12
13#ifndef EFX_NET_DRIVER_H
14#define EFX_NET_DRIVER_H
15
Ben Hutchings8ceee662008-04-27 12:55:59 +010016#include <linux/netdevice.h>
17#include <linux/etherdevice.h>
18#include <linux/ethtool.h>
19#include <linux/if_vlan.h>
Steve Hodgson90d683a2010-06-01 11:19:39 +000020#include <linux/timer.h>
Ben Hutchings68e7f452009-04-29 08:05:08 +000021#include <linux/mdio.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010022#include <linux/list.h>
23#include <linux/pci.h>
24#include <linux/device.h>
25#include <linux/highmem.h>
26#include <linux/workqueue.h>
Ben Hutchingscd2d5b52012-02-14 00:48:07 +000027#include <linux/mutex.h>
Edward Cree0d322412015-05-20 11:10:03 +010028#include <linux/rwsem.h>
David S. Miller10ed61c2010-09-21 16:11:06 -070029#include <linux/vmalloc.h>
Ben Hutchings37b5a602008-05-30 22:27:04 +010030#include <linux/i2c.h>
Ben Hutchings45a3fd52012-11-28 04:38:14 +000031#include <linux/mtd/mtd.h>
Alexandre Rames36763262014-07-22 14:03:25 +010032#include <net/busy_poll.h>
Ben Hutchings8ceee662008-04-27 12:55:59 +010033
34#include "enum.h"
35#include "bitfield.h"
Ben Hutchingsadd72472012-11-08 01:46:53 +000036#include "filter.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010037
Ben Hutchings8ceee662008-04-27 12:55:59 +010038/**************************************************************************
39 *
40 * Build definitions
41 *
42 **************************************************************************/
Ben Hutchingsc5d5f5f2010-06-23 11:30:26 +000043
Ben Hutchings8127d662013-08-29 19:19:29 +010044#define EFX_DRIVER_VERSION "4.0"
Ben Hutchings8ceee662008-04-27 12:55:59 +010045
Ben Hutchings5f3f9d62011-11-04 22:29:14 +000046#ifdef DEBUG
Ben Hutchings8ceee662008-04-27 12:55:59 +010047#define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
48#define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
49#else
50#define EFX_BUG_ON_PARANOID(x) do {} while (0)
51#define EFX_WARN_ON_PARANOID(x) do {} while (0)
52#endif
53
Ben Hutchings8ceee662008-04-27 12:55:59 +010054/**************************************************************************
55 *
56 * Efx data structures
57 *
58 **************************************************************************/
59
Ben Hutchingsa16e5b22012-02-14 00:40:12 +000060#define EFX_MAX_CHANNELS 32U
Ben Hutchings8ceee662008-04-27 12:55:59 +010061#define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
Ben Hutchingscd2d5b52012-02-14 00:48:07 +000062#define EFX_EXTRA_CHANNEL_IOV 0
Stuart Hodgson7c236c42012-09-03 11:09:36 +010063#define EFX_EXTRA_CHANNEL_PTP 1
64#define EFX_MAX_EXTRA_CHANNELS 2U
Ben Hutchings8ceee662008-04-27 12:55:59 +010065
Ben Hutchingsa4900ac2010-04-28 09:30:43 +000066/* Checksum generation is a per-queue option in hardware, so each
67 * queue visible to the networking core is backed by two hardware TX
68 * queues. */
Ben Hutchings94b274b2011-01-10 21:18:20 +000069#define EFX_MAX_TX_TC 2
70#define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
71#define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
72#define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
73#define EFX_TXQ_TYPES 4
74#define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
Ben Hutchings60ac1062008-09-01 12:44:59 +010075
Ben Hutchings85740cdf2013-01-29 23:33:15 +000076/* Maximum possible MTU the driver supports */
77#define EFX_MAX_MTU (9 * 1024)
78
Ben Hutchings950c54d2013-05-13 12:01:22 +000079/* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
80 * and should be a multiple of the cache line size.
81 */
82#define EFX_RX_USR_BUF_SIZE (2048 - 256)
83
84/* If possible, we should ensure cache line alignment at start and end
85 * of every buffer. Otherwise, we just need to ensure 4-byte
86 * alignment of the network header.
87 */
88#if NET_IP_ALIGN == 0
89#define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
90#else
91#define EFX_RX_BUF_ALIGNMENT 4
92#endif
Ben Hutchings85740cdf2013-01-29 23:33:15 +000093
Stuart Hodgson7c236c42012-09-03 11:09:36 +010094/* Forward declare Precision Time Protocol (PTP) support structure. */
95struct efx_ptp_data;
Daniel Pieczko9ec06592013-11-21 17:11:25 +000096struct hwtstamp_config;
Stuart Hodgson7c236c42012-09-03 11:09:36 +010097
Ben Hutchingsd4f2cec2012-07-04 03:58:33 +010098struct efx_self_tests;
99
Ben Hutchings8ceee662008-04-27 12:55:59 +0100100/**
Ben Hutchingscaa75582012-09-19 00:31:42 +0100101 * struct efx_buffer - A general-purpose DMA buffer
102 * @addr: host base address of the buffer
Ben Hutchings8ceee662008-04-27 12:55:59 +0100103 * @dma_addr: DMA base address of the buffer
104 * @len: Buffer length, in bytes
Ben Hutchings8ceee662008-04-27 12:55:59 +0100105 *
Ben Hutchingscaa75582012-09-19 00:31:42 +0100106 * The NIC uses these buffers for its interrupt status registers and
107 * MAC stats dumps.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100108 */
Ben Hutchingscaa75582012-09-19 00:31:42 +0100109struct efx_buffer {
Ben Hutchings8ceee662008-04-27 12:55:59 +0100110 void *addr;
111 dma_addr_t dma_addr;
112 unsigned int len;
Ben Hutchingscaa75582012-09-19 00:31:42 +0100113};
114
115/**
116 * struct efx_special_buffer - DMA buffer entered into buffer table
117 * @buf: Standard &struct efx_buffer
118 * @index: Buffer index within controller;s buffer table
119 * @entries: Number of buffer table entries
120 *
121 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
122 * Event and descriptor rings are addressed via one or more buffer
123 * table entries (and so can be physically non-contiguous, although we
124 * currently do not take advantage of that). On Falcon and Siena we
125 * have to take care of allocating and initialising the entries
126 * ourselves. On later hardware this is managed by the firmware and
127 * @index and @entries are left as 0.
128 */
129struct efx_special_buffer {
130 struct efx_buffer buf;
Ben Hutchings5bbe2f42012-02-13 23:14:23 +0000131 unsigned int index;
132 unsigned int entries;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100133};
134
135/**
Ben Hutchings7668ff92012-05-17 20:52:20 +0100136 * struct efx_tx_buffer - buffer state for a TX descriptor
137 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
138 * freed when descriptor completes
Ben Hutchingsf7251a92012-05-17 18:40:54 +0100139 * @heap_buf: When @flags & %EFX_TX_BUF_HEAP, the associated heap buffer to be
140 * freed when descriptor completes.
Ben Hutchingsba8977b2013-01-08 23:43:19 +0000141 * @option: When @flags & %EFX_TX_BUF_OPTION, a NIC-specific option descriptor.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100142 * @dma_addr: DMA address of the fragment.
Ben Hutchings7668ff92012-05-17 20:52:20 +0100143 * @flags: Flags for allocation and DMA mapping type
Ben Hutchings8ceee662008-04-27 12:55:59 +0100144 * @len: Length of this fragment.
145 * This field is zero when the queue slot is empty.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100146 * @unmap_len: Length of this fragment to unmap
Alexandre Rames2acdb922013-10-31 12:42:32 +0000147 * @dma_offset: Offset of @dma_addr from the address of the backing DMA mapping.
148 * Only valid if @unmap_len != 0.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100149 */
150struct efx_tx_buffer {
Ben Hutchings7668ff92012-05-17 20:52:20 +0100151 union {
152 const struct sk_buff *skb;
Ben Hutchingsf7251a92012-05-17 18:40:54 +0100153 void *heap_buf;
Ben Hutchings7668ff92012-05-17 20:52:20 +0100154 };
Ben Hutchingsba8977b2013-01-08 23:43:19 +0000155 union {
156 efx_qword_t option;
157 dma_addr_t dma_addr;
158 };
Ben Hutchings7668ff92012-05-17 20:52:20 +0100159 unsigned short flags;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100160 unsigned short len;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100161 unsigned short unmap_len;
Alexandre Rames2acdb922013-10-31 12:42:32 +0000162 unsigned short dma_offset;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100163};
Ben Hutchings7668ff92012-05-17 20:52:20 +0100164#define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
165#define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
Ben Hutchingsf7251a92012-05-17 18:40:54 +0100166#define EFX_TX_BUF_HEAP 4 /* buffer was allocated with kmalloc() */
Ben Hutchings7668ff92012-05-17 20:52:20 +0100167#define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
Ben Hutchingsba8977b2013-01-08 23:43:19 +0000168#define EFX_TX_BUF_OPTION 0x10 /* empty buffer for option descriptor */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100169
170/**
171 * struct efx_tx_queue - An Efx TX queue
172 *
173 * This is a ring buffer of TX fragments.
174 * Since the TX completion path always executes on the same
175 * CPU and the xmit path can operate on different CPUs,
176 * performance is increased by ensuring that the completion
177 * path and the xmit path operate on different cache lines.
178 * This is particularly important if the xmit path is always
179 * executing on one CPU which is different from the completion
180 * path. There is also a cache line for members which are
181 * read but not written on the fast path.
182 *
183 * @efx: The associated Efx NIC
184 * @queue: DMA queue number
Ben Hutchings8ceee662008-04-27 12:55:59 +0100185 * @channel: The associated channel
Ben Hutchingsc04bfc62010-12-10 01:24:16 +0000186 * @core_txq: The networking core TX queue structure
Ben Hutchings8ceee662008-04-27 12:55:59 +0100187 * @buffer: The software buffer ring
Ben Hutchingsf7251a92012-05-17 18:40:54 +0100188 * @tsoh_page: Array of pages of TSO header buffers
Ben Hutchings8ceee662008-04-27 12:55:59 +0100189 * @txd: The hardware descriptor ring
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000190 * @ptr_mask: The size of the ring minus 1.
Ben Hutchings183233b2013-06-28 21:47:12 +0100191 * @piobuf: PIO buffer region for this TX queue (shared with its partner).
192 * Size of the region is efx_piobuf_size.
193 * @piobuf_offset: Buffer offset to be specified in PIO descriptors
Ben Hutchings94b274b2011-01-10 21:18:20 +0000194 * @initialised: Has hardware queue been initialised?
Ben Hutchings8ceee662008-04-27 12:55:59 +0100195 * @read_count: Current read pointer.
196 * This is the number of buffers that have been removed from both rings.
Ben Hutchingscd385572010-11-15 23:53:11 +0000197 * @old_write_count: The value of @write_count when last checked.
198 * This is here for performance reasons. The xmit path will
199 * only get the up-to-date value of @write_count if this
200 * variable indicates that the queue is empty. This is to
201 * avoid cache-line ping-pong between the xmit path and the
202 * completion path.
Ben Hutchings02e12162013-04-27 01:55:21 +0100203 * @merge_events: Number of TX merged completion events
Ben Hutchings8ceee662008-04-27 12:55:59 +0100204 * @insert_count: Current insert pointer
205 * This is the number of buffers that have been added to the
206 * software ring.
207 * @write_count: Current write pointer
208 * This is the number of buffers that have been added to the
209 * hardware ring.
210 * @old_read_count: The value of read_count when last checked.
211 * This is here for performance reasons. The xmit path will
212 * only get the up-to-date value of read_count if this
213 * variable indicates that the queue is full. This is to
214 * avoid cache-line ping-pong between the xmit path and the
215 * completion path.
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100216 * @tso_bursts: Number of times TSO xmit invoked by kernel
217 * @tso_long_headers: Number of packets with headers too long for standard
218 * blocks
219 * @tso_packets: Number of packets via the TSO xmit path
Ben Hutchingscd385572010-11-15 23:53:11 +0000220 * @pushes: Number of times the TX push feature has been used
Jon Cooperee45fd92013-09-02 18:24:29 +0100221 * @pio_packets: Number of times the TX PIO feature has been used
Ben Hutchingscd385572010-11-15 23:53:11 +0000222 * @empty_read_count: If the completion path has seen the queue as empty
223 * and the transmission path has not yet checked this, the value of
224 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100225 */
226struct efx_tx_queue {
227 /* Members which don't change on the fast path */
228 struct efx_nic *efx ____cacheline_aligned_in_smp;
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000229 unsigned queue;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100230 struct efx_channel *channel;
Ben Hutchingsc04bfc62010-12-10 01:24:16 +0000231 struct netdev_queue *core_txq;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100232 struct efx_tx_buffer *buffer;
Ben Hutchingsf7251a92012-05-17 18:40:54 +0100233 struct efx_buffer *tsoh_page;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100234 struct efx_special_buffer txd;
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000235 unsigned int ptr_mask;
Ben Hutchings183233b2013-06-28 21:47:12 +0100236 void __iomem *piobuf;
237 unsigned int piobuf_offset;
Ben Hutchings94b274b2011-01-10 21:18:20 +0000238 bool initialised;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100239
240 /* Members used mainly on the completion path */
241 unsigned int read_count ____cacheline_aligned_in_smp;
Ben Hutchingscd385572010-11-15 23:53:11 +0000242 unsigned int old_write_count;
Ben Hutchings02e12162013-04-27 01:55:21 +0100243 unsigned int merge_events;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100244
245 /* Members used only on the xmit path */
246 unsigned int insert_count ____cacheline_aligned_in_smp;
247 unsigned int write_count;
248 unsigned int old_read_count;
Ben Hutchingsb9b39b62008-05-07 12:51:12 +0100249 unsigned int tso_bursts;
250 unsigned int tso_long_headers;
251 unsigned int tso_packets;
Ben Hutchingscd385572010-11-15 23:53:11 +0000252 unsigned int pushes;
Jon Cooperee45fd92013-09-02 18:24:29 +0100253 unsigned int pio_packets;
Andrew Rybchenko8ccf38002014-07-17 12:10:43 +0100254 /* Statistics to supplement MAC stats */
255 unsigned long tx_packets;
Ben Hutchingscd385572010-11-15 23:53:11 +0000256
257 /* Members shared between paths and sometimes updated */
258 unsigned int empty_read_count ____cacheline_aligned_in_smp;
259#define EFX_EMPTY_COUNT_VALID 0x80000000
Daniel Pieczko525d9e82012-10-02 13:36:18 +0100260 atomic_t flush_outstanding;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100261};
262
263/**
264 * struct efx_rx_buffer - An Efx RX data buffer
265 * @dma_addr: DMA base address of the buffer
Alexandre Rames97d48a12013-01-11 12:26:21 +0000266 * @page: The associated page buffer.
Ben Hutchingsdb339562011-08-26 18:05:11 +0100267 * Will be %NULL if the buffer slot is currently free.
Ben Hutchingsb74e3e82013-01-29 23:33:15 +0000268 * @page_offset: If pending: offset in @page of DMA base address.
269 * If completed: offset in @page of Ethernet header.
Ben Hutchings80c2e712013-01-23 21:52:13 +0000270 * @len: If pending: length for DMA descriptor.
271 * If completed: received length, excluding hash prefix.
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000272 * @flags: Flags for buffer and packet state. These are only set on the
273 * first buffer of a scattered packet.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100274 */
275struct efx_rx_buffer {
276 dma_addr_t dma_addr;
Alexandre Rames97d48a12013-01-11 12:26:21 +0000277 struct page *page;
Ben Hutchingsb590ace2013-01-10 23:51:54 +0000278 u16 page_offset;
279 u16 len;
Ben Hutchingsdb339562011-08-26 18:05:11 +0100280 u16 flags;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100281};
Ben Hutchings179ea7f2013-03-07 16:31:17 +0000282#define EFX_RX_BUF_LAST_IN_PAGE 0x0001
Ben Hutchingsdb339562011-08-26 18:05:11 +0100283#define EFX_RX_PKT_CSUMMED 0x0002
284#define EFX_RX_PKT_DISCARD 0x0004
Ben Hutchingsd07df8e2013-05-16 18:38:11 +0100285#define EFX_RX_PKT_TCP 0x0040
Ben Hutchings3dced742013-04-27 01:55:18 +0100286#define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100287
288/**
Steve Hodgson62b330b2010-06-01 11:20:53 +0000289 * struct efx_rx_page_state - Page-based rx buffer state
290 *
291 * Inserted at the start of every page allocated for receive buffers.
292 * Used to facilitate sharing dma mappings between recycled rx buffers
293 * and those passed up to the kernel.
294 *
Steve Hodgson62b330b2010-06-01 11:20:53 +0000295 * @dma_addr: The dma address of this page.
296 */
297struct efx_rx_page_state {
Steve Hodgson62b330b2010-06-01 11:20:53 +0000298 dma_addr_t dma_addr;
299
300 unsigned int __pad[0] ____cacheline_aligned;
301};
302
303/**
Ben Hutchings8ceee662008-04-27 12:55:59 +0100304 * struct efx_rx_queue - An Efx RX queue
305 * @efx: The associated Efx NIC
Stuart Hodgson79d68b32012-07-16 17:08:33 +0100306 * @core_index: Index of network core RX queue. Will be >= 0 iff this
307 * is associated with a real RX queue.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100308 * @buffer: The software buffer ring
309 * @rxd: The hardware descriptor ring
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000310 * @ptr_mask: The size of the ring minus 1.
Ben Hutchingsd8aec742013-05-27 16:52:54 +0100311 * @refill_enabled: Enable refill whenever fill level is low
Ben Hutchings9f2cb712012-02-08 00:11:20 +0000312 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
313 * @rxq_flush_pending.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100314 * @added_count: Number of buffers added to the receive queue.
315 * @notified_count: Number of buffers given to NIC (<= @added_count).
316 * @removed_count: Number of buffers removed from the receive queue.
Jon Coopere8c68c02013-03-08 10:18:28 +0000317 * @scatter_n: Used by NIC specific receive code.
318 * @scatter_len: Used by NIC specific receive code.
Daniel Pieczko27689352013-02-13 10:54:41 +0000319 * @page_ring: The ring to store DMA mapped pages for reuse.
320 * @page_add: Counter to calculate the write pointer for the recycle ring.
321 * @page_remove: Counter to calculate the read pointer for the recycle ring.
322 * @page_recycle_count: The number of pages that have been recycled.
323 * @page_recycle_failed: The number of pages that couldn't be recycled because
324 * the kernel still held a reference to them.
325 * @page_recycle_full: The number of pages that were released because the
326 * recycle ring was full.
327 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100328 * @max_fill: RX descriptor maximum fill level (<= ring size)
329 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
330 * (<= @max_fill)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100331 * @min_fill: RX descriptor minimum non-zero fill level.
332 * This records the minimum fill level observed when a ring
333 * refill was triggered.
Daniel Pieczko27689352013-02-13 10:54:41 +0000334 * @recycle_count: RX buffer recycle counter.
Steve Hodgson90d683a2010-06-01 11:19:39 +0000335 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
Ben Hutchings8ceee662008-04-27 12:55:59 +0100336 */
337struct efx_rx_queue {
338 struct efx_nic *efx;
Stuart Hodgson79d68b32012-07-16 17:08:33 +0100339 int core_index;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100340 struct efx_rx_buffer *buffer;
341 struct efx_special_buffer rxd;
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000342 unsigned int ptr_mask;
Ben Hutchingsd8aec742013-05-27 16:52:54 +0100343 bool refill_enabled;
Ben Hutchings9f2cb712012-02-08 00:11:20 +0000344 bool flush_pending;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100345
Ben Hutchings9bc2fc92013-01-29 23:33:14 +0000346 unsigned int added_count;
347 unsigned int notified_count;
348 unsigned int removed_count;
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000349 unsigned int scatter_n;
Jon Coopere8c68c02013-03-08 10:18:28 +0000350 unsigned int scatter_len;
Daniel Pieczko27689352013-02-13 10:54:41 +0000351 struct page **page_ring;
352 unsigned int page_add;
353 unsigned int page_remove;
354 unsigned int page_recycle_count;
355 unsigned int page_recycle_failed;
356 unsigned int page_recycle_full;
357 unsigned int page_ptr_mask;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100358 unsigned int max_fill;
359 unsigned int fast_fill_trigger;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100360 unsigned int min_fill;
361 unsigned int min_overfill;
Daniel Pieczko27689352013-02-13 10:54:41 +0000362 unsigned int recycle_count;
Steve Hodgson90d683a2010-06-01 11:19:39 +0000363 struct timer_list slow_fill;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100364 unsigned int slow_fill_count;
Andrew Rybchenko8ccf38002014-07-17 12:10:43 +0100365 /* Statistics to supplement MAC stats */
366 unsigned long rx_packets;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100367};
368
Jon Cooperbd9a2652013-11-18 12:54:41 +0000369enum efx_sync_events_state {
370 SYNC_EVENTS_DISABLED = 0,
371 SYNC_EVENTS_QUIESCENT,
372 SYNC_EVENTS_REQUESTED,
373 SYNC_EVENTS_VALID,
374};
375
Ben Hutchings8ceee662008-04-27 12:55:59 +0100376/**
377 * struct efx_channel - An Efx channel
378 *
379 * A channel comprises an event queue, at least one TX queue, at least
380 * one RX queue, and an associated tasklet for processing the event
381 * queue.
382 *
383 * @efx: Associated Efx NIC
Ben Hutchings8ceee662008-04-27 12:55:59 +0100384 * @channel: Channel instance number
Ben Hutchings7f967c02012-02-13 23:45:02 +0000385 * @type: Channel type definition
Ben Hutchingsbe3fc092012-10-08 18:21:51 +0100386 * @eventq_init: Event queue initialised flag
Ben Hutchings8ceee662008-04-27 12:55:59 +0100387 * @enabled: Channel enabled indicator
388 * @irq: IRQ number (MSI and MSI-X only)
Ben Hutchings0d86ebd2009-10-23 08:32:13 +0000389 * @irq_moderation: IRQ moderation value (in hardware ticks)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100390 * @napi_dev: Net device used with NAPI
391 * @napi_str: NAPI control structure
Alexandre Rames36763262014-07-22 14:03:25 +0100392 * @state: state for NAPI vs busy polling
393 * @state_lock: lock protecting @state
Ben Hutchings8ceee662008-04-27 12:55:59 +0100394 * @eventq: Event queue buffer
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000395 * @eventq_mask: Event queue pointer mask
Ben Hutchings8ceee662008-04-27 12:55:59 +0100396 * @eventq_read_ptr: Event queue read pointer
Ben Hutchingsdd407812012-02-28 23:40:21 +0000397 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000398 * @irq_count: Number of IRQs since last adaptive moderation decision
399 * @irq_mod_score: IRQ moderation score
Ben Hutchings8ceee662008-04-27 12:55:59 +0100400 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
Ben Hutchings8ceee662008-04-27 12:55:59 +0100401 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
402 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
Ben Hutchingsc1ac4032009-11-28 05:36:29 +0000403 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
Ben Hutchings8ceee662008-04-27 12:55:59 +0100404 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
405 * @n_rx_overlength: Count of RX_OVERLENGTH errors
406 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000407 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
408 * lack of descriptors
Ben Hutchings8127d662013-08-29 19:19:29 +0100409 * @n_rx_merge_events: Number of RX merged completion events
410 * @n_rx_merge_packets: Number of RX packets completed by merged events
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000411 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
412 * __efx_rx_packet(), or zero if there is none
413 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
414 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
Ben Hutchings8313aca2010-09-10 06:41:57 +0000415 * @rx_queue: RX queue for this channel
Ben Hutchings8313aca2010-09-10 06:41:57 +0000416 * @tx_queue: TX queues for this channel
Jon Cooperbd9a2652013-11-18 12:54:41 +0000417 * @sync_events_state: Current state of sync events on this channel
418 * @sync_timestamp_major: Major part of the last ptp sync event
419 * @sync_timestamp_minor: Minor part of the last ptp sync event
Ben Hutchings8ceee662008-04-27 12:55:59 +0100420 */
421struct efx_channel {
422 struct efx_nic *efx;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100423 int channel;
Ben Hutchings7f967c02012-02-13 23:45:02 +0000424 const struct efx_channel_type *type;
Ben Hutchingsbe3fc092012-10-08 18:21:51 +0100425 bool eventq_init;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100426 bool enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100427 int irq;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100428 unsigned int irq_moderation;
429 struct net_device *napi_dev;
430 struct napi_struct napi_str;
Alexandre Rames36763262014-07-22 14:03:25 +0100431#ifdef CONFIG_NET_RX_BUSY_POLL
432 unsigned int state;
433 spinlock_t state_lock;
434#define EFX_CHANNEL_STATE_IDLE 0
435#define EFX_CHANNEL_STATE_NAPI (1 << 0) /* NAPI owns this channel */
436#define EFX_CHANNEL_STATE_POLL (1 << 1) /* poll owns this channel */
437#define EFX_CHANNEL_STATE_DISABLED (1 << 2) /* channel is disabled */
438#define EFX_CHANNEL_STATE_NAPI_YIELD (1 << 3) /* NAPI yielded this channel */
439#define EFX_CHANNEL_STATE_POLL_YIELD (1 << 4) /* poll yielded this channel */
440#define EFX_CHANNEL_OWNED \
441 (EFX_CHANNEL_STATE_NAPI | EFX_CHANNEL_STATE_POLL)
442#define EFX_CHANNEL_LOCKED \
443 (EFX_CHANNEL_OWNED | EFX_CHANNEL_STATE_DISABLED)
444#define EFX_CHANNEL_USER_PEND \
445 (EFX_CHANNEL_STATE_POLL | EFX_CHANNEL_STATE_POLL_YIELD)
446#endif /* CONFIG_NET_RX_BUSY_POLL */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100447 struct efx_special_buffer eventq;
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000448 unsigned int eventq_mask;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100449 unsigned int eventq_read_ptr;
Ben Hutchingsdd407812012-02-28 23:40:21 +0000450 int event_test_cpu;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100451
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000452 unsigned int irq_count;
453 unsigned int irq_mod_score;
Ben Hutchings64d8ad62011-01-05 00:50:41 +0000454#ifdef CONFIG_RFS_ACCEL
455 unsigned int rfs_filters_added;
456#endif
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000457
Ben Hutchings8ceee662008-04-27 12:55:59 +0100458 unsigned n_rx_tobe_disc;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100459 unsigned n_rx_ip_hdr_chksum_err;
460 unsigned n_rx_tcp_udp_chksum_err;
Ben Hutchingsc1ac4032009-11-28 05:36:29 +0000461 unsigned n_rx_mcast_mismatch;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100462 unsigned n_rx_frm_trunc;
463 unsigned n_rx_overlength;
464 unsigned n_skbuff_leaks;
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000465 unsigned int n_rx_nodesc_trunc;
Ben Hutchings8127d662013-08-29 19:19:29 +0100466 unsigned int n_rx_merge_events;
467 unsigned int n_rx_merge_packets;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100468
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000469 unsigned int rx_pkt_n_frags;
470 unsigned int rx_pkt_index;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100471
Ben Hutchings8313aca2010-09-10 06:41:57 +0000472 struct efx_rx_queue rx_queue;
Ben Hutchings94b274b2011-01-10 21:18:20 +0000473 struct efx_tx_queue tx_queue[EFX_TXQ_TYPES];
Jon Cooperbd9a2652013-11-18 12:54:41 +0000474
475 enum efx_sync_events_state sync_events_state;
476 u32 sync_timestamp_major;
477 u32 sync_timestamp_minor;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100478};
479
Alexandre Rames36763262014-07-22 14:03:25 +0100480#ifdef CONFIG_NET_RX_BUSY_POLL
481static inline void efx_channel_init_lock(struct efx_channel *channel)
482{
483 spin_lock_init(&channel->state_lock);
484}
485
486/* Called from the device poll routine to get ownership of a channel. */
487static inline bool efx_channel_lock_napi(struct efx_channel *channel)
488{
489 bool rc = true;
490
491 spin_lock_bh(&channel->state_lock);
492 if (channel->state & EFX_CHANNEL_LOCKED) {
493 WARN_ON(channel->state & EFX_CHANNEL_STATE_NAPI);
494 channel->state |= EFX_CHANNEL_STATE_NAPI_YIELD;
495 rc = false;
496 } else {
497 /* we don't care if someone yielded */
498 channel->state = EFX_CHANNEL_STATE_NAPI;
499 }
500 spin_unlock_bh(&channel->state_lock);
501 return rc;
502}
503
504static inline void efx_channel_unlock_napi(struct efx_channel *channel)
505{
506 spin_lock_bh(&channel->state_lock);
507 WARN_ON(channel->state &
508 (EFX_CHANNEL_STATE_POLL | EFX_CHANNEL_STATE_NAPI_YIELD));
509
510 channel->state &= EFX_CHANNEL_STATE_DISABLED;
511 spin_unlock_bh(&channel->state_lock);
512}
513
514/* Called from efx_busy_poll(). */
515static inline bool efx_channel_lock_poll(struct efx_channel *channel)
516{
517 bool rc = true;
518
519 spin_lock_bh(&channel->state_lock);
520 if ((channel->state & EFX_CHANNEL_LOCKED)) {
521 channel->state |= EFX_CHANNEL_STATE_POLL_YIELD;
522 rc = false;
523 } else {
524 /* preserve yield marks */
525 channel->state |= EFX_CHANNEL_STATE_POLL;
526 }
527 spin_unlock_bh(&channel->state_lock);
528 return rc;
529}
530
531/* Returns true if NAPI tried to get the channel while it was locked. */
532static inline void efx_channel_unlock_poll(struct efx_channel *channel)
533{
534 spin_lock_bh(&channel->state_lock);
535 WARN_ON(channel->state & EFX_CHANNEL_STATE_NAPI);
536
537 /* will reset state to idle, unless channel is disabled */
538 channel->state &= EFX_CHANNEL_STATE_DISABLED;
539 spin_unlock_bh(&channel->state_lock);
540}
541
542/* True if a socket is polling, even if it did not get the lock. */
543static inline bool efx_channel_busy_polling(struct efx_channel *channel)
544{
545 WARN_ON(!(channel->state & EFX_CHANNEL_OWNED));
546 return channel->state & EFX_CHANNEL_USER_PEND;
547}
548
549static inline void efx_channel_enable(struct efx_channel *channel)
550{
551 spin_lock_bh(&channel->state_lock);
552 channel->state = EFX_CHANNEL_STATE_IDLE;
553 spin_unlock_bh(&channel->state_lock);
554}
555
556/* False if the channel is currently owned. */
557static inline bool efx_channel_disable(struct efx_channel *channel)
558{
559 bool rc = true;
560
561 spin_lock_bh(&channel->state_lock);
562 if (channel->state & EFX_CHANNEL_OWNED)
563 rc = false;
564 channel->state |= EFX_CHANNEL_STATE_DISABLED;
565 spin_unlock_bh(&channel->state_lock);
566
567 return rc;
568}
569
570#else /* CONFIG_NET_RX_BUSY_POLL */
571
572static inline void efx_channel_init_lock(struct efx_channel *channel)
573{
574}
575
576static inline bool efx_channel_lock_napi(struct efx_channel *channel)
577{
578 return true;
579}
580
581static inline void efx_channel_unlock_napi(struct efx_channel *channel)
582{
583}
584
585static inline bool efx_channel_lock_poll(struct efx_channel *channel)
586{
587 return false;
588}
589
590static inline void efx_channel_unlock_poll(struct efx_channel *channel)
591{
592}
593
594static inline bool efx_channel_busy_polling(struct efx_channel *channel)
595{
596 return false;
597}
598
599static inline void efx_channel_enable(struct efx_channel *channel)
600{
601}
602
603static inline bool efx_channel_disable(struct efx_channel *channel)
604{
605 return true;
606}
607#endif /* CONFIG_NET_RX_BUSY_POLL */
608
Ben Hutchings7f967c02012-02-13 23:45:02 +0000609/**
Ben Hutchingsd8291182012-10-05 23:35:41 +0100610 * struct efx_msi_context - Context for each MSI
611 * @efx: The associated NIC
612 * @index: Index of the channel/IRQ
613 * @name: Name of the channel/IRQ
614 *
615 * Unlike &struct efx_channel, this is never reallocated and is always
616 * safe for the IRQ handler to access.
617 */
618struct efx_msi_context {
619 struct efx_nic *efx;
620 unsigned int index;
621 char name[IFNAMSIZ + 6];
622};
623
624/**
Ben Hutchings7f967c02012-02-13 23:45:02 +0000625 * struct efx_channel_type - distinguishes traffic and extra channels
626 * @handle_no_channel: Handle failure to allocate an extra channel
627 * @pre_probe: Set up extra state prior to initialisation
628 * @post_remove: Tear down extra state after finalisation, if allocated.
629 * May be called on channels that have not been probed.
630 * @get_name: Generate the channel's name (used for its IRQ handler)
631 * @copy: Copy the channel state prior to reallocation. May be %NULL if
632 * reallocation is not supported.
Stuart Hodgsonc31e5f92012-07-18 09:52:11 +0100633 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
Ben Hutchings7f967c02012-02-13 23:45:02 +0000634 * @keep_eventq: Flag for whether event queue should be kept initialised
635 * while the device is stopped
636 */
637struct efx_channel_type {
638 void (*handle_no_channel)(struct efx_nic *);
639 int (*pre_probe)(struct efx_channel *);
Stuart Hodgsonc31e5f92012-07-18 09:52:11 +0100640 void (*post_remove)(struct efx_channel *);
Ben Hutchings7f967c02012-02-13 23:45:02 +0000641 void (*get_name)(struct efx_channel *, char *buf, size_t len);
642 struct efx_channel *(*copy)(const struct efx_channel *);
Ben Hutchings4a74dc62013-03-05 20:13:54 +0000643 bool (*receive_skb)(struct efx_channel *, struct sk_buff *);
Ben Hutchings7f967c02012-02-13 23:45:02 +0000644 bool keep_eventq;
645};
646
Ben Hutchings398468e2009-11-23 16:03:45 +0000647enum efx_led_mode {
648 EFX_LED_OFF = 0,
649 EFX_LED_ON = 1,
650 EFX_LED_DEFAULT = 2
651};
652
Ben Hutchingsc4593022009-11-23 16:08:17 +0000653#define STRING_TABLE_LOOKUP(val, member) \
654 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
655
Ben Hutchings18e83e42012-01-05 19:05:20 +0000656extern const char *const efx_loopback_mode_names[];
Ben Hutchingsc4593022009-11-23 16:08:17 +0000657extern const unsigned int efx_loopback_mode_max;
658#define LOOPBACK_MODE(efx) \
659 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
660
Ben Hutchings18e83e42012-01-05 19:05:20 +0000661extern const char *const efx_reset_type_names[];
Ben Hutchingsc4593022009-11-23 16:08:17 +0000662extern const unsigned int efx_reset_type_max;
663#define RESET_TYPE(type) \
664 STRING_TABLE_LOOKUP(type, efx_reset_type)
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100665
Ben Hutchings8ceee662008-04-27 12:55:59 +0100666enum efx_int_mode {
667 /* Be careful if altering to correct macro below */
668 EFX_INT_MODE_MSIX = 0,
669 EFX_INT_MODE_MSI = 1,
670 EFX_INT_MODE_LEGACY = 2,
671 EFX_INT_MODE_MAX /* Insert any new items before this */
672};
673#define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
674
Ben Hutchings8ceee662008-04-27 12:55:59 +0100675enum nic_state {
Ben Hutchingsf16aeea2012-07-27 19:31:16 +0100676 STATE_UNINIT = 0, /* device being probed/removed or is frozen */
677 STATE_READY = 1, /* hardware ready and netdev registered */
678 STATE_DISABLED = 2, /* device disabled due to hardware errors */
Alexandre Rames626950d2013-01-14 17:20:22 +0000679 STATE_RECOVERY = 3, /* device recovering from PCI error */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100680};
681
Ben Hutchings8ceee662008-04-27 12:55:59 +0100682/* Forward declaration */
683struct efx_nic;
684
685/* Pseudo bit-mask flow control field */
David S. Millerb56269462011-05-17 17:53:22 -0400686#define EFX_FC_RX FLOW_CTRL_RX
687#define EFX_FC_TX FLOW_CTRL_TX
688#define EFX_FC_AUTO 4
Ben Hutchings8ceee662008-04-27 12:55:59 +0100689
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800690/**
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000691 * struct efx_link_state - Current state of the link
692 * @up: Link is up
693 * @fd: Link is full-duplex
694 * @fc: Actual flow control flags
695 * @speed: Link speed (Mbps)
696 */
697struct efx_link_state {
698 bool up;
699 bool fd;
David S. Millerb56269462011-05-17 17:53:22 -0400700 u8 fc;
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000701 unsigned int speed;
702};
703
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000704static inline bool efx_link_state_equal(const struct efx_link_state *left,
705 const struct efx_link_state *right)
706{
707 return left->up == right->up && left->fd == right->fd &&
708 left->fc == right->fc && left->speed == right->speed;
709}
710
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000711/**
Ben Hutchings8ceee662008-04-27 12:55:59 +0100712 * struct efx_phy_operations - Efx PHY operations table
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000713 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
714 * efx->loopback_modes.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100715 * @init: Initialise PHY
716 * @fini: Shut down PHY
717 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000718 * @poll: Update @link_state and report whether it changed.
719 * Serialised by the mac_lock.
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800720 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
721 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000722 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800723 * (only needed where AN bit is set in mmds)
Ben Hutchings4f16c072010-02-03 09:30:50 +0000724 * @test_alive: Test that PHY is 'alive' (online)
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000725 * @test_name: Get the name of a PHY-specific test/result
Ben Hutchings4f16c072010-02-03 09:30:50 +0000726 * @run_tests: Run tests and record results as appropriate (offline).
Ben Hutchings17967212008-12-26 13:47:25 -0800727 * Flags are the ethtool tests flags.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100728 */
729struct efx_phy_operations {
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000730 int (*probe) (struct efx_nic *efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100731 int (*init) (struct efx_nic *efx);
732 void (*fini) (struct efx_nic *efx);
Steve Hodgsonff3b00a2009-12-23 13:46:36 +0000733 void (*remove) (struct efx_nic *efx);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000734 int (*reconfigure) (struct efx_nic *efx);
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000735 bool (*poll) (struct efx_nic *efx);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800736 void (*get_settings) (struct efx_nic *efx,
737 struct ethtool_cmd *ecmd);
738 int (*set_settings) (struct efx_nic *efx,
739 struct ethtool_cmd *ecmd);
Ben Hutchingsaf4ad9b2009-01-29 17:59:37 +0000740 void (*set_npage_adv) (struct efx_nic *efx, u32);
Ben Hutchings4f16c072010-02-03 09:30:50 +0000741 int (*test_alive) (struct efx_nic *efx);
Ben Hutchingsc1c4f452009-11-29 15:08:55 +0000742 const char *(*test_name) (struct efx_nic *efx, unsigned int index);
Ben Hutchings17967212008-12-26 13:47:25 -0800743 int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
Stuart Hodgsonc087bd22012-05-01 18:50:43 +0100744 int (*get_module_eeprom) (struct efx_nic *efx,
745 struct ethtool_eeprom *ee,
746 u8 *data);
747 int (*get_module_info) (struct efx_nic *efx,
748 struct ethtool_modinfo *modinfo);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100749};
750
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100751/**
Ben Hutchings49ce9c22012-07-10 10:56:00 +0000752 * enum efx_phy_mode - PHY operating mode flags
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100753 * @PHY_MODE_NORMAL: on and should pass traffic
754 * @PHY_MODE_TX_DISABLED: on with TX disabled
Ben Hutchings3e133c42008-11-04 20:34:56 +0000755 * @PHY_MODE_LOW_POWER: set to low power through MDIO
756 * @PHY_MODE_OFF: switched off through external control
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100757 * @PHY_MODE_SPECIAL: on but will not pass traffic
758 */
759enum efx_phy_mode {
760 PHY_MODE_NORMAL = 0,
761 PHY_MODE_TX_DISABLED = 1,
Ben Hutchings3e133c42008-11-04 20:34:56 +0000762 PHY_MODE_LOW_POWER = 2,
763 PHY_MODE_OFF = 4,
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100764 PHY_MODE_SPECIAL = 8,
765};
766
767static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode)
768{
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100769 return !!(mode & ~PHY_MODE_TX_DISABLED);
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100770}
771
Ben Hutchingscd0ecc92012-12-14 21:52:56 +0000772/**
773 * struct efx_hw_stat_desc - Description of a hardware statistic
774 * @name: Name of the statistic as visible through ethtool, or %NULL if
775 * it should not be exposed
776 * @dma_width: Width in bits (0 for non-DMA statistics)
777 * @offset: Offset within stats (ignored for non-DMA statistics)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100778 */
Ben Hutchingscd0ecc92012-12-14 21:52:56 +0000779struct efx_hw_stat_desc {
780 const char *name;
781 u16 dma_width;
782 u16 offset;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100783};
784
785/* Number of bits used in a multicast filter hash address */
786#define EFX_MCAST_HASH_BITS 8
787
788/* Number of (single-bit) entries in a multicast filter hash */
789#define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
790
791/* An Efx multicast filter hash */
792union efx_multicast_hash {
793 u8 byte[EFX_MCAST_HASH_ENTRIES / 8];
794 efx_oword_t oword[EFX_MCAST_HASH_ENTRIES / sizeof(efx_oword_t) / 8];
795};
796
Ben Hutchingscd2d5b52012-02-14 00:48:07 +0000797struct vfdi_status;
Ben Hutchings64eebcf2010-09-20 08:43:07 +0000798
Ben Hutchings8ceee662008-04-27 12:55:59 +0100799/**
800 * struct efx_nic - an Efx NIC
801 * @name: Device name (net device name or bus id before net device registered)
802 * @pci_dev: The PCI device
Ben Hutchings0bcf4a62013-10-18 19:21:45 +0100803 * @node: List node for maintaning primary/secondary function lists
804 * @primary: &struct efx_nic instance for the primary function of this
805 * controller. May be the same structure, and may be %NULL if no
806 * primary function is bound. Serialised by rtnl_lock.
807 * @secondary_list: List of &struct efx_nic instances for the secondary PCI
808 * functions of the controller, if this is for the primary function.
809 * Serialised by rtnl_lock.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100810 * @type: Controller type attributes
811 * @legacy_irq: IRQ number
Ben Hutchings8d9853d2008-07-18 19:01:20 +0100812 * @workqueue: Workqueue for port reconfigures and the HW monitor.
813 * Work items do not hold and must not acquire RTNL.
Ben Hutchings6977dc62008-12-26 13:44:39 -0800814 * @workqueue_name: Name of workqueue
Ben Hutchings8ceee662008-04-27 12:55:59 +0100815 * @reset_work: Scheduled reset workitem
Ben Hutchings8ceee662008-04-27 12:55:59 +0100816 * @membase_phys: Memory BAR value as physical address
817 * @membase: Memory BAR value
Ben Hutchings8ceee662008-04-27 12:55:59 +0100818 * @interrupt_mode: Interrupt mode
Ben Hutchingscc180b62011-12-08 19:51:47 +0000819 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000820 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
821 * @irq_rx_moderation: IRQ moderation time for RX event queues
Ben Hutchings62776d02010-06-23 11:30:07 +0000822 * @msg_enable: Log message enable flags
Ben Hutchingsf16aeea2012-07-27 19:31:16 +0100823 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
Ben Hutchingsa7d529a2011-06-24 20:46:31 +0100824 * @reset_pending: Bitmask for pending resets
Ben Hutchings8ceee662008-04-27 12:55:59 +0100825 * @tx_queue: TX DMA queues
826 * @rx_queue: RX DMA queues
827 * @channel: Channels
Ben Hutchingsd8291182012-10-05 23:35:41 +0100828 * @msi_context: Context for each MSI
Ben Hutchings7f967c02012-02-13 23:45:02 +0000829 * @extra_channel_types: Types of extra (non-traffic) channels that
830 * should be allocated for this NIC
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000831 * @rxq_entries: Size of receive queues requested by user.
832 * @txq_entries: Size of transmit queues requested by user.
Ben Hutchings14bf7182012-05-22 01:27:58 +0100833 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
834 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
Ben Hutchings28e47c42012-02-15 01:58:49 +0000835 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
836 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
837 * @sram_lim_qw: Qword address limit of SRAM
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000838 * @next_buffer_table: First available buffer table id
Neil Turton28b581a2008-12-12 21:41:06 -0800839 * @n_channels: Number of channels in use
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000840 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
841 * @n_tx_channels: Number of channels used for TX
Andrew Rybchenko2ec03012013-11-16 11:02:27 +0400842 * @rx_ip_align: RX DMA address offset to have IP header aligned in
843 * in accordance with NET_IP_ALIGN
Ben Hutchings272baee2013-01-29 23:33:14 +0000844 * @rx_dma_len: Current maximum RX DMA length
Ben Hutchings8ceee662008-04-27 12:55:59 +0100845 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000846 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
847 * for use in sk_buff::truesize
Jon Cooper43a37392012-10-18 15:49:54 +0100848 * @rx_prefix_size: Size of RX prefix before packet data
849 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data
850 * (valid only if @rx_prefix_size != 0; always negative)
Ben Hutchings3dced742013-04-27 01:55:18 +0100851 * @rx_packet_len_offset: Offset of RX packet length from start of packet data
852 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative)
Jon Cooperbd9a2652013-11-18 12:54:41 +0000853 * @rx_packet_ts_offset: Offset of timestamp from start of packet data
854 * (valid only if channel->sync_timestamps_enabled; always negative)
Ben Hutchings78d41892010-12-02 13:47:56 +0000855 * @rx_hash_key: Toeplitz hash key for RSS
Ben Hutchings765c9f42010-06-30 05:06:28 +0000856 * @rx_indir_table: Indirection table for RSS
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000857 * @rx_scatter: Scatter mode enabled for receives
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000858 * @int_error_count: Number of internal errors seen recently
859 * @int_error_expire: Time at which error count will be expired
Ben Hutchingsd8291182012-10-05 23:35:41 +0100860 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
861 * acknowledge but do nothing else.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100862 * @irq_status: Interrupt status buffer
Ben Hutchingsc28884c2010-04-28 09:30:00 +0000863 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
Ben Hutchings1646a6f2012-01-05 20:14:10 +0000864 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
Ben Hutchingsdd407812012-02-28 23:40:21 +0000865 * @selftest_work: Work item for asynchronous self-test
Ben Hutchings76884832009-11-29 15:10:44 +0000866 * @mtd_list: List of MTDs attached to the NIC
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300867 * @nic_data: Hardware dependent state
Ben Hutchingsf3ad5002012-09-18 02:33:56 +0100868 * @mcdi: Management-Controller-to-Driver Interface state
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100869 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
Ben Hutchingse4abce82011-05-16 18:51:24 +0100870 * efx_monitor() and efx_reconfigure_port()
Ben Hutchings8ceee662008-04-27 12:55:59 +0100871 * @port_enabled: Port enabled indicator.
Steve Hodgsonfdaa9ae2009-11-28 05:34:05 +0000872 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
873 * efx_mac_work() with kernel interfaces. Safe to read under any
874 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
875 * be held to modify it.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100876 * @port_initialized: Port initialized?
877 * @net_dev: Operating system network device. Consider holding the rtnl lock
Ben Hutchings8ceee662008-04-27 12:55:59 +0100878 * @stats_buffer: DMA buffer for statistics
Ben Hutchings8ceee662008-04-27 12:55:59 +0100879 * @phy_type: PHY type
Ben Hutchings8ceee662008-04-27 12:55:59 +0100880 * @phy_op: PHY interface
881 * @phy_data: PHY private data (including PHY-specific stats)
Ben Hutchings68e7f452009-04-29 08:05:08 +0000882 * @mdio: PHY MDIO interface
Ben Hutchings8880f4e2009-11-29 15:15:41 +0000883 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100884 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000885 * @link_advertising: Autonegotiation advertising flags
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000886 * @link_state: Current state of the link
Ben Hutchings8ceee662008-04-27 12:55:59 +0100887 * @n_link_state_changes: Number of times the link has changed state
Ben Hutchings964e6132012-11-19 23:08:22 +0000888 * @unicast_filter: Flag for Falcon-arch simple unicast filter.
889 * Protected by @mac_lock.
890 * @multicast_hash: Multicast hash table for Falcon-arch.
891 * Protected by @mac_lock.
Ben Hutchings04cc8ca2008-12-12 21:50:46 -0800892 * @wanted_fc: Wanted flow control flags
Steve Hodgsona606f432011-05-23 12:18:45 +0100893 * @fc_disable: When non-zero flow control is disabled. Typically used to
894 * ensure that network back pressure doesn't delay dma queue flushes.
895 * Serialised by the rtnl lock.
Ben Hutchings8be4f3e2009-11-25 16:12:16 +0000896 * @mac_work: Work item for changing MAC promiscuity and multicast hash
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100897 * @loopback_mode: Loopback status
898 * @loopback_modes: Supported loopback mode bitmask
899 * @loopback_selftest: Offline self-test private state
Edward Cree0d322412015-05-20 11:10:03 +0100900 * @filter_sem: Filter table rw_semaphore, for freeing the table
901 * @filter_lock: Filter table lock, for mere content changes
Ben Hutchings6d661ce2012-10-27 00:33:30 +0100902 * @filter_state: Architecture-dependent filter table state
903 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS,
904 * indexed by filter ID
905 * @rps_expire_index: Next index to check for expiry in @rps_flow_id
Alexandre Rames3881d8a2013-06-10 11:03:21 +0100906 * @active_queues: Count of RX and TX queues that haven't been flushed and drained.
Ben Hutchings9f2cb712012-02-08 00:11:20 +0000907 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
908 * Decremented when the efx_flush_rx_queue() is called.
909 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
910 * completed (either success or failure). Not used when MCDI is used to
911 * flush receive queues.
912 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
Ben Hutchingscd2d5b52012-02-14 00:48:07 +0000913 * @vf_count: Number of VFs intended to be enabled.
914 * @vf_init_count: Number of VFs that have been fully initialised.
915 * @vi_scale: log2 number of vnics per VF.
Stuart Hodgson7c236c42012-09-03 11:09:36 +0100916 * @ptp_data: PTP state data
Ben Hutchingsef215e62013-12-05 20:13:22 +0000917 * @vpd_sn: Serial number read from VPD
Ben Hutchingsab28c122010-12-06 22:53:15 +0000918 * @monitor_work: Hardware monitor workitem
919 * @biu_lock: BIU (bus interface unit) lock
Ben Hutchings1646a6f2012-01-05 20:14:10 +0000920 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
921 * field is used by efx_test_interrupts() to verify that an
922 * interrupt has occurred.
Ben Hutchingscd0ecc92012-12-14 21:52:56 +0000923 * @stats_lock: Statistics update lock. Must be held when calling
924 * efx_nic_type::{update,start,stop}_stats.
Edward Creee4d112e2014-07-15 11:58:12 +0100925 * @n_rx_noskb_drops: Count of RX packets dropped due to failure to allocate an skb
Ben Hutchings8ceee662008-04-27 12:55:59 +0100926 *
Ben Hutchings754c6532010-02-03 09:31:57 +0000927 * This is stored in the private area of the &struct net_device.
Ben Hutchings8ceee662008-04-27 12:55:59 +0100928 */
929struct efx_nic {
Ben Hutchingsab28c122010-12-06 22:53:15 +0000930 /* The following fields should be written very rarely */
931
Ben Hutchings8ceee662008-04-27 12:55:59 +0100932 char name[IFNAMSIZ];
Ben Hutchings0bcf4a62013-10-18 19:21:45 +0100933 struct list_head node;
934 struct efx_nic *primary;
935 struct list_head secondary_list;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100936 struct pci_dev *pci_dev;
Ben Hutchings66020412013-06-10 18:03:17 +0100937 unsigned int port_num;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100938 const struct efx_nic_type *type;
939 int legacy_irq;
Alexandre Ramesb28405b2013-03-21 16:41:43 +0000940 bool eeh_disabled_legacy_irq;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100941 struct workqueue_struct *workqueue;
Ben Hutchings6977dc62008-12-26 13:44:39 -0800942 char workqueue_name[16];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100943 struct work_struct reset_work;
Ben Hutchings086ea352008-05-16 21:17:06 +0100944 resource_size_t membase_phys;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100945 void __iomem *membase;
Ben Hutchingsab28c122010-12-06 22:53:15 +0000946
Ben Hutchings8ceee662008-04-27 12:55:59 +0100947 enum efx_int_mode interrupt_mode;
Ben Hutchingscc180b62011-12-08 19:51:47 +0000948 unsigned int timer_quantum_ns;
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000949 bool irq_rx_adaptive;
950 unsigned int irq_rx_moderation;
Ben Hutchings62776d02010-06-23 11:30:07 +0000951 u32 msg_enable;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100952
Ben Hutchings8ceee662008-04-27 12:55:59 +0100953 enum nic_state state;
Ben Hutchingsa7d529a2011-06-24 20:46:31 +0100954 unsigned long reset_pending;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100955
Ben Hutchings8313aca2010-09-10 06:41:57 +0000956 struct efx_channel *channel[EFX_MAX_CHANNELS];
Ben Hutchingsd8291182012-10-05 23:35:41 +0100957 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
Ben Hutchings7f967c02012-02-13 23:45:02 +0000958 const struct efx_channel_type *
959 extra_channel_type[EFX_MAX_EXTRA_CHANNELS];
Ben Hutchings8ceee662008-04-27 12:55:59 +0100960
Steve Hodgsonecc910f2010-09-10 06:42:22 +0000961 unsigned rxq_entries;
962 unsigned txq_entries;
Ben Hutchings14bf7182012-05-22 01:27:58 +0100963 unsigned int txq_stop_thresh;
964 unsigned int txq_wake_thresh;
965
Ben Hutchings28e47c42012-02-15 01:58:49 +0000966 unsigned tx_dc_base;
967 unsigned rx_dc_base;
968 unsigned sram_lim_qw;
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000969 unsigned next_buffer_table;
Ben Hutchingsb1057982012-09-19 00:56:47 +0100970
971 unsigned int max_channels;
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000972 unsigned n_channels;
973 unsigned n_rx_channels;
Ben Hutchingscd2d5b52012-02-14 00:48:07 +0000974 unsigned rss_spread;
Ben Hutchings97653432011-01-12 18:26:56 +0000975 unsigned tx_channel_offset;
Ben Hutchingsa4900ac2010-04-28 09:30:43 +0000976 unsigned n_tx_channels;
Andrew Rybchenko2ec03012013-11-16 11:02:27 +0400977 unsigned int rx_ip_align;
Ben Hutchings272baee2013-01-29 23:33:14 +0000978 unsigned int rx_dma_len;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100979 unsigned int rx_buffer_order;
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000980 unsigned int rx_buffer_truesize;
Daniel Pieczko1648a232013-02-13 10:54:41 +0000981 unsigned int rx_page_buf_step;
Daniel Pieczko27689352013-02-13 10:54:41 +0000982 unsigned int rx_bufs_per_page;
Daniel Pieczko1648a232013-02-13 10:54:41 +0000983 unsigned int rx_pages_per_batch;
Jon Cooper43a37392012-10-18 15:49:54 +0100984 unsigned int rx_prefix_size;
985 int rx_packet_hash_offset;
Ben Hutchings3dced742013-04-27 01:55:18 +0100986 int rx_packet_len_offset;
Jon Cooperbd9a2652013-11-18 12:54:41 +0000987 int rx_packet_ts_offset;
Ben Hutchings5d3a6fc2010-06-25 07:05:43 +0000988 u8 rx_hash_key[40];
Ben Hutchings765c9f42010-06-30 05:06:28 +0000989 u32 rx_indir_table[128];
Ben Hutchings85740cdf2013-01-29 23:33:15 +0000990 bool rx_scatter;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100991
Ben Hutchings0484e0d2009-10-23 08:32:04 +0000992 unsigned int_error_count;
993 unsigned long int_error_expire;
994
Ben Hutchingsd8291182012-10-05 23:35:41 +0100995 bool irq_soft_enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100996 struct efx_buffer irq_status;
Ben Hutchingsc28884c2010-04-28 09:30:00 +0000997 unsigned irq_zero_count;
Ben Hutchings1646a6f2012-01-05 20:14:10 +0000998 unsigned irq_level;
Ben Hutchingsdd407812012-02-28 23:40:21 +0000999 struct delayed_work selftest_work;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001000
Ben Hutchings76884832009-11-29 15:10:44 +00001001#ifdef CONFIG_SFC_MTD
1002 struct list_head mtd_list;
1003#endif
Ben Hutchings4a5b5042008-09-01 12:47:16 +01001004
Ben Hutchings8880f4e2009-11-29 15:15:41 +00001005 void *nic_data;
Ben Hutchingsf3ad5002012-09-18 02:33:56 +01001006 struct efx_mcdi_data *mcdi;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001007
1008 struct mutex mac_lock;
Ben Hutchings766ca0f2008-12-12 21:59:24 -08001009 struct work_struct mac_work;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +01001010 bool port_enabled;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001011
Jon Cooper74cd60a2013-09-16 14:18:51 +01001012 bool mc_bist_for_other_fn;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +01001013 bool port_initialized;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001014 struct net_device *net_dev;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001015
Ben Hutchings8ceee662008-04-27 12:55:59 +01001016 struct efx_buffer stats_buffer;
Jon Cooperf8f3b5a2013-09-30 17:36:50 +01001017 u64 rx_nodesc_drops_total;
1018 u64 rx_nodesc_drops_while_down;
1019 bool rx_nodesc_drops_prev_state;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001020
Ben Hutchingsc1c4f452009-11-29 15:08:55 +00001021 unsigned int phy_type;
stephen hemminger6c8c2512011-04-14 05:50:12 +00001022 const struct efx_phy_operations *phy_op;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001023 void *phy_data;
Ben Hutchings68e7f452009-04-29 08:05:08 +00001024 struct mdio_if_info mdio;
Ben Hutchings8880f4e2009-11-29 15:15:41 +00001025 unsigned int mdio_bus;
Ben Hutchingsf8b87c12008-09-01 12:48:17 +01001026 enum efx_phy_mode phy_mode;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001027
Ben Hutchingsd3245b22009-11-29 03:42:41 +00001028 u32 link_advertising;
Ben Hutchingseb50c0d2009-11-23 16:06:30 +00001029 struct efx_link_state link_state;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001030 unsigned int n_link_state_changes;
1031
Ben Hutchings964e6132012-11-19 23:08:22 +00001032 bool unicast_filter;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001033 union efx_multicast_hash multicast_hash;
David S. Millerb56269462011-05-17 17:53:22 -04001034 u8 wanted_fc;
Steve Hodgsona606f432011-05-23 12:18:45 +01001035 unsigned fc_disable;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001036
1037 atomic_t rx_reset;
Ben Hutchings3273c2e2008-05-07 13:36:19 +01001038 enum efx_loopback_mode loopback_mode;
Ben Hutchingse58f69f2009-11-29 15:08:41 +00001039 u64 loopback_modes;
Ben Hutchings3273c2e2008-05-07 13:36:19 +01001040
1041 void *loopback_selftest;
Ben Hutchings64eebcf2010-09-20 08:43:07 +00001042
Edward Cree0d322412015-05-20 11:10:03 +01001043 struct rw_semaphore filter_sem;
Ben Hutchings6d661ce2012-10-27 00:33:30 +01001044 spinlock_t filter_lock;
1045 void *filter_state;
1046#ifdef CONFIG_RFS_ACCEL
1047 u32 *rps_flow_id;
1048 unsigned int rps_expire_index;
1049#endif
Ben Hutchingsab28c122010-12-06 22:53:15 +00001050
Alexandre Rames3881d8a2013-06-10 11:03:21 +01001051 atomic_t active_queues;
Ben Hutchings9f2cb712012-02-08 00:11:20 +00001052 atomic_t rxq_flush_pending;
1053 atomic_t rxq_flush_outstanding;
1054 wait_queue_head_t flush_wq;
1055
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001056#ifdef CONFIG_SFC_SRIOV
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001057 unsigned vf_count;
1058 unsigned vf_init_count;
1059 unsigned vi_scale;
Ben Hutchingscd2d5b52012-02-14 00:48:07 +00001060#endif
1061
Stuart Hodgson7c236c42012-09-03 11:09:36 +01001062 struct efx_ptp_data *ptp_data;
Stuart Hodgson7c236c42012-09-03 11:09:36 +01001063
Ben Hutchingsef215e62013-12-05 20:13:22 +00001064 char *vpd_sn;
1065
Ben Hutchingsab28c122010-12-06 22:53:15 +00001066 /* The following fields may be written more often */
1067
1068 struct delayed_work monitor_work ____cacheline_aligned_in_smp;
1069 spinlock_t biu_lock;
Ben Hutchings1646a6f2012-01-05 20:14:10 +00001070 int last_irq_cpu;
Ben Hutchingsab28c122010-12-06 22:53:15 +00001071 spinlock_t stats_lock;
Edward Creee4d112e2014-07-15 11:58:12 +01001072 atomic_t n_rx_noskb_drops;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001073};
1074
Ben Hutchings55668612008-05-16 21:16:10 +01001075static inline int efx_dev_registered(struct efx_nic *efx)
1076{
1077 return efx->net_dev->reg_state == NETREG_REGISTERED;
1078}
1079
Ben Hutchings8880f4e2009-11-29 15:15:41 +00001080static inline unsigned int efx_port_num(struct efx_nic *efx)
1081{
Ben Hutchings66020412013-06-10 18:03:17 +01001082 return efx->port_num;
Ben Hutchings8880f4e2009-11-29 15:15:41 +00001083}
1084
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001085struct efx_mtd_partition {
1086 struct list_head node;
1087 struct mtd_info mtd;
1088 const char *dev_type_name;
1089 const char *type_name;
1090 char name[IFNAMSIZ + 20];
1091};
1092
Ben Hutchings8ceee662008-04-27 12:55:59 +01001093/**
1094 * struct efx_nic_type - Efx device type definition
Shradha Shah02246a72015-05-06 00:58:14 +01001095 * @mem_bar: Get the memory BAR
Ben Hutchingsb1057982012-09-19 00:56:47 +01001096 * @mem_map_size: Get memory BAR mapped size
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001097 * @probe: Probe the controller
1098 * @remove: Free resources allocated by probe()
1099 * @init: Initialise the controller
Ben Hutchings28e47c42012-02-15 01:58:49 +00001100 * @dimension_resources: Dimension controller resources (buffer table,
1101 * and VIs once the available interrupt resources are clear)
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001102 * @fini: Shut down the controller
1103 * @monitor: Periodic function for polling link state and hardware monitor
Ben Hutchings0e2a9c72011-06-24 20:50:07 +01001104 * @map_reset_reason: Map ethtool reset reason to a reset method
1105 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001106 * @reset: Reset the controller hardware and possibly the PHY. This will
1107 * be called while the controller is uninitialised.
1108 * @probe_port: Probe the MAC and PHY
1109 * @remove_port: Free resources allocated by probe_port()
Ben Hutchings40641ed2010-12-02 13:47:45 +00001110 * @handle_global_event: Handle a "global" event (may be %NULL)
Ben Hutchingse42c3d82013-05-27 16:52:54 +01001111 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001112 * @prepare_flush: Prepare the hardware for flushing the DMA queues
Ben Hutchingse42c3d82013-05-27 16:52:54 +01001113 * (for Falcon architecture)
1114 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
1115 * architecture)
Edward Creee2835462014-04-16 19:27:48 +01001116 * @prepare_flr: Prepare for an FLR
1117 * @finish_flr: Clean up after an FLR
Ben Hutchingscd0ecc92012-12-14 21:52:56 +00001118 * @describe_stats: Describe statistics for ethtool
1119 * @update_stats: Update statistics not provided by event handling.
1120 * Either argument may be %NULL.
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001121 * @start_stats: Start the regular fetching of statistics
Jon Cooperf8f3b5a2013-09-30 17:36:50 +01001122 * @pull_stats: Pull stats from the NIC and wait until they arrive.
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001123 * @stop_stats: Stop the regular fetching of statistics
Ben Hutchings06629f02009-11-29 03:43:43 +00001124 * @set_id_led: Set state of identifying LED or revert to automatic function
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001125 * @push_irq_moderation: Apply interrupt moderation value
Ben Hutchingsd3245b22009-11-29 03:42:41 +00001126 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
Ben Hutchings9dd3a132012-09-13 01:11:25 +01001127 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
Ben Hutchings30b81cd2011-09-13 19:47:48 +01001128 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
1129 * to the hardware. Serialised by the mac_lock.
Ben Hutchings710b2082011-09-03 00:15:00 +01001130 * @check_mac_fault: Check MAC fault state. True if fault present.
Ben Hutchings89c758f2009-11-29 03:43:07 +00001131 * @get_wol: Get WoL configuration from driver state
1132 * @set_wol: Push WoL configuration to the NIC
1133 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
Ben Hutchings86094f72013-08-21 19:51:04 +01001134 * @test_chip: Test registers. May use efx_farch_test_registers(), and is
Ben Hutchingsd4f2cec2012-07-04 03:58:33 +01001135 * expected to reset the NIC.
Ben Hutchings0aa3fba2009-11-29 03:43:33 +00001136 * @test_nvram: Test validity of NVRAM contents
Ben Hutchingsf3ad5002012-09-18 02:33:56 +01001137 * @mcdi_request: Send an MCDI request with the given header and SDU.
1138 * The SDU length may be any value from 0 up to the protocol-
1139 * defined maximum, but its buffer will be padded to a multiple
1140 * of 4 bytes.
1141 * @mcdi_poll_response: Test whether an MCDI response is available.
1142 * @mcdi_read_response: Read the MCDI response PDU. The offset will
1143 * be a multiple of 4. The length may not be, but the buffer
1144 * will be padded so it is safe to round up.
1145 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
1146 * return an appropriate error code for aborting any current
1147 * request; otherwise return 0.
Ben Hutchings86094f72013-08-21 19:51:04 +01001148 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must
1149 * be separately enabled after this.
1150 * @irq_test_generate: Generate a test IRQ
1151 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
1152 * queue must be separately disabled before this.
1153 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is
1154 * a pointer to the &struct efx_msi_context for the channel.
1155 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument
1156 * is a pointer to the &struct efx_nic.
1157 * @tx_probe: Allocate resources for TX queue
1158 * @tx_init: Initialise TX queue on the NIC
1159 * @tx_remove: Free resources for TX queue
1160 * @tx_write: Write TX descriptors and doorbell
Andrew Rybchenkod43050c2013-11-14 09:00:27 +04001161 * @rx_push_rss_config: Write RSS hash key and indirection table to the NIC
Ben Hutchings86094f72013-08-21 19:51:04 +01001162 * @rx_probe: Allocate resources for RX queue
1163 * @rx_init: Initialise RX queue on the NIC
1164 * @rx_remove: Free resources for RX queue
1165 * @rx_write: Write RX descriptors and doorbell
1166 * @rx_defer_refill: Generate a refill reminder event
1167 * @ev_probe: Allocate resources for event queue
1168 * @ev_init: Initialise event queue on the NIC
1169 * @ev_fini: Deinitialise event queue on the NIC
1170 * @ev_remove: Free resources for event queue
1171 * @ev_process: Process events for a queue, up to the given NAPI quota
1172 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ
1173 * @ev_test_generate: Generate a test event
Ben Hutchingsadd72472012-11-08 01:46:53 +00001174 * @filter_table_probe: Probe filter capabilities and set up filter software state
1175 * @filter_table_restore: Restore filters removed from hardware
1176 * @filter_table_remove: Remove filters from hardware and tear down software state
1177 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
1178 * @filter_insert: add or replace a filter
1179 * @filter_remove_safe: remove a filter by ID, carefully
1180 * @filter_get_safe: retrieve a filter by ID, carefully
Ben Hutchingsfbd79122013-11-21 19:15:03 +00001181 * @filter_clear_rx: Remove all RX filters whose priority is less than or
1182 * equal to the given priority and is not %EFX_FILTER_PRI_AUTO
Ben Hutchingsadd72472012-11-08 01:46:53 +00001183 * @filter_count_rx_used: Get the number of filters in use at a given priority
1184 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1
1185 * @filter_get_rx_ids: Get list of RX filters at a given priority
1186 * @filter_rfs_insert: Add or replace a filter for RFS. This must be
1187 * atomic. The hardware change may be asynchronous but should
1188 * not be delayed for long. It may fail if this can't be done
1189 * atomically.
1190 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS.
1191 * This must check whether the specified table entry is used by RFS
1192 * and that rps_may_expire_flow() returns true for it.
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001193 * @mtd_probe: Probe and add MTD partitions associated with this net device,
1194 * using efx_mtd_add()
1195 * @mtd_rename: Set an MTD partition name using the net device name
1196 * @mtd_read: Read from an MTD partition
1197 * @mtd_erase: Erase part of an MTD partition
1198 * @mtd_write: Write to an MTD partition
1199 * @mtd_sync: Wait for write-back to complete on MTD partition. This
1200 * also notifies the driver that a writer has finished using this
1201 * partition.
Daniel Pieczko9ec06592013-11-21 17:11:25 +00001202 * @ptp_write_host_time: Send host time to MC as part of sync protocol
Jon Cooperbd9a2652013-11-18 12:54:41 +00001203 * @ptp_set_ts_sync_events: Enable or disable sync events for inline RX
1204 * timestamping, possibly only temporarily for the purposes of a reset.
Daniel Pieczko9ec06592013-11-21 17:11:25 +00001205 * @ptp_set_ts_config: Set hardware timestamp configuration. The flags
1206 * and tx_type will already have been validated but this operation
1207 * must validate and update rx_filter.
Shradha Shah910c8782015-05-20 11:12:48 +01001208 * @set_mac_address: Set the MAC address of the device
Ben Hutchingsdaeda632009-11-28 05:36:04 +00001209 * @revision: Hardware architecture revision
Ben Hutchings8ceee662008-04-27 12:55:59 +01001210 * @txd_ptr_tbl_base: TX descriptor ring base address
1211 * @rxd_ptr_tbl_base: RX descriptor ring base address
1212 * @buf_tbl_base: Buffer table base address
1213 * @evq_ptr_tbl_base: Event queue pointer table base address
1214 * @evq_rptr_tbl_base: Event queue read-pointer table base address
Ben Hutchings8ceee662008-04-27 12:55:59 +01001215 * @max_dma_mask: Maximum possible DMA mask
Jon Cooper43a37392012-10-18 15:49:54 +01001216 * @rx_prefix_size: Size of RX prefix before packet data
1217 * @rx_hash_offset: Offset of RX flow hash within prefix
Jon Cooperbd9a2652013-11-18 12:54:41 +00001218 * @rx_ts_offset: Offset of timestamp within prefix
Ben Hutchings85740cdf2013-01-29 23:33:15 +00001219 * @rx_buffer_padding: Size of padding at end of RX packet
Jon Coopere8c68c02013-03-08 10:18:28 +00001220 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers
1221 * @always_rx_scatter: NIC will always scatter packets to multiple buffers
Ben Hutchings8ceee662008-04-27 12:55:59 +01001222 * @max_interrupt_mode: Highest capability interrupt mode supported
1223 * from &enum efx_init_mode.
Ben Hutchingscc180b62011-12-08 19:51:47 +00001224 * @timer_period_max: Maximum period of interrupt timer (in ticks)
Ben Hutchingsc383b532009-11-29 15:11:02 +00001225 * @offload_features: net_device feature flags for protocol offload
1226 * features implemented in hardware
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +01001227 * @mcdi_max_ver: Maximum MCDI version supported
Daniel Pieczko9ec06592013-11-21 17:11:25 +00001228 * @hwtstamp_filters: Mask of hardware timestamp filter types supported
Ben Hutchings8ceee662008-04-27 12:55:59 +01001229 */
1230struct efx_nic_type {
Shradha Shah6f7f8aa2015-05-06 01:00:07 +01001231 bool is_vf;
Shradha Shah02246a72015-05-06 00:58:14 +01001232 unsigned int mem_bar;
Ben Hutchingsb1057982012-09-19 00:56:47 +01001233 unsigned int (*mem_map_size)(struct efx_nic *efx);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001234 int (*probe)(struct efx_nic *efx);
1235 void (*remove)(struct efx_nic *efx);
1236 int (*init)(struct efx_nic *efx);
Ben Hutchingsc15eed22013-08-29 00:45:48 +01001237 int (*dimension_resources)(struct efx_nic *efx);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001238 void (*fini)(struct efx_nic *efx);
1239 void (*monitor)(struct efx_nic *efx);
Ben Hutchings0e2a9c72011-06-24 20:50:07 +01001240 enum reset_type (*map_reset_reason)(enum reset_type reason);
1241 int (*map_reset_flags)(u32 *flags);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001242 int (*reset)(struct efx_nic *efx, enum reset_type method);
1243 int (*probe_port)(struct efx_nic *efx);
1244 void (*remove_port)(struct efx_nic *efx);
Ben Hutchings40641ed2010-12-02 13:47:45 +00001245 bool (*handle_global_event)(struct efx_channel *channel, efx_qword_t *);
Ben Hutchingse42c3d82013-05-27 16:52:54 +01001246 int (*fini_dmaq)(struct efx_nic *efx);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001247 void (*prepare_flush)(struct efx_nic *efx);
Ben Hutchingsd5e8cc62012-09-06 16:52:31 +01001248 void (*finish_flush)(struct efx_nic *efx);
Edward Creee2835462014-04-16 19:27:48 +01001249 void (*prepare_flr)(struct efx_nic *efx);
1250 void (*finish_flr)(struct efx_nic *efx);
Ben Hutchingscd0ecc92012-12-14 21:52:56 +00001251 size_t (*describe_stats)(struct efx_nic *efx, u8 *names);
1252 size_t (*update_stats)(struct efx_nic *efx, u64 *full_stats,
1253 struct rtnl_link_stats64 *core_stats);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001254 void (*start_stats)(struct efx_nic *efx);
Jon Cooperf8f3b5a2013-09-30 17:36:50 +01001255 void (*pull_stats)(struct efx_nic *efx);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001256 void (*stop_stats)(struct efx_nic *efx);
Ben Hutchings06629f02009-11-29 03:43:43 +00001257 void (*set_id_led)(struct efx_nic *efx, enum efx_led_mode mode);
Ben Hutchingsef2b90e2009-11-29 03:42:31 +00001258 void (*push_irq_moderation)(struct efx_channel *channel);
Ben Hutchingsd3245b22009-11-29 03:42:41 +00001259 int (*reconfigure_port)(struct efx_nic *efx);
Ben Hutchings9dd3a132012-09-13 01:11:25 +01001260 void (*prepare_enable_fc_tx)(struct efx_nic *efx);
Ben Hutchings710b2082011-09-03 00:15:00 +01001261 int (*reconfigure_mac)(struct efx_nic *efx);
1262 bool (*check_mac_fault)(struct efx_nic *efx);
Ben Hutchings89c758f2009-11-29 03:43:07 +00001263 void (*get_wol)(struct efx_nic *efx, struct ethtool_wolinfo *wol);
1264 int (*set_wol)(struct efx_nic *efx, u32 type);
1265 void (*resume_wol)(struct efx_nic *efx);
Ben Hutchingsd4f2cec2012-07-04 03:58:33 +01001266 int (*test_chip)(struct efx_nic *efx, struct efx_self_tests *tests);
Ben Hutchings0aa3fba2009-11-29 03:43:33 +00001267 int (*test_nvram)(struct efx_nic *efx);
Ben Hutchingsf3ad5002012-09-18 02:33:56 +01001268 void (*mcdi_request)(struct efx_nic *efx,
1269 const efx_dword_t *hdr, size_t hdr_len,
1270 const efx_dword_t *sdu, size_t sdu_len);
1271 bool (*mcdi_poll_response)(struct efx_nic *efx);
1272 void (*mcdi_read_response)(struct efx_nic *efx, efx_dword_t *pdu,
1273 size_t pdu_offset, size_t pdu_len);
1274 int (*mcdi_poll_reboot)(struct efx_nic *efx);
Ben Hutchings86094f72013-08-21 19:51:04 +01001275 void (*irq_enable_master)(struct efx_nic *efx);
1276 void (*irq_test_generate)(struct efx_nic *efx);
1277 void (*irq_disable_non_ev)(struct efx_nic *efx);
1278 irqreturn_t (*irq_handle_msi)(int irq, void *dev_id);
1279 irqreturn_t (*irq_handle_legacy)(int irq, void *dev_id);
1280 int (*tx_probe)(struct efx_tx_queue *tx_queue);
1281 void (*tx_init)(struct efx_tx_queue *tx_queue);
1282 void (*tx_remove)(struct efx_tx_queue *tx_queue);
1283 void (*tx_write)(struct efx_tx_queue *tx_queue);
Jon Cooper267c0152015-05-06 00:59:38 +01001284 int (*rx_push_rss_config)(struct efx_nic *efx, bool user,
1285 const u32 *rx_indir_table);
Ben Hutchings86094f72013-08-21 19:51:04 +01001286 int (*rx_probe)(struct efx_rx_queue *rx_queue);
1287 void (*rx_init)(struct efx_rx_queue *rx_queue);
1288 void (*rx_remove)(struct efx_rx_queue *rx_queue);
1289 void (*rx_write)(struct efx_rx_queue *rx_queue);
1290 void (*rx_defer_refill)(struct efx_rx_queue *rx_queue);
1291 int (*ev_probe)(struct efx_channel *channel);
Jon Cooper261e4d92013-04-15 18:51:54 +01001292 int (*ev_init)(struct efx_channel *channel);
Ben Hutchings86094f72013-08-21 19:51:04 +01001293 void (*ev_fini)(struct efx_channel *channel);
1294 void (*ev_remove)(struct efx_channel *channel);
1295 int (*ev_process)(struct efx_channel *channel, int quota);
1296 void (*ev_read_ack)(struct efx_channel *channel);
1297 void (*ev_test_generate)(struct efx_channel *channel);
Ben Hutchingsadd72472012-11-08 01:46:53 +00001298 int (*filter_table_probe)(struct efx_nic *efx);
1299 void (*filter_table_restore)(struct efx_nic *efx);
1300 void (*filter_table_remove)(struct efx_nic *efx);
1301 void (*filter_update_rx_scatter)(struct efx_nic *efx);
1302 s32 (*filter_insert)(struct efx_nic *efx,
1303 struct efx_filter_spec *spec, bool replace);
1304 int (*filter_remove_safe)(struct efx_nic *efx,
1305 enum efx_filter_priority priority,
1306 u32 filter_id);
1307 int (*filter_get_safe)(struct efx_nic *efx,
1308 enum efx_filter_priority priority,
1309 u32 filter_id, struct efx_filter_spec *);
Ben Hutchingsfbd79122013-11-21 19:15:03 +00001310 int (*filter_clear_rx)(struct efx_nic *efx,
1311 enum efx_filter_priority priority);
Ben Hutchingsadd72472012-11-08 01:46:53 +00001312 u32 (*filter_count_rx_used)(struct efx_nic *efx,
1313 enum efx_filter_priority priority);
1314 u32 (*filter_get_rx_id_limit)(struct efx_nic *efx);
1315 s32 (*filter_get_rx_ids)(struct efx_nic *efx,
1316 enum efx_filter_priority priority,
1317 u32 *buf, u32 size);
1318#ifdef CONFIG_RFS_ACCEL
1319 s32 (*filter_rfs_insert)(struct efx_nic *efx,
1320 struct efx_filter_spec *spec);
1321 bool (*filter_rfs_expire_one)(struct efx_nic *efx, u32 flow_id,
1322 unsigned int index);
1323#endif
Ben Hutchings45a3fd52012-11-28 04:38:14 +00001324#ifdef CONFIG_SFC_MTD
1325 int (*mtd_probe)(struct efx_nic *efx);
1326 void (*mtd_rename)(struct efx_mtd_partition *part);
1327 int (*mtd_read)(struct mtd_info *mtd, loff_t start, size_t len,
1328 size_t *retlen, u8 *buffer);
1329 int (*mtd_erase)(struct mtd_info *mtd, loff_t start, size_t len);
1330 int (*mtd_write)(struct mtd_info *mtd, loff_t start, size_t len,
1331 size_t *retlen, const u8 *buffer);
1332 int (*mtd_sync)(struct mtd_info *mtd);
1333#endif
Laurence Evans977a5d52013-03-07 11:46:58 +00001334 void (*ptp_write_host_time)(struct efx_nic *efx, u32 host_time);
Jon Cooperbd9a2652013-11-18 12:54:41 +00001335 int (*ptp_set_ts_sync_events)(struct efx_nic *efx, bool en, bool temp);
Daniel Pieczko9ec06592013-11-21 17:11:25 +00001336 int (*ptp_set_ts_config)(struct efx_nic *efx,
1337 struct hwtstamp_config *init);
Shradha Shah834e23d2015-05-06 00:55:58 +01001338 int (*sriov_configure)(struct efx_nic *efx, int num_vfs);
Shradha Shahd98a4ff2014-11-05 12:16:46 +00001339 int (*sriov_init)(struct efx_nic *efx);
1340 void (*sriov_fini)(struct efx_nic *efx);
Shradha Shahd98a4ff2014-11-05 12:16:46 +00001341 bool (*sriov_wanted)(struct efx_nic *efx);
1342 void (*sriov_reset)(struct efx_nic *efx);
Shradha Shah7fa8d542015-05-06 00:55:13 +01001343 void (*sriov_flr)(struct efx_nic *efx, unsigned vf_i);
1344 int (*sriov_set_vf_mac)(struct efx_nic *efx, int vf_i, u8 *mac);
1345 int (*sriov_set_vf_vlan)(struct efx_nic *efx, int vf_i, u16 vlan,
1346 u8 qos);
1347 int (*sriov_set_vf_spoofchk)(struct efx_nic *efx, int vf_i,
1348 bool spoofchk);
1349 int (*sriov_get_vf_config)(struct efx_nic *efx, int vf_i,
1350 struct ifla_vf_info *ivi);
Edward Cree4392dc62015-05-20 11:12:13 +01001351 int (*sriov_set_vf_link_state)(struct efx_nic *efx, int vf_i,
1352 int link_state);
Daniel Pieczko6d8aaaf2015-05-06 00:57:34 +01001353 int (*vswitching_probe)(struct efx_nic *efx);
1354 int (*vswitching_restore)(struct efx_nic *efx);
1355 void (*vswitching_remove)(struct efx_nic *efx);
Daniel Pieczko0d5e0fb2015-05-20 11:10:20 +01001356 int (*get_mac_address)(struct efx_nic *efx, unsigned char *perm_addr);
Shradha Shah910c8782015-05-20 11:12:48 +01001357 int (*set_mac_address)(struct efx_nic *efx);
Steve Hodgsonb895d732009-11-28 05:35:00 +00001358
Ben Hutchingsdaeda632009-11-28 05:36:04 +00001359 int revision;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001360 unsigned int txd_ptr_tbl_base;
1361 unsigned int rxd_ptr_tbl_base;
1362 unsigned int buf_tbl_base;
1363 unsigned int evq_ptr_tbl_base;
1364 unsigned int evq_rptr_tbl_base;
Ben Hutchings9bbd7d92008-05-16 21:18:48 +01001365 u64 max_dma_mask;
Jon Cooper43a37392012-10-18 15:49:54 +01001366 unsigned int rx_prefix_size;
1367 unsigned int rx_hash_offset;
Jon Cooperbd9a2652013-11-18 12:54:41 +00001368 unsigned int rx_ts_offset;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001369 unsigned int rx_buffer_padding;
Ben Hutchings85740cdf2013-01-29 23:33:15 +00001370 bool can_rx_scatter;
Jon Coopere8c68c02013-03-08 10:18:28 +00001371 bool always_rx_scatter;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001372 unsigned int max_interrupt_mode;
Ben Hutchingscc180b62011-12-08 19:51:47 +00001373 unsigned int timer_period_max;
Michał Mirosławc8f44af2011-11-15 15:29:55 +00001374 netdev_features_t offload_features;
Ben Hutchingsdf2cd8a2012-09-19 00:56:18 +01001375 int mcdi_max_ver;
Ben Hutchingsadd72472012-11-08 01:46:53 +00001376 unsigned int max_rx_ip_filters;
Daniel Pieczko9ec06592013-11-21 17:11:25 +00001377 u32 hwtstamp_filters;
Ben Hutchings8ceee662008-04-27 12:55:59 +01001378};
1379
1380/**************************************************************************
1381 *
1382 * Prototypes and inline functions
1383 *
1384 *************************************************************************/
1385
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001386static inline struct efx_channel *
1387efx_get_channel(struct efx_nic *efx, unsigned index)
1388{
1389 EFX_BUG_ON_PARANOID(index >= efx->n_channels);
Ben Hutchings8313aca2010-09-10 06:41:57 +00001390 return efx->channel[index];
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001391}
1392
Ben Hutchings8ceee662008-04-27 12:55:59 +01001393/* Iterate over all used channels */
1394#define efx_for_each_channel(_channel, _efx) \
Ben Hutchings8313aca2010-09-10 06:41:57 +00001395 for (_channel = (_efx)->channel[0]; \
1396 _channel; \
1397 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1398 (_efx)->channel[_channel->channel + 1] : NULL)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001399
Ben Hutchings7f967c02012-02-13 23:45:02 +00001400/* Iterate over all used channels in reverse */
1401#define efx_for_each_channel_rev(_channel, _efx) \
1402 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1403 _channel; \
1404 _channel = _channel->channel ? \
1405 (_efx)->channel[_channel->channel - 1] : NULL)
1406
Ben Hutchings97653432011-01-12 18:26:56 +00001407static inline struct efx_tx_queue *
1408efx_get_tx_queue(struct efx_nic *efx, unsigned index, unsigned type)
1409{
1410 EFX_BUG_ON_PARANOID(index >= efx->n_tx_channels ||
1411 type >= EFX_TXQ_TYPES);
1412 return &efx->channel[efx->tx_channel_offset + index]->tx_queue[type];
1413}
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001414
Ben Hutchings525da902011-02-07 23:04:38 +00001415static inline bool efx_channel_has_tx_queues(struct efx_channel *channel)
1416{
1417 return channel->channel - channel->efx->tx_channel_offset <
1418 channel->efx->n_tx_channels;
1419}
1420
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001421static inline struct efx_tx_queue *
1422efx_channel_get_tx_queue(struct efx_channel *channel, unsigned type)
1423{
Ben Hutchings525da902011-02-07 23:04:38 +00001424 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel) ||
1425 type >= EFX_TXQ_TYPES);
1426 return &channel->tx_queue[type];
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001427}
Ben Hutchings8ceee662008-04-27 12:55:59 +01001428
Ben Hutchings94b274b2011-01-10 21:18:20 +00001429static inline bool efx_tx_queue_used(struct efx_tx_queue *tx_queue)
1430{
1431 return !(tx_queue->efx->net_dev->num_tc < 2 &&
1432 tx_queue->queue & EFX_TXQ_TYPE_HIGHPRI);
1433}
1434
Ben Hutchings8ceee662008-04-27 12:55:59 +01001435/* Iterate over all TX queues belonging to a channel */
1436#define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
Ben Hutchings525da902011-02-07 23:04:38 +00001437 if (!efx_channel_has_tx_queues(_channel)) \
1438 ; \
1439 else \
1440 for (_tx_queue = (_channel)->tx_queue; \
Ben Hutchings94b274b2011-01-10 21:18:20 +00001441 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1442 efx_tx_queue_used(_tx_queue); \
Ben Hutchings525da902011-02-07 23:04:38 +00001443 _tx_queue++)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001444
Ben Hutchings94b274b2011-01-10 21:18:20 +00001445/* Iterate over all possible TX queues belonging to a channel */
1446#define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
Ben Hutchings73e00262012-02-23 00:45:50 +00001447 if (!efx_channel_has_tx_queues(_channel)) \
1448 ; \
1449 else \
1450 for (_tx_queue = (_channel)->tx_queue; \
1451 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1452 _tx_queue++)
Ben Hutchings94b274b2011-01-10 21:18:20 +00001453
Ben Hutchings525da902011-02-07 23:04:38 +00001454static inline bool efx_channel_has_rx_queue(struct efx_channel *channel)
1455{
Stuart Hodgson79d68b32012-07-16 17:08:33 +01001456 return channel->rx_queue.core_index >= 0;
Ben Hutchings525da902011-02-07 23:04:38 +00001457}
1458
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001459static inline struct efx_rx_queue *
1460efx_channel_get_rx_queue(struct efx_channel *channel)
1461{
Ben Hutchings525da902011-02-07 23:04:38 +00001462 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel));
1463 return &channel->rx_queue;
Ben Hutchingsf7d12cd2010-09-10 06:41:47 +00001464}
1465
Ben Hutchings8ceee662008-04-27 12:55:59 +01001466/* Iterate over all RX queues belonging to a channel */
1467#define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
Ben Hutchings525da902011-02-07 23:04:38 +00001468 if (!efx_channel_has_rx_queue(_channel)) \
1469 ; \
1470 else \
1471 for (_rx_queue = &(_channel)->rx_queue; \
1472 _rx_queue; \
1473 _rx_queue = NULL)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001474
Ben Hutchingsba1e8a32010-09-10 06:41:36 +00001475static inline struct efx_channel *
1476efx_rx_queue_channel(struct efx_rx_queue *rx_queue)
1477{
Ben Hutchings8313aca2010-09-10 06:41:57 +00001478 return container_of(rx_queue, struct efx_channel, rx_queue);
Ben Hutchingsba1e8a32010-09-10 06:41:36 +00001479}
1480
1481static inline int efx_rx_queue_index(struct efx_rx_queue *rx_queue)
1482{
Ben Hutchings8313aca2010-09-10 06:41:57 +00001483 return efx_rx_queue_channel(rx_queue)->channel;
Ben Hutchingsba1e8a32010-09-10 06:41:36 +00001484}
1485
Ben Hutchings8ceee662008-04-27 12:55:59 +01001486/* Returns a pointer to the specified receive buffer in the RX
1487 * descriptor queue.
1488 */
1489static inline struct efx_rx_buffer *efx_rx_buffer(struct efx_rx_queue *rx_queue,
1490 unsigned int index)
1491{
Eric Dumazet807540b2010-09-23 05:40:09 +00001492 return &rx_queue->buffer[index];
Ben Hutchings8ceee662008-04-27 12:55:59 +01001493}
1494
Ben Hutchings8ceee662008-04-27 12:55:59 +01001495/**
1496 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1497 *
1498 * This calculates the maximum frame length that will be used for a
1499 * given MTU. The frame length will be equal to the MTU plus a
1500 * constant amount of header space and padding. This is the quantity
1501 * that the net driver will program into the MAC as the maximum frame
1502 * length.
1503 *
Ben Hutchings754c6532010-02-03 09:31:57 +00001504 * The 10G MAC requires 8-byte alignment on the frame
Ben Hutchings8ceee662008-04-27 12:55:59 +01001505 * length, so we round up to the nearest 8.
Ben Hutchingscc117632009-08-26 08:17:59 +00001506 *
1507 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1508 * XGMII cycle). If the frame length reaches the maximum value in the
1509 * same cycle, the XMAC can miss the IPG altogether. We work around
1510 * this by adding a further 16 bytes.
Ben Hutchings8ceee662008-04-27 12:55:59 +01001511 */
1512#define EFX_MAX_FRAME_LEN(mtu) \
Ben Hutchingscc117632009-08-26 08:17:59 +00001513 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
Ben Hutchings8ceee662008-04-27 12:55:59 +01001514
Stuart Hodgson7c236c42012-09-03 11:09:36 +01001515static inline bool efx_xmit_with_hwtstamp(struct sk_buff *skb)
1516{
1517 return skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP;
1518}
1519static inline void efx_xmit_hwtstamp_pending(struct sk_buff *skb)
1520{
1521 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1522}
Ben Hutchings8ceee662008-04-27 12:55:59 +01001523
1524#endif /* EFX_NET_DRIVER_H */