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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * include/asm-ppc/cputable.h
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef __ASM_PPC_CPUTABLE_H
13#define __ASM_PPC_CPUTABLE_H
14
15/* Exposed to userland CPU features */
16#define PPC_FEATURE_32 0x80000000
17#define PPC_FEATURE_64 0x40000000
18#define PPC_FEATURE_601_INSTR 0x20000000
19#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
20#define PPC_FEATURE_HAS_FPU 0x08000000
21#define PPC_FEATURE_HAS_MMU 0x04000000
22#define PPC_FEATURE_HAS_4xxMAC 0x02000000
23#define PPC_FEATURE_UNIFIED_CACHE 0x01000000
24#define PPC_FEATURE_HAS_SPE 0x00800000
25#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000
26#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000
27
28#ifdef __KERNEL__
29
30#ifndef __ASSEMBLY__
31
32/* This structure can grow, it's real size is used by head.S code
33 * via the mkdefs mecanism.
34 */
35struct cpu_spec;
36
37typedef void (*cpu_setup_t)(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
38
39struct cpu_spec {
40 /* CPU is matched via (PVR & pvr_mask) == pvr_value */
41 unsigned int pvr_mask;
42 unsigned int pvr_value;
43
44 char *cpu_name;
45 unsigned int cpu_features; /* Kernel features */
46 unsigned int cpu_user_features; /* Userland features */
47
48 /* cache line sizes */
49 unsigned int icache_bsize;
50 unsigned int dcache_bsize;
51
52 /* number of performance monitor counters */
53 unsigned int num_pmcs;
54
55 /* this is called to initialize various CPU bits like L1 cache,
56 * BHT, SPD, etc... from head.S before branching to identify_machine
57 */
58 cpu_setup_t cpu_setup;
59};
60
61extern struct cpu_spec cpu_specs[];
62extern struct cpu_spec *cur_cpu_spec[];
63
64static inline unsigned int cpu_has_feature(unsigned int feature)
65{
66 return cur_cpu_spec[0]->cpu_features & feature;
67}
68
69#endif /* __ASSEMBLY__ */
70
71/* CPU kernel features */
72#define CPU_FTR_SPLIT_ID_CACHE 0x00000001
73#define CPU_FTR_L2CR 0x00000002
74#define CPU_FTR_SPEC7450 0x00000004
75#define CPU_FTR_ALTIVEC 0x00000008
76#define CPU_FTR_TAU 0x00000010
77#define CPU_FTR_CAN_DOZE 0x00000020
78#define CPU_FTR_USE_TB 0x00000040
79#define CPU_FTR_604_PERF_MON 0x00000080
80#define CPU_FTR_601 0x00000100
81#define CPU_FTR_HPTE_TABLE 0x00000200
82#define CPU_FTR_CAN_NAP 0x00000400
83#define CPU_FTR_L3CR 0x00000800
84#define CPU_FTR_L3_DISABLE_NAP 0x00001000
85#define CPU_FTR_NAP_DISABLE_L2_PR 0x00002000
86#define CPU_FTR_DUAL_PLL_750FX 0x00004000
87#define CPU_FTR_NO_DPM 0x00008000
88#define CPU_FTR_HAS_HIGH_BATS 0x00010000
Kumar Galaf50b1532005-04-16 15:24:22 -070089#define CPU_FTR_NEED_COHERENT 0x00020000
Linus Torvalds1da177e2005-04-16 15:20:36 -070090#define CPU_FTR_NO_BTIC 0x00040000
Kumar Galaf50b1532005-04-16 15:24:22 -070091#define CPU_FTR_BIG_PHYS 0x00080000
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
93#ifdef __ASSEMBLY__
94
95#define BEGIN_FTR_SECTION 98:
96
97#define END_FTR_SECTION(msk, val) \
9899: \
99 .section __ftr_fixup,"a"; \
100 .align 2; \
101 .long msk; \
102 .long val; \
103 .long 98b; \
104 .long 99b; \
105 .previous
106
107#else
108
109#define BEGIN_FTR_SECTION "98:\n"
110#define END_FTR_SECTION(msk, val) \
111"99:\n" \
112" .section __ftr_fixup,\"a\";\n" \
113" .align 2;\n" \
114" .long "#msk";\n" \
115" .long "#val";\n" \
116" .long 98b;\n" \
117" .long 99b;\n" \
118" .previous\n"
119
120
121#endif /* __ASSEMBLY__ */
122
123#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk))
124#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0)
125
126#endif /* __ASM_PPC_CPUTABLE_H */
127#endif /* __KERNEL__ */
128