blob: 22b0806161bb614b2179c7ec1eee002a0255779e [file] [log] [blame]
Mike Frysinger764cb812008-04-24 05:07:29 +08001/*
2 * asm-blackfin/timex.h: cpu cycles!
Bryan Wu1394f032007-05-06 14:50:22 -07003 *
Mike Frysinger764cb812008-04-24 05:07:29 +08004 * Copyright 2004-2008 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07007 */
8
Mike Frysinger764cb812008-04-24 05:07:29 +08009#ifndef _ASM_BLACKFIN_TIMEX_H
10#define _ASM_BLACKFIN_TIMEX_H
Bryan Wu1394f032007-05-06 14:50:22 -070011
12#define CLOCK_TICK_RATE 1000000 /* Underlying HZ */
13
Mike Frysinger764cb812008-04-24 05:07:29 +080014typedef unsigned long long cycles_t;
Bryan Wu1394f032007-05-06 14:50:22 -070015
16static inline cycles_t get_cycles(void)
17{
Mike Frysinger764cb812008-04-24 05:07:29 +080018 unsigned long tmp, tmp2;
19 __asm__("%0 = cycles; %1 = cycles2;" : "=d"(tmp), "=d"(tmp2));
20 return tmp | ((cycles_t)tmp2 << 32);
Bryan Wu1394f032007-05-06 14:50:22 -070021}
22
23#endif