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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_sl82c105.c - SL82C105 PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * Based in part on linux/drivers/ide/pci/sl82c105.c
7 * SL82C105/Winbond 553 IDE driver
8 *
9 * and in part on the documentation and errata sheet
Alan16728da2007-02-20 17:51:51 +000010 *
11 *
12 * Note: The controller like many controllers has shared timings for
13 * PIO and DMA. We thus flip to the DMA timings in dma_start and flip back
14 * in the dma_stop function. Thus we actually don't need a set_dmamode
15 * method as the PIO method is always called and will set the right PIO
16 * timing parameters.
Jeff Garzik669a5db2006-08-29 18:12:40 -040017 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040018
Jeff Garzik669a5db2006-08-29 18:12:40 -040019#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/pci.h>
22#include <linux/init.h>
23#include <linux/blkdev.h>
24#include <linux/delay.h>
25#include <scsi/scsi_host.h>
26#include <linux/libata.h>
27
28#define DRV_NAME "pata_sl82c105"
Jeff Garzikcb48cab2007-02-26 06:04:24 -050029#define DRV_VERSION "0.3.0"
Jeff Garzik669a5db2006-08-29 18:12:40 -040030
31enum {
32 /*
33 * SL82C105 PCI config register 0x40 bits.
34 */
35 CTRL_IDE_IRQB = (1 << 30),
36 CTRL_IDE_IRQA = (1 << 28),
37 CTRL_LEGIRQ = (1 << 11),
38 CTRL_P1F16 = (1 << 5),
39 CTRL_P1EN = (1 << 4),
40 CTRL_P0F16 = (1 << 1),
41 CTRL_P0EN = (1 << 0)
42};
43
44/**
45 * sl82c105_pre_reset - probe begin
46 * @ap: ATA port
Tejun Heod4b2bab2007-02-02 16:50:52 +090047 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040048 *
49 * Set up cable type and use generic probe init
50 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040051
Tejun Heod4b2bab2007-02-02 16:50:52 +090052static int sl82c105_pre_reset(struct ata_port *ap, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040053{
54 static const struct pci_bits sl82c105_enable_bits[] = {
55 { 0x40, 1, 0x01, 0x01 },
56 { 0x40, 1, 0x10, 0x10 }
57 };
58 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
59
Alan Coxc9619222006-09-26 17:53:38 +010060 if (ap->port_no && !pci_test_config_bits(pdev, &sl82c105_enable_bits[ap->port_no]))
61 return -ENOENT;
Tejun Heod4b2bab2007-02-02 16:50:52 +090062 return ata_std_prereset(ap, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -040063}
64
65
66static void sl82c105_error_handler(struct ata_port *ap)
67{
68 ata_bmdma_drive_eh(ap, sl82c105_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
69}
70
71
72/**
73 * sl82c105_configure_piomode - set chip PIO timing
74 * @ap: ATA interface
75 * @adev: ATA device
76 * @pio: PIO mode
77 *
78 * Called to do the PIO mode setup. Our timing registers are shared
79 * so a configure_dmamode call will undo any work we do here and vice
80 * versa
81 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040082
Jeff Garzik669a5db2006-08-29 18:12:40 -040083static void sl82c105_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio)
84{
85 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
86 static u16 pio_timing[5] = {
87 0x50D, 0x407, 0x304, 0x242, 0x240
88 };
89 u16 dummy;
90 int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno);
Jeff Garzik85cd7252006-08-31 00:03:49 -040091
Jeff Garzik669a5db2006-08-29 18:12:40 -040092 pci_write_config_word(pdev, timing, pio_timing[pio]);
93 /* Can we lose this oddity of the old driver */
94 pci_read_config_word(pdev, timing, &dummy);
95}
96
97/**
98 * sl82c105_set_piomode - set initial PIO mode data
99 * @ap: ATA interface
100 * @adev: ATA device
101 *
102 * Called to do the PIO mode setup. Our timing registers are shared
103 * but we want to set the PIO timing by default.
104 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400105
Jeff Garzik669a5db2006-08-29 18:12:40 -0400106static void sl82c105_set_piomode(struct ata_port *ap, struct ata_device *adev)
107{
108 sl82c105_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
109}
110
111/**
112 * sl82c105_configure_dmamode - set DMA mode in chip
113 * @ap: ATA interface
114 * @adev: ATA device
115 *
116 * Load DMA cycle times into the chip ready for a DMA transfer
117 * to occur.
118 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400119
Jeff Garzik669a5db2006-08-29 18:12:40 -0400120static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev)
121{
122 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
123 static u16 dma_timing[3] = {
124 0x707, 0x201, 0x200
125 };
126 u16 dummy;
127 int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno);
128 int dma = adev->dma_mode - XFER_MW_DMA_0;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400129
Jeff Garzik669a5db2006-08-29 18:12:40 -0400130 pci_write_config_word(pdev, timing, dma_timing[dma]);
131 /* Can we lose this oddity of the old driver */
132 pci_read_config_word(pdev, timing, &dummy);
133}
134
135/**
Jeff Garzik669a5db2006-08-29 18:12:40 -0400136 * sl82c105_reset_engine - Reset the DMA engine
137 * @ap: ATA interface
138 *
139 * The sl82c105 has some serious problems with the DMA engine
Jeff Garzik85cd7252006-08-31 00:03:49 -0400140 * when transfers don't run as expected or ATAPI is used. The
Jeff Garzik669a5db2006-08-29 18:12:40 -0400141 * recommended fix is to reset the engine each use using a chip
142 * test register.
143 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400144
Jeff Garzik669a5db2006-08-29 18:12:40 -0400145static void sl82c105_reset_engine(struct ata_port *ap)
146{
147 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
148 u16 val;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400149
Jeff Garzik669a5db2006-08-29 18:12:40 -0400150 pci_read_config_word(pdev, 0x7E, &val);
151 pci_write_config_word(pdev, 0x7E, val | 4);
152 pci_write_config_word(pdev, 0x7E, val & ~4);
153}
154
155/**
156 * sl82c105_bmdma_start - DMA engine begin
157 * @qc: ATA command
158 *
159 * Reset the DMA engine each use as recommended by the errata
Jeff Garzik85cd7252006-08-31 00:03:49 -0400160 * document.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400161 *
162 * FIXME: if we switch clock at BMDMA start/end we might get better
163 * PIO performance on DMA capable devices.
164 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400165
Jeff Garzik669a5db2006-08-29 18:12:40 -0400166static void sl82c105_bmdma_start(struct ata_queued_cmd *qc)
167{
168 struct ata_port *ap = qc->ap;
169
Olaf Hering8361cd72007-02-10 21:36:14 +0100170 udelay(100);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400171 sl82c105_reset_engine(ap);
Olaf Hering8361cd72007-02-10 21:36:14 +0100172 udelay(100);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400173
Jeff Garzik669a5db2006-08-29 18:12:40 -0400174 /* Set the clocks for DMA */
175 sl82c105_configure_dmamode(ap, qc->dev);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400176 /* Activate DMA */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400177 ata_bmdma_start(qc);
178}
179
180/**
181 * sl82c105_bmdma_end - DMA engine stop
182 * @qc: ATA command
183 *
184 * Reset the DMA engine each use as recommended by the errata
185 * document.
186 *
187 * This function is also called to turn off DMA when a timeout occurs
188 * during DMA operation. In both cases we need to reset the engine,
189 * so no actual eng_timeout handler is required.
190 *
191 * We assume bmdma_stop is always called if bmdma_start as called. If
192 * not then we may need to wrap qc_issue.
193 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400194
Jeff Garzik669a5db2006-08-29 18:12:40 -0400195static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc)
196{
197 struct ata_port *ap = qc->ap;
198
199 ata_bmdma_stop(qc);
200 sl82c105_reset_engine(ap);
Olaf Hering8361cd72007-02-10 21:36:14 +0100201 udelay(100);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400202
Jeff Garzik669a5db2006-08-29 18:12:40 -0400203 /* This will redo the initial setup of the DMA device to matching
204 PIO timings */
Alan16728da2007-02-20 17:51:51 +0000205 sl82c105_set_piomode(ap, qc->dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400206}
207
208static struct scsi_host_template sl82c105_sht = {
209 .module = THIS_MODULE,
210 .name = DRV_NAME,
211 .ioctl = ata_scsi_ioctl,
212 .queuecommand = ata_scsi_queuecmd,
213 .can_queue = ATA_DEF_QUEUE,
214 .this_id = ATA_SHT_THIS_ID,
215 .sg_tablesize = LIBATA_MAX_PRD,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400216 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
217 .emulated = ATA_SHT_EMULATED,
218 .use_clustering = ATA_SHT_USE_CLUSTERING,
219 .proc_name = DRV_NAME,
220 .dma_boundary = ATA_DMA_BOUNDARY,
221 .slave_configure = ata_scsi_slave_config,
Tejun Heoafdfe892006-11-29 11:26:47 +0900222 .slave_destroy = ata_scsi_slave_destroy,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400223 .bios_param = ata_std_bios_param,
224};
225
226static struct ata_port_operations sl82c105_port_ops = {
227 .port_disable = ata_port_disable,
228 .set_piomode = sl82c105_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400229 .mode_filter = ata_pci_default_filter,
230
231 .tf_load = ata_tf_load,
232 .tf_read = ata_tf_read,
233 .check_status = ata_check_status,
234 .exec_command = ata_exec_command,
235 .dev_select = ata_std_dev_select,
236
Jeff Garzikbf7551c2007-03-02 18:09:05 -0500237 .freeze = ata_bmdma_freeze,
238 .thaw = ata_bmdma_thaw,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400239 .error_handler = sl82c105_error_handler,
Jeff Garzikbf7551c2007-03-02 18:09:05 -0500240 .post_internal_cmd = ata_bmdma_post_internal_cmd,
Alan Coxc45a6322007-03-26 21:43:41 -0800241 .cable_detect = ata_cable_40wire,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400242
243 .bmdma_setup = ata_bmdma_setup,
244 .bmdma_start = sl82c105_bmdma_start,
245 .bmdma_stop = sl82c105_bmdma_stop,
246 .bmdma_status = ata_bmdma_status,
247
248 .qc_prep = ata_qc_prep,
249 .qc_issue = ata_qc_issue_prot,
Jeff Garzikbda30282006-09-27 05:41:13 -0400250
Tejun Heo0d5ff562007-02-01 15:06:36 +0900251 .data_xfer = ata_data_xfer,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400252
253 .irq_handler = ata_interrupt,
254 .irq_clear = ata_bmdma_irq_clear,
Akira Iguchi246ce3b2007-01-26 16:27:58 +0900255 .irq_on = ata_irq_on,
256 .irq_ack = ata_irq_ack,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400257
Jeff Garzik669a5db2006-08-29 18:12:40 -0400258 .port_start = ata_port_start,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400259};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400260
261/**
262 * sl82c105_bridge_revision - find bridge version
263 * @pdev: PCI device for the ATA function
264 *
265 * Locates the PCI bridge associated with the ATA function and
266 * providing it is a Winbond 553 reports the revision. If it cannot
267 * find a revision or the right device it returns -1
268 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400269
Jeff Garzik669a5db2006-08-29 18:12:40 -0400270static int sl82c105_bridge_revision(struct pci_dev *pdev)
271{
272 struct pci_dev *bridge;
273 u8 rev;
274
275 /*
276 * The bridge should be part of the same device, but function 0.
277 */
278 bridge = pci_get_slot(pdev->bus,
279 PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
280 if (!bridge)
281 return -1;
282
283 /*
284 * Make sure it is a Winbond 553 and is an ISA bridge.
285 */
286 if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||
287 bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||
288 bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {
289 pci_dev_put(bridge);
290 return -1;
291 }
292 /*
293 * We need to find function 0's revision, not function 1
294 */
295 pci_read_config_byte(bridge, PCI_REVISION_ID, &rev);
296
297 pci_dev_put(bridge);
298 return rev;
299}
300
Jeff Garzik85cd7252006-08-31 00:03:49 -0400301
Jeff Garzik669a5db2006-08-29 18:12:40 -0400302static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
303{
304 static struct ata_port_info info_dma = {
305 .sht = &sl82c105_sht,
306 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
307 .pio_mask = 0x1f,
308 .mwdma_mask = 0x07,
309 .port_ops = &sl82c105_port_ops
310 };
311 static struct ata_port_info info_early = {
312 .sht = &sl82c105_sht,
313 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
314 .pio_mask = 0x1f,
315 .port_ops = &sl82c105_port_ops
316 };
317 static struct ata_port_info *port_info[2] = { &info_early, &info_early };
318 u32 val;
319 int rev;
320
321 rev = sl82c105_bridge_revision(dev);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400322
Jeff Garzik669a5db2006-08-29 18:12:40 -0400323 if (rev == -1)
324 dev_printk(KERN_WARNING, &dev->dev, "pata_sl82c105: Unable to find bridge, disabling DMA.\n");
325 else if (rev <= 5)
326 dev_printk(KERN_WARNING, &dev->dev, "pata_sl82c105: Early bridge revision, no DMA available.\n");
327 else {
328 port_info[0] = &info_dma;
329 port_info[1] = &info_dma;
330 }
Jeff Garzik85cd7252006-08-31 00:03:49 -0400331
Jeff Garzik669a5db2006-08-29 18:12:40 -0400332 pci_read_config_dword(dev, 0x40, &val);
333 val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
334 pci_write_config_dword(dev, 0x40, val);
335
336
337 return ata_pci_init_one(dev, port_info, 1); /* For now */
338}
339
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400340static const struct pci_device_id sl82c105[] = {
341 { PCI_VDEVICE(WINBOND, PCI_DEVICE_ID_WINBOND_82C105), },
342
343 { },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400344};
345
346static struct pci_driver sl82c105_pci_driver = {
347 .name = DRV_NAME,
348 .id_table = sl82c105,
349 .probe = sl82c105_init_one,
350 .remove = ata_pci_remove_one
351};
352
353static int __init sl82c105_init(void)
354{
355 return pci_register_driver(&sl82c105_pci_driver);
356}
357
Jeff Garzik669a5db2006-08-29 18:12:40 -0400358static void __exit sl82c105_exit(void)
359{
360 pci_unregister_driver(&sl82c105_pci_driver);
361}
362
Jeff Garzik669a5db2006-08-29 18:12:40 -0400363MODULE_AUTHOR("Alan Cox");
364MODULE_DESCRIPTION("low-level driver for Sl82c105");
365MODULE_LICENSE("GPL");
366MODULE_DEVICE_TABLE(pci, sl82c105);
367MODULE_VERSION(DRV_VERSION);
368
369module_init(sl82c105_init);
370module_exit(sl82c105_exit);