| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* $Id: head.h,v 1.30 1997/08/08 08:34:33 jj Exp $ */ |
| 2 | #ifndef _SPARC64_HEAD_H |
| 3 | #define _SPARC64_HEAD_H |
| 4 | |
| 5 | #include <asm/pstate.h> |
| 6 | |
| 7 | #define KERNBASE 0x400000 |
| 8 | |
| 9 | #define PTREGS_OFF (STACK_BIAS + STACKFRAME_SZ) |
| 10 | |
| 11 | #define __CHEETAH_ID 0x003e0014 |
| 12 | #define __JALAPENO_ID 0x003e0016 |
| David S. Miller | 92704a1 | 2006-02-26 23:27:19 -0800 | [diff] [blame^] | 13 | #define __SERRANO_ID 0x003e0022 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | |
| 15 | #define CHEETAH_MANUF 0x003e |
| David S. Miller | d2212bc | 2005-09-27 22:50:06 -0700 | [diff] [blame] | 16 | #define CHEETAH_IMPL 0x0014 /* Ultra-III */ |
| 17 | #define CHEETAH_PLUS_IMPL 0x0015 /* Ultra-III+ */ |
| 18 | #define JALAPENO_IMPL 0x0016 /* Ultra-IIIi */ |
| 19 | #define JAGUAR_IMPL 0x0018 /* Ultra-IV */ |
| 20 | #define PANTHER_IMPL 0x0019 /* Ultra-IV+ */ |
| 21 | #define SERRANO_IMPL 0x0022 /* Ultra-IIIi+ */ |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | |
| 23 | #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \ |
| 24 | rdpr %ver, %tmp1; \ |
| 25 | sethi %hi(__CHEETAH_ID), %tmp2; \ |
| 26 | srlx %tmp1, 32, %tmp1; \ |
| 27 | or %tmp2, %lo(__CHEETAH_ID), %tmp2;\ |
| 28 | cmp %tmp1, %tmp2; \ |
| 29 | be,pn %icc, label; \ |
| 30 | nop; |
| 31 | |
| 32 | #define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \ |
| 33 | rdpr %ver, %tmp1; \ |
| 34 | sethi %hi(__JALAPENO_ID), %tmp2; \ |
| 35 | srlx %tmp1, 32, %tmp1; \ |
| 36 | or %tmp2, %lo(__JALAPENO_ID), %tmp2;\ |
| 37 | cmp %tmp1, %tmp2; \ |
| 38 | be,pn %icc, label; \ |
| 39 | nop; |
| 40 | |
| 41 | #define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label) \ |
| 42 | rdpr %ver, %tmp1; \ |
| 43 | srlx %tmp1, (32 + 16), %tmp2; \ |
| 44 | cmp %tmp2, CHEETAH_MANUF; \ |
| 45 | bne,pt %xcc, 99f; \ |
| 46 | sllx %tmp1, 16, %tmp1; \ |
| 47 | srlx %tmp1, (32 + 16), %tmp2; \ |
| 48 | cmp %tmp2, CHEETAH_PLUS_IMPL; \ |
| 49 | bgeu,pt %xcc, label; \ |
| 50 | 99: nop; |
| 51 | |
| 52 | #define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label) \ |
| 53 | rdpr %ver, %tmp1; \ |
| 54 | srlx %tmp1, (32 + 16), %tmp2; \ |
| 55 | cmp %tmp2, CHEETAH_MANUF; \ |
| 56 | bne,pt %xcc, 99f; \ |
| 57 | sllx %tmp1, 16, %tmp1; \ |
| 58 | srlx %tmp1, (32 + 16), %tmp2; \ |
| 59 | cmp %tmp2, CHEETAH_IMPL; \ |
| 60 | bgeu,pt %xcc, label; \ |
| 61 | 99: nop; |
| 62 | |
| 63 | #endif /* !(_SPARC64_HEAD_H) */ |