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Daniel Drake99ea2622010-09-30 21:55:48 +01001/*
2 * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
3 *
4 * Copyright (C) 2009 VIA Technologies, Inc.
5 * Copyright (C) 2010 One Laptop per Child
6 * Author: Harald Welte <HaraldWelte@viatech.com>
7 * All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 *
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/gpio.h>
Andrew Mortonc5e70432011-05-24 17:13:43 -070029#include <linux/slab.h>
Daniel Drake99ea2622010-09-30 21:55:48 +010030#include <linux/device.h>
31#include <linux/platform_device.h>
32#include <linux/pci.h>
33#include <linux/io.h>
34
35#define MODULE_NAME "vx855_gpio"
36
37/* The VX855 south bridge has the following GPIO pins:
38 * GPI 0...13 General Purpose Input
39 * GPO 0...12 General Purpose Output
40 * GPIO 0...14 General Purpose I/O (Open-Drain)
41 */
42
43#define NR_VX855_GPI 14
44#define NR_VX855_GPO 13
45#define NR_VX855_GPIO 15
46
47#define NR_VX855_GPInO (NR_VX855_GPI + NR_VX855_GPO)
48#define NR_VX855_GP (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
49
50struct vx855_gpio {
51 struct gpio_chip gpio;
52 spinlock_t lock;
53 u32 io_gpi;
54 u32 io_gpo;
55 bool gpi_reserved;
56 bool gpo_reserved;
57};
58
59/* resolve a GPIx into the corresponding bit position */
60static inline u_int32_t gpi_i_bit(int i)
61{
62 if (i < 10)
63 return 1 << i;
64 else
65 return 1 << (i + 14);
66}
67
68static inline u_int32_t gpo_o_bit(int i)
69{
70 if (i < 11)
71 return 1 << i;
72 else
73 return 1 << (i + 14);
74}
75
76static inline u_int32_t gpio_i_bit(int i)
77{
78 if (i < 14)
79 return 1 << (i + 10);
80 else
81 return 1 << (i + 14);
82}
83
84static inline u_int32_t gpio_o_bit(int i)
85{
86 if (i < 14)
87 return 1 << (i + 11);
88 else
89 return 1 << (i + 13);
90}
91
92/* Mapping betwee numeric GPIO ID and the actual GPIO hardware numbering:
93 * 0..13 GPI 0..13
94 * 14..26 GPO 0..12
95 * 27..41 GPIO 0..14
96 */
97
98static int vx855gpio_direction_input(struct gpio_chip *gpio,
99 unsigned int nr)
100{
101 struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
102 unsigned long flags;
103 u_int32_t reg_out;
104
105 /* Real GPI bits are always in input direction */
106 if (nr < NR_VX855_GPI)
107 return 0;
108
109 /* Real GPO bits cannot be put in output direction */
110 if (nr < NR_VX855_GPInO)
111 return -EINVAL;
112
113 /* Open Drain GPIO have to be set to one */
114 spin_lock_irqsave(&vg->lock, flags);
115 reg_out = inl(vg->io_gpo);
116 reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
117 outl(reg_out, vg->io_gpo);
118 spin_unlock_irqrestore(&vg->lock, flags);
119
120 return 0;
121}
122
123static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
124{
125 struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
126 u_int32_t reg_in;
127 int ret = 0;
128
129 if (nr < NR_VX855_GPI) {
130 reg_in = inl(vg->io_gpi);
131 if (reg_in & gpi_i_bit(nr))
132 ret = 1;
133 } else if (nr < NR_VX855_GPInO) {
134 /* GPO don't have an input bit, we need to read it
135 * back from the output register */
136 reg_in = inl(vg->io_gpo);
137 if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
138 ret = 1;
139 } else {
140 reg_in = inl(vg->io_gpi);
141 if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
142 ret = 1;
143 }
144
145 return ret;
146}
147
148static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
149 int val)
150{
151 struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
152 unsigned long flags;
153 u_int32_t reg_out;
154
155 /* True GPI cannot be switched to output mode */
156 if (nr < NR_VX855_GPI)
157 return;
158
159 spin_lock_irqsave(&vg->lock, flags);
160 reg_out = inl(vg->io_gpo);
161 if (nr < NR_VX855_GPInO) {
162 if (val)
163 reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
164 else
165 reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
166 } else {
167 if (val)
168 reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
169 else
170 reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
171 }
172 outl(reg_out, vg->io_gpo);
173 spin_unlock_irqrestore(&vg->lock, flags);
174}
175
176static int vx855gpio_direction_output(struct gpio_chip *gpio,
177 unsigned int nr, int val)
178{
179 /* True GPI cannot be switched to output mode */
180 if (nr < NR_VX855_GPI)
181 return -EINVAL;
182
183 /* True GPO don't need to be switched to output mode,
184 * and GPIO are open-drain, i.e. also need no switching,
185 * so all we do is set the level */
186 vx855gpio_set(gpio, nr, val);
187
188 return 0;
189}
190
191static const char *vx855gpio_names[NR_VX855_GP] = {
192 "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
193 "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
194 "VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
195 "VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
196 "VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
197 "VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
198 "VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
199 "VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
200 "VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
201 "VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
202};
203
204static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
205{
206 struct gpio_chip *c = &vg->gpio;
207
208 c->label = "VX855 South Bridge";
209 c->owner = THIS_MODULE;
210 c->direction_input = vx855gpio_direction_input;
211 c->direction_output = vx855gpio_direction_output;
212 c->get = vx855gpio_get;
213 c->set = vx855gpio_set;
214 c->dbg_show = NULL;
215 c->base = 0;
216 c->ngpio = NR_VX855_GP;
217 c->can_sleep = 0;
218 c->names = vx855gpio_names;
219}
220
221/* This platform device is ordinarily registered by the vx855 mfd driver */
Bill Pemberton38363092012-11-19 13:22:34 -0500222static int vx855gpio_probe(struct platform_device *pdev)
Daniel Drake99ea2622010-09-30 21:55:48 +0100223{
224 struct resource *res_gpi;
225 struct resource *res_gpo;
226 struct vx855_gpio *vg;
227 int ret;
228
229 res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
230 res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
231 if (!res_gpi || !res_gpo)
232 return -EBUSY;
233
234 vg = kzalloc(sizeof(*vg), GFP_KERNEL);
235 if (!vg)
236 return -ENOMEM;
237
238 platform_set_drvdata(pdev, vg);
239
240 dev_info(&pdev->dev, "found VX855 GPIO controller\n");
241 vg->io_gpi = res_gpi->start;
242 vg->io_gpo = res_gpo->start;
243 spin_lock_init(&vg->lock);
244
245 /*
246 * A single byte is used to control various GPIO ports on the VX855,
247 * and in the case of the OLPC XO-1.5, some of those ports are used
248 * for switches that are interpreted and exposed through ACPI. ACPI
249 * will have reserved the region, so our own reservation will not
250 * succeed. Ignore and continue.
251 */
252
253 if (!request_region(res_gpi->start, resource_size(res_gpi),
254 MODULE_NAME "_gpi"))
255 dev_warn(&pdev->dev,
256 "GPI I/O resource busy, probably claimed by ACPI\n");
257 else
258 vg->gpi_reserved = true;
259
260 if (!request_region(res_gpo->start, resource_size(res_gpo),
261 MODULE_NAME "_gpo"))
262 dev_warn(&pdev->dev,
263 "GPO I/O resource busy, probably claimed by ACPI\n");
264 else
265 vg->gpo_reserved = true;
266
267 vx855gpio_gpio_setup(vg);
268
269 ret = gpiochip_add(&vg->gpio);
270 if (ret) {
271 dev_err(&pdev->dev, "failed to register GPIOs\n");
272 goto out_release;
273 }
274
275 return 0;
276
277out_release:
278 if (vg->gpi_reserved)
279 release_region(res_gpi->start, resource_size(res_gpi));
280 if (vg->gpo_reserved)
281 release_region(res_gpi->start, resource_size(res_gpo));
Daniel Drake99ea2622010-09-30 21:55:48 +0100282 kfree(vg);
283 return ret;
284}
285
Bill Pemberton206210c2012-11-19 13:25:50 -0500286static int vx855gpio_remove(struct platform_device *pdev)
Daniel Drake99ea2622010-09-30 21:55:48 +0100287{
288 struct vx855_gpio *vg = platform_get_drvdata(pdev);
289 struct resource *res;
290
291 if (gpiochip_remove(&vg->gpio))
292 dev_err(&pdev->dev, "unable to remove gpio_chip?\n");
293
294 if (vg->gpi_reserved) {
295 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
296 release_region(res->start, resource_size(res));
297 }
298 if (vg->gpo_reserved) {
299 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
300 release_region(res->start, resource_size(res));
301 }
302
Daniel Drake99ea2622010-09-30 21:55:48 +0100303 kfree(vg);
304 return 0;
305}
306
307static struct platform_driver vx855gpio_driver = {
308 .driver = {
309 .name = MODULE_NAME,
310 .owner = THIS_MODULE,
311 },
312 .probe = vx855gpio_probe,
Bill Pemberton8283c4f2012-11-19 13:20:08 -0500313 .remove = vx855gpio_remove,
Daniel Drake99ea2622010-09-30 21:55:48 +0100314};
315
Mark Brown6f614152011-12-08 00:24:00 +0800316module_platform_driver(vx855gpio_driver);
Daniel Drake99ea2622010-09-30 21:55:48 +0100317
318MODULE_LICENSE("GPL");
319MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
320MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
321MODULE_ALIAS("platform:vx855_gpio");