blob: 5314ee4b947dd84b726ce354225ad3edcb32cd6e [file] [log] [blame]
Denis Turischevbe9b06b2010-03-02 10:48:55 +01001/*
Grant Likelyc103de22011-06-04 18:38:28 -06002 * GPIO interface for Intel Poulsbo SCH
Denis Turischevbe9b06b2010-03-02 10:48:55 +01003 *
4 * Copyright (c) 2010 CompuLab Ltd
5 * Author: Denis Turischev <denis@compulab.co.il>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License 2 as published
9 * by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; see the file COPYING. If not, write to
18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/io.h>
25#include <linux/errno.h>
26#include <linux/acpi.h>
27#include <linux/platform_device.h>
Denis Turischevf04ddfc2011-03-14 12:53:05 +020028#include <linux/pci_ids.h>
Denis Turischevbe9b06b2010-03-02 10:48:55 +010029
30#include <linux/gpio.h>
31
Mika Westerbergc479ff02014-10-21 13:33:56 +020032#define GEN 0x00
33#define GIO 0x04
34#define GLV 0x08
Denis Turischevbe9b06b2010-03-02 10:48:55 +010035
Mika Westerbergc479ff02014-10-21 13:33:56 +020036struct sch_gpio {
37 struct gpio_chip chip;
38 spinlock_t lock;
39 unsigned short iobase;
40 unsigned short core_base;
41 unsigned short resume_base;
42};
Denis Turischevbe9b06b2010-03-02 10:48:55 +010043
Mika Westerbergc479ff02014-10-21 13:33:56 +020044static unsigned sch_gpio_offset(struct sch_gpio *sch, unsigned gpio,
45 unsigned reg)
Denis Turischevbe9b06b2010-03-02 10:48:55 +010046{
Mika Westerbergc479ff02014-10-21 13:33:56 +020047 unsigned base = 0;
48
49 if (gpio >= sch->resume_base) {
50 gpio -= sch->resume_base;
51 base += 0x20;
52 }
53
54 return base + reg + gpio / 8;
55}
56
57static unsigned sch_gpio_bit(struct sch_gpio *sch, unsigned gpio)
58{
59 if (gpio >= sch->resume_base)
60 gpio -= sch->resume_base;
61 return gpio % 8;
62}
63
Chang Rebecca Swee Fun920dfd82015-01-21 18:32:21 +080064static int sch_gpio_reg_get(struct gpio_chip *gc, unsigned gpio, unsigned reg)
Mika Westerbergc479ff02014-10-21 13:33:56 +020065{
Linus Walleij737c8fc2015-12-07 14:21:49 +010066 struct sch_gpio *sch = gpiochip_get_data(gc);
Denis Turischevbe9b06b2010-03-02 10:48:55 +010067 unsigned short offset, bit;
Chang Rebecca Swee Fun920dfd82015-01-21 18:32:21 +080068 u8 reg_val;
69
70 offset = sch_gpio_offset(sch, gpio, reg);
71 bit = sch_gpio_bit(sch, gpio);
72
73 reg_val = !!(inb(sch->iobase + offset) & BIT(bit));
74
75 return reg_val;
76}
77
78static void sch_gpio_reg_set(struct gpio_chip *gc, unsigned gpio, unsigned reg,
79 int val)
80{
Linus Walleij737c8fc2015-12-07 14:21:49 +010081 struct sch_gpio *sch = gpiochip_get_data(gc);
Chang Rebecca Swee Fun920dfd82015-01-21 18:32:21 +080082 unsigned short offset, bit;
83 u8 reg_val;
84
85 offset = sch_gpio_offset(sch, gpio, reg);
86 bit = sch_gpio_bit(sch, gpio);
87
88 reg_val = inb(sch->iobase + offset);
89
90 if (val)
91 outb(reg_val | BIT(bit), sch->iobase + offset);
92 else
93 outb((reg_val & ~BIT(bit)), sch->iobase + offset);
94}
95
96static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
97{
Linus Walleij737c8fc2015-12-07 14:21:49 +010098 struct sch_gpio *sch = gpiochip_get_data(gc);
Denis Turischevbe9b06b2010-03-02 10:48:55 +010099
Mika Westerbergc479ff02014-10-21 13:33:56 +0200100 spin_lock(&sch->lock);
Chang Rebecca Swee Fun920dfd82015-01-21 18:32:21 +0800101 sch_gpio_reg_set(gc, gpio_num, GIO, 1);
Mika Westerbergc479ff02014-10-21 13:33:56 +0200102 spin_unlock(&sch->lock);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100103 return 0;
104}
105
Mika Westerbergc479ff02014-10-21 13:33:56 +0200106static int sch_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100107{
Chang Rebecca Swee Fun920dfd82015-01-21 18:32:21 +0800108 return sch_gpio_reg_get(gc, gpio_num, GLV);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100109}
110
Mika Westerbergc479ff02014-10-21 13:33:56 +0200111static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val)
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100112{
Linus Walleij737c8fc2015-12-07 14:21:49 +0100113 struct sch_gpio *sch = gpiochip_get_data(gc);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100114
Mika Westerbergc479ff02014-10-21 13:33:56 +0200115 spin_lock(&sch->lock);
Chang Rebecca Swee Fun920dfd82015-01-21 18:32:21 +0800116 sch_gpio_reg_set(gc, gpio_num, GLV, val);
Mika Westerbergc479ff02014-10-21 13:33:56 +0200117 spin_unlock(&sch->lock);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100118}
119
Mika Westerbergc479ff02014-10-21 13:33:56 +0200120static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned gpio_num,
121 int val)
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100122{
Linus Walleij737c8fc2015-12-07 14:21:49 +0100123 struct sch_gpio *sch = gpiochip_get_data(gc);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100124
Mika Westerbergc479ff02014-10-21 13:33:56 +0200125 spin_lock(&sch->lock);
Chang Rebecca Swee Fun920dfd82015-01-21 18:32:21 +0800126 sch_gpio_reg_set(gc, gpio_num, GIO, 0);
Mika Westerbergc479ff02014-10-21 13:33:56 +0200127 spin_unlock(&sch->lock);
Daniel Krueger1e0d9822014-04-07 14:20:32 +0200128
129 /*
130 * according to the datasheet, writing to the level register has no
131 * effect when GPIO is programmed as input.
132 * Actually the the level register is read-only when configured as input.
133 * Thus presetting the output level before switching to output is _NOT_ possible.
134 * Hence we set the level after configuring the GPIO as output.
135 * But we cannot prevent a short low pulse if direction is set to high
136 * and an external pull-up is connected.
137 */
Mika Westerbergc479ff02014-10-21 13:33:56 +0200138 sch_gpio_set(gc, gpio_num, val);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100139 return 0;
140}
141
Mika Westerbergc479ff02014-10-21 13:33:56 +0200142static struct gpio_chip sch_gpio_chip = {
143 .label = "sch_gpio",
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100144 .owner = THIS_MODULE,
Mika Westerbergc479ff02014-10-21 13:33:56 +0200145 .direction_input = sch_gpio_direction_in,
146 .get = sch_gpio_get,
147 .direction_output = sch_gpio_direction_out,
148 .set = sch_gpio_set,
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100149};
150
Bill Pemberton38363092012-11-19 13:22:34 -0500151static int sch_gpio_probe(struct platform_device *pdev)
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100152{
Mika Westerbergc479ff02014-10-21 13:33:56 +0200153 struct sch_gpio *sch;
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100154 struct resource *res;
Denis Turischevf04ddfc2011-03-14 12:53:05 +0200155
Mika Westerbergc479ff02014-10-21 13:33:56 +0200156 sch = devm_kzalloc(&pdev->dev, sizeof(*sch), GFP_KERNEL);
157 if (!sch)
158 return -ENOMEM;
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100159
160 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
161 if (!res)
162 return -EBUSY;
163
Mika Westerbergc479ff02014-10-21 13:33:56 +0200164 if (!devm_request_region(&pdev->dev, res->start, resource_size(res),
165 pdev->name))
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100166 return -EBUSY;
167
Mika Westerbergc479ff02014-10-21 13:33:56 +0200168 spin_lock_init(&sch->lock);
169 sch->iobase = res->start;
170 sch->chip = sch_gpio_chip;
171 sch->chip.label = dev_name(&pdev->dev);
Linus Walleij58383c72015-11-04 09:56:26 +0100172 sch->chip.parent = &pdev->dev;
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100173
Mika Westerbergc479ff02014-10-21 13:33:56 +0200174 switch (pdev->id) {
Laurent Navetbe41cf52013-03-20 13:16:00 +0100175 case PCI_DEVICE_ID_INTEL_SCH_LPC:
Mika Westerbergc479ff02014-10-21 13:33:56 +0200176 sch->core_base = 0;
177 sch->resume_base = 10;
178 sch->chip.ngpio = 14;
179
Laurent Navetbe41cf52013-03-20 13:16:00 +0100180 /*
181 * GPIO[6:0] enabled by default
182 * GPIO7 is configured by the CMC as SLPIOVR
183 * Enable GPIO[9:8] core powered gpios explicitly
184 */
Chang Rebecca Swee Fun920dfd82015-01-21 18:32:21 +0800185 sch_gpio_reg_set(&sch->chip, 8, GEN, 1);
186 sch_gpio_reg_set(&sch->chip, 9, GEN, 1);
Laurent Navetbe41cf52013-03-20 13:16:00 +0100187 /*
188 * SUS_GPIO[2:0] enabled by default
189 * Enable SUS_GPIO3 resume powered gpio explicitly
190 */
Chang Rebecca Swee Fun920dfd82015-01-21 18:32:21 +0800191 sch_gpio_reg_set(&sch->chip, 13, GEN, 1);
Laurent Navetbe41cf52013-03-20 13:16:00 +0100192 break;
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100193
Laurent Navetbe41cf52013-03-20 13:16:00 +0100194 case PCI_DEVICE_ID_INTEL_ITC_LPC:
Mika Westerbergc479ff02014-10-21 13:33:56 +0200195 sch->core_base = 0;
196 sch->resume_base = 5;
197 sch->chip.ngpio = 14;
Laurent Navetbe41cf52013-03-20 13:16:00 +0100198 break;
Denis Turischevf04ddfc2011-03-14 12:53:05 +0200199
Laurent Navetbe41cf52013-03-20 13:16:00 +0100200 case PCI_DEVICE_ID_INTEL_CENTERTON_ILB:
Mika Westerbergc479ff02014-10-21 13:33:56 +0200201 sch->core_base = 0;
202 sch->resume_base = 21;
203 sch->chip.ngpio = 30;
Laurent Navetbe41cf52013-03-20 13:16:00 +0100204 break;
Denis Turischevf04ddfc2011-03-14 12:53:05 +0200205
Chang Rebecca Swee Fun92021492014-12-08 17:38:10 +0800206 case PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB:
207 sch->core_base = 0;
208 sch->resume_base = 2;
209 sch->chip.ngpio = 8;
210 break;
211
Laurent Navetbe41cf52013-03-20 13:16:00 +0100212 default:
Mika Westerbergc479ff02014-10-21 13:33:56 +0200213 return -ENODEV;
Denis Turischevf04ddfc2011-03-14 12:53:05 +0200214 }
215
Mika Westerbergc479ff02014-10-21 13:33:56 +0200216 platform_set_drvdata(pdev, sch);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100217
Linus Walleij737c8fc2015-12-07 14:21:49 +0100218 return gpiochip_add_data(&sch->chip, sch);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100219}
220
Bill Pemberton206210c2012-11-19 13:25:50 -0500221static int sch_gpio_remove(struct platform_device *pdev)
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100222{
Mika Westerbergc479ff02014-10-21 13:33:56 +0200223 struct sch_gpio *sch = platform_get_drvdata(pdev);
Samuel Ortiz8e7aafe2010-03-05 17:14:01 +0100224
Mika Westerbergc479ff02014-10-21 13:33:56 +0200225 gpiochip_remove(&sch->chip);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100226 return 0;
227}
228
229static struct platform_driver sch_gpio_driver = {
230 .driver = {
231 .name = "sch_gpio",
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100232 },
233 .probe = sch_gpio_probe,
Bill Pemberton8283c4f2012-11-19 13:20:08 -0500234 .remove = sch_gpio_remove,
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100235};
236
Mark Brown6f614152011-12-08 00:24:00 +0800237module_platform_driver(sch_gpio_driver);
Denis Turischevbe9b06b2010-03-02 10:48:55 +0100238
239MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
240MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH");
241MODULE_LICENSE("GPL");
242MODULE_ALIAS("platform:sch_gpio");